KR102581794B1 - Organic lightemitting display and driving method for the same - Google Patents

Abstract

Embodiments of the present invention include a display panel including a plurality of pixels, a drive circuit that generates a data signal in response to an image signal and supplies the data signal to the plurality of pixels, a timing controller that supplies the image signal to the drive circuit, It includes a power supply unit that supplies a first power source to the display panel and a second power source with a voltage level lower than that of the first power source, wherein the threshold voltage of a plurality of pixels is sensed in a first period, and the threshold voltage is detected in a second period in response to the threshold voltage. The generated image signal is received, a data signal is generated and supplied to a plurality of pixels, the plurality of pixels receive the data signal and the first reference voltage, and in the third period, the plurality of pixels receive the data signal and the first reference voltage. A driving current is generated in response, and the drive circuit generates a data signal in response to the first gradation voltage and the second gradation voltage, and the voltage level of the first gradation voltage is variable in response to the threshold voltage sensed in the first period. An organic light emitting display device and a method of driving the same can be provided.

Description

Organic light emitting display device and driving method thereof {ORGANIC LIGHTEMITTING DISPLAY AND DRIVING METHOD FOR THE SAME}

Embodiments of the present invention relate to an organic light emitting display device and a method of driving the same.

As the information society develops, the demand for display devices for displaying images is increasing in various forms, including liquid crystal display devices (LCDs), plasma display devices, and organic light emitting display devices ( Various types of display devices such as OLED (Organic Light Emitting Display Device) are being used. Among these, organic light emitting display devices display images using organic light emitting diodes, which are self-luminous devices, so they are easy to make thinner and have the advantage of excellent viewing angle and contrast ratio.

In an organic light emitting display device, the size of the driving current flowing through a plurality of pixels may differ due to differences in the characteristics of the pixels, which may cause a problem of deterioration in image quality. Therefore, image quality can be improved by compensating for differences in pixel characteristics. However, in order to compensate for the characteristic deviation of the pixel, the characteristic deviation is sensed, and if the sensing becomes inefficient, the image quality may not be improved.

Recently, there have been efforts to reduce the power consumption of display devices for environmental issues or to increase usage time. Additionally, the display device has a problem in that power consumption increases when the voltage level of the power supplies provided for driving is high. Therefore, there is a need to lower the voltage level of power supplies provided to drive the display device.

The purpose of embodiments of the present invention is to provide an organic light emitting display device and a method of driving the same that can improve image quality.

Additionally, another object of the embodiments of the present invention is to provide an organic light emitting display device and a method of driving the same that can reduce power consumption.

In one aspect, embodiments of the present invention include a display panel including a plurality of pixels, a drive circuit that generates a data signal in response to an image signal and supplies the data signal to the plurality of pixels, and a display panel that supplies the image signal to the drive circuit. It includes a timing controller and a power supply unit that supplies first power to the display panel and a second power having a voltage level lower than the first power, sensing the threshold voltage of a plurality of pixels in the first period and detecting the threshold voltage in the second period. The video signal generated in response is received, a data signal is generated, and supplied to a plurality of pixels. The plurality of pixels receive the data signal and the first reference voltage, and in the third period, the plurality of pixels receive the data signal and the first reference voltage. A driving current is generated in response to the reference voltage, and the drive circuit generates a data signal in response to the first gradation voltage and the second gradation voltage, and the voltage level of the first gradation voltage corresponds to the threshold voltage sensed in the first period. Thus, a variable organic light emitting display device can be provided.

In another aspect, embodiments of the present invention provide a display panel including a plurality of pixels, a first gradation voltage having a voltage level lower than the first reference voltage, and a second gradation voltage having a voltage level higher than the first reference voltage. , a P-gamma circuit that receives first gray-scale voltage information about the voltage level of the first gray-scale voltage, determines the voltage level of the first reference voltage, and supplies it; receives threshold voltage information of a plurality of pixels and provides first gray-scale voltage information An organic light emitting display device can be provided including a timing controller that sets , and a drive circuit that generates a data signal in response to the first gray scale voltage and the second gray scale voltage and supplies it to a plurality of pixels.

In another aspect, embodiments of the present invention provide a driving method for driving an organic light emitting display device including a plurality of pixels, comprising: sensing a threshold voltage of a plurality of pixels; a first gray scale voltage lower than a first reference voltage; and generating a second gray scale voltage higher than the first reference voltage, where the voltage level of the first gray scale voltage is set in response to the threshold voltage, and driving the organic light emitting diode in response to the first gray scale voltage and the second gray scale voltage. A method of driving an organic light emitting display device including the steps of:

According to embodiments of the present invention, an organic light emitting display device capable of improving image quality and a method of driving the same can be provided.

According to embodiments of the present invention, an organic light emitting display device capable of reducing power consumption and a driving method thereof can be provided.

1 is a structural diagram showing an organic light emitting display device according to embodiments of the present invention.
FIG. 2 is a plan view showing an embodiment of the display panel shown in FIG. 1 .
FIG. 3 is a circuit diagram showing an example of the pixel shown in FIG. 1.
FIG. 4 is a graph showing the distribution of threshold voltages of the pixels shown in FIG. 3.
FIG. 5 is a waveform diagram showing an example of signals input during a driving period in which an organic light emitting diode emits light in the pixel shown in FIG. 3.
FIG. 6 is a structural diagram showing one embodiment of the drive circuit shown in FIG. 1.
FIG. 7 is a circuit diagram showing an embodiment of the digital-to-analog converter shown in FIG. 6.
FIG. 8 is a structural diagram showing an embodiment of an analog-to-digital converter and an operation unit connected to the pixel shown in FIG. 6.
FIG. 9 is a circuit diagram showing an embodiment of the calculation unit shown in FIG. 8.
Figure 10 is a timing diagram showing the operation of the calculation unit in the sensing period.
FIG. 11 is a structural diagram showing one embodiment of the configuration of the timing controller and power supply unit shown in FIG. 1.
Figure 12 is a conceptual diagram comparing the voltage levels of data signals.
Figure 13 is a graph showing the voltage level of a data signal according to usage time in an organic light emitting display device according to embodiments of the present invention.
Figure 14 is a flowchart showing a method of driving an organic light emitting display device according to an embodiment of the present invention.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. The present embodiments only serve to ensure that the disclosure of the present invention is complete and that common knowledge in the technical field to which the present invention pertains is not limited. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

In addition, the shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, it may also include the plural, unless specifically stated otherwise.

Additionally, when interpreting the components in the embodiments of the present invention, it should be interpreted to include a margin of error even if there is no separate explicit description.

Additionally, when describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are only used to distinguish the component from other components, and the nature, sequence, order, or number of the components are not limited by the term. When a component is described as being “connected,” “coupled,” or “connected” to another component, that component may be directly connected or connected to that other component, but there are no other components between each component. It should be understood that may be “interposed” or that each component may be “connected,” “combined,” or “connected” through other components. In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

Additionally, the components in the embodiments of the present invention are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

In addition, the features (configurations) in the embodiments of the present invention can be partially or fully combined, combined, or separated from each other, and various technological interconnections and drives are possible, and each embodiment is implemented independently of each other. It may be possible, or it may be possible to implement them together due to a related relationship.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

FIG. 1 is a structural diagram showing an organic light emitting display device according to embodiments of the present invention, and FIG. 2 is a plan view showing an embodiment of the display panel shown in FIG. 1.

Referring to FIGS. 1 and 2 , the organic light emitting display device 100 may include a display panel 110, a drive circuit 120, a timing controller 130, and a power supply unit 140.

The display panel 110 may be arranged so that a plurality of gate lines (GL1,...,GLn) and a plurality of data lines (DL1,...,DLm) intersect. Additionally, it may include a plurality of pixels 101 formed corresponding to an area where a plurality of gate lines (GL1,...,GLn) and a plurality of data lines (DL1,...,DLm) intersect. The plurality of pixels 101 may each emit red, green, blue, or white light. However, the color of light emitted by the pixel 101 is not limited to this. The wiring disposed on the display panel 110 is not limited to a plurality of gate lines (GL1,...,GLn) and a plurality of data lines (DL1,...,DLm).

Additionally, the display panel 110 may include a gate signal generation circuit 112 as shown in FIG. 2 . Gate signal generation circuits 111a and 111b may be disposed on both sides of the display panel 110. The gate signal generation circuits 111a and 111b arranged on the left side of the display panel 110 may be referred to as the first gate signal generation circuit 111a, and the gate signal generation circuits 111a and 111b arranged on the right side may be referred to as the first gate signal generation circuit 111a. It can be referred to as a two-gate signal generation circuit (111b). The first gate signal generation circuit 111a may be connected to an odd-numbered gate line among the plurality of gate lines GL1,...,GLn, and the second gate signal generation circuit 111b may be connected to an even-numbered gate line. However, it is not limited to this.

The drive circuit 120 may apply data signals to a plurality of data lines DL1,...,DLm. The data signal may correspond to a gray level, and the voltage level of the data signal may be determined according to the corresponding gray level. The voltage of the data signal may be referred to as data voltage.

Here, the number of drive circuits 120 is shown as one, but is not limited thereto and may be two or more depending on the size and resolution of the display panel 110. Additionally, the drive circuit 120 may be implemented as an integrated circuit.

The timing controller 130 can control the drive circuit 120. Additionally, the timing controller 130 can transmit an image signal corresponding to the data signal to the drive circuit 120. The video signal may be a digital signal. The timing controller 130 can correct the image signal and transmit it to the drive circuit 120. The operation of the timing controller 130 is not limited to this. Additionally, the timing controller 130 may be implemented as an integrated circuit.

The power unit 140 may supply first power (EVDD) and second power (EVSS). The power supply unit 140 may receive first power (EVDD) from an external set and provide it to the display panel 110. Additionally, the power unit 140 may determine and supply the voltage level of the second power source (EVSS). The power supply unit 140 may include a gate signal generation circuit and a level shifter that applies a signal and/or voltage to the gate signal generation circuit. Additionally, the power supply unit 140 can supply a driving voltage to the drive circuit 120, and the drive circuit 120 can supply a grayscale voltage (Gamma voltage) corresponding to the image signal. The gray scale voltage (Gamma voltage) includes a first gray scale voltage and a second gray scale voltage, where the first gray scale voltage has a voltage level lower than the first reference voltage and the second gray scale voltage has a voltage level higher than the first reference voltage. You can. Here, the voltage level of the first reference voltage may be 0V. However, it is not limited to this. The difference between the voltage levels of the first gradation voltage and the second gradation voltage may be constant. Additionally, the voltage level of the first gradation voltage may not be a fixed voltage level. The part that supplies the gray scale voltage from the power supply unit 140 to the drive circuit 120 may be referred to as a P-gamma circuit.

The power supply unit 140 may include a level shifter (not shown) that applies a signal and/or voltage to the gate signal generation circuits 111a and 111b.

FIG. 3 is a circuit diagram showing an example of the pixel shown in FIG. 1, and FIG. 4 is a graph showing the distribution of the threshold voltage of the pixel shown in FIG. 3.

Referring to Figures 3 and 4, the pixel may include an organic light emitting diode (OLED) and a pixel circuit that drives the organic light emitting diode (OLED). The pixel circuit may include a first transistor (M1), a second transistor (M2), a third transistor (M3), and a capacitor (Cst).

The first transistor (M1) has a first electrode connected to the first power line (VL1) through which the first power (EVDD) is transmitted, a gate electrode connected to the first node (N1), and a second node (N2). Two electrodes can be connected. The first transistor M1 may cause a driving current to flow to the second node N2 in response to the voltage delivered to the second node N1. The first electrode of the first transistor M1 may be a drain electrode, and the second electrode may be a source electrode. However, it is not limited to this.

The current flowing to the second node (N2) may correspond to Equation 1 below.

Here, Id means the amount of current flowing to the second node (N2), k means the electron mobility of the first transistor (M1), and V _GS is the gate electrode and source electrode of the first transistor (M1). means the voltage difference, and Vth means the threshold voltage of the first transistor (M1).

Therefore, since the amount of current varies depending on the deviation of the threshold voltage, deterioration of image quality can be prevented by correcting the data signal in response to the deviation of the threshold voltage.

The display panel 110 shown in FIG. 1 includes a plurality of pixels, and the distribution of the threshold voltage of each pixel 101 may appear as shown in FIG. 4. That is, the pixels 101 of the display panel 110 may have a negative or positive threshold voltage.

The second transistor M2 may have a first electrode connected to the data line DL, a gate electrode connected to the gate line GL, and a second electrode connected to the second node N2. The second transistor (M2) provides a data voltage (Vdata) corresponding to a data signal or a sensing voltage (Vsense) corresponding to a sensing signal to the first node (N1) in response to the gate signal transmitted through the gate line (GL). This can be delivered. The first electrode of the second transistor M2 may be a drain electrode, and the second electrode may be a source electrode. However, it is not limited to this.

The third transistor (M3) has a first electrode connected to the second node (N2), a gate electrode connected to the sensing control signal line (SSL), and a second power line (VL2) that transmits the first reset voltage (VPRER). A second electrode may be connected to. In addition, the second power line (VL2) may be connected to a calculation unit 123 that calculates the magnitude of the current flowing in the second power line (VL2), and the second initialization voltage (Vref_CL) delivered to the calculation unit 123 is the first. 2Can be connected to the power line (VL2). The third transistor (M3) can transmit the first initialization voltage (VPRER) or the second initialization voltage (Vref_CL) to the second node (N2) by the sensing control signal transmitted through the sensing control signal line (SSL). The first initialization voltage (VPRER) initializes the second node (N2) when the data voltage (Vdata) is applied to the data line (DL), and the second initialization voltage (Vref_CL) initializes the sensing voltage (Vsense) to the data line (DL). ) is applied, the second node (N2) can be initialized. However, it is not limited to this. The first initialization voltage VPRER may be applied to the second node N2 when the first switch PRER and the third transistor M3 are turned on. And, the second initialization voltage Vref_CL can be applied to the second node N2 when the third transistor M3 is turned on.

Additionally, information corresponding to the characteristic value of the pixel 101 may correspond to the voltage applied to the second node N2. Therefore, the characteristic value of the pixel 101 can be determined and the data signal can be compensated using the voltage of the second node N2. The characteristic value of the pixel 101 may be the threshold voltage of the first transistor (M1) and deterioration information of the organic light emitting diode (OLED). However, it is not limited to this. The first electrode of the third transistor M3 may be a drain electrode, and the second electrode may be a source electrode. However, it is not limited to this.

The capacitor Cst may be connected between the first node N1 and the second node N2. The capacitor Cst can keep the voltage of the gate electrode and the source electrode of the first transistor M1 constant.

The organic light emitting diode (OLED) may have an anode connected to a second node (N2) and a cathode electrode connected to a second power source (EVSS). Here, the second power source (EVSS) may be a preset voltage. Additionally, the voltage level of the second power source (EVSS) may be lower than 0V. However, it is not limited to this. Organic light-emitting diodes (OLEDs) can emit light in response to the amount of current when current flows from the anode electrode to the cathode electrode. Organic light-emitting diodes (OLEDs) can emit any one color among red, green, blue, and white. However, it is not limited to this.

The pixel circuit of the pixel 101 employed in the organic light emitting display device 100 is not limited to this.

Additionally, an analog-to-digital converter 120b may be connected to the pixel circuit. The analog-to-digital converter 120b may be connected to the second power line VL2. The analog-to-digital converter (120b) may be connected through the second power line (VL2) and the sampling switch (SAMP). The analog-to-digital converter 120a can receive the voltage of the second node N2 through the second power line VL2 and convert it into a digital signal. When the sampling switch (SAMP) is turned on, the analog-to-digital converter (120a) can receive the voltage level of the second power line (VL2). The digital signal converted by the analog-to-digital converter 120a may be supplied to the timing controller 130. However, it is not limited to this.

Here, the second node (N2) is shown as being connected to the analog-to-digital converter (120b) through the operation unit 123 and the sampling switch (SAMP), but this is not limited to this, and the analog-to-digital converter (120b) is the second When sensing the threshold voltage using the voltage of the node N2, the configuration of the calculation unit 123 can be excluded.

FIG. 5 is a waveform diagram showing an example of signals input during a driving period in which an organic light emitting diode emits light in the pixel shown in FIG. 2.

Referring to FIG. 5, the voltage level of the first initialization voltage VPRER delivered to all pixels 101 of the display panel 110 may be fixed at 0V. For example, the voltage level of the first initialization voltage (VPRER) supplied to one display panel 110 may be 0V, but the voltage level of the first initialization voltage (VPRER) supplied to another display panel 110 may be 0V. It may be 1V. The voltage level of the first initialization voltage (VPRER) described here is an example and is not limited thereto, and may be lower than the threshold voltage of the organic light emitting diode (OLED). However, the voltage level of the first initialization voltage VPRER may be a fixed voltage that does not change depending on the usage time or lifespan of the organic light emitting display device. Also, the second initialization voltage Vref_CL may not be transmitted to the second power line VL2. Additionally, the driving period (Td) may include a first driving period (Td1) and a second driving period (Td2).

In the first driving period (TD), the gate signal (GATE) and the sensing control signal (SENSE) may each be supplied in a high state. Here, the gate signal (GATE) and the sensing control signal (SENSE) are shown as being supplied in a high state at the same time, but the present invention is not limited to this. When the gate signal (GATE) and the sensing control signal (SENSE) are supplied in a high state, the second transistor (M2) and the third transistor (M3) can be turned on. Additionally, the first switch (RPRE) connected to the second power line (VL2) may be turned on.

When the second transistor M2 is turned on, the data signal transmitted to the data line DL may be transmitted to the first node N1. The data signal may be a voltage obtained by compensating the threshold voltage of the first transistor (M1). And, when the third transistor M3 and the first switch RPRE are turned on, the first initialization voltage VPRER can be transmitted to the second node N2. At this time, as mentioned above, the voltage level of the first initialization voltage (VPRER) may be 0V. Therefore, the voltage level of the second node (N2) becomes 0V, and a voltage lower than the threshold voltage of the organic light-emitting diode (OLED) is transmitted to the anode electrode of the organic light-emitting diode (OLED), preventing current from flowing through the organic light-emitting diode (OLED). It may not happen. And, since the third transistor (M3) and the first switch (PPRE) connected to the second node (N2) are turned on, the driving current generated in response to the data signal is connected to the second node (N2) and the third transistor (M3). ), may flow through the first switch (PPRE). Accordingly, the voltage of the first node N1 may maintain the voltage Vdata of the data signal.

Also, the gate signal (GATE) and the sensing control signal (SENSE) may be supplied in a low state during the second driving period (Td2). When the gate signal (GATE) and the sensing control signal (SENSE) are supplied in a low state, the second transistor (M2) and the third transistor (M3) may be turned off. Here, the gate signal (GATE) and the sensing control signal (SENSE) are shown as being supplied as low signals at the same time, but the present invention is not limited to this.

When the second transistor (M2) and the third transistor (M3) are turned off in response to the gate signal (GATE) and the sensing control signal (SENSE), the power supplied from the first electrode of the first transistor (M1) to the second electrode The voltage of the second node (N2) may increase due to the driving current. The voltage of the second node N2 may increase until it is higher than the threshold voltage of the organic light emitting diode (OLED), causing a driving current to flow to the organic light emitting diode (OLED). At this time, the voltage of the data signal is maintained at the first node N1 by the capacitor Cst, so the driving current can flow in response to the data signal as shown in Equation 1 above.

If the voltage (Vdata) of the data signal in the pixel 101 driven as above is supplied lower than the threshold voltage of the first transistor (M1), the driving current does not flow to the first transistor (M1) and the pixel 101 Black can be displayed. However, as shown in FIG. 3, the distribution of the threshold voltage of the first transistor (M1) included in the pixel 101 disposed on the display panel 110 has both negative and positive voltages, and has a specific When the threshold voltage of the first transistor (M1) of a pixel is a negative voltage, a specific pixel can display black only when the voltage level of the first node (N1) is supplied at a voltage lower than the threshold voltage. Therefore, in order for the pixel 101 to display black, the voltage (Vdata) of the data signal must have a negative voltage. However, it is not limited to this, and even when displaying a low gray scale, there may be cases where the voltage (Vdata) of the data signal must be transmitted as a negative voltage.

FIG. 6 is a structural diagram showing one embodiment of the drive circuit shown in FIG. 1.

Referring to FIG. 6, the drive circuit 120 may include a digital-to-analog converter 120a and an analog-to-digital converter 120b. However, it is not limited to this.

The digital-to-analog converter 120a may be connected to the data line DL. In addition, the digital-analog converter 120a can receive a video signal from the timing controller 130, generate a data voltage (Vdata) corresponding to the data signal, and supply it to the data line (DL).

The analog-to-digital converter 120b may be connected to the second power line VL2. The analog-to-digital converter 120b can calculate the magnitude of the voltage level applied to the second power line VL2, convert the calculated voltage level into a digital signal (D.Sense), and output it.

FIG. 7 is a circuit diagram showing an embodiment of the digital-to-analog converter shown in FIG. 6.

Referring to FIG. 7, the digital-to-analog converter 120a may include a resistance string 121a in which a plurality of resistors R are connected in series. Additionally, the first gray scale voltage (Gamma Min) and the second gray scale voltage (Gamma Max) may be transmitted to both ends of the resistance string 121a, respectively. The first gray scale voltage (Gamma Min) and the second gray scale voltage (Gamma Max) may be supplied from the P-gamma circuit 140a. Additionally, an output terminal may be connected between the resistor (R) and the resistor (R). Here, the number of resistors R included in the resistance string 121a is shown as 6, but is not limited thereto. That is, the digital-to-analog converter 120a divides the voltage levels of the first gray scale voltage (Gamma Min) and the second gray scale voltage (Gamma Max) into seven data voltages (Vdata0, Vdata1, Vdata2, Vdata3, Vdata4, Vdata5). ,Vdata6) can be output. The digital-analog converter 120a includes a switch (not shown) connected to the output terminal and selects the switch to convert one of seven data voltages (Vdata0, Vdata1, Vdata2, Vdata3, Vdata4, Vdata5, and Vdata6) into the voltage of the data signal. Can be printed. However, it is not limited to this.

The first gray scale voltage (Gamma Min) can be supplied as 0V and the second gray scale voltage (Gamma Max) can be supplied as 6V. Assuming that the size of each resistance in the resistance string 121a is the same, the digital-to-analog converter 120a can output voltages of 0V, 1V, 2V, 3V, 4V, 5V, and 6V. That is, the voltage of the data signal may have a value between 0V and 6V.

Additionally, the first gray scale voltage (Gamma Min) can be supplied at -4V and the second gray scale voltage (Gamma Max) can be supplied at 2V. Assuming that the size of each resistance in the resistance string 121a is the same, the digital analog converter 120a can output voltages of -4V, -3V, -2V, -1V, 0V, 1V, and 2V. That is, the voltage of the data signal may have a value between -4V and 2V.

Accordingly, when the P-gamma circuit 140a supplies the first gray scale voltage (Gamma Min) as a negative voltage, the voltage of the data signal output from the digital-to-analog converter 120a may include a negative voltage. Therefore, even if the voltage level of the first initialization voltage VPRER is 0V, the data signal can supply a negative voltage and the pixel 101 can display black. Here, the voltage level of the data signal is shown as including seven voltage levels, but it is not limited to this, and the voltage level included in the voltage level of the data signal corresponds to the gradation that can be expressed on the display panel 110. The number can be determined. For example, when the display panel 110 displays 255 gradations, the number of voltage levels may be 256.

FIG. 8 is a structural diagram showing an embodiment of an analog-to-digital converter and an operation unit connected to the pixel shown in FIG. 6.

Referring to FIG. 8, the analog-to-digital converter 120b may be connected to the second power line VL2 shown in FIG. 3 through the calculation unit 123. The analog-to-digital converter 120b can output a digital signal (D.sense) in response to the magnitude of the voltage level calculated by the calculation unit 123. In addition, the calculation unit 121b and the analog-to-digital converter 120b are connected through a sampling switch (SAMP), and when the sampling switch (SAMP) is turned on, the analog-to-digital converter 120b can receive the output voltage from the calculation unit 123. .

That is, the calculation unit 121b can calculate the magnitude of the voltage level by integrating the voltage (VN2) of the second power line (VL2) and the second node. The size of the voltage level calculated by the calculation unit 123 may correspond to the threshold voltage of the first transistor M1 shown in FIG. 3. That is, the magnitude of the voltage calculated by the calculation unit 121b may correspond to threshold voltage information (ϕ) corresponding to the threshold voltage. And, the analog-to-digital converter 120b can output a digital signal (D.sense) in response to the voltage level calculated by the calculation unit 123. The analog-to-digital converter 120b can convert analog signals into digital signals in response to negative and positive reference voltages. The analog-to-digital converter 120b can output a digital signal (D.sense) by comparing the voltage level of the threshold voltage output from the calculation unit 123 with a negative or positive reference voltage. The digital signal (D.sense) output from can be transmitted to the timing controller 130, and the timing controller 130 can generate an image signal using the digital signal (D.sense). Accordingly, the image signal generated by the timing controller 130 may correspond to the threshold voltage. The threshold voltage information (ϕ) converted into a digital signal (D.sense) can be referred to as the threshold voltage information (ϕcomp) shown in FIG. 12.

FIG. 9 is a circuit diagram showing an embodiment of the calculation unit shown in FIG. 8, and FIG. 10 is a timing diagram showing the operation of the calculation unit in the sensing period.

Referring to FIGS. 9 and 10 , the calculation unit 123 may include an amplifier 1211 and a feedback capacitor (Cf) connected between the negative input terminal (-) of the amplifier 1211 and the output terminal (Vo). Additionally, the calculation unit 121b may include an initialization switch (SW1) connected in parallel to the feedback capacitor (Cf). A predetermined voltage may be transmitted to the positive input terminal (+) of the amplifier 1211.

And, the negative input terminal (-) of the amplifier 1211 may be connected to the second power line VL2 shown in FIG. 3. Here, the second power line VL2 is shown as being directly connected to the negative input terminal (-), but it can be connected through the third transistor M3 shown in FIG. 3. However, it is not limited to this and can be connected through a separate switch.

And, the sensing period (Ts) may be performed after the initialization period (Tini) is performed. During the initialization period (Tini), the gate signal (GATE) and the sensing control signal (SENSE) may be supplied in a high state. The gate signal (GATE) and the sensing control signal (SENSE) can be supplied in a high state at the same time. However, it is not limited to this. When the gate signal (GATE) and the sensing control signal (SENSE) are supplied in a high state, the second transistor (M2) and the third transistor (M3) may be turned on. Additionally, the initialization switch (SW1) may be turned on. When the initialization switch (SW1) is turned on, the same voltage as the positive input terminal (+) is transmitted to the negative input terminal (-), so that the feedback capacitor (Cf) can be initialized, and this causes the amplifier 1211 to change due to the characteristics of the amplifier 1211. The voltage of the output terminal (Vo) may be equal to the positive input terminal (+) of the amplifier 1211. For example, the voltage applied to the output terminal (Vo) and the positive input terminal (+) of the amplifier 1211 may be the second initialization voltage (Vref_CL). And, the second initialization voltage (Vref_CL) may be transmitted to the second node (N2). Accordingly, the voltage at the output terminal (Vo) of the amplifier 1211 may be the second reference voltage (Vref-CL).

And, the initialization switch (SW1) may be turned off in the sensing period (Ts). When the initialization switch (SW1) is turned off, the feedback capacitor (Cf) can charge the voltage difference between the positive input terminal (+) and the output terminal (Vo) of the amplifier 1211. Additionally, the voltage at the output terminal (Vo) of the amplifier 1211 may be lowered in response to the voltage charged in the feedback capacitor (Cf). That is, in the sensing period (Ts), the voltage of the output terminal (Vo) of the amplifier 1211 may be lower than the second reference voltage (Vref-CL). Additionally, the calculation unit 123 may output a negative voltage during the sensing period (Ts). And, when the sampling switch (SAMP) is turned on, the voltage of the output terminal (Vo) of the amplifier 1211 can be transmitted to the analog-to-digital converter (120b).

The analog-to-digital converter 120b can output a digital signal (D.Sense) by comparing the negative and positive reference voltages. In other words, the analog-to-digital converter 120b can generate a digital signal (D.Sense) even if a negative or positive voltage is transmitted from the calculation unit 123. Therefore, the analog-to-digital converter 120b can use the entire output range. That is, when the voltage level of the initialization voltage (Vref_CL) input to the positive input terminal (+) of the amplifier 1211 becomes 0V, the voltage level of the output terminal (Vo) of the amplifier 1211 is the maximum voltage of the analog-to-digital converter 120b. Since the range can be lowered, the resolution of the analog-to-digital converter (12b) can be increased. Because of this, the accuracy of threshold voltage sensing can be improved.

FIG. 11 is a structural diagram showing one embodiment of the configuration of the timing controller and power supply unit shown in FIG. 1.

Referring to FIG. 11, the timing controller 130 receives threshold voltage information (ϕcomp) about the threshold voltage (ϕ) as a digital signal (D.sense). Voltage information including the voltage levels of the first gradation voltage (Gamma Min), the second gradation voltage (Gamma Max), and the first power supply (EVDD) corresponding to the threshold voltage information (ϕcomp) using the threshold voltage information (ϕcomp). Threshold voltage information (ϕcomp) is received from the voltage table 132 and the input unit 131 that stores , and the first gradation voltage is generated using the voltage information stored in the voltage table 132 using the received threshold voltage information (ϕcomp). It may include a voltage setting unit 133 that sets (Gamma Min), the second gray scale voltage (Gamma Max), the voltage level of the first power source (EVDD), and the voltage level of the second power source (EVSS).

Then, the voltage setting unit 133 transmits information about the first gray scale voltage (Gamma Min) and the second gray scale voltage (Gamma Max) to the negative voltage source 140b, and the negative voltage source 140b transmits the first gray scale voltage (Gamma Max) to the negative voltage source 140b. Information about the voltage (Gamma Min) and the second gradation voltage (Gamma Max) can be transmitted to the P-gamma circuit 140a. Additionally, the P-gamma circuit 140a can output a first gray scale voltage (Gamma Min) and a second gray scale voltage (Gamma Max). The first gradation voltage (Gamma Min) output from the P-gamma circuit 140a can be changed in response to the threshold voltage, and as shown in Equation 1 above, the size of the driving current is the first transistor (M1). It can correspond to the difference between the gate voltage (Vg) and the threshold voltage (Vth) (when Vs is 0), and the gate voltage (Vg) of the first transistor (M1) can be changed by the threshold voltage. When calculating the data signal, if the gate voltage (Vg) is not changed by the threshold voltage, the margin of the threshold voltage information (ϕcomp) must be considered as shown in (a) of FIG. 12, but the gate voltage (Vg) ) is changed by the threshold voltage, as shown in (b) of FIG. 12, only the voltage (Vdata) and threshold voltage information (ϕcomp) of the data signal can be considered, thereby lowering the voltage level of the data signal. As a result, the power consumption of the organic light emitting display device 100 can be reduced. Here, the threshold voltage information ϕcomp is designed to convert the distributed threshold voltage into a digital signal as shown in FIG. 4, and may be converted to a digital signal and shifted to the right in the graph shown in FIG. 4.

Additionally, the voltage setting unit 133 may set the voltage level of the first power source (EVDD). The voltage level of the first power source EVDD may be set to correspond to the sum of the threshold voltage and the difference between the voltage of the gate electrode of the first transistor and the voltage of the source electrode (second node N2 in FIG. 2). The voltage of the gate electrode of the first transistor (M1) has no margin set as shown in (b) of FIG. 12, so the second gray scale voltage (Gamma Max) is lower than that shown in (a) of FIG. 12. can be set low.

Additionally, the voltage level of the first gray scale voltage (Gamma Min) is not fixed and can be lowered to a negative voltage, so the voltage level of the first power supply (EVDD) can be lowered. Therefore, power consumption can be reduced by using a low voltage level of the first power supply (EVDD). The first power supply (EVDD) is supplied to the display panel 110 from the first power supply unit 160 in the external set, bypassing the power unit 140 shown in FIG. 1, and the first power supply unit 160 is Information about the voltage level of the first power source (EVDD) provided by the voltage setting unit 133 may be received, the voltage level of the first power source (EVDD) may be determined, and the voltage level of the first power source (EVDD) may be determined and supplied to the power source unit 140.

Additionally, the negative voltage source 140b may supply a second power source (EVSS). Accordingly, the second power source (EVSS) may have a voltage lower than 0V. Additionally, the negative voltage source 140b may supply the first reference voltage as a negative voltage to the analog-to-digital converter 120b of the drive circuit 120 shown in FIG. 6.

Figure 13 is a graph showing the voltage level of a data signal according to usage time in an organic light emitting display device according to embodiments of the present invention.

Referring to FIG. 13, the horizontal axis represents the passage of time, and the vertical axis represents the difference between the second gray scale voltage (Gamma Max) and the first gray scale voltage (Gamma Min). Even as time passes, the voltage of the data signal (Vdata) remains constant, and it can be seen that the size of the threshold voltage information (ϕcomp) increases with the passage of time. In response to the size of the threshold voltage information (ϕcomp) increasing over time, the size of the threshold voltage information (ϕcomp) can be added to the data signal (Vdata) signal. That is, the first gray scale voltage (Gamma Min) can be calculated by reflecting the change in the threshold voltage information (ϕcomp) due to deterioration over time. Because of this, it is possible to prevent image quality from deteriorating depending on usage time.

Figure 14 is a flowchart showing a method of driving an organic light emitting display device according to an embodiment of the present invention.

Referring to FIG. 14, the driving method of the organic light emitting display device can sense the threshold voltage of all pixels of the display panel 110 of the organic light emitting display device 100 (S1400). Threshold voltage information can be generated by converting the sensed threshold voltage into a digital signal. The magnitude of the threshold voltage can be calculated using an integrator. Additionally, the analog-to-digital converter 120b converts the threshold voltage into a digital signal (D.sense) to generate threshold voltage information.

And, the first gray scale voltage (Gamma Min) can be set (S1410). The voltage level of the first gray scale voltage (Gamma Min) can be changed in response to the size of the threshold voltage. The current flowing by the first transistor (M1) included in the pixel 101 flows as shown in Equation 1 above. After fixing the voltage of the second node (N2) at 0V, the voltage of the first transistor (M1) is If the voltage (Vdata) of the data signal transmitted to the gate electrode is adjusted to correspond to the size of the threshold voltage, the voltage level of the data signal can be lowered, thereby reducing power consumption of the organic light emitting display device 100. Additionally, in response to lowering the voltage level of the data signal, the voltage level of the first power source (EVDD) can also be lowered, thereby reducing power consumption of the organic light emitting display device 100.

Then, each pixel 101 of the organic light emitting display device 100 can be made to emit light in response to the set first gray scale voltage (Gamma Min) and the corresponding second gray scale voltage (Gamma Max) (S1420).

Additionally, the threshold voltage of the first transistor (M1) of the pixel 101 shown in FIG. 3 can be sensed. A first output voltage output after transmitting the second initialization voltage (Vref_CL) to the second node (N2) connected to the first transistor (M1), and a second output voltage corresponding to the current flowing in the second node (N2) By comparing the voltages, the voltage difference can be calculated, and the threshold voltage of the first transistor (M1) can be calculated in response to the calculated voltage difference. At this time, the voltage level of the second initialization voltage (Vref_CL) may be 0V. However, it is not limited to this. An integrator can be used to calculate the threshold voltage. The integrator can be operated by dividing into an initialization period and a sensing period. During the initialization period, it receives the second initialization voltage (Vref_CL) and outputs a first output voltage corresponding to the second initialization voltage (Vref_CL), and during the sensing period, it outputs a first output voltage corresponding to the second initialization voltage (Vref_CL). Upon receiving the initialization voltage (Vref_CL), a second output voltage having a voltage level lower than the second initialization voltage (Vref_CL) may be output in response to the current flowing in the second node (N2). At this time, the second output voltage may have a negative value. Additionally, the output voltage of the integrator can be transferred to an analog-to-digital converter. The analog-to-digital converter can output a digital signal corresponding to a negative voltage using a negative and positive reference voltage.

The above description and attached drawings are merely illustrative of the technical idea of the present invention, and those skilled in the art will be able to combine the components without departing from the essential characteristics of the present invention. , various modifications and transformations such as separation, substitution, and change will be possible. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

100: Organic light emitting display device
101: Pixel
110: display panel
120: drive circuit
130: Timing controller
140: power unit

Claims (18)

A display panel including a plurality of pixels;
a drive circuit that generates a data signal in response to an image signal and supplies the data signal to the plurality of pixels;
a timing controller that supplies the video signal to the drive circuit;
A power supply unit that supplies first power to the display panel and a second power having a lower voltage level than the first power,
The drive circuit senses threshold voltages of the plurality of pixels in a first period,
In a second period, an image signal generated in response to the threshold voltage is received, the data signal is generated and supplied to the plurality of pixels, and the plurality of pixels receive the data signal and the first initialization voltage,
In a third period, the plurality of pixels generate a driving current in response to the data signal and the first initialization voltage,
The drive circuit generates the data signal in response to a first gray-scale voltage and a second gray-scale voltage, and the voltage level of the first gray-scale voltage is varied in response to the threshold voltage sensed in the first period,
The voltage of the data signal has a plurality of voltage levels depending on the gray scale expressed by the display panel between the first gray scale voltage and the second gray scale voltage,
The first gradation voltage has a minimum voltage level among the plurality of voltage levels, has a voltage level lower than the voltage level of the first initialization voltage, and receives threshold voltage information about the threshold voltage to determine the first gradation voltage. An organic light emitting display device that determines the voltage level of
According to paragraph 1,
The organic light emitting display device wherein the voltage level of the second gradation voltage is higher than the voltage level of the first initialization voltage.
According to paragraph 1,
The organic light emitting display device wherein the voltage level of the second gray scale voltage is determined by the sum of the voltage level of the first gray scale voltage and the voltage level of the threshold voltage.
According to paragraph 1,
The organic light emitting display device wherein the plurality of threshold voltages are sensed by the drive circuit, and the image signal is generated by the timing controller.
According to paragraph 1,
The organic light emitting display device wherein the voltage level of the first power source corresponds to the sum of the maximum voltage level of the second gray scale voltage and the threshold voltage.
According to paragraph 1,
The drive circuit further includes a P-gamma circuit that transmits the first gray-scale voltage and the second gray-scale voltage having a preset voltage level higher than the first gray-scale voltage, wherein the P-gamma circuit transmits the threshold voltage. An organic light emitting display device that receives threshold voltage information for and determines the voltage level of the first gradation voltage.
According to paragraph 1,
an arithmetic unit that receives information corresponding to the threshold voltage in response to a second initialization voltage to the plurality of pixels and calculates a threshold voltage, and an analog-to-digital converter that generates a digital signal corresponding to the threshold voltage calculated by the arithmetic unit. An organic light emitting display device comprising:
In clause 7,
An organic light emitting display device wherein the calculation unit outputs a negative voltage, and the analog-to-digital converter outputs a digital signal in response to the negative voltage output from the calculation unit.
According to paragraph 1,
At least one pixel among the plurality of pixels is,
a first transistor that supplies a driving current to the second node in response to a data signal transmitted to the gate electrode connected to the first node;
a second transistor supplying the data signal to the first node in response to a gate signal;
a capacitor connected between the first node and the second node;
a third transistor transmitting the first initialization voltage to the second node in response to a sensing control signal; and
An organic light emitting display device including an organic light emitting diode that receives the driving current and emits light.
A display panel including a plurality of pixels;
A first gray scale voltage with a voltage level lower than the first initialization voltage and a second gray scale voltage with a higher voltage level than the first initialization voltage are supplied, and first gray scale voltage information about the voltage level of the first gray scale voltage is received. a P-gamma circuit that determines and supplies a voltage level of the first initialization voltage;
A timing controller that receives threshold voltage information of the plurality of pixels and sets the first gradation voltage information; And
A drive circuit that generates a data signal in response to the first gradation voltage and the second gradation voltage and supplies it to the plurality of pixels,
In the P-gamma circuit, the voltage of the data signal has a plurality of voltage levels depending on the gray scale expressed by the display panel between the first gray scale voltage and the second gray scale voltage, and the first gray scale voltage is the plurality of voltage levels. Has a minimum voltage level among voltage levels and has a voltage level lower than the voltage level of the first initialization voltage,
The organic light emitting display device wherein the timing controller receives the threshold voltage information and determines a voltage level of the first gradation voltage.
According to clause 10,
The plurality of pixels include a first transistor that generates a driving current in response to the first initialization voltage and the data signal, and an organic light emitting diode that receives the driving current and emits light.
According to clause 11,
The organic light emitting display device wherein the threshold voltage information includes a threshold voltage of the first transistor, and the threshold voltage information is sensed by the drive circuit.
According to clause 10,
An organic light emitting display device further comprising a negative voltage source, wherein the negative voltage source outputs a voltage level of the first gradation voltage at a voltage lower than the first initialization voltage in response to the threshold voltage information.
According to clause 13,
The drive circuit further includes a digital-to-analog converter that outputs a data signal voltage from the negative voltage source in response to the voltage level of the first gradation voltage and the voltage level of the second gradation voltage.
According to clause 10,
The timing controller includes an input unit that receives threshold voltage information as a digital signal, a voltage table that stores voltage information including a first gradation voltage and a second gradation voltage using the threshold voltage information received as a digital signal, and an input unit. An organic light emitting display device that uses the received threshold voltage information to set the voltage levels of the first gray scale voltage and the second gray scale voltage using the voltage information stored in the voltage table and transmits the voltage levels to the P-gamma circuit.
According to clause 15,
The voltage table stores information about the voltage level of the first power source, and the voltage setting unit calculates the voltage level of the first power source in response to the threshold voltage.
In a driving method for driving an organic light emitting display device including a plurality of pixels,
Sensing threshold voltages of the plurality of pixels;
Generating a data signal in response to a first gradation voltage lower than the first initialization voltage and a second gradation voltage higher than the first initialization voltage, wherein the voltage level of the first gradation voltage is set to correspond to the threshold voltage; and
A step of driving an organic light emitting diode in response to the first gray scale voltage and the second gray scale voltage,
The voltage of the data signal has a plurality of voltage levels depending on the gradation expressed on the display panel between the first gradation voltage and the second gradation voltage,
The first gradation voltage has a minimum voltage level among the plurality of voltage levels, has a voltage level lower than the voltage level of the first initialization voltage, and receives threshold voltage information about the threshold voltage to determine the first gradation voltage. A method of driving an organic light emitting display device that determines the voltage level.
According to clause 17,
In the step of sensing the threshold voltage, a method of driving an organic light emitting display device wherein the voltage level of the threshold voltage is sensed in response to the voltage level of the first initialization voltage.

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