KR102592820B1 - Gamma correction circuit, display device, and gamma correcting method - Google Patents

Abstract

Embodiments of the present invention relate to a gamma correction circuit, a display device, and a gamma correction method. According to an embodiment of the present invention, a gamma correction circuit, a display device, and a gamma correction method that can automatically set an optimal gamma voltage can be provided. Additionally, according to an embodiment of the present invention, a gamma correction circuit, a display device, and a gamma correction method that can set an optimal gamma voltage using a dummy subpixel array can be provided. Additionally, according to another embodiment of the present invention, it is possible to provide a gamma correction circuit, a display device, and a gamma correction method that can reflect environmental characteristics of a display panel and compensate for luminance changes accordingly.

Description

Gamma correction circuit, display device, and gamma correction method {GAMMA CORRECTION CIRCUIT, DISPLAY DEVICE, AND GAMMA CORRECTING METHOD}

Embodiments of the present invention relate to a gamma correction circuit, a display device, and a gamma correction method.

As the information society develops, various demands for display devices that display images are increasing, and various types such as Liquid Crystal Display (LCD), Organic Light Emitting Diode Display (OLED Display), etc. of display devices are being used.

Among these display devices, organic light emitting display devices use organic light emitting diodes that emit light on their own, so they have advantages in terms of fast response speed, contrast ratio, luminous efficiency, luminance, and viewing angle.

This organic light emitting display device includes organic light emitting diodes disposed in each of a plurality of sub-pixels (SP) arranged on a display panel, and causes the organic light emitting diodes to emit light by controlling the voltage flowing through the organic light emitting diodes, thereby causing each of the organic light emitting diodes to emit light. An image can be displayed by controlling the luminance expressed by the subpixel (SP).

At this time, in order to correct the non-linearity of human vision and allow natural luminance to be recognized, the digital image data is converted into an analog data voltage by outputting a gamma voltage corresponding to the specific gradation that the digital image data is intended to express. A method of converting and supplying it to subpixels (SP) of the display panel is being used. The gamma voltage can be determined by dividing the step-by-step gray level by the maximum gray level (e.g., 256 gray levels) and squaring the gamma code in the form of an exponent. The gamma value currently used is said to best reflect human visual characteristics. Corresponds to the known 2.2.

This gamma correction generally goes through a process where the manufacturer changes the gamma code to find the optimal gamma voltage after the display device is manufactured. In other words, this is done by measuring the image for each gray level for maximum luminance or gamma code and manually adjusting the gamma voltage at the corresponding gray level. However, as the maximum luminance and gamma code to be expressed in this method increase, not only does the calculation time to find the optimal gamma voltage increase, but also the size of the required register increases as the conditions for the maximum luminance and gamma values change. There is a problem that is increasing.

The purpose of embodiments of the present invention is to provide a gamma correction circuit, a display device, and a gamma correction method that can automatically set an optimal gamma voltage.

Additionally, the purpose of an embodiment of the present invention is to provide a gamma correction circuit, a display device, and a gamma correction method that can set an optimal gamma voltage using a dummy subpixel array.

Additionally, the purpose of embodiments of the present invention is to provide a gamma correction circuit, a display device, and a gamma correction method that can reflect environmental characteristics of a display panel and compensate for luminance changes accordingly.

In one aspect, a display device according to an embodiment of the present invention has a plurality of gate lines, a plurality of data lines, and a plurality of subpixels, and is disposed outside the main subpixel array and the main subpixel array in the display area. A display panel including a dummy subpixel array, a gate driving circuit for driving a plurality of gate lines, a data driving circuit for driving a plurality of data lines, and a device for controlling signals applied to the gate driving circuit and the data driving circuit. A gamma correction voltage is output by comparing the timing controller and, under the control of the timing controller, the dummy subpixel current flowing in the dummy subpixel array arranged in a certain area of the display panel with the subpixel reference current determined according to the luminous efficiency of the light emitting device. and a gamma correction circuit, wherein the data driving circuit may apply a data voltage corresponding to the gamma correction voltage to the main subpixel array disposed in the display area of the display panel.

The gamma correction circuit may be placed inside the data driving circuit.

The display panel may include a main subpixel array disposed in the display area and a dummy subpixel array disposed outside the main subpixel array.

The gamma correction circuit includes a register that stores information about the gamma voltage for each gray level, a reference current generation circuit that generates a subpixel reference current, a comparator that compares the subpixel reference current and the dummy subpixel current flowing in the dummy subpixel array. , and may include a gamma voltage control circuit that outputs the gamma voltage and the gamma correction voltage according to the comparison result value of the comparator.

The register may further include information about the luminous efficiency of the light emitting device disposed in the subpixel.

Luminous efficiency may have different values depending on temperature or illuminance.

The reference current generation circuit calculates the maximum subpixel current using (maximum luminance value)/(luminous efficiency), and calculates the subpixel reference current using the formula (maximum subpixel current)*(gradation by level/maximum gray level) ^{gamma code} . You can.

Step-by-step gradation may be comprised of a partial gradation among all gradation levels.

The gamma voltage control circuit includes a successive approximation logic circuit that accumulates the comparison result of the comparator into a digital logic value for n bits, and a gamma voltage generation circuit that outputs the gamma voltage and the gamma correction voltage according to the digital logic value of the successive approximation logic circuit. may include.

The gamma voltage generation circuit can adjust the gamma voltage up or down by a width of (difference between the high level gamma voltage and the low level gamma voltage)/(2 ⁿ⁺¹ ) at any gray level.

The gamma voltage control circuit can store the gamma correction voltage in a register.

The gamma correction circuit of the present invention is a circuit for correcting the gamma voltage in a display device in which the main subpixel array is disposed in the display area of the display panel and the dummy subpixel array is disposed outside the main subpixel array, comprising: A register that stores information about voltage, a reference current generation circuit that generates a subpixel reference current, a comparator that compares the subpixel reference current and the dummy subpixel current flowing in the dummy subpixel array, and the comparison result of the comparator. Accordingly, it may include a gamma voltage control circuit that outputs the gamma voltage and the gamma correction voltage.

The gamma correction method of the present invention is a method of correcting the gamma voltage in a display device in which a main subpixel array is disposed in the display area of a display panel and a dummy subpixel array is disposed outside the main subpixel array, wherein environmental information is collected. Receiving, receiving the maximum luminance value and gamma code, calculating a subpixel reference current, measuring a dummy subpixel current according to the gamma voltage, the subpixel reference current and the dummy subpixel current. It may include comparing, determining a gamma correction voltage, and outputting the gamma correction voltage.

The step of calculating the subpixel reference current includes calculating the maximum subpixel current as (maximum luminance value)/(luminous efficiency), and calculating the subpixel current using the formula (maximum subpixel current)*(gradation by step/maximum gradation) ^{gamma code} . It may include calculating a pixel reference current.

The step of determining the gamma correction voltage includes accumulating the result of comparison between the subpixel reference current and the dummy subpixel current as a digital logic value for n bits, and determining the gamma voltage and the gamma correction voltage according to the digital logic value. may include.

According to embodiments of the present invention as described above, a gamma correction circuit, a display device, and a gamma correction method that can automatically set an optimal gamma voltage can be provided.

Additionally, according to an embodiment of the present invention, a gamma correction circuit, a display device, and a gamma correction method that can set an optimal gamma voltage using a dummy subpixel array can be provided.

Additionally, according to another embodiment of the present invention, it is possible to provide a gamma correction circuit, a display device, and a gamma correction method that can reflect environmental characteristics of a display panel and compensate for luminance changes accordingly.

1 is a diagram showing the schematic configuration of a display device according to an embodiment of the present invention.
Figure 2 shows a schematic configuration of a data driving circuit that outputs a data voltage in a display device according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating an example structure of a main pixel array and a dummy pixel array constituting a display panel in a display device according to an embodiment of the present invention.
FIG. 4 is a block diagram illustrating an example of a gamma correction circuit that generates a gamma voltage using a dummy subpixel array in a display device according to an embodiment of the present invention.
Figure 5 is a diagram showing an example of gamma voltage for each gray level stored in a register in a display device according to an embodiment of the present invention.
FIG. 6 is a flowchart showing a method of generating a subpixel reference current in the reference current generation circuit of the gamma correction circuit in the display device according to an embodiment of the present invention.
Figure 7 is a block diagram showing in more detail a gamma voltage control circuit that constitutes a gamma correction circuit in a display device according to an embodiment of the present invention.
Figure 8 is an example of a signal waveform diagram showing a process in which a gamma correction voltage is determined by a gamma voltage control circuit in a display device according to an embodiment of the present invention.
Figure 9 is a flowchart of a gamma correction method according to an embodiment of the present invention.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. The present embodiments only serve to ensure that the disclosure of the present invention is complete and that common knowledge in the technical field to which the present invention pertains is not limited. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

In addition, the shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, it may also include the plural, unless specifically stated otherwise.

Additionally, when interpreting the components in the embodiments of the present invention, it should be interpreted to include a margin of error even if there is no separate explicit description.

Additionally, when describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are only used to distinguish the component from other components, and the nature, sequence, order, or number of the components are not limited by the term. When a component is described as being “connected,” “coupled,” or “connected” to another component, that component may be directly connected or connected to that other component, but there are no other components between each component. It should be understood that may be “interposed” or that each component may be “connected,” “combined,” or “connected” through other components. In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

Additionally, the components in the embodiments of the present invention are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

In addition, the features (configurations) in the embodiments of the present invention can be partially or fully combined, combined, or separated from each other, and various technological interconnections and drives are possible, and each embodiment is implemented independently of each other. It may be possible, or it may be possible to implement them together due to a related relationship.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

Here, the display device 100 of the present invention includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), an organic light emitting diode display device, and an electrophoretic display. It can be implemented based on a flat panel display device such as electrophoresis (EPD). Hereinafter, the description will focus on an organic light emitting display device as an example of a flat panel display device, but it should be noted that the display device of the present invention is not limited to this.

1 is a diagram showing the schematic configuration of a display device according to an embodiment of the present invention.

Referring to FIG. 1, a display device 100 according to an embodiment of the present invention includes a display panel 110 in which a plurality of subpixels (SP) are arranged in a row, and a gate driving circuit for driving the display panel 110 ( 120) and a data driving circuit 130, and a timing controller 140 for controlling the gate driving circuit 120 and the data driving circuit 130.

A plurality of gate lines (GL) and a plurality of data lines (DL) are arranged in the display panel 110, and a subpixel (SP) is arranged in an area where the gate lines (GL) and the data lines (DL) intersect. For example, in the case of an organic light emitting display device with a resolution of 2,160 A subpixel (SP) will be placed at each point where DL) intersects.

The gate driving circuit 120 is controlled by the timing controller 140, and sequentially outputs a scan signal (SCAN) to a plurality of gate lines (GL) disposed on the display panel 110 to generate a plurality of subpixels (SP). Controls the driving timing for . In the display device 100 with a resolution of 2,160 This case can be called 2,160 phase driving. Alternatively, the scan signal SCAN is sequentially output from the first gate line GL1 to the fourth gate line GL4, and then the scan signal SCAN is output from the fifth gate line GL5 to the eighth gate line GL8. ), the case of sequentially outputting a scan signal (SCAN) on four gate lines as a unit is called 4-phase driving. In other words, the case of sequentially outputting a scan signal (SCAN) for each N gate lines can be called N-phase driving.

At this time, the gate driving circuit 120 may include one or more gate driver integrated circuits (GDIC). Depending on the driving method, it may be located only on one side of the display panel 110 or on both sides. It may be located. Alternatively, the gate driving circuit 120 may be built into the bezel area of the display panel 110 and implemented in a GIP (Gate In Panel) form.

Meanwhile, the data driving circuit 130 receives image data (DATA) from the timing controller 140 and converts the received image data into an analog data voltage (Vdata). Then, the data voltage (Vdata) is output to each data line (DL) in accordance with the timing at which the scan signal (SCAN) is applied through the gate line (GL), so that each subpixel ( SP) displays a light emitting signal of corresponding brightness according to the data voltage (Vdata).

Likewise, the data driving circuit 130 may include one or more source driver integrated circuits (SDICs), which may use a Tape Automated Bonding (TAB) method or a Chip On (COG) method. It may be connected to a bonding pad of the display panel 110 using a glass method or may be placed directly on the display panel 110. In some cases, each source driver integrated circuit (SDIC) may be integrated and disposed on the display panel 110. In addition, each source driver integrated circuit (SDIC) may be implemented in a COF (Chip On Film) method. In this case, each source driver integrated circuit (SDIC) is mounted on a circuit film and displays the display panel through the circuit film. It may be electrically connected to the data line (DL) of (110).

The timing controller 140 supplies various control signals to the gate driving circuit 120 and the data driving circuit 130, and controls the operations of the gate driving circuit 120 and the data driving circuit 130. That is, the timing controller 140 controls the gate driving circuit 120 to output a scan signal (SCAN) according to the timing implemented in each frame, and on the other hand, the externally received image data is transmitted to the data driving circuit 130. ) and transmits the converted image data (DATA) to the data driving circuit 130.

At this time, the timing controller 140 operates various timing signals including a vertical synchronization signal (VSYNC), a horizontal synchronization signal (HSYNC), a data enable signal (Data Enable; DE), and a clock signal (CLK) along with the image data. Receive signals from outside (e.g. host system). Accordingly, the timing controller 140 generates a control signal using various timing signals received from the outside and transmits it to the gate driving circuit 120 and the data driving circuit 130.

For example, the timing controller 140 uses a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (Gate Start Pulse) to control the gate driving circuit 120. Outputs various gate control signals (GCS), including Output Enable (GOE). Here, the gate start pulse (GSP) controls the timing at which one or more gate driver integrated circuits (GDIC) constituting the gate driving circuit 120 start operating. Additionally, the gate shift clock (GSC) is a clock signal commonly input to one or more gate driver integrated circuits (GDIC), and controls the shift timing of the scan signal (SCAN). Additionally, the gate output enable signal (GOE) specifies timing information of one or more gate driver integrated circuits (GDIC).

In addition, the timing controller 140 uses a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (Source Output Enable signal) to control the data driving circuit 130. Outputs various data control signals (DCS) including ; SOE), etc. Here, the source start pulse (SSP) controls the timing at which one or more source driver integrated circuits (SDICs) constituting the data driving circuit 130 start sampling data. The source sampling clock (SSC) is a clock signal that controls the timing of sampling data in the source driver integrated circuit (SDIC). The source output enable signal (SOE) controls the output timing of the data driving circuit 130.

This display device 100 supplies various voltages or currents to the display panel 110, gate driving circuit 120, data driving circuit 130, etc., or further includes a power management integrated circuit that controls various voltages or currents to be supplied. It can be included.

Meanwhile, the subpixel SP is located at a point where the gate line GL and the data line DL intersect, and a light emitting device may be disposed in each subpixel SP. For example, the display device 100 includes a light-emitting device such as a light-emitting diode (LED) or an organic light-emitting diode (OLED) in each subpixel (SP), and a current flowing through the light-emitting device according to the data voltage (Vdata). You can display images by controlling .

Figure 2 shows a schematic configuration of a data driving circuit that outputs a data voltage in a display device according to an embodiment of the present invention.

Referring to FIG. 2, the data driving circuit 130 generates a data voltage output circuit 131 that outputs a data voltage corresponding to image data (DATA) received from the timing controller 140 and a gamma voltage to output the data voltage. It may include a gamma correction circuit 200 applied to the circuit 131.

When the data voltage output circuit 131 receives image data (DATA) in digital form from the timing controller 140, it converts the received image data (DATA) into a data voltage in analog form, and converts the received image data (DATA) into a data voltage in analog form. Express the gradation of data. At this time, the data voltage output circuit 131 may output a data voltage corresponding to each gray level using the gamma voltage output from the gamma correction circuit 200.

The gamma correction circuit 200 may receive a reference voltage for generating a gamma voltage from the outside and output a gamma voltage corresponding to a specific grayscale using the input reference voltage. For example, when expressing 256 gradations, the gamma correction circuit 200 uses 0 gradations (0G), 1 gradation (1G), 15 gradations (15G), 31 gradations (31G), 63 gradations (63G), and 127 gradations. Gamma voltages corresponding to (127G), 191 gradation (191G), and 255 gradation (255G) can be output. At this time, the value and range of the gamma voltage that the gamma correction circuit 200 can output can be changed in various ways.

The data voltage output circuit 131 receives a gamma voltage corresponding to a specific gray level output from the gamma correction circuit 200, and uses the input gamma voltage to output a data voltage corresponding to the gray level of the image data (DATA) to the display panel. Supplied to (110). That is, when the data voltage output circuit 131 outputs a data voltage corresponding to 255 gradations (255G), the gamma voltage corresponding to 255 gradations (255G) can be used, and 191 gradations (191G) and 255 gradations (255G) can be used. ), the data voltage can be output using the gamma voltage corresponding to 191 gradation (191G) and the gamma voltage corresponding to 255 gradation (255G).

In particular, the display device 100 of the present invention calculates the current of the subpixel (SP) required for a specific gray level and determines the optimal gamma voltage based on the dummy subpixel array disposed in the display panel 110. Use .

FIG. 3 is a diagram illustrating an example structure of a main pixel array and a dummy pixel array constituting a display panel in a display device according to an embodiment of the present invention.

Referring to FIG. 3, the display device 100 of the present invention may include a dummy subpixel array 114 composed of a plurality of dummy subpixels in the display panel 110. The dummy subpixel array 114 is formed outside the main subpixel array 112 corresponding to the display area of the display panel 110, that is, in the non-display area. The shape, number, and arrangement structure of the dummy subpixel array 114 formed in the non-display area of the display panel 110 may vary depending on the location.

The substrate constituting the display panel 110 includes a display area where main subpixels (SP) that emit light to the outside are formed, and a non-display area located outside the display area where a dummy subpixel array 114 is formed. It can be configured. The non-display area can be divided into an upper non-display area located above the display area, a lower non-display area located below, a right non-display area located on the right, and a left non-display area located on the left.

An upper dummy subpixel array is formed in the upper non-display area, a lower dummy subpixel array is formed in the lower non-display area, a right dummy subpixel array is formed in the right non-display area, and a left dummy sub-pixel array is formed in the left non-display area. A pixel array will be formed. At this time, at least one of the upper dummy subpixel array, lower dummy subpixel array, right dummy subpixel array, and left dummy subpixel array may be omitted.

This dummy subpixel array 114 may share the data line DL with the main subpixel array 112 located in the display area. That is, the vertically arranged dummy subpixel array 114 and the main subpixel array 112 in the display area are connected to the same data line DL, thereby providing a response similar to that of the main subpixel array 112 located in the display area. It can have characteristics. Therefore, when compared to the main subpixel array 112 located in the display area, the dummy subpixel array 114 may be identical to the main subpixel array 112 in the display area, except that there is no normally driven light emitting element. there is. In addition, since the main subpixel array 112 in the display area and the dummy subpixel array 114 in the non-display area are driven by the same driving signal system, the gate driving circuit 120 and the data driving circuit 130 You can share it.

FIG. 4 is a block diagram illustrating an example of a gamma correction circuit that generates a gamma voltage using a dummy subpixel array in a display device according to an embodiment of the present invention.

Referring to FIG. 4, the gamma correction circuit 200 according to an embodiment of the present invention may include a reference current generation circuit 210, a comparator 220, a gamma voltage control circuit 230, and a resistor 240. there is.

The reference current generation circuit 210 generates a subpixel reference current (Ipxr) for comparison with the dummy subpixel current (Idpx) generated in the dummy subpixel array 114. The comparator 220 compares the subpixel reference current (Ipxr) with the dummy subpixel current (Idpx) flowing through the dummy subpixel array 114 and provides a comparison result value (Vcomp) to the gamma voltage control circuit 230. The gamma voltage control circuit 230 refers to the digital gamma voltage (VGAM) stored in the register 240 and sequentially changes the gamma voltage (Vgam(n)) to be applied to the dummy subpixel array 114. , the optimal gamma correction voltage (Vgamc) is determined to allow a current of a value close to the subpixel reference current (Ipxr) to flow through the main subpixel array 112. At this time, the gamma voltage control circuit 230 sequentially accumulates the comparison result value (Vcomp) of the comparator 220 to calculate a digital logic value (Dsar) representing the optimal gamma correction voltage (Vgamc), and stores this in a register ( 240), the gamma voltage (Vgam) can be modified.

Here, a configuration is shown in which the gamma voltage control circuit 230 applies a gamma voltage (Vgam(n)) to the dummy subpixel array 114, but the gamma voltage output circuit 131 of the data driving circuit 130 The gamma voltage (Vgam(n)) transmitted from the voltage control circuit 230 may be converted into a data voltage and supplied to the dummy subpixel array 114.

In addition, the register 240 contains information about the gamma voltage (VGAM) for each gray level and information about the luminous efficiency (Eoled) of the light emitting device for calculating the subpixel reference current (Ipxr) flowing in the dummy subpixel (SP). may include. When the display device 100 is an organic light-emitting display device, an organic light-emitting diode (OLED) is used as a light-emitting device, and therefore, it will correspond to luminous efficiency (Eoled) information for the organic light-emitting diode (OLED).

Figure 5 shows an example of gamma voltage for each gray level stored in a register in a display device according to an embodiment of the present invention.

When expressing gradation with 8 bits, 256 levels of gradation can be represented, and according to the gamma code (for example, 2.2), the corresponding gamma voltage (VGAM) for each 256 gradations can be stored in digital format in the register 240. there is. The gamma voltage (VGAM) for each gray level stored in the register 240 may have a voltage value at a specific level or a voltage value within a certain range. For example, the gamma voltage (VGAM) from 0 to 255 gray levels may have a value of 0 to 5.7 V, and the gamma voltage (VGAM255) corresponding to 255 gray levels may have a range of 5.5 to 5.7 V. The gamma voltage (VGAM1) corresponding to 1 gray level may range from 0.1 to 0.3V. The gamma voltage (VGAM) may be adjusted in various ways depending on the type of product to which the display device 100 is applied, that is, a TV or a smartphone.

At this time, the register 240 may store the gamma voltage (VGAM) corresponding to all 256 gradations, but stores the gamma voltage (VGAM) for some of the gradations, and the gamma voltage (VGAM) corresponding to the remaining gradations is stored in the register. It can also be expressed through a combination of the gamma voltage (VGAM) stored in (240).

Additionally, the luminance expressed by the light-emitting device in the display device 100 is proportional to the current flowing through the light-emitting device and the luminous efficiency (Eoled) of the light-emitting device. Accordingly, the subpixel reference current (Ipxr) flowing in the subpixel (SP) where the light emitting element stored in the register 240 is disposed is obtained by dividing the maximum luminance value (LUMmax) indicated by the display device 100 by the luminous efficiency (Eoled). It can be expressed as a value. At this time, since the maximum luminance value (LUMmax) of the display device 100 may vary depending on temperature and ambient illuminance, luminous efficiency (Eoled) information according to temperature and illuminance may be stored in detail. .

This register 240 may be located inside the gamma correction circuit 200, but may also be located in a separate memory outside the gamma correction circuit 200.

In the gamma correction circuit 200 of the present invention, the reference current generation circuit 210 generates a subpixel reference current (Ipxr) for comparison with the dummy subpixel current (Idpx) generated in the dummy subpixel array 114. am. To this end, the reference current generation circuit 210 can use information about the luminous efficiency (Eoled) of the light emitting device transmitted from the register 240, the maximum luminance value (LUMmax), and the gamma code (CODEgam).

At this time, since the luminous efficiency (Eoled) of the light emitting device may vary depending on the temperature or ambient illuminance of the display device 100, the luminous efficiency (Eoled) is transmitted from the temperature sensor 300 or the illuminance sensor 400 disposed in the display device 100. You can utilize the temperature and illuminance information available. Accordingly, the luminous efficiency (Eoled) corresponding to the temperature value measured by the temperature sensor 300 or the illuminance value measured through the illuminance sensor 400 can be provided from the register 240. Here, the temperature sensor 300 or the illuminance sensor 400 may be used alone or together as needed.

FIG. 6 is a flowchart showing a method of generating a subpixel reference current in the reference current generation circuit of the gamma correction circuit in the display device according to an embodiment of the present invention.

Referring to FIG. 6, the method of generating the subpixel reference current (Ipxr) includes receiving environmental information (S10), receiving luminous efficiency (Eoled) information according to the environment (S20), and maximum subpixel current (S10). It may include calculating Ipxm (S30), receiving a gamma code (CODEgam) (S40), and calculating subpixel reference current (Ipxr) (S50).

The step S10 of receiving environmental information is a step of receiving temperature information of the display device 100 or ambient illuminance information from the temperature sensor 300 or the illuminance sensor 400. In the present invention, temperature information or illuminance information may be used individually or simultaneously.

The step (S20) of receiving luminous efficiency (Eoled) information according to the environment is based on the luminous efficiency (Eoled) of the light emitting device corresponding to the temperature information transmitted from the temperature sensor 300 or the illuminance information transmitted from the illuminance sensor 400. This is the stage of receiving information. The luminous efficiency (Eoled) of the light emitting device may be stored in the register 240, but may also be stored in a separate memory. Since the luminance of the subpixel SP is proportional to the current flowing in the subpixel SP and the luminous efficiency (Eoled) of the light emitting device, the luminous efficiency (Eoled) can be expressed in units of current/luminance.

The step of calculating the maximum subpixel current (Ipxm) (S30) uses the luminous efficiency (Eoled) of the light emitting device transmitted from the register 240 to calculate the subpixel (SP) at the highest gray level (for example, 256 gray levels). This is the step of calculating the maximum subpixel current (Ipxm) flowing through. For example, the maximum subpixel current (Ipxm) will be the maximum luminance value (LUMmax) divided by the luminous efficiency (Eoled) (LUMmax/Eoled).

The step of receiving a gamma code (CODEgam) (S40) is a step of receiving a digital code value indicating the degree of gamma correction. For example, when gamma 2.2 correction is applied, the gamma code (CODEgam) will have a value of 2.2, and when gamma 2.0 correction is applied, the gamma code (CODEgam) will have a value of 2.0. The step of receiving the gamma code (CODEgam) (S40) may be performed after the step of calculating the maximum subpixel current (Ipxm) (S30), but may also be performed at or before the step of receiving environmental information (S10). .

The step of calculating the subpixel reference current (Ipxr) (S50) is a step of calculating the current corresponding to the specific luminance indicated by the subpixel (SP) according to the gray level at a specific temperature or specific illuminance. The subpixel reference current (Ipxr) can be viewed as an ideal current value flowing through the subpixel (SP) to express a specific gray level. The subpixel reference current (Ipxr) is the maximum subpixel current (Ipxm) divided by the step-by-step gray level by the maximum gray level (e.g., 256 gray levels in the case of 8 bits) and the gamma code (CODEgam) in the form of an exponent. It can be determined by squaring, and if expressed in a formula, Ipxr = Ipxm * (n/255) ^CODEgam . Here, n is a value representing the gray level of a specific level, and may have a value of 255 in the case of 255 gray level and 191 in the case of 191 gray level. Therefore, when expressing 256 gradations, n can have 256 values from 0 to 255 gradations, but only some levels of gradation can be used, so when divided into 8 levels as shown in FIG. 5, for example, 0, It could have 8 values: 1, 15, 31, 63, 127, 191, and 255. The number and value of n may be changed in various ways.

The subpixel reference current (Ipxr) calculated as above is compared with the actual current flowing through the subpixel (SP) in the comparator 220 to determine the gamma voltage (Vgam) that will generate the data voltage applied to the dummy subpixel array 114. will be adjusted. That is, if the subpixel reference current (Ipxr) is larger than the subpixel reference current (Ipxr), the gamma voltage (Vgam) is adjusted downward, and the actual current flowing in the subpixel (SP) is smaller than the subpixel reference current (Ipxr). In this case, the optimal gamma correction voltage (Vgamc) can be found by adjusting the gamma voltage (Vgam) upward.

To this end, the display device 100 of the present invention compares the subpixel current (Idpx) flowing in the dummy subpixel array 114 constituting the display panel 110 with the subpixel reference current (Ipxr). Therefore, the comparator 220 receives the subpixel reference current (Ipxr) applied from the reference current generation circuit 210 through an input terminal, for example, a non-inverting input terminal, and flows to the dummy subpixel array 114. The pixel current (Idpx) can be provided through another input terminal, for example, an inverting input terminal.

The comparator 220 compares the subpixel reference current (Ipxr) with the dummy subpixel current (Idpx) flowing through the dummy subpixel array 114, and supplies the comparison result (Vcomp) to the gamma voltage control circuit 230. At this time, the comparator 20 may be used as a current comparator that directly receives current and compares it, as well as a voltage comparator that converts the current input through a resistor into voltage and compares voltage values.

The gamma voltage control circuit 230 refers to the gamma voltage (VGAM) in digital format stored in the register 240, and generates a gamma voltage (Vgam(n)) that can generate a data voltage to be applied to the dummy subpixel array 114. ) can be changed sequentially. For example, the gamma voltage control circuit 230 first converts the gamma voltage (VGAM) of a specific gray level stored in the register 240 into an analog gamma voltage (Vgam) and applies it to the dummy subpixel array 114, 127 When expressing gray levels, the gamma voltage (VGAM127) corresponding to 127 gray levels is converted to an analog voltage, and the corresponding data voltage is supplied to the dummy subpixel array 114 through the data driving circuit 130. At this time, the dummy subpixel array 114 to which the data voltage corresponding to the gamma voltage (VGAM127) of 127 gray levels is applied will generate the corresponding dummy subpixel current (Idpx), and the comparator 220 will generate the corresponding dummy subpixel current (Idpx), and the comparator 220 will We will compare the reference current (Ipxr) and the dummy subpixel current (Idpx).

The gamma voltage control circuit 230 sequentially increases or decreases the gamma voltage (Vgam) corresponding to the data voltage to be applied to the dummy subpixel array 114 according to the comparison result value (Vcomp) of the comparator 220. It can be adjusted, and the data driving circuit 130 uses this to apply the corresponding data voltage back to the dummy subpixel array 114. By repeating this comparison and adjustment process a certain number of times, the dummy subpixel current (Idpx) flowing through the dummy subpixel array 114 will have a value close to the subpixel reference current (Ipxr). By applying the gamma compensation voltage (Vgamc) finally determined through this process to the main subpixel array 112, the display panel 110 can express optimal luminance according to environmental factors such as temperature and illuminance.

Figure 7 is a block diagram showing in more detail a gamma voltage control circuit that constitutes a gamma correction circuit in a display device according to an embodiment of the present invention. Additionally, Figure 8 is an example of a signal waveform diagram showing the process by which the gamma correction voltage is determined by the gamma voltage control circuit. Through this, we will look at the process by which the optimal gamma correction voltage (Vgamc) is determined.

In the display device according to an embodiment of the present invention, the gamma voltage control circuit 230 constituting the gamma correction circuit 200 includes a successive approximation register circuit 232 and a gamma voltage generation circuit 234. can do.

The successive approximation logic circuit 232 accumulates the comparison result value (Vcomp) of the comparator 220 into a digital logic value (Dsar) for n bits and transfers it to the gamma voltage generation circuit 234 and the register 240. The gamma voltage generation circuit 234 can generate an optimal gamma correction voltage (Vgamc) corresponding to the digital logic value (Dsar) transmitted from the successive approximation logic circuit 232, and the data driving circuit 130 uses this. Thus, the data voltage corresponding to the main subpixel array 112 can be supplied. The register 240 may store the digital logic value (Dsar) transmitted from the successive approximation logic circuit 232 and change the gamma voltage (VGAM) for each gray level.

At this time, the gamma voltage generation circuit 234 is used so that the successive approximation logic circuit 232 can sequentially receive the comparison result value (Vcomp) of the subpixel reference current (Ipxr) and the dummy subpixel current (Idpx) for n bits. ) generates an analog gamma voltage (Vgam) corresponding to the gamma voltage (VGAM) stored in the register 240. In addition, when the data driving circuit 130 sequentially applies a data voltage to the dummy subpixel array 114 using this, the dummy subpixel current (Idpx) flowing from the comparator 220 to the dummy subpixel array 114 By receiving the comparison result value (Vcomp) of the subpixel reference current (Ipxr), the value of the gamma voltage (Vgam(n)) to be applied to the dummy subpixel array 114 can be increased or decreased by a certain amount. There will be. Accordingly, the gamma voltage generation circuit 234 may adjust the gamma voltage Vgam(n) to be applied to the dummy subpixel array 114 to n values.

For example, when expressing 255 gray levels, the gamma voltage (Vgam) to be applied to the dummy subpixel array 114 is a low level gamma voltage (VL) corresponding to 0 gray level and a high level gamma voltage corresponding to 255 gray level. (VH). The low level gamma voltage (VL) can be a ground voltage, and the high level gamma voltage (VH) can have a value between 3 and 6V. Therefore, the difference (△VHL) between the high-level gamma voltage (VH) and the low-level gamma voltage (VL) may have a value between 3 and 6V, and when 255 gray levels, the maximum gray level, are used as the reference, the high level gamma voltage The difference (△VHL) between (VH) and the low level gamma voltage (VL) will be 6V.

At this time, when gamma correction for 63 gradations is performed, the 63 gradations gamma voltage (VGAM63) stored in the register 240 may have a value between 2.1V and 2.3V, so the successive approximation logic circuit ( When 232) is operating, the first gamma voltage (Vgam(0)) of 63 gray levels applied to the dummy subpixel array 114 at time T0 may be 2.2V.

When a data voltage is applied to the dummy subpixel array 114 according to the first gamma voltage (Vgam(0)) of 63 gray levels with a value of 2.2V, the first gamma voltage (Vgam(0)) is applied to the dummy subpixel array 114. ) flows, and the comparator 220 compares the subpixel reference current (Ipxr) and the dummy subpixel current (Idpx). As a result of the comparison, if the dummy subpixel current (Idpx) is smaller than the subpixel reference current (Ipxr), the luminance of the subpixel (SP) is determined to be low, and the gamma voltage (Vgam) is applied to increase the luminance of the subpixel (SP). ) to increase. Therefore, at time T1, the first-stage gamma voltage (Vgam(1)) of 63 gradations is set to 3.7V, which increases the initial gamma voltage (Vgam(0)) by △VHL/4 V (6/4 = 1.5V). You will be able to. That is, the rise or fall width of the gamma voltage (Vgam) may be △VHL/2 ⁿ⁺¹ . Of course, the rise and fall width of the gamma voltage (Vgam) may be adjusted in various ways.

With the data voltage corresponding to 3.7V, which is the first-stage gamma voltage (Vgam(1)), applied to the dummy subpixel array 114 through the gamma voltage generation circuit 234, the comparator 220 operates on the dummy subpixel array 114. The dummy subpixel current (Idpx) flowing in 114 is compared again with the subpixel reference current (Ipxr), and the comparison result value (Vcomp) is transmitted to the successive approximation logic circuit 232. As a result of comparison, if the subpixel reference current (Ipxr) is smaller than the dummy subpixel current (Idpx), the luminance of the subpixel (SP) needs to be reduced at time T2, so the first-stage gamma voltage (Vgam(1)) is used. Based on the second-level gamma voltage (Vgam(2)) lowered by a certain amount (e.g., ΔVHL/8V = 6/8V = 0.75V), the data driving circuit 130 converts the data voltage into a dummy subpixel array ( 114).

In the case of the 8-bit successive approximation logic circuit 232, this comparison step can be continued eight times, and the comparison result value (Vcomp) at each step can be stored as an 8-bit digital logic value (Dsar). The gamma voltage (Vgam(8)) corresponding to the digital logic value (Dsar) obtained through this process is the optimal gamma required to allow a current similar to the subpixel reference current (Ipxr) to flow through the dummy subpixel array 114. This will be the correction voltage (Vgamc).

Accordingly, the gamma voltage generation circuit 234 determines the gamma voltage (Vgam(n)) corresponding to the n-bit digital logic value (Dsar) stored in the successive approximation logic circuit 232 as the gamma correction voltage (Vgamc), The data driving circuit 130 can use this to supply data voltage to the main subpixel array 112. As a result, a current similar to the subpixel reference current (Ipxr) will flow in the main subpixel array 112, and uniform luminance will be maintained in the display panel 110 even when the external environment such as temperature or illuminance changes. Video can be displayed. In particular, even if the maximum luminance value or gamma code is modified or the environmental conditions change, the optimal gamma correction voltage (Vgamc) can be found through the successive approximation logic circuit 232, so that the gamma voltage (VGAM) stored in the register 240 It is possible to automatically set the gamma correction voltage (Vgamc) without adding or increasing data for .

Meanwhile, although the comparator 220 and the successive approximation logic circuit 232 are shown separately above, the comparator 220 is provided inside the successive approximation logic circuit 232 or the comparator 220 is provided inside the gamma voltage control circuit 230. ) may be located.

Figure 9 is a flowchart of a gamma correction method according to an embodiment of the present invention.

Referring to Figure 9, the gamma correction method of the present invention includes receiving environmental information (S100), receiving maximum luminance value (LUMmax) and gamma code (CODEgam) (S200), and subpixel reference current (Ipxr). Calculating (S300), measuring the dummy subpixel current (Idpx) according to the gamma voltage (Vgam) (S400), comparing the subpixel reference current (Ipxr) and the dummy subpixel current (Idpx) ( It may include steps S500), determining a gamma correction voltage (Vgamc) (S600), and applying the gamma correction voltage (Vgamc) to the main subpixel array 112 (S700).

The step of receiving environmental information (S100) is a step of receiving information about external environmental factors that may affect the luminance of the display panel 110 while the display device 100 is driven. Environmental factors that may affect the luminance of the display device 100 include temperature and ambient illumination, and if there are other factors that affect the luminance, they may be additionally considered. When temperature information and illuminance information are received as environmental information, they may be provided through the temperature sensor 300 and illuminance sensor 400 embedded in the display device 100.

The step of receiving the maximum luminance value (LUMmax) and the gamma code (CODEgam) (S200) includes receiving the maximum luminance value (LUMmax) that can be expressed in the display device 100 and the gamma code (CODEgam) applied for gamma correction. It's a step. The maximum luminance value (LUMmax) may be 30 to 40 nits in a TV, and 200 to 300 nits in a mobile display device. In the case of the gamma code (CODEgam), it can have a value of 2.2 because gamma 2.2 correction is generally applied, but 2.0 or another gamma code (CODEgam) may be used if necessary.

The step of calculating the subpixel reference current (Ipxr) (S300) is to calculate the current flowing in the subpixel (SP) in response to environmental information, for example, the luminance to be expressed through the subpixel (SP) at a specific temperature or illuminance. This is the calculation step. In the display device 100, the luminance expressed by the light-emitting element constituting the subpixel SP is proportional to the current flowing through the light-emitting element and the luminous efficiency (Eoled) of the light-emitting element. Therefore, the display device 100 of the present invention stores the luminous efficiency (Eoled) according to temperature or illuminance in the register 240 and corresponds to the temperature or illuminance measured through the temperature sensor 300 or illuminance sensor 400. The luminous efficiency (Eoled) can be provided from the register 240. At this time, the subpixel reference current (Ipxr) may be expressed as the maximum luminance value (LUMmax) displayed by the display device 100 divided by the luminous efficiency (Eoled).

In the step S400 of measuring the dummy subpixel current (Idpx) according to the gamma voltage, the data voltage corresponding to the gamma voltage (VGAM) corresponding to a specific gray level among the gamma voltage (VGAM) stored in the register 240 is applied to the display panel ( This is a step of measuring the dummy subpixel current (Idpx) flowing in the dummy subpixel array 114 by applying it to the dummy subpixel array 114 (110).

The step of comparing the subpixel reference current (Ipxr) and the dummy subpixel current (Idpx) (S500) is calculated by reflecting the dummy subpixel current (Idpx) flowing through the dummy subpixel array 114 and environmental information for a specific gray level. This is the step of comparing the subpixel reference current (Ipxr).

The step of determining the gamma correction voltage (Vgamc) (S600) is the optimal gamma voltage to be applied to the main subpixel array 112 using the comparison result of the subpixel reference current (Ipxr) and the dummy subpixel current (Idpx). That is, this is the step of determining the gamma correction voltage (Vgamc). To this end, the gamma voltage control circuit 230 within the gamma correction circuit 200 may include a successive approximation logic circuit 232 and a gamma voltage generation circuit 234. That is, in the successive approximation logic circuit 232, the gamma voltage (Vgam(n)) is modified step by step n times according to the comparison result between the subpixel reference current (Ipxr) and the dummy subpixel current (Idpx). As a result, the digital logic value (Dsar) for n stepwise gamma voltages (Vgam(n)) can be extracted, and the optimal gamma correction voltage (Vgamc) can be determined based on this.

In the step of applying the gamma correction voltage (Vgamc) to the main subpixel array (S700), when the gamma correction voltage (Vgamc) is output from the gamma correction circuit 200, the data driving circuit 130 applies the gamma correction voltage (Vcomc). This is the step of generating a data voltage as a reference and applying it to the main subpixel array 112. By applying the gamma correction voltage (Vgamc) determined through the above process to the main subpixel array 112, the ideal current flowing in the subpixel (SP) according to the gamma code (CODEgam) in environmental situations including temperature or illuminance. A current approximate to the subpixel reference current (Ipxr) can flow through the main subpixel array 112.

According to the gamma correction method of the present invention, the video image of the display device 100 is optimized by automatically determining the optimal gamma voltage required for a specific gray level according to the maximum luminance value and gamma code of the display panel 110. The time for this can be minimized. In addition, since the luminance deviation according to environmental factors such as temperature or illumination can be adjusted, an image with uniform luminance can be expressed in the entire area of the display panel 110. In addition, by determining the optimal gamma voltage required for a specific gray level through feedback processing using a successive approximation logic circuit, the optimal gamma voltage is determined without increasing the register 240 even if the maximum luminance value and gamma code increase or conditions change. It has the advantage of being able to determine the voltage.

The above description is merely an illustrative explanation of the technical idea of the present invention, and various modifications and variations will be possible to those skilled in the art without departing from the essential characteristics of the present invention. In addition, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but rather to explain it, and therefore the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of the present invention.

100: display device 110: display panel
112: main subpixel array 114: dummy subpixel array
120: gate driving circuit 130: data driving circuit
131: data voltage output circuit 140: timing controller
200: Gamma correction circuit 210: Reference current generation circuit
220: Comparator 230: Gamma voltage control circuit
232: Successive approximation logic circuit 234: Gamma voltage generation circuit
240: register 300: temperature sensor
400: Ambient light sensor

Claims (25)

A plurality of gate lines, a plurality of data lines, and a plurality of subpixels are disposed, and a main subpixel array in which light-emitting elements are disposed in the display area and the plurality of data are arranged without light-emitting elements outside the main subpixel array. A display panel including a dummy subpixel array to which at least some of the data lines are connected;
a gate driving circuit that drives the plurality of gate lines;
a data driving circuit that drives the plurality of data lines;
a timing controller that controls signals applied to the gate driving circuit and the data driving circuit; and
Under the control of the timing controller, the dummy subpixel current flowing in the dummy subpixel array disposed in a partial area of the display panel is detected using the gamma voltage for each gray level stored in the register, and the dummy subpixel current flowing in the dummy subpixel array is determined according to the luminous efficiency of the light emitting device. A gamma correction circuit that outputs a gamma correction voltage so that the dummy subpixel current has a value approximate to the subpixel reference current, compared to the subpixel reference current,
The data driving circuit applies a data voltage corresponding to the gamma correction voltage to the main subpixel array disposed in the display area of the display panel.
According to paragraph 1,
The gamma correction circuit is
A display device disposed inside the data driving circuit.
According to paragraph 1,
The gamma correction circuit is
a reference current generation circuit that determines the subpixel reference current;
a comparator that compares the subpixel reference current with a dummy subpixel current flowing in the dummy subpixel array; and
A display device comprising a gamma voltage control circuit that outputs the gamma correction voltage according to a comparison result of the comparator.
According to paragraph 3,
The register is
A display device further comprising information on the luminous efficiency of a light-emitting element disposed in the main subpixel array.
According to paragraph 4,
The luminous efficiency is
A display device that has different values depending on temperature or illuminance.
According to paragraph 4,
The reference current generation circuit is
Calculate the maximum subpixel current as (maximum luminance value)/(luminous efficiency),
A display device that calculates the subpixel reference current using the formula of (maximum subpixel current)*(gray level/maximum gray level) ^{gamma code} .
According to clause 6,
A display device in which the step-by-step gradation consists of a partial gradation among all gradation levels.
According to paragraph 3,
The gamma voltage control circuit is
a successive approximation logic circuit that accumulates the comparison result of the comparator into a digital logic value for n bits; and
A display device comprising a gamma voltage generation circuit that outputs the gamma voltage and the gamma correction voltage according to the digital logic value of the successive approximation logic circuit.
According to clause 8,
The gamma voltage generation circuit is
A display device that increases or decreases the gamma voltage with a width of (difference between high-level gamma voltage and low-level gamma voltage)/(2 ⁿ⁺¹ ) at an arbitrary gray level.
According to clause 8,
The gamma voltage control circuit is
A display device that stores the gamma correction voltage in the register.
In a display device, a main subpixel array including a light-emitting element is disposed in the display area of a display panel, and a dummy subpixel array that does not include a light-emitting element and is connected to a data line is disposed outside the main subpixel array. In a circuit that corrects voltage,
A register storing information about gamma voltage for each gray level;
a reference current generation circuit that generates a subpixel reference current;
a comparator that detects a dummy subpixel current flowing in the dummy subpixel array using the gamma voltage for each gray level and compares the dummy subpixel current with the subpixel reference current; and
A gamma correction circuit comprising a gamma voltage control circuit that outputs a gamma correction voltage so that the dummy subpixel current has a value approximate to the subpixel reference current according to the comparison result value of the comparator.
According to clause 11,
The register is
A gamma correction circuit further comprising information about the luminous efficiency of a light emitting element disposed in an array in the main subpixel.
According to clause 12,
The luminous efficiency is
A gamma correction circuit that has different values depending on temperature or illuminance.
According to clause 12,
The reference current generation circuit is
Calculate the maximum subpixel current as (maximum luminance value)/(luminous efficiency),
A gamma correction circuit that calculates the subpixel reference current using the formula of (maximum subpixel current)*(gray level/maximum gray level) ^{gamma code} .
According to clause 14,
A gamma correction circuit in which the step-by-step gray scale is made up of a partial gray scale among all gray scale levels.
According to clause 11,
The gamma voltage control circuit is
a successive approximation logic circuit that accumulates the comparison result of the comparator into a digital logic value for n bits; and
A gamma correction circuit comprising a gamma voltage generation circuit that outputs the gamma voltage and the gamma correction voltage according to the digital logic value of the successive approximation logic circuit.
According to clause 16,
The gamma voltage generation circuit is
A gamma correction circuit that adjusts the gamma voltage up or down with a width of (difference between high level gamma voltage and low level gamma voltage)/(2 ⁿ⁺¹ ) at an arbitrary gradation.
According to clause 16,
The gamma voltage control circuit is
A gamma correction circuit that stores the gamma correction voltage in the register.
In a display device, a main subpixel array including a light-emitting element is disposed in the display area of a display panel, and a dummy subpixel array that does not include a light-emitting element and is connected to a data line is disposed outside the main subpixel array. In the method of correcting the voltage,
Receiving environmental information;
Receiving a maximum luminance value and a gamma code;
calculating a subpixel reference current;
measuring a dummy subpixel current according to the gamma voltage for each gray level stored in a register;
Comparing the subpixel reference current and the dummy subpixel current;
determining a gamma correction voltage so that the dummy subpixel current is close to the subpixel reference current; and
A gamma correction method comprising outputting the gamma correction voltage.
According to clause 19,
The above environmental information is
Gamma correction method, which is temperature or illuminance information.
According to clause 19,
The step of calculating the subpixel reference current is
calculating the maximum subpixel current as (maximum luminance value)/(luminous efficiency); and
(Maximum subpixel current)*(Gradation level/Maximum gray level) A gamma correction method including the step of calculating the subpixel reference current using ^{the gamma code} formula.
According to clause 21,
A gamma correction method in which the step-by-step grayscale is made up of a partial grayscale among all grayscale levels.
According to clause 19,
The step of determining the gamma correction voltage is
accumulating a result of comparing the subpixel reference current and the dummy subpixel current as a digital logic value for n bits; and
A gamma correction method comprising determining the gamma correction voltage by adjusting the gamma voltage upward or downward according to the digital logic value.
According to clause 23,
The gamma voltage is
A gamma correction method that adjusts the gradation up or down by a width of (difference between high-level gamma voltage and low-level gamma voltage)/(2 ⁿ⁺¹ ).
According to clause 19,
A gamma correction method further comprising storing the gamma correction voltage in the register.

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