KR20200076292A - Electroluminescent Display Device - Google Patents

Abstract

The present invention relates to an electroluminescent display device. The present invention includes: a light emitting element; a driving transistor for inputting an N^th driving voltage signal inputted to a drain electrode to an anode electrode of the light emitting element according to a voltage difference between a gate and a source; a first switching means for charging a reference voltage to one end of a capacitor connected to the gate electrode of the driving transistor according to a scan signal; a second switching means for charging a data voltage to the other end of the capacitor according to the scan signal; and a third switching means for connecting the other end of the capacitor and the source electrode of the driving transistor according to the (N-1)^th driving voltage signal.

Description

Electroluminescent display device

The present invention relates to an electroluminescent display device.

The electroluminescent display device is roughly classified into an inorganic light emitting display device and an organic light emitting display device according to the material of the light emitting layer. Among them, an active matrix type organic light emitting display device includes an organic light emitting diode (hereinafter referred to as “OLED”) that emits light by itself.

The organic light emitting display device arranges pixels including OLEDs in a matrix form and adjusts the luminance of the pixels according to the gradation of image data. Each of the pixels basically includes a driving thin film transistor (TFT) that controls the driving current flowing through the OLED according to the voltage between the gate and the source, and one or more switch TFTs for programming the voltage between the gate and sort of the driving TFT.

Organic light emitting display devices are advantageous in thinning, low power consumption, fast response speed, high luminous efficiency, high brightness, and wide viewing angles, which have been applied to various fields.

Accordingly, research is being conducted to improve performance and lifetime while maintaining the advantages of the organic light emitting display device.

The present invention provides an electroluminescent display device capable of increasing the aperture ratio by reducing the number of TFTs included in a pixel and improving panel life.

An electroluminescent display device according to an exemplary embodiment of the present invention includes: a light emitting element; A driving transistor inputting the Nth driving voltage signal input to the drain electrode to the anode electrode of the light emitting device according to a voltage difference between a gate and a source; First switching means for charging a reference voltage to one end of a capacitor connected to the gate electrode of the driving transistor according to a scan signal; Second switching means for charging a data voltage to the other end of the capacitor according to the scan signal; And third switching means for connecting the other end of the capacitor and the source electrode of the driving transistor according to the N-1 driving voltage signal.

The third switching means may be turned on by the N-1 driving voltage signal, which is a previous signal of the N driving voltage signal that turns on the driving transistor.

The third switching means may maintain a turn-on state during the light emission period of the light emitting element.

The driving voltage signal may be a voltage signal swinging between a first level voltage and a second level voltage lower than the first level voltage.

The light emitting device may receive the driving voltage signal to the anode electrode and the third level voltage between the first level and the second level to the cathode electrode.

When the first switching means and the second switching means are turned on, the third switching means remains turned off to charge the capacitor with the data voltage, and when the third switching means is turned on, the first switching means and the The second switching means maintains the turn-off state so that the data voltage stored in the capacitor can be reflected in the potential between the gate and the source of the driving transistor.

The driving transistor may remain turned off while the capacitor is charged with the data voltage and the data voltage stored in the capacitor is reflected in the potential between the gate and the source of the driving transistor.

An electroluminescent display device according to an exemplary embodiment of the present invention includes: a data driver supplying a data voltage and a reference voltage to a data line; A gate driver supplying a scan signal to the gate line; A driving voltage control unit supplying a driving voltage signal swinging between a first level voltage and a second level voltage lower than the first level voltage to the driving voltage line; And a display panel in which a plurality of pixels are connected to the data line, the gate line, and the driving voltage line, and each pixel disposed in an Nth pixel row among the pixels includes a gate electrode connected to a first node, the A driving TFT controlling a driving current including a source electrode connected to a third node and a drain electrode to which the driving voltage signal is input; A first TFT connected between the first node and the reference power line; A second TFT connected between a second node and the data line; A capacitor having one end connected to the first node and the other end connected to the second node; A third TFT connected between the second node and the third node; And a light emitting element connected to the third node and having an anode electrode receiving the driving voltage signal and a cathode electrode receiving a third level voltage between the first level and the second level of the driving voltage signal. do.

The first TFT and the second TFT may include a gate electrode to which the same scan signal is supplied.

An N-th driving voltage signal is input to the drain electrode of the driving TFT; The third TFT may include a gate electrode to which the N-1 driving voltage signal is supplied.

When the first TFT and the second TFT are turned on, the third TFT remains turned off to charge the capacitor with the data voltage, and when the third TFT is turned on, the first TFT and the second TFT are turned off. By maintaining the state, the data voltage stored in the capacitor can be reflected to the potential of the gate and source of the driving TFT.

One frame period includes: a data writing period in which the capacitor is charged with the data voltage; A data transfer period in which the data voltage stored in the capacitor is reflected in the potential of the gate and source of the driving TFT; And a light emitting period for emitting the light emitting device according to the potential of the gate and source of the driving TFT.

The first TFT and the second TFT may be switched according to the Nth scan signal, and the third TFT may be switched by receiving the N-1 driving voltage signal.

In the data writing period, the Nth scan signal is input at an on level, the Nth driving voltage signal is input at the second level, and the N-1 driving voltage signal can also be input at the second level. have.

In the data transfer period, the Nth scan signal is input at an off level, the Nth driving voltage signal is input at the second level, and the N-1 driving voltage signal is input at the first level. have.

In the light emission period, the Nth scan signal is input at an off level, the Nth driving voltage signal is input at the first level, and the N-1 driving voltage signal is also input at the first level. .

The Nth scan signal is input such that the first TFT and the second TFT are turned on during the data writing period, and the Nth driving voltage signal is input to the first level from the light emission period, and the N-1 driving The voltage signal may be input to the first level from the data transfer period.

The electroluminescent display device of the present invention can control light emission by using a driving voltage signal that swings between a first level voltage and a second level voltage to control light emission of a pixel. Accordingly, since the light emission of the pixels can be controlled without adding a separate TFT, the number of TFTs included in the pixels can be reduced to increase the aperture ratio and improve the panel life.

The electroluminescent display device of the present invention can reduce the number of pins of a data driver that is required to supply a conventional high potential voltage signal (EVDD) by supplying a driving voltage to a pixel using a driving voltage signal.

The electroluminescent display device of the present invention is driven by connecting the anode of the light emitting element when inputting the second level voltage of the low potential level by inputting the driving voltage signal swinging between the first level voltage and the second level voltage as the anode of the light emitting element. The source stage of the transistor can be initialized, and as a result, the influence of the previous frame can be minimized.

1 is a control block diagram of an electroluminescent display device according to an exemplary embodiment of the present invention.
2 is a circuit diagram of a pixel included in the electroluminescent display of FIG. 1.
3 is a driving waveform diagram of the pixel of FIG. 2.
4A is an equivalent circuit diagram of pixels corresponding to the data writing period t1 in FIG. 3.
4B is a driving waveform diagram showing a data writing period t1 and a voltage state of each node in the driving waveform of the pixel of FIG. 3.
5A is an equivalent circuit diagram of pixels corresponding to the data transfer period t3 in FIG. 3.
5B is a driving waveform diagram showing a data transfer period t3 and a voltage state of each node in the driving waveform of the pixel of FIG. 3.
6A is an equivalent circuit diagram of pixels corresponding to the light emission period t4 of FIG. 3.
6B is a driving waveform diagram showing the light emission period t4 and the voltage state of each node in the driving waveform of the pixel of FIG. 3.
7 to 9 are views showing simulation results of the electroluminescent display device of the present invention.

Advantages and features of the present specification, and a method of achieving them will be apparent with reference to embodiments described below in detail together with the accompanying drawings. However, the present specification is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the embodiments allow the disclosure of the present specification to be complete, and common knowledge in the art to which this specification belongs It is provided to fully inform the person having the scope of the invention, and this specification is only defined by the scope of the claims.

Since the shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for describing the embodiments of the present specification are exemplary, the present specification is not limited to the illustrated items. The same reference numerals refer to the same components throughout the specification. When'include','have','consist of', etc. mentioned in this specification are used, other parts may be added unless'~ only' is used. When a component is expressed as a singular number, the plural number is included unless otherwise specified.

In interpreting the components, it is interpreted as including the error range even if there is no explicit description.

In the case of the description of the positional relationship, for example, if the positional relationship of the two parts is described as'~ on','~ on top','~ on the bottom','~ next to', etc.,'right' Alternatively, one or more other parts may be located between the two parts unless'direct' is used.

The first, second, etc. may be used to describe various components, but these components are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component mentioned below may be the second component within the technical spirit of the present specification.

Throughout the specification, the same reference numerals refer to substantially the same components.

In this specification, the pixel circuit and gate driver formed on the substrate of the display panel may be implemented as a TFT of an n-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) structure, but are not limited thereto, and may be implemented as a TFT of a p-type MOSFET structure. have. TFT is a three-electrode device including a gate, a source, and a drain. The source is an electrode that supplies a carrier to the transistor. In the TFT, carriers begin to flow from the source. The drain is an electrode through which the carrier exits from the TFT. That is, the carrier flow in the MOSFET flows from the source to the drain. In the case of an n-type TFT (NMOS), since the carrier is electron, the source voltage has a voltage lower than the drain voltage so that electrons can flow from the source to the drain. Since electrons flow from the source to the drain in the n-type TFT, the direction of the current flows from the drain to the source. In contrast, in the case of the p-type TFT (PMOS), the source voltage is higher than the drain voltage so that holes can flow from the source to the drain because the carrier is a hole. In the p-type TFT, current flows from the source to the drain because holes flow from the source to the drain. It should be noted that the source and drain of the MOSFET are not fixed. For example, the source and drain of the MOSFET can be changed according to the applied voltage. Therefore, in the description of the embodiment of the present specification, any one of the source and the drain is described as the first electrode, and the other of the source and the drain is described as the second electrode.

Hereinafter, embodiments of the present specification will be described in detail with reference to the accompanying drawings. In the following embodiments, the display device will be mainly described with an organic light emitting display device including an organic light emitting material. However, it should be noted that the technical idea of the present specification is not limited to the organic light emitting display device, and can be applied to an inorganic light emitting display device including an inorganic light emitting material.

In the following description, when it is determined that a detailed description of known functions or configurations related to the present specification may unnecessarily obscure the subject matter of the present specification, the detailed description is omitted.

1 is a view showing an electroluminescent display device according to an embodiment of the present invention.

Referring to FIG. 1, an organic light emitting display device according to an exemplary embodiment of the present invention includes a display panel 10 on which pixels PXL are formed, a data driver 12 for driving data lines 14, and gate lines. A gate driver 13 for driving 15, a driving voltage controller 16 for controlling light emission of pixels PXL, and a timing controller 11 for controlling driving timing of each of these components are provided.

The timing controller 11 rearranges digital video data (RGB) input from the outside according to the resolution of the display panel 10 and supplies it to the data driver 12. In addition, the timing controller 11 is based on timing signals such as a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a dot clock signal (DCLK), and a data enable signal (DE) of the data driver 12 The data control signal DDC for controlling the operation timing and the gate control signal GDC for controlling the operation timing of the gate driver 13 are generated.

The data driver 12 may supply the analog data voltage V _DATA and the reference voltage V _Ref through the data lines 14 of the display panel 10. The data lines 14 may include a supply line of the data voltage V _DATA and a supply line of the reference voltage V _Ref . The data driver 12 converts digital video data RGB input from the timing controller 11 into an analog data voltage V _DATA based on the data control signal DDC and supplies it to the display panel 10. Further, the data driver 12 may be supplied to the supply line of the reference voltage (V _Ref), to generate a reference voltage (V _Ref).

The gate driver 13 may generate a scan signal SCAN based on the gate control signal GDC. The gate driver 13 may supply the scan signal SCAN to the gate line 15 connected to each pixel row in a row sequential manner. The gate driver 13 may be directly formed on a non-display area of the display panel 10 according to a gate-driver in panel (GIP) method.

The driving voltage controller 16 generates a driving voltage signal EVDD and supplies it to the driving voltage line 17. The driving voltage signal EVDD may be generated as a voltage signal in a form of swinging between a first level voltage and a second level voltage lower than the first level voltage. The first level voltage may have a voltage level sufficient to emit the OLED, and the second level voltage may have a voltage level lower than the third level voltage EVSS input to the cathode terminal of the OLED. The driving voltage controller 16 may supply a driving voltage signal EVDD to at least one driving voltage line 17 connected to each pixel row. The driving voltage control unit 16 may be formed at a position facing the gate driving unit 13 with the display panel 10 interposed therebetween.

A plurality of data lines 14 arranged in the vertical direction, a plurality of gate lines 15 and the driving voltage lines 17 arranged in the horizontal direction intersect the display panel 10, and a pixel ( PXL) are arranged in a matrix form. The pixels PXL disposed on the same horizontal line form one pixel row. The pixels PXL disposed in the same pixel row are connected to the same gate line 15 and the driving voltage line 17.

The pixels PXL may include OLEDs. The self-luminous device, OLED, includes an anode electrode and a cathode electrode, and an organic compound layer formed therebetween. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (Electron Injection Layer, EIL). When a power voltage is applied to the anode electrode and the cathode electrode, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are moved to the emission layer (EML) to form excitons, and as a result, the emission layer (EML) Visible light is generated.

Each of the pixels PXL may be any one of a red pixel, a green pixel, a blue pixel, and a white pixel. The red pixel, the green pixel, the blue pixel, and the white pixel may constitute one unit pixel for color realization. The color implemented in the unit pixel may be determined according to the emission ratio of the red pixel, the green pixel, the blue pixel, and the white pixel. Meanwhile, the white pixel may be omitted from the unit pixel.

2 is a circuit diagram of a pixel included in an electroluminescent display device according to an exemplary embodiment of the present invention.

One pixel is disposed in a region where the data lines 14 arranged in the vertical direction, the gate line 15 arranged in the horizontal direction, and the driving voltage lines 17 intersect.

The data line 14 may include a data voltage line to which the analog data voltage V _DATA is supplied and a reference voltage line to which the reference voltage V _Ref is supplied. The scan signal SCAN is supplied to the gate line 15, and the driving voltage signal EVDD is supplied to the driving voltage lines 17.

The pixel PXL disposed in the i-th pixel row receives the i-th scan signal SCAN[i] through the gate line 15 and the i-th driving voltage signal EVDD[ through the drive voltage lines 17. i]) and the i-th driving voltage signal EVDD[i-1], which are driving voltage signals of the immediately preceding stage, may be input. The driving voltage signal EVDD may be generated as a voltage signal swinging between a high potential first level voltage and a second level voltage lower than the first level voltage.

Each pixel scans a light emitting device (OLED), a driving transistor (DR) that inputs the i-th driving voltage signal (EVDD[i]) input to the drain electrode as the anode electrode of the light-emitting device according to the voltage difference between the gate and the source. The first switching means SW1 and the scan signal SCAN provide a path for charging the reference voltage V _REF to one end of the capacitor Cst connected to the gate of the driving transistor DR according to the signal SCAN[i]. The second switching means (SW2) providing a path for charging the data voltage (V _DATA ) to the other end of the capacitor (Cst) according to [i]) and the i-1 driving voltage signal (EVDD), which is the driving voltage signal of the previous stage. In accordance with [i-1]), a third switching means SW3 connecting the other end of the capacitor Cst and the source of the driving transistor DR may be included.

Here, the driving voltage signal EVDD for swinging between the first level voltage and the second level voltage is input to the anode electrode, and the third level voltage between the first level and the second level is input to the cathode electrode. (EVSS) is input.

According to an embodiment of the present invention, the pixel PXL disposed in the i-th pixel row includes an i-th scan signal SCAN[i], an i-th driving voltage signal EVDD[i], and an i-1 driving voltage signal. Input (EVDD[i-1]).

The i-th scan signal SCAN[i] is shared by the first switching means SW1 and the second switching means SW2 so that the first switching means SW1 and the second switching means SW2 are simultaneously turned on and off. do. In this way, the number of scan lines can be reduced in half by sharing the scan signal SCAN by the first switching means SW1 and the second switching means SW2.

When the first switching means SW1 and the second switching means SW2 are turned on, one end of the capacitor Cst is connected to the reference voltage line and the other end is connected to the data voltage line. Accordingly, the data voltage V _DATA may be charged to the capacitor Cst.

When the first switching means SW1 and the second switching means SW2 are turned off, the i-1 driving voltage signal EVDD[i-1] is input as a high potential first level voltage and the third switching means (SW3) is turned on. Accordingly, one end of the capacitor Cst is connected to the gate of the driving transistor DR and the other end is connected to the source terminal. Accordingly, the data voltage V _DATA charged in the capacitor Cst may be reflected in the potential between the gate and the source of the driving transistor DR. By applying the data voltage V _DATA to the driving transistor DR in this principle, it is possible to write data by applying a positive drive IC. Therefore, production cost can be reduced and driving stability can be increased as compared to applying a negative drive IC.

When the data voltage V _DATA is reflected in the potential between the gate and the source of the driving transistor DR, the i-th driving voltage signal EVDD[i] is applied as the high-potential first-level voltage. The i-th driving voltage signal EVDD[i] is applied to the anode electrode of the light emitting device OLED according to the potential between the gate and the source of the driving transistor DR. Accordingly, the light emitting device may receive the i-th driving voltage signal EVDD[i] and emit light.

Thereafter, the i-th driving voltage signal EVDD[i] is converted to a second level voltage. The second level has a voltage level lower than the third level voltage EVSS connected to the cathode terminal of the light emitting element OLED. Accordingly, when the i-th driving voltage signal EVDD[i] is converted to the second level voltage, since the drain node of the driving transistor DR is in a relatively high potential state than the source node, all the power sources remaining in the source node are drained. It will exit towards the node. That is, the source node may be initialized.

3 is a waveform diagram showing a driving waveform of the pixel illustrated in FIG. 2.

Referring to FIG. 3, during the one frame period for driving the pixel PXL disposed in the i-th pixel row, the data voltage V _DATA is charged to the capacitor Cst and the source node of the driving transistor DR is initialized. in which the data write-in and set-up period (t1), a data write the data voltage (Cst) of the capacitors after completion of (V _dATA) is the held data holding period (t2), charged in the capacitor (Cst) data voltage (V _dATA ) May include a data transfer period t3 reflected in the potential between the gate and the source of the driving transistor DR and a light emission period t4 for emitting a light emitting element.

In the data writing and initialization period t1, the i-th driving voltage signal EVDD[i-1] and the i-th driving voltage signal EVDD[i] are applied as the second level voltage. The second level voltage has a lower voltage level than the third level voltage EVSS connected to the cathode terminal of the light emitting element OLED. Accordingly, when the i-th driving voltage signal EVDD[i] is applied as the second level voltage, the light emitting device OLED is turned off and the third switching receives the i-1 driving voltage signal EVDD[i-1]. The means SW3 is also off. The i-th scan signal SCAN[i] is applied at a high level. In the case of the scan signal, the high level is on level and the low level is off level. Therefore, the first switching means SW1 and the second switching means SW2 are turned on at the same time.

In the data retention period t2, the i-th driving voltage signal EVDD[i-1] and the i-th driving voltage signal EVDD[i] are maintained at the second level voltage. Therefore, the light emitting element OLED and the third switching means SW3 are kept in the off state. The i-th scan signal SCAN[i] is applied at a low level. In the case of the scan signal, the high level is on level and the low level is off level. Therefore, in the data writing period t2, the first switching means SW1 and the second switching means SW2 are simultaneously turned off.

In the data transfer period t3, the i-th driving voltage signal EVDD[i-1] is converted to the first level voltage and the i-th driving voltage signal EVDD[i] is maintained at the second level voltage. Therefore, the third switching means SW3 is turned on and the light emitting element OLED is maintained in the off state. The i-th scan signal SCAN[i] is maintained at a low level. Therefore, the first switching means SW1 and the second switching means SW2 are kept in the off state.

In the light emission period t4, the i-th driving voltage signal EVDD[i-1] is maintained at the first level voltage and the i-th driving voltage signal EVDD[i] is converted to the first level voltage. Therefore, both the third switching means SW3 and the light emitting element OLED are turned on. The i-th scan signal SCAN[i] is maintained at a low level. Therefore, the first switching means SW1 and the second switching means SW2 are kept in the off state.

As described above, according to the embodiment of the drive waveform of the present invention, the Nth scan signal SCAN is input such that the first switching means SW1 and the second switching means SW2 are turned on in the data writing period t1. , The Nth driving voltage signal EVDD[N] is input to the first level from the light emission period t4, and the Nth 1st driving voltage signal EVDD[N-1] is from the data transfer period t3. It can be input to the first level.

4 to 6 are views for explaining a method of driving a pixel according to an exemplary embodiment of the present invention.

In the pixel according to the exemplary embodiment of the present invention, the first to third switching means SW1 to SW3 and the driving transistor DR are n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), p-type MOSFETs, and CMOS (complementary) metal semiconductor) TFT. In the following embodiment, a case in which the first to third switching means SW1 to SW3 and the driving transistor DR are both implemented in an n-type will be described.

Accordingly, the pixel of the present invention controls a driving current including a gate electrode connected to the first node N1, a source electrode connected to the third node N3, and a drain electrode to which the driving voltage signal EVDD is input. It includes a driving TFT DR, an anode electrode connected to the third node N3, a cathode electrode connected to the input terminal of the third level voltage EVSS, and a light emitting device OLED having. The first TFT SW1 is connected between the first node N1 and the supply line of the reference voltage V _REF , and the second TFT (between the second node N2 and the supply line of the data voltage V _DATA ) SW2) is connected. The third TFT SW3 is connected between the second node N2 and the third node N3. The capacitor Cst has one end connected to the first node N1 and the other end connected to the second node N2.

The gate electrodes of the first TFT SW1 and the second TFT SW2 share the same scan line SCAN[i]. The i-th driving voltage signal EVDD[i] is input to the drain electrode of the driving TFT DR, and the i-1 driving voltage signal EVDD[i-1] is supplied to the gate of the third TFT SW3. do.

4A is an equivalent circuit diagram of pixels corresponding to the data writing period t1, and FIG. 4B is a driving waveform diagram showing the data writing period t1 and the voltage state of each node in the driving waveform of the pixel.

In the data writing and initialization period t1, the i-th driving voltage signal EVDD[i-1] and the i-th driving voltage signal EVDD[i] are applied as the second level voltage. The second level voltage has a lower voltage level than the third level voltage EVSS connected to the cathode terminal of the light emitting element OLED. When the i-th driving voltage signal EVDD[i] is applied as the second level voltage, the light emitting device OLED is turned off and when the i-th driving voltage signal EVDD[i-1] is applied as the second level voltage. The third switching means SW3 is turned off. When the i-th driving voltage signal EVDD[i] is applied as the second level voltage, the drain node of the driving transistor DR becomes relatively high potential than the source node, and the source node may be initialized.

In the data writing and initialization period t1, the i-th scan signal SCAN[i] is applied at a high level. Therefore, the first switching means SW1 and the second switching means SW2 are turned on at the same time. Therefore, the light emitting device OLED is maintained in the off state, and the second node N2 and the third node N3 are disconnected. When the first TFT SW1 is turned on, one end of the capacitor Cst is connected to the reference voltage line and the other end is connected to the data line. When the second TFT SW2 is turned on, the other end of the capacitor Cst is connected to the data line. Accordingly, the reference voltage V _REF is applied to the first node N1 to which the capacitor Cst is connected, and the data voltage V _DATA is applied to the second node N2. Accordingly, the data voltage VDATA may be charged to the capacitor Cst. Here, the reference voltage V _REF may be set to about 7V and the data voltage VDATA may be set to about 3 to 9V. Through the above process, the data voltage V _DATA may be charged to the capacitor Cst while the light emitting device OLED is maintained in the off state during the data writing period t1.

Thereafter, in the data retention period t2, the i-th driving voltage signal EVDD[i-1] and the i-th driving voltage signal EVDD[i] are maintained at the second level voltage. Therefore, the light emitting element OLED and the third switching means SW3 are kept in the off state. The i-th scan signal SCAN[i] is applied at a low level. In the case of the scan signal, the high level is on level and the low level is off level. Therefore, in the data writing period t2, the first switching means SW1 and the second switching means SW2 are simultaneously turned off. When the i-th scan signal SCAN[i] is switched to a low level, the voltage of the first node N1 and the voltage of the second node N2 are gradually reduced, but the potential difference stored in the capacitor Cst can be maintained. have.

5A is an equivalent circuit diagram of a pixel corresponding to the data transfer period t3, and FIG. 5B is a drive waveform diagram showing the data transfer period t3 and the voltage state of each node in the driving waveform of the pixel.

In the data transfer period t3, the i-th driving voltage signal EVDD[i-1] is converted to the first level voltage and the i-th driving voltage signal EVDD[i] is maintained at the second level voltage. Therefore, the third switching means SW3 is turned on and the light emitting element OLED is maintained in the off state. The i-th scan signal SCAN[i] is maintained at a low level. Therefore, the first switching means SW1 and the second switching means SW2 are kept in the off state. When the first TFT SW1 is turned off, the first node N1 to which the capacitor Cst is connected is connected to the gate electrode of the driving TFT DR. When the second TFT SW2 is turned off, the second node N2 of the capacitor Cst is connected to the source electrode of the driving TFT DR through the third TFT SW3. As a result, the light emitting device OLED is maintained in an off state, and the second node N2 and the third node N3 are connected. That is, the gate electrode and the source electrode of the driving TFT DR are connected through the capacitor Cst.

Through the above process, the data voltage VDATA stored in the capacitor Cst is maintained between the gate electrode and the source electrode of the driving TFT DR while the light emitting device OLED is maintained in the off state during the data transfer period t3. It can be reflected as a potential difference.

6A is an equivalent circuit diagram of pixels corresponding to the light emission period t4, and FIG. 6B is a drive waveform diagram showing the light emission period t4 and the voltage state of each node in the driving waveform of the pixel.

In the light emission period t4, the i-th driving voltage signal EVDD[i-1] is maintained at the first level voltage and the i-th driving voltage signal EVDD[i] is converted to the first level voltage. Therefore, both the third switching means SW3 and the light emitting element OLED are turned on. The i-th scan signal SCAN[i] is maintained at a low level. Therefore, the first switching means SW1 and the second switching means SW2 are kept in the off state.

When the first TFT SW1 is turned off, the first node N1 to which the capacitor Cst is connected is connected to the gate electrode of the driving TFT DR. When the second TFT SW2 is turned off, the second node N2 of the capacitor Cst is connected to the source electrode of the driving TFT DR through the third TFT SW3 to drive the voltage stored in the capacitor Cst. It is reflected by the gate-source voltage of the TFT (DR). The i-th driving voltage signal EVDD[i] is supplied as a first level voltage and input to the drain of the driving TFT DR, and the driving TFT DR is supplied to the light emitting device OLED according to the gate-source voltage. The current amount of the i-th driving voltage signal EVDD[i] to be adjusted can be adjusted.

7 to 9 are views showing simulation results of the electroluminescent display device of the present invention.

7 is a graph of a simulation result of voltage change at the source terminal N3 of the driving TFT DR when driving R, G, and B pixels according to an embodiment of the present invention.

During simulation, the driving voltage signal (EVDD) swings from -4V to 8V for the high-potential power voltage (EVDD), the third level voltage (EVSS) input to the cathode is -1.5V, and the scan signal (SCAN) is -6V. It was applied at ~10V. When the reference voltage (V _REF ) is set to 7V and the data voltage (VDATA) for R, G, and B pixels is applied from 3 to 9V, the voltage change of the source terminal (N3) of the driving TFT (DR) is a graph. As shown in.

When the i-th scan signal SCAN[i] is applied at a high level, the first switching means SW1 and the second switching means SW2 are turned on at the same time, and the light emitting element OLED is maintained in the off state, so that the second node (N2) and the third node (N3) are disconnected.

When the i-th scan signal SCAN[i] is applied at a high level, the driving voltage signal EVDD is applied at -4V. The driving voltage signal EVDD is input to the drain of the driving transistor DR and transferred to the source node, whereby the source node N3 of the driving transistor DR is sufficiently lower than the data voltage V _DATA 3 to 9V − It can be initialized to 4V.

8 is a graph of simulation results of gamma characteristics when driving R, G, and B pixels according to an embodiment of the present invention.

During simulation, the driving voltage signal (EVDD) swings from -4V to 8V for the high-potential power voltage (EVDD), the third level voltage (EVSS) input to the cathode is -1.5V, and the scan signal (SCAN) is -6V. It was applied at ~10V. When the reference voltage (V _REF ) is set to 7V, and the data voltage (VDATA) for R, G, and B pixels is applied from 3 to 9V, the peak luminance is measured by measuring the current value applied to the R, G, and B pixels. I was satisfied.

As a result of the simulation, as shown in the graph of FIG. 8, it was confirmed that the peak luminance can be satisfied at 6.6V for the red pixel, 7.0V for the green pixel, and 5.9V for the blue pixel.

9 is a graph simulating whether black current, which is an effect of a previous frame, is generated when driving R, G, and B pixels according to an embodiment of the present invention.

During simulation, the driving voltage signal (EVDD) swings from -4V to 8V for the high-potential power voltage (EVDD), the third level voltage (EVSS) input to the cathode is -1.5V, and the scan signal (SCAN) is -6V. It was applied at ~10V. When the reference voltage (V _REF ) is set to 7V, and the data voltage (VDATA) for R, G, and B pixels is applied from 3 to 9V, the peak luminance is measured by measuring the current value applied to the R, G, and B pixels. I was satisfied.

As a result of the simulation, as shown in the graph of FIG. 9, black currents of 1 pA or less were measured for R, G, and B pixels, and this was a result of satisfying 1 pA or less of the standard specification of the black current. The black current is a measure of the degree to which the charged voltage remains in the pixel when displaying the data of the previous frame. In the present invention, the driving voltage signal EVDD input to the light emitting device OLED through the driving TFT DR swings between a high-level first level voltage and a second level voltage lower than EVSS (-4V to 8V). . Accordingly, when the driving voltage signal EVDD is input to the second level voltage -4V, the source node of the driving transistor DR may be initialized to -4V, which is sufficiently lower than the data voltage V _DATA of 3 to 9V. Accordingly, it can be confirmed through simulation results that a definite effect of removing blackcurrant can be obtained.

Through the above description, those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical idea of the present specification. Therefore, the technical scope of the present specification is not limited to the contents described in the detailed description of the specification, but should be determined by the scope of the claims.

10: display panel 11: timing controller
12: data driver 13: gate driver

Claims (17)

Light emitting element;
A driving transistor inputting the Nth driving voltage signal input to the drain electrode to the anode electrode of the light emitting device according to a voltage difference between a gate and a source;
First switching means for charging a reference voltage to one end of a capacitor connected to the gate electrode of the driving transistor according to a scan signal;
Second switching means for charging a data voltage to the other end of the capacitor according to the scan signal; And
Third switching means for connecting the other end of the capacitor and the source electrode of the driving transistor according to the N-1 driving voltage signal;
An electroluminescent display device comprising a. According to claim 1,
The third switching means is an electroluminescent display device that is turned on by the N-1 driving voltage signal, which is a signal before the N driving voltage signal that turns on the driving transistor. According to claim 2,
The third switching means is an electroluminescent display device that maintains a turn-on state during the light emission period of the light emitting element. According to claim 1,
The driving voltage signal is an electroluminescent display device that is a voltage signal that swings between a first level voltage and a second level voltage lower than the first level voltage. According to claim 4,
The light emitting element,
An electroluminescent display device that receives the driving voltage signal to the anode electrode and a third level voltage between the first level and the second level to the cathode electrode . According to claim 1,
When the first switching means and the second switching means are turned on, the third switching means maintains a turn-off state so that the capacitor is charged with the data voltage,
When the third switching means is turned on, the first switching means and the second switching means remain turned off, so that the data voltage stored in the capacitor is reflected in the potential between the gate and the source of the driving transistor. . The method of claim 6,
The electroluminescence display device maintains a turn-off state while the capacitor is charged with the data voltage and the data voltage stored in the capacitor is reflected at a potential between a gate and a source of the driving transistor. A data driver supplying a data voltage and a reference voltage to the data line;
A gate driver supplying a scan signal to the gate line;
A driving voltage control unit supplying a driving voltage signal swinging between a first level voltage and a second level voltage lower than the first level voltage to the driving voltage line; And
A display panel having a plurality of pixels connected to the data line, the gate line and the driving voltage line is provided.
Among the pixels, each pixel arranged in the Nth pixel row,
A driving TFT for controlling a driving current including a gate electrode connected to a first node, a source electrode connected to the third node, and a drain electrode to which the driving voltage signal is input;
A first TFT connected between the first node and the reference voltage line;
A second TFT connected between a second node and the data line;
A capacitor having one end connected to the first node and the other end connected to the second node;
A third TFT connected between the second node and the third node; And
A light emitting device connected to the third node and having an anode electrode receiving the driving voltage signal and a cathode electrode receiving a third level voltage between the first level and the second level of the driving voltage signal;
An electroluminescent display device comprising a. The method of claim 8,
The first TFT and the second TFT are electroluminescent display devices including a gate electrode to which the same scan signal is supplied. The method of claim 8,
An N-th driving voltage signal is input to the drain electrode of the driving TFT;
The third TFT is an electroluminescent display device including a gate electrode to which an N-1 driving voltage signal is supplied. The method of claim 8,
When the first TFT and the second TFT are turned on, the third TFT maintains a turn-off state so that the capacitor is charged with the data voltage,
When the third TFT is turned on, the first TFT and the second TFT remain turned off, so that the data voltage stored in the capacitor is reflected in the potential of the gate and source of the driving TFT. The method of claim 8,
1 frame period,
A data writing and initialization period in which the data voltage is charged in the capacitor and the source node of the driving TFT is initialized;
A data transfer period in which the data voltage stored in the capacitor is reflected in the potential of the gate and source of the driving TFT; And
An electroluminescent display device comprising a light emitting period for emitting the light emitting element according to the potential of the gate and source of the driving TFT. The method of claim 12,
The first TFT and the second TFT are switched according to the Nth scan signal,
The third TFT is an electroluminescent display device that is switched by receiving an N-1 driving voltage signal. The method of claim 13,
In the data writing and initializing period,
The Nth scan signal is input at an on level,
The N-th driving voltage signal is input at a second level,
An electroluminescent display device wherein the N-1 driving voltage signal is also input at a second level. The method of claim 13,
In the data transmission period,
The Nth scan signal is input at an off level,
The N-th driving voltage signal is input at a second level,
An electroluminescence display device wherein the N-1 driving voltage signal is also input at a first level. The method of claim 13,
In the light emission period,
The Nth scan signal is input at an off level,
The N-th driving voltage signal is input at a first level,
An electroluminescence display device wherein the N-1 driving voltage signal is also input at a first level. The method of claim 13,
The Nth scan signal is input such that the first TFT and the second TFT are turned on during the data writing period,
The Nth driving voltage signal is input such that the driving TFT is turned on during the light emission period,
The N-1 driving voltage signal is an electroluminescent display device that is input so that the third TFT is turned on during the data transfer period and the light emission period.

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