KR20200005347A - Organic light emitting display device, data driving circuit, controller, and driving method - Google Patents

Abstract

The present invention relates to an organic light emitting display device, data driving circuit, controller, and driving method. More specifically, the present invention relates to the organic light emitting display device, data driving circuit, controller, and driving method capable of preventing a line fault and improving the image quality by detecting a bad sub-pixel generating a line fault that a block with a black strip shape is visible and supplying a data voltage, which enables the driving of the detected bad sub-pixel not to affect the other sub-pixels, to the bad sub-pixel. The organic light emitting display device comprises: an organic light emitting display panel; a data driving circuit; a gate driving circuit; and a controller.

Description

Organic light emitting display, data driving circuit, controller and driving method {ORGANIC LIGHT EMITTING DISPLAY DEVICE, DATA DRIVING CIRCUIT, CONTROLLER, AND DRIVING METHOD}

The present invention relates to an organic light emitting display device, a data driving circuit, a controller and a driving method.

Recently, an organic light emitting display device, which has been in the spotlight as a display device, has an advantage of fast response speed, high luminous efficiency, luminance, viewing angle, etc. by using an organic light emitting diode (OLED) which emits light by itself.

The organic light emitting display device arranges the subpixels including the organic light emitting diode and the driving transistor for driving the same in a matrix form and controls the brightness of the subpixels selected by the scan signal according to the gray level of the data.

BACKGROUND ART Conventional organic light emitting display devices have a problem that screen abnormality occurs in which black band-shaped blocks are seen. Such a line defect is a problem that it is difficult to find the cause and the location of the first occurrence of the line defect, and may greatly affect the quality of the organic light emitting display device.

In this background, it is an object of embodiments of the present invention to provide an organic light emitting display device, a data driving circuit, a controller, and a driving method which can improve image quality by preventing line defects in which black band-shaped blocks are visible. have.

Another object of the embodiments of the present invention is to provide an organic light emitting display device, a data driving circuit, a controller, and a driving method capable of detecting a defective subpixel which causes a line defect.

Another object of the embodiments of the present invention is to provide an organic light emitting display device, a data driving circuit, which can improve image quality by preventing the detection and compensation errors of other normal subpixels by driving a defective subpixel. The present invention provides a controller and a driving method.

In one aspect, embodiments of the present invention can provide an organic light emitting display device, a data driver circuit, a controller, and a driving method capable of preventing line defects.

In another aspect, embodiments of the present invention include a matrix type in which a plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are disposed, and a plurality of subpixels defined by a plurality of data lines and a plurality of gate lines are formed. An organic light emitting display panel comprising: an organic light emitting display panel arranged in a row; a data driving circuit driving a plurality of data lines; a gate driving circuit driving a plurality of gate lines; and a controller controlling a data driving circuit and a gate driving circuit. A device can be provided.

Each of the plurality of subpixels includes an organic light emitting diode, a driving transistor for driving the organic light emitting diode, a first scan signal, and is electrically connected between the first node of the driving transistor and one data line of the plurality of data lines. A second transistor coupled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line of the plurality of reference voltage lines, and between the first node and the second node. It may include a capacitor electrically connected to.

The number of the plurality of reference voltage lines may be smaller than the number of the plurality of data lines.

Each of the plurality of reference voltage lines may be commonly connected to the source node or the drain node of the second transistors included in the two or more subpixels.

The organic light emitting display further includes a reference switch for controlling a connection between each of the plurality of reference voltage lines and a reference voltage supply node to which the reference voltage is supplied, and a sampling switch for controlling the connection between each of the plurality of reference voltage lines and the analog to digital converter. It may include.

Of the two or more subpixels commonly supplied with the reference voltage through the first reference voltage line, when the second transistor in the first subpixel is short-circuited, the data driver circuit may generate a first driving voltage during the driving period of the first subpixel. The first specific data voltage for turning off the driving transistor in the subpixel may be supplied to the first subpixel through the first data line.

During the driving period of the first subpixel, the sensing of the mobility of the driving transistor in the second subpixel connected to the first reference voltage line together with the first subpixel may be performed.

The organic light emitting display device detects a sub-pixel to be checked as a defective subpixel according to whether a second transistor in a sub-object to be checked is shorted among a plurality of sub-pixels during a predefined sub-pixel detection period. It may further include.

The bad subpixel detection circuit includes a source node or a drain node of the second transistor in the checked subpixel while the second scan signal of the turn-off level voltage is applied to the gate node of the second transistor in the checked subpixel. Based on whether the voltage of the electrically connected reference voltage line changes or the magnitude of the voltage change, it may be determined whether the second transistor is shorted in the subpixel to be checked.

The bad subpixel detection circuit determines whether the second transistor in the first subpixel is short-circuited as the subpixel to be checked before the driving period of the first subpixel, but turns off the gate node of the second transistor in the first subpixel. If the voltage of the first reference voltage line electrically connected to the source node or the drain node of the second transistor in the first subpixel is increased while the second scan signal of the level voltage is being applied, the first subpixel in the first subpixel is generated. By determining that the two transistors are short-circuited, the first subpixel can be detected as a defective subpixel.

The bad subpixel detection circuit, when the second subpixel connected to the first reference voltage line together with the first subpixel, is the subpixel to be checked, the bad subpixel detection circuit generates a turn-off level voltage at the gate node of the second transistor in the second subpixel. While the second scan signal is being applied, if there is no voltage change of the first reference voltage line electrically connected to the source node or the drain node of the second transistor in the second subpixel, or the voltage change magnitude is determined to be below a predetermined threshold level. In response to determining that the second transistor in the second subpixel is not short-circuited, the second subpixel may be detected as a normal subpixel.

The data driver circuit may supply a first specific data voltage to the first subpixel through the first data line to turn off the driving transistor in the first subpixel when the second subpixel is driven.

The bad subpixel detection period may proceed before the power on signal is generated and display driving starts, after the power off signal occurs, or in real time during display driving.

In the case of the normal subpixel, the second subpixel connected to the first reference voltage line together with the first subpixel may be applied with a data voltage such that the driving transistor is turned on in the driving period.

The second subpixel that is the normal subpixel may be disposed in the same subpixel row as the first subpixel that is the defective subpixel, or may be disposed in another subpixel row.

The organic light emitting diode display may further include a memory configured to store location information of a defective subpixel in which the second transistor is shorted.

The controller may replace the image data to be supplied to the defective subpixel with specific image data for turning off the driving transistor in the defective subpixel by referring to the memory and output the image data to the data driving circuit.

In another aspect, embodiments of the present invention may provide a data driving circuit capable of preventing line defects.

The data driving circuit includes a latch circuit for storing input image data, a digital analog conversion circuit for converting image data into analog signals, and n (n) corresponding to n data lines for data voltages corresponding to the analog signals. Is an output circuit for outputting two or more natural numbers) data channels, an analog-to-digital conversion circuit for converting and outputting voltages of m (m is one or more natural numbers) reference voltage lines to digital values and corresponding to m reference voltage lines It may include a switch circuit connected between the m reference channels and the analog to digital conversion circuit.

n may be an integer multiple of two or more of m.

Each of the m reference voltage lines may be commonly connected to a source node or a drain node of second transistors included in two or more subpixels.

The plurality of subpixels are driven when the second transistor in the first subpixel is short-circuited among two or more subpixels commonly supplied with the reference voltage through the first reference voltage line among the m reference voltage lines. In the period, a first specific data voltage that causes the driving transistor in the first subpixel to be turned off may be output to the first data line and supplied to the first subpixel.

In the driving period of the first subpixel, the analog-to-digital conversion circuit converts the elevated voltage of the second node of the driving transistor in the second subpixel connected to the first reference voltage line together with the first subpixel to convert the first reference voltage line. Can be sensed.

The second transistor in the second subpixel connected to the first reference voltage line together with the first subpixel is unshorted, and the driving transistor in the first subpixel is turned off when the second subpixel is driven. 1 A specific data voltage may be supplied to the first subpixel through the first data line.

In another aspect, embodiments of the present invention can provide a method of driving an organic light emitting display device capable of preventing line defects.

The driving method includes a data voltage for driving an image through a first data line in a driving period of a first subpixel among two or more subpixels commonly supplied with a reference voltage among a plurality of subpixels. In the normal driving step of supplying the first subpixel and when the second transistor in the first subpixel has a short circuit, during the driving period of the first subpixel, the first transistor causes the driving transistor in the first subpixel to be turned off. And preventing a line defect from supplying a specific data voltage to the first subpixel through the first data line.

In the line defect prevention step, mobility sensing of the driving transistor in the second subpixel connected to the first reference voltage line together with the first subpixel may be performed.

In the driving method, between the normal driving step and the line defect prevention step, it is determined whether the second transistor is short-circuited in the first subpixel among the plurality of subpixels and the first subpixel, which is the subpixel to be checked, is defective. A bad subpixel detection step of detecting whether or not the subpixel is further included.

The bad subpixel detection step may include a source node or a drain node of the second transistor in the first subpixel while the second scan signal of the turn-off level voltage is applied to the gate node of the second transistor in the first subpixel. Based on whether the voltage of the first reference voltage line is electrically connected or the magnitude of the voltage change, it may be determined whether the second transistor in the verification subpixel is shorted.

The bad subpixel detection step may include a source node or a drain node of the second transistor in the first subpixel while the second scan signal of the turn-off level voltage is applied to the gate node of the second transistor in the first subpixel. When it is confirmed that the voltage of the electrically connected first reference voltage line is increased, it is determined that a short circuit occurs in the second transistor in the first subpixel, and thus the first subpixel may be detected as a defective subpixel.

In the bad subpixel detection step, the first scan signal of the turn-on level voltage is supplied to the gate node of the first transistor in the first subpixel, and the turn-on level voltage is supplied to the gate node of the second transistor in the first subpixel. A second scan signal of the first subpixel, a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of the second transistor in the first subpixel, and turned on Turning off a sampling switch connected to a first reference voltage line electrically connected to a source node or a drain node of the first reference voltage line; After the first step, the first scan signal of the turn-off level voltage is supplied to the gate node of the first transistor in the first subpixel, and the turn-off level voltage of the turn-off level voltage is supplied to the gate node of the second transistor in the first subpixel. Supply a 2 scan signal, turn off a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in a first subpixel, and a source of a second transistor in a first subpixel Turning off a sampling switch connected to a first reference voltage line electrically connected to a node or a drain node; After the second step, the first scan signal of the turn-off level voltage is supplied to the gate node of the first transistor in the first subpixel, and the turn-off level voltage of the turn-off level voltage is supplied to the gate node of the second transistor in the first subpixel. Supply a 2 scan signal, turn off a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in a first subpixel, and a source of a second transistor in a first subpixel Turning on a sampling switch connected to a first reference voltage line electrically connected to a node or a drain node; As the sampling switch is turned on, a fourth step of the analog-to-digital converter sensing the voltage of the first reference voltage line electrically connected through the sampling switch to convert the sensed voltage into a sensing value corresponding to the digital value; And a fifth step of detecting whether the first subpixel is a defective subpixel by determining whether the second transistor is shorted by checking whether the voltage of the first reference voltage line is changed or the magnitude of the voltage change. can do.

In another aspect, embodiments of the present invention can provide a controller of an organic light emitting display device capable of preventing line defects.

The controller may store the information of the shorted second transistor in the first subpixel or the position information of the first subpixel among two or more subpixels which are commonly supplied with the reference voltage through the first reference voltage line among the plurality of reference voltage lines. Memory and a second transistor in the first subpixel with reference to the memory, the driving transistor in the first subpixel supplies the image data to be supplied to the first subpixel in the driving period of the first subpixel. It may include an image data supply for outputting to the data driving circuit to replace the first specific image data to be turned off.

During the driving period of the first subpixel, the sensing of the mobility of the driving transistor in the second subpixel connected to the first reference voltage line together with the first subpixel may be performed.

The controller may further include a bad subpixel detection circuit that detects whether or not the checked subpixel is a bad subpixel according to whether a second transistor in the checked subpixel of the plurality of subpixels is shorted during the bad subpixel detection period. .

The bad subpixel detection circuit includes a source node or a drain node of the second transistor in the checked subpixel while the second scan signal of the turn-off level voltage is applied to the gate node of the second transistor in the checked subpixel. Based on whether the voltage of the electrically connected reference voltage line changes or the magnitude of the voltage change, it may be determined whether the second transistor is shorted in the subpixel to be checked.

According to the embodiments of the present invention described above, it is possible to provide an organic light emitting display device, a data driver circuit, a controller, and a driving method which can improve image quality by preventing line defects.

According to embodiments of the present invention, an organic light emitting display device, a data driving circuit, a controller, and a driving method capable of detecting a defective subpixel that causes line defects can be provided.

According to embodiments of the present invention, an organic light emitting display device, a data driving circuit, a controller, and the like, which can improve image quality by preventing the detection and compensation errors of other normal subpixels by driving a defective subpixel. A driving method can be provided.

1 is a schematic system diagram of an organic light emitting display device according to example embodiments.
2 is a diagram illustrating a system implementation of an organic light emitting display device according to example embodiments.
3 is a circuit diagram of a subpixel of an organic light emitting diode display according to example embodiments.
4 is a compensation circuit of an organic light emitting display device according to example embodiments.
5 is a driving timing diagram for sensing a threshold voltage of an organic light emitting diode display according to an exemplary embodiment of the present invention.
6 is a driving timing diagram for mobility sensing of an organic light emitting diode display according to an exemplary embodiment of the present invention.
7 is a diagram illustrating a sensing process of an organic light emitting display device according to embodiments of the present invention.
FIG. 8 is a layout view of wirings connected to four subpixels in an organic light emitting display device according to example embodiments. FIG.
9 is a circuit of a subpixel (bad subpixel) in which a second transistor is shorted in an organic light emitting display device according to example embodiments.
FIG. 10 is an equivalent circuit for four subpixels when a defective subpixel among four subpixels sharing one reference voltage line is present in the organic light emitting diode display according to example embodiments. FIG.
11 and 12 illustrate an organic light emitting display device in accordance with embodiments of the present invention, in which a defective subpixel among four subpixels sharing one reference voltage line is generated by driving the defective subpixel. Figures for explaining the sensing and compensation error, and the resulting line defect phenomenon.
FIG. 13 is a driving timing diagram for sensing a threshold voltage for a normal subpixel and a defective subpixel in an organic light emitting diode display according to example embodiments.
FIG. 14 is a driving timing diagram for mobility sensing of a normal subpixel and a defective subpixel in an organic light emitting diode display according to example embodiments.
15 is a line defect prevention circuit of an organic light emitting display device according to example embodiments.
16 is a flowchart illustrating a method for preventing line defects in an organic light emitting display device according to example embodiments.
17 is a driving timing diagram for detecting a defective subpixel of an organic light emitting diode display according to an exemplary embodiment of the present invention.
18 and 19 illustrate an operation of preventing line defects when the first subpixel among four subpixels sharing one reference voltage line is a defective subpixel in the organic light emitting diode display according to example embodiments. Figures for explaining the effect according.
20 and 21 are diagrams illustrating a data driving circuit according to embodiments of the present invention.
22 illustrates a controller according to embodiments of the present invention.
23 and 24 are flowcharts illustrating a method of driving an organic light emitting display device according to embodiments of the present invention.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In adding reference numerals to components of each drawing, the same components may have the same reference numerals as much as possible even though they are shown in different drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related well-known configuration or function may obscure the gist of the present invention, the detailed description may be omitted.

In addition, in describing the component of this invention, terms, such as 1st, 2nd, A, B, (a), (b), can be used. These terms are only to distinguish the components from other components, and the terms are not limited in nature, order, order, or number of the components. If a component is described as being "connected", "coupled" or "connected" to another component, that component may be directly connected to or connected to that other component, but between components It is to be understood that the elements may be "interposed" or each component may be "connected", "coupled" or "connected" through other components.

1 is a schematic system configuration diagram of an organic light emitting display device 100 according to an exemplary embodiment of the present invention.

Referring to FIG. 1, in the organic light emitting diode display 100 according to the present exemplary embodiments, a plurality of data lines DL and a plurality of gate lines GL are disposed, and a plurality of data lines DL and a plurality of data lines DL are disposed. The organic light emitting display panel 110 may include a plurality of subpixels SP defined by the gate line GL in a matrix type, and a driving circuit for driving the organic light emitting display panel 110.

The driving circuit functionally includes a data driver circuit 120 for driving a plurality of data lines DL, a gate driver circuit 130 for driving a plurality of gate lines GL, and a data driver circuit 120. ) And a controller 140 for controlling the gate driving circuit 130.

In the organic light emitting display panel 110, the plurality of data lines DL and the plurality of gate lines GL may cross each other. For example, the plurality of gate lines GL may be arranged in a row or a column, and the plurality of data lines DL may be arranged in a column or a row. Hereinafter, for convenience of description, it is assumed that a plurality of gate lines GL are arranged in a row and a plurality of data lines DL are arranged in a column.

In addition to the plurality of data lines DL and the plurality of gate lines GL, other types of wirings may be disposed on the organic light emitting display panel 110.

The controller 140 may supply the image data DATA to the data driver circuit 120.

In addition, the controller 140 supplies various control signals DCS and GCS necessary for the driving operation of the data driver circuit 120 and the gate driver circuit 130 to supply the data driver circuit 120 and the gate driver circuit 130. Can control the operation of.

The controller 140 starts scanning according to the timing implemented in each frame, and converts the input image data input from the outside according to the data signal format used by the data driver circuit 120 to convert the image data DATA. Outputs the data and controls the data drive in a time appropriate for the scan.

In order to control the data driver circuit 120 and the gate driver circuit 130, the controller 140 may include a vertical sync signal Vsync, a horizontal sync signal Hsync, an input data enable signal DE, and a data enable signal DE. A timing signal such as a clock signal CLK is input from an external device (eg, a host system), and various control signals are generated and output to the data driver circuit 120 and the gate driver circuit 130.

For example, the controller 140 controls the gate driving circuit 130 to include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE). Outputs various gate control signals (GCS) including Gate Output Enable (GCS).

In addition, the controller 140 may control a data driving circuit 120 so as to control a data driving circuit 120, a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE: Source). Output various data control signals (DCS) including Output Enable).

The controller 140 may be a timing controller used in a conventional display technology, or may be a controller that may further perform other control functions including a timing controller.

The controller 140 may be implemented as a separate component from the data driver circuit 120 or may be integrated with the data driver circuit 120 and implemented as an integrated circuit.

The data driver circuit 120 receives the image data DATA from the controller 140 and supplies data voltages to the plurality of data lines DL to drive the plurality of data lines DL. The data driver circuit 120 may also be referred to as a source driver circuit.

The data driver circuit 120 may include a shift register, a latch circuit, a digital to analog converter (DAC), an output buffer, or the like.

The data driver circuit 120 may further include one or more analog to digital converters (ADCs) in some cases.

The gate driver circuit 130 sequentially drives the plurality of gate lines GL by sequentially supplying scan signals to the plurality of gate lines GL. The gate driver circuit 130 may also be referred to as a scan driver circuit.

The gate driver circuit 130 may include a shift register, a level shifter, and the like.

The gate driver circuit 130 sequentially supplies a scan signal of an on voltage or an off voltage to the plurality of gate lines GL under the control of the controller 140.

When a specific gate line is opened by the gate driver circuit 130, the data driver circuit 120 converts the image data DATA received from the controller 140 into an analog data voltage to convert the plurality of data lines DL. To supply.

The data driver circuit 120 may be located only on one side (eg, upper side or lower side) of the organic light emitting display panel 110, and in some cases, the organic light emitting display panel 110 may be driven according to a driving method, a panel designing method, or the like. It can also be located on both sides (e.g., top and bottom).

The gate driving circuit 130 may be located only on one side (eg, left or right) of the organic light emitting display panel 110, and in some cases, the organic light emitting display panel 110 may be driven according to a driving method, a panel design method, or the like. It can also be located on both sides (eg left and right).

The data driver circuit 120 may include at least one source driver integrated circuit (SDIC).

Each source driver integrated circuit (SDIC) is connected to a bonding pad of the organic light emitting display panel 110 by a tape automated bonding (TAB) method or a chip on glass (COG) method, or the organic light emitting display panel 110. It may also be arranged directly on the phase. In some cases, each of the source driver integrated circuits SDIC may be integrated and disposed on the OLED display panel 110. In addition, each source driver integrated circuit (SDIC) may be implemented by a chip on film (COF) method. In this case, each source driver integrated circuit SDIC may be mounted on a circuit film and electrically connected to the data lines DL of the organic light emitting display panel 110 through the circuit film.

In the gate driving circuit 130, at least one gate driver integrated circuit (GDIC) may be connected to a bonding pad of the organic light emitting display panel 110 in a TAB method or a COG method. In addition, the gate driving circuit 130 may be implemented as a gate in panel (GIP) type and may be directly disposed on the organic light emitting display panel 110. In addition, the gate driving circuit 130 may be implemented by a chip on film (COF) method. In this case, each gate driver integrated circuit GDIC included in the gate driver circuit 130 is mounted on the circuit film, and electrically connected to the gate lines GL of the organic light emitting display panel 110 through the circuit film. Can be connected.

2 is a diagram illustrating a system implementation of an organic light emitting display device 100 according to embodiments of the present invention.

In the example of FIG. 2, each source driver integrated circuit (SDIC) included in the data driver circuit 120 is implemented by a chip on film (COF) method among various methods (TAB, COG, COF, etc.), and a gate driver circuit. This is the case where the 130 is implemented as a GIP (Gate In Panel) type among various methods (TAB, COG, COF, GIP, etc.).

Each of the plurality of source driver integrated circuits SDIC included in the data driver circuit 120 may be mounted on the source side circuit film SF.

One side of the source side circuit film SF may be electrically connected to the organic light emitting display panel 110.

On the source side circuit film SF, wires for electrically connecting the source driver integrated circuit SDIC and the organic light emitting display panel 110 may be disposed.

The organic light emitting diode display 100 includes at least one source printed circuit board (SPCB), control components, and various electrical devices for a circuit connection between a plurality of source driver integrated circuits (SDICs) and other devices. It may include a control printed circuit board (CPCB) to.

The other side of the source side circuit film SF on which the source driver integrated circuit SDIC is mounted may be connected to the at least one source printed circuit board SPCB.

That is, the source side circuit film SF on which the source driver integrated circuit SDIC is mounted is electrically connected to one side of the organic light emitting display panel 110 and the other side of the source side circuit film SF is electrically connected to the source printed circuit board SPCB. Can be.

The control printed circuit board (CPCB) includes a controller 140 for controlling operations of the data driving circuit 120 and the gate driving circuit 130, an organic light emitting display panel 110, a data driving circuit 120, and a gate. A power management integrated circuit (PMIC) 210 may be mounted to supply various voltages or currents to the driving circuit 130, or control various voltages or currents to be supplied.

At least one source printed circuit board (SPCB) and the control printed circuit board (CPCB) may be connected to the circuit through at least one connection member. Here, the connection member may be, for example, a flexible printed circuit (FPC), a flexible flat cable (FFC), or the like.

At least one source printed circuit board (SPCB) and the control printed circuit board (CPCB) may be integrated into one printed circuit board.

The organic light emitting diode display 100 may further include a set board 230 that is electrically connected to the control printed circuit board CPCB. The set board 230 may also be referred to as a power board.

The set board 230 may include a main power management circuit 220 (M-PMC) that manages the overall power of the organic light emitting display device 100.

The power management integrated circuit 210 is a circuit for managing power for the display module including the organic light emitting display panel 110 and its driving circuits 120, 130, 140, and the like, and the main power management circuit 220 displays the display. It is a circuit that manages the overall power including the module, and may be linked to the power management integrated circuit 210.

Each of the subpixels SP arranged in the organic light emitting display panel 110 included in the organic light emitting display device 100 according to the present exemplary embodiment may include an organic light emitting diode (OLED), which is a light emitting device; It may be configured as a circuit element such as a driving transistor for driving an organic light emitting diode (OLED).

The type and number of circuit elements constituting each subpixel SP may be variously determined according to a providing function and a design method.

3 is a circuit diagram of a subpixel of the organic light emitting diode display 100 according to example embodiments.

The organic light emitting display panel 110 according to the exemplary embodiment of the present invention includes a plurality of data lines DL, a plurality of gate lines GL, a plurality of driving voltage lines DVL, and a plurality of reference voltage lines RVL. And the like can be arranged.

Each subpixel SP in the organic light emitting display panel 110 includes an organic light emitting diode OLED, a driving transistor DRT for driving the organic light emitting diode OLED, and a first node of the driving transistor DRT. The first transistor T1 is electrically connected between the data line DL among the data lines DL and the second node N2 and the plurality of reference voltage lines of the driving transistor DRT. The second transistor T2 is electrically connected between the reference voltage line RVL among the RVL, and the storage capacitor is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT. Cst) and the like can be implemented.

The organic light emitting diode OLED may be formed of an anode electrode, an organic emission layer, and a cathode electrode.

According to the circuit example of FIG. 3, the anode electrode of the organic light emitting diode OLED may be electrically connected to the second node N2 of the driving transistor DRT. The base voltage EVSS may be applied to the cathode of the organic light emitting diode OLED. Here, the base voltage EVSS may be, for example, a ground voltage or a voltage higher or lower than the ground voltage. In addition, the electromotive voltage EVSS may vary depending on the driving state. For example, the base voltage EVSS when driving the image and the base voltage EVSS when sensing driving may be set differently.

The driving transistor DRT drives the organic light emitting diode OLED by supplying a driving current to the organic light emitting diode OLED.

The driving transistor DRT may include a first node N1, a second node N2, a third node N3, and the like. The first node N1 of the driving transistor DRT is a node corresponding to a gate node. The first node N1 of the driving transistor DRT may be electrically connected to the source node or the drain node of the first transistor T1. The second node N2 of the driving transistor DRT may be a source node or a drain node. The second node N2 of the driving transistor DRT may be electrically connected to an anode electrode (or a cathode electrode) of the organic light emitting diode OLED, and may be electrically connected to a source node or a drain node of the second transistor T2. Can be. The third node N3 of the driving transistor DRT may be a drain node or a source node. The third node N3 of the driving transistor DRT is a node to which the driving voltage EVDD is applied and may be electrically connected to a driving voltage line DVL supplying the driving voltage EVDD.

Hereinafter, for convenience of description, the second node N2 of the driving transistor DRT is a source node and the third node N3 may be described as an example.

The storage capacitor Cst is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT to limit the data voltage Vdata corresponding to the image signal voltage or a voltage corresponding thereto. You can keep it for the frame time.

The drain node or the source node of the first transistor T1 is electrically connected to the corresponding data line DL, and the source node or the drain node of the first transistor T1 is the first node N1 of the driving transistor DRT. The gate node of the first transistor T1 may be electrically connected to the gate node of the first transistor T1 to receive the first scan signal SCAN1.

The first transistor T1 may be controlled on-off by receiving the first scan signal SCAN1 through the corresponding gate line to the gate node.

The first transistor T1 is turned on by the first scan signal SCAN1 and transfers the data voltage Vdata supplied from the corresponding data line DL to the first node N1 of the driving transistor DRT. I can do it.

The drain node or source node of the second transistor T2 is electrically connected to the reference voltage line RVL, and the source node or drain node of the second transistor T2 is the second node N2 of the driving transistor DRT. Can be electrically connected to the The gate node of the second transistor T2 may be electrically connected to the corresponding gate line to receive the second scan signal SCAN2.

The second transistor T2 may be controlled on-off by receiving the second scan signal SCAN2 through the corresponding gate line to the gate node.

The second transistor T2 is turned on by the second scan signal SCAN2 and transfers the reference voltage Vref supplied from the reference voltage line RVL to the second node N2 of the driving transistor DRT. I can do it.

The storage capacitor Cst is not a parasitic capacitor (eg, Cgs, Cgd), which is an internal capacitor existing between the first node N1 and the second node N2 of the driving transistor DRT. The capacitor may be an external capacitor intentionally designed outside the driving transistor DRT.

Each of the driving transistor DRT, the first transistor T1, and the second transistor T2 may be an n-type transistor or a p-type transistor.

The first scan signal SCAN1 and the second scan signal SCAN2 may be separate gate signals. In this case, the first scan signal SCAN1 and the second scan signal SCAN2 may be applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through different gate lines, respectively. have.

In some cases, the first scan signal SCAN1 and the second scan signal SCAN2 may be the same gate signal. In this case, the first scan signal SCAN1 and the second scan signal SCAN2 may be commonly applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through the same gate line. .

Each subpixel structure illustrated in FIG. 3 is a 3T (Capacitor) 1C (Capacitor) structure and is for illustrative purposes only, and may further include one or more transistors, or in some cases, one or more capacitors. It may be. Alternatively, each of the plurality of subpixels may have the same structure, and some of the plurality of subpixels may have a different structure.

In the following, an image driving operation of each subpixel SP will be described with a simple example.

An image driving operation of each subpixel SP may be performed in an image data recording step, a boosting step, and a light emitting step.

In the image data writing step, the data voltage Vdata corresponding to the image signal is applied to the first node N1 of the driving transistor DRT, and the reference voltage Vref is applied to the second node N2 of the driving transistor DRT. ) May be applied. Here, a voltage similar to the reference voltage Vref is applied to the second node N2 of the driving transistor DRT due to a resistance component between the second node N2 of the driving transistor DRT and the reference voltage line RVL. (Vref + ΔV) may be applied.

The reference voltage Vref for driving the image is also called VpreR.

In the image data writing step, the first transistor T1 and the second transistor T2 can be turned on at the same time or with a slight time difference.

In the image data recording step, the storage capacitor Cst may be charged with a charge corresponding to the potential difference Vdata-Vref or Vdata- (Vref + ΔV).

The application of the image data voltage Vdata to the first node N1 of the driving transistor DRT is called image data writing.

In the boosting step subsequent to the image data writing step, the first node N1 and the second node N2 of the driving transistor DRT may be electrically floating at the same time or with a slight time difference.

To this end, the first transistor T1 may be turned off by the turn-off level voltage of the first scan signal SCAN1. In addition, the second transistor T2 may be turned off by the turn-off level voltage of the second scan signal SCAN2.

In the boosting step, while the voltage difference between the first node N1 and the second node N2 of the driving transistor DRT is maintained, the first node N1 and the second node N2 of the driving transistor DRT are maintained. The voltage may be boosted.

During the boosting step, the voltage of the first node N1 and the second node N2 of the driving transistor DRT is boosted, and the voltage at which the second node N2 of the driving transistor DRT is raised is constant. When the voltage is over, it enters the light emitting step.

In this light emitting step, a driving current flows to the organic light emitting diode OLED. Accordingly, the organic light emitting diode OLED may emit light.

The driving transistor DRT disposed in each of the plurality of subpixels SP arranged in the organic light emitting display panel 110 has unique characteristics such as a threshold voltage and mobility.

The driving transistor DRT may deteriorate according to a driving time. Accordingly, the unique characteristic value of the driving transistor DRT may change according to the driving time.

The driving transistor DRT may have a different on-off timing or a driving capability of the organic light emitting diode OLED according to a characteristic value change. That is, the timing of supplying the current to the organic light emitting diode OLED and the amount of current supplied to the organic light emitting diode OLED may vary according to the characteristic value change. As the characteristic value of the driving transistor DRT changes, the luminance of the corresponding subpixel SP may be different from the desired luminance.

In addition, a plurality of subpixels SP arranged on the organic light emitting display panel 110 may have different driving times. Therefore, a characteristic value deviation may occur between the driving transistors DRT in each subpixel SP.

Such characteristic value deviation between the driving transistors DRT may generate luminance deviation between the subpixels SP. Therefore, luminance uniformity of the organic light emitting display panel 110 may also deteriorate, which may lead to deterioration of image quality.

Accordingly, the organic light emitting diode display 100 according to the exemplary embodiment of the present invention may include a compensation circuit capable of compensating for variation in characteristic values between the driving transistors DRT and provide a compensation method using the same. This will be described in more detail with reference to FIGS. 4 to 7.

4 is a compensation circuit of an organic light emitting display device 100 according to embodiments of the present invention.

The organic light emitting diode display 100 according to the exemplary embodiments of the present invention should sense the characteristic value or the characteristic value change of each driving transistor DRT in order to compensate for the deviation of the characteristic value between the driving transistors DRT.

The compensation circuit of the organic light emitting display device 100 according to the exemplary embodiment of the present invention drives (subjects to sensing) a subpixel SP having a 3T1C structure or a modified structure based thereon, thereby driving the subpixel SP. Configurations for sensing a characteristic value or a characteristic value change of the transistor DRT may be included.

According to the sensing driving of the organic light emitting display device 100 according to the exemplary embodiment of the present invention, a characteristic value or a change of the driving transistor DRT in the subpixel SP may be expressed as a voltage of the reference voltage line RVL. Can be.

More specifically, according to the sensing driving of the organic light emitting display device 100 according to the exemplary embodiment of the present invention, the characteristic value or the change of the driving transistor DRT is changed to the voltage of the second node N2 of the driving transistor DRT. (Eg Vdata-Vth).

The voltage of the second node N2 of the driving transistor DRT may correspond to the voltage of the reference voltage line RVL when the second transistor T2 is turned on. The line capacitor Cline on the reference voltage line RVL may be charged by the voltage of the second node N2 of the driving transistor DRT. The reference voltage line RVL may have a voltage corresponding to the voltage of the second node N2 of the driving transistor DRT by the charged line capacitor Cline.

The compensation circuit of the organic light emitting display device 100 according to the exemplary embodiment of the present invention is driven so that the second node N2 of the driving transistor DRT is in a voltage state reflecting a characteristic value, thereby reflecting the characteristic value. In order to sense the voltage of the second node N2 of the driving transistor DRT, the analog-to-digital converter ADC which measures the voltage of the reference voltage line RVL and converts it into a sensing value corresponding to a digital value, It may include a switch circuit for driving.

The switch circuit for sensing driving includes a sensing driving reference switch SPRE for controlling a connection between each reference voltage line RVL and a sensing driving reference voltage supply node Npres to which the reference voltage Vref is supplied. It may include a sampling switch (SAMP) for controlling the connection between the reference voltage line (RVL) and the analog-to-digital converter (ADC).

The above-mentioned sensing driving reference switch SPRE is a switch used for sensing driving. The reference voltage Vref supplied to the reference voltage line RVL by the sensing driving reference switch SPRE is the sensing driving reference voltage VpreS.

Meanwhile, referring to FIG. 4, the switch circuit may include an image driving reference switch RPRE used when driving an image.

The image driving reference switch RPRE may control a connection between each reference voltage line RVL and the image driving reference voltage supply node Nprer supplied with the reference voltage Vref.

The image driving reference switch RPRE mentioned above is a switch used when driving an image. The reference voltage Vref supplied to the reference voltage line RVL by the image driving reference switch SPRE is the image driving reference voltage VpreR.

The sensing driving reference switch SPRE and the image driving reference switch RPRE may be provided separately or integrated into one. The sensing driving reference voltage VpreS and the image driving reference voltage VpreR may be the same voltage value or different voltage values.

The compensation circuit of the organic light emitting display device 100 according to the embodiments of the present invention may include a memory MEM storing a sensing value output from an analog-to-digital converter ADC or a reference sensing value in advance. The compensation device COMP may further include a compensator COMP configured to compare a sensing value stored in the MEM with a reference sensing value to calculate a compensation value for compensating for the characteristic value deviation.

The compensation value calculated by the compensator COMP may be stored in the memory MEM.

The controller 140 changes the image data Data to be supplied to the data driver circuit 120 using the compensation value calculated by the compensator COM, and outputs the changed image data Data_comp to the data driver circuit 120. can do.

Accordingly, the data driver circuit 120 may convert the changed image data Data_comp into a data voltage Vdata_comp in the form of an analog signal through a digital-to-analog converter DAC and supply the same to the corresponding subpixel SP. Accordingly, the characteristic value deviation (threshold voltage variation, mobility variation) with respect to the driving transistor DRT of the corresponding subpixel SP may be compensated for.

5 is a driving timing diagram for sensing a threshold voltage of the organic light emitting diode display 100 according to the exemplary embodiments of the present invention.

Referring to FIG. 5, the threshold voltage sensing driving may proceed to an initialization step S510, a tracking step S520, and a sampling step S530.

In the initialization step S510, the first transistor T1 is turned on by the first scan signal SCAN having the turn-on level voltage. Accordingly, the first node N1 of the driving transistor DRT is initialized to the threshold voltage sensing driving data voltage Vdata.

In the initialization step S510, the second transistor T2 is turned on by the second scan signal SENSE of the turn-on level voltage, and the sensing driving reference switch SPRE is turned on. . Accordingly, the second node N2 of the driving transistor DRT is initialized to the sensing driving reference voltage VpreS.

The tracking step S520 is a step of tracking the threshold voltage Vth of the driving transistor DRT.

In the tracking step S520, the first transistor T1 and the second transistor T2 remain turned on, and the sensing driving reference switch SPRE is turned off. Accordingly, the second node N2 of the driving transistor DRT is floated, and the voltage of the second node N2 of the driving transistor DRT starts to rise from the sensing driving reference voltage VpreS.

Since the second transistor T2 is turned on, the voltage rise of the second node N2 of the driving transistor DRT leads to the voltage rise of the reference voltage line RVL.

The voltage of the second node N2 of the driving transistor DRT increases and becomes saturation. The saturated voltage of the second node N2 of the driving transistor DRT corresponds to the voltage difference Vdata-Vth of the threshold voltage Vth of the driving transistor DRT in the threshold voltage sensing driving data voltage Vdata. do.

Therefore, when the voltage of the second node N2 of the driving transistor DRT is saturated, the voltage of the reference voltage line RVL is the voltage difference between the threshold voltage of the driving transistor DRT and the threshold voltage sensing driving data voltage. Vdata-Vth).

When the voltage of the second node N2 of the driving transistor DRT becomes saturation, the sampling switch SAMP is turned on, and the sampling step S530 is performed.

In the sampling step S530, the analog-to-digital converter ADC may sense the voltage of the reference voltage line RVL by the sampling switch SAMP and convert the sensed voltage into a sensing value corresponding to the digital value. Here, the voltage sensed by the analog to digital converter ADC corresponds to Vdata-Vth.

The compensator COMP may grasp the threshold voltage of the driving transistor DRT of the subpixel SP based on the sensing value output from the analog-to-digital converter ADC, and may determine the threshold voltage of the driving transistor DRT. Can compensate.

The compensator COMP is configured to generate the driving transistor DRT from sensing values (digital values corresponding to Vdata-Vth) measured through sensing driving and threshold voltage sensing driving data (digital values corresponding to Vdata) already known. The threshold voltage Vth can be known.

The compensator COMP compensates the threshold voltage deviation between the driving transistors DRT by comparing the threshold voltage Vth identified with respect to the driving transistor DRT with a reference threshold voltage or a threshold voltage of another driving transistor DRT. I can do it. Here, the threshold voltage deviation compensation may mean image data change processing (process of adding or subtracting a compensation value (offset) to the image data).

6 is a driving timing diagram for mobility sensing of the organic light emitting diode display 100 according to the exemplary embodiments of the present invention.

Referring to FIG. 6, the mobility sensing driving may proceed to an initialization step S610, a tracking step S620, and a sampling step S630.

In the initialization step S610, the first transistor T1 is turned on by the first scan signal SCAN having the turn-on level voltage. Accordingly, the first node N1 of the driving transistor DRT is initialized to the mobility sensing driving data voltage Vdata.

In the initialization step S610, the second transistor T2 is turned on by the second scan signal SENSE of the turn-on level voltage, and the sensing driving reference switch SPRE is turned on. . Accordingly, the second node N2 of the driving transistor DRT is initialized to the sensing driving reference voltage VpreS.

The tracking step S620 is a step of tracking the mobility of the driving transistor DRT. The mobility of the driving transistor DRT may represent the current driving capability of the driving transistor DRT.

In the tracking step S620, the first transistor T1 is turned off by the first scan signal SCAN having the turn-off level voltage, and the sensing driving reference switch SPRE is turned off. Accordingly, both the first node N1 and the second node N2 of the driving transistor DRT are floated. Accordingly, the voltages of the first node N1 and the second node N2 of the driving transistor DRT are increased. In particular, the voltage of the second node N2 of the driving transistor DRT starts to increase from the sensing driving reference voltage VpreS.

Since the second transistor T2 is turned on, the voltage rise of the second node N2 of the driving transistor DRT leads to the voltage rise of the reference voltage line RVL.

When a predetermined time Δt elapses from the time when the voltage of the second node N2 of the driving transistor DRT starts to increase, the sampling switch SAMP is turned on, and the sampling step S630 is performed.

In the sampling step S630, the analog-to-digital converter ADC may sense the voltage of the reference voltage line RVL by the sampling switch SAMP and convert the sensed voltage into a sensing value corresponding to the digital value. Here, the voltage sensed by the analog-to-digital converter ADC corresponds to the voltage VpreS + ΔV increased by a predetermined voltage ΔV from the sensing driving reference voltage VpreS.

The compensator COMP may grasp the mobility of the driving transistor DRT of the subpixel SP based on the sensing value output from the analog-to-digital converter ADC, and determine the mobility of the driving transistor DRT. Can compensate.

The compensator COMP includes a sensing value (a digital value corresponding to VpreS + ΔV) measured through sensing driving, a sensing driving reference voltage VpreS and an elapsed time Δt of the driving transistor DRT. The mobility can be identified.

The mobility of the driving transistor DRT is proportional to the voltage variation ΔV / Δt per unit time of the reference voltage line RVL in the tracking step S620. That is, the mobility of the driving transistor DRT is proportional to the slope of the voltage waveform of the reference voltage line RVL in FIG. 6.

The compensator COMP may compensate for the mobility deviation between the driving transistors DRT by comparing the mobility determined with respect to the driving transistor DRT with the reference mobility or the mobility of the other driving transistors DRT. Here, mobility deviation compensation may mean image data change processing (operation processing to multiply image data by a compensation value (gain)).

7 is a diagram illustrating a sensing process of an organic light emitting display device 100 according to an embodiment of the present invention.

Referring to FIG. 7, when the power-on signal is generated, the organic light emitting diode display 100 performs predetermined on sequence processing for starting display driving. When the on sequence processing is completed, normal display driving is started.

When the power-off signal is generated, the organic light emitting diode display 100 stops driving the display in progress and performs a predetermined off sequence process. When the off sequence process is completed, the organic light emitting display device 100 is completely turned off.

In relation to the power processing timing, sensing driving (threshold voltage sensing driving and mobility sensing driving) may be performed.

The sensing driving may proceed after the generation of the power on signal and before the display driving starts. Such sensing and sensing processes are called on-sensing and on-sensing processes.

In addition, the sensing driving may proceed after generation of the power off signal. Such sensing and sensing processes are called off-sensing and off-sensing process.

In addition, the sensing driving may be performed in real time during the display driving. Such sensing and sensing processors are called real-time (RT) sensing and RT sensing process (RT Sensing Process).

In the real-time sensing process, sensing driving may be performed on at least one subpixel SP in at least one subpixel line (subpixel row) at each blank time during display driving. Here, a subpixel line (subpixel row) which is driven for sensing every blank time may be randomly selected. As a result, the image abnormality in the subpixel line which is sensed in the active time after the sensing drive in the blank time can be alleviated. In addition, the recovery data voltage corresponding to the data voltage before the sensing driving may be supplied to the subpixel that has been sensed during the active time after the sensing driving in the blank time. Accordingly, the image abnormality in the subpixel line which is sensed in the active time after the sensing drive in the blank time can be further alleviated.

On the other hand, in the case of threshold voltage sensing driving, since the voltage saturation of the second node N2 of the driving transistor DRT may take a long time, it may proceed to an off-sensing process that may proceed for a longer time.

In the case of mobility sensing driving, since it requires only a relatively short time compared to the threshold voltage sensing driving, the mobility sensing driving may be performed in an on-sensing process and / or a real time sensing process.

Meanwhile, one data voltage Vdata, two scan signals SCAN and SENSE, a reference voltage Vref, and a driving voltage EVDD should be supplied to one subpixel SP. Therefore, one subpixel SP must be electrically connected to one data line DL, one or two gate lines GL, one reference voltage RVL, and one driving voltage line DVL. (See FIG. 3).

In order to turn one subpixel row on or off, one or two gate lines GL should be disposed per one subpixel row. In addition, since the data voltage Vdata must be supplied to each subpixel SP, one data line DL may be arranged for each subpixel column. In some cases, one data line DL may be arranged in common for every two subpixel columns.

Since the driving voltage EVDD may be a common voltage, one driving voltage line DVL may be disposed for each subpixel column (or one subpixel row), and two or more subpixel columns (or two) may be disposed. One driving voltage line DVL may be disposed for each of at least one subpixel column.

Similarly, since the reference voltage Vref may be a common voltage, one reference voltage line RVL may be disposed for each subpixel column (or one subpixel row), and two or more subpixel columns ( Alternatively, one reference voltage line RVL may be disposed for each of two or more subpixel columns.

When one driving voltage line DVL and / or one reference voltage line RVL is disposed in each of two or more subpixel columns (or two or more subpixel columns), the aperture ratio of the organic light emitting display panel 110 may be adjusted. You can increase it.

Below, in order to increase the aperture ratio of the organic light emitting display panel 110, one driving voltage line DVL is disposed in parallel with the data line DL for every four or more subpixel columns, and four or more subpixel columns. A structure in which one reference voltage line RVL is disposed in parallel with the data line DL is described with reference to FIG. 8.

FIG. 8 illustrates wirings DL1 to DL2, GL1 to GL2, and DVL1 to DVL2 connected to four subpixels SP1, SP2, SP3, and SP4 in the organic light emitting diode display 100 according to example embodiments. , RVL).

The four subpixels SP1, SP2, SP3, and SP4 may be, for example, subpixels emitting red light, subpixels emitting white light, subpixels emitting green light, and subpixels emitting blue light. Can be.

As described above, the first scan signal SCAN and the second scan signal SENSE may be supplied through the same gate line, but may be supplied by different gate lines GL1 and GL2.

8 illustrates a case in which the first scan signal SCAN and the second scan signal SENSE are supplied through different gate lines GL1 and GL2, and in this case, four subpixels SP1 and SP2. , In the subpixel row where SP3 and SP4 are arranged, the first gate line GL1 for supplying the first scan signal SCAN to the gate node of the first transistor T1 and the second transistor T2. The second gate line GL2 may be disposed to supply the second scan signal SENSE to the gate node.

Referring to FIG. 8, when four subpixels SP1, SP2, SP3, and SP4 are arranged in the row direction, four for supplying data voltages to each of the four subpixels SP1, SP2, SP3, and SP4. The data lines DL1, DL2, DL3, and DL4 may be arranged in the column direction.

Referring to FIG. 8, in order to increase the aperture ratio of the organic light emitting display panel 110, the first subpixel SP1 and the second subpixel SP2 are driven through the first driving voltage line DVL1. ) Can be supplied in common. The third subpixel SP3 and the fourth subpixel SP4 may be supplied with the driving voltage EVDD in common through the second driving voltage line DVL2.

The subpixels arranged in the same column as the first subpixel SP1 and the subpixels arranged in the same column as the second subpixel SP2 are all driven through the first driving voltage line DVL1. Can be supplied in common. Both the subpixels arranged in the same column as the third subpixel SP3 and the subpixels arranged in the same column as the fourth subpixel SP4 are driven through the second driving voltage line DVL2. Can be supplied in common.

Referring to FIG. 8, in order to increase the aperture ratio of the organic light emitting display panel 110, four subpixels SP1, SP2, SP3, and SP4 apply the reference voltage Vref through one reference voltage line RVL. Can be supplied in common.

Subpixels arranged in the same column as the first subpixel SP1, subpixels arranged in the same column as the second subpixel SP2, subpixels arranged in the same column as the third subpixel SP3; All of the subpixels arranged in the same column as the fourth subpixel SP4 may be commonly supplied with the reference voltage Vref through one reference voltage line RVL.

In other words, the subpixels arranged in the same column as the first subpixel SP1, the subpixels arranged in the same column as the second subpixel SP2, and the subpixels arranged in the same column as the third subpixel SP3. Both the pixels and the subpixels arranged in the same column as the fourth subpixel SP4 share one reference voltage line RVL.

Here, the subpixels arranged in the same column as the first subpixel SP1, the subpixels arranged in the same column as the second subpixel SP2, and the subpixels arranged in the same column as the third subpixel SP3. And the subpixels arranged in the same column as the fourth subpixel SP4 are a group of subpixels in which one reference voltage line RVL is shared.

When an abnormality occurs in any one subpixel of a subpixel group in which one reference voltage line RVL is shared, the generated abnormality may propagate to the entire subpixel group through one reference voltage line RVL. have.

9 is a circuit of a subpixel (bad subpixel) in which a second transistor T2 is shorted in the organic light emitting diode display 100 according to example embodiments.

During the panel fabrication process, when foreign matter occurs near the second transistor T2 of the organic light emitting display panel 110, the second transistor T2 may be shorted. In addition, the second transistor T2 may have a short circuit due to various factors such as internal or external shock after the product is shipped.

The short circuit of the second transistor T2 may mean a short circuit between the source node and the drain node of the second transistor T2.

In addition, a short circuit of the second transistor T2 may refer to a situation in which the second transistor T2 is abnormally turned on in a situation in which the second transistor T2 should be turned off.

For example, despite the gate driving circuit 130 outputting the second scan signal SENSE of the turn-off level voltage to the second gate line GL2 connected to the gate node of the second transistor T2, The second gate line GL2 may be shorted with other wires having a voltage value similar to the turn-on level voltage, so that the second transistor T2 may be abnormally turned on.

In the following description, the subpixel SP having the shorted second transistor T2 is referred to as a defective subpixel. The subpixel SP, in which the second transistor T2 is not shorted, is referred to as a normal subpixel.

When the normal subpixel is image driven, the voltage of the second node N2 of the driving transistor DRT, which is floated in the boosting step performed after the image data writing step, is turned off of the second transistor T2 which is not shorted. Therefore, it is not transmitted to the reference voltage line RVL.

However, when the bad subpixel is driven, the voltage of the second node N2 of the driving transistor DRT, which is floated in the boosting step performed after the image data writing step, should be turned off. By the short circuit of, it can be transferred to the reference voltage line RVL.

FIG. 10 illustrates a defective subpixel among four subpixels SP1, SP2, SP3, and SP4 sharing one reference voltage line RVL in the organic light emitting diode display 100 according to example embodiments. In this case, an equivalent circuit for four subpixels SP1, SP2, SP3, and SP4, and FIGS. 11 and 12 illustrate one reference voltage line in the organic light emitting diode display 100 according to example embodiments. In the case where the defective subpixels among the four subpixels SP1, SP2, SP3, and SP4 sharing the (RVL) exist, sensing and compensation errors caused by driving the defective subpixels, and line defects occurring accordingly Figures for explaining.

One or more of the four subpixels SP1, SP2, SP3, and SP4 sharing one reference voltage line RVL may be a defective subpixel.

In the example of FIG. 10, the first subpixel SP1 is short-circuited in the second transistor T2 among the four subpixels SP1, SP2, SP3, and SP4 sharing one reference voltage line RVL. Is a subpixel.

If all four subpixels SP1, SP2, SP3, and SP4 that share one reference voltage line RVL are normal subpixels, the first subpixel SP1, which is a normal subpixel, is driven. Since the second transistor T2 is turned off in the boosting step and the light emitting step during driving, no current flows from the first subpixel SP1 to the reference voltage line RVL.

However, when the first subpixel SP1 is a bad subpixel in which the second transistor T2 is shorted among the four subpixels SP1, SP2, SP3, and SP4 sharing one reference voltage line RVL. When the first subpixel SP1, which is a bad subpixel, is driven, a current similar to that turned on by a short circuit may be generated even when a current should not flow from the first subpixel SP1 to the reference voltage line RVL. An abnormal current flows from the first subpixel SP1 to the reference voltage line RVL through the second transistor T2.

As shown in FIG. 10, a subpixel line (subpixel row) including four subpixels SP1, SP2, SP3, and SP4 sharing the reference voltage line RVL is a defective subpixel line (bad subpixel). Row). Of all the subpixel lines sharing the reference voltage line RVL, it is assumed that the remaining subpixel lines (subpixel rows) except the bad subpixel line (bad pixel row) are normal subpixel lines (normal subpixel row). do. That is, in the organic light emitting display panel 110, it is assumed that only the first subpixel SP1 of FIG. 10 is a defective subpixel among all the subpixels sharing the reference voltage line RVL.

Meanwhile, while the four subpixels SP1, SP2, SP3, and SP4 illustrated in FIG. 10 are driven for display (image driving), all or part of the subpixels included in one subpixel line (subpixel row). May be real-time sensing (RT sensing).

One subpixel line (subpixel row), which is a real time sensing (RT sensing), may share the reference voltage line RVL with the four subpixels SP1, SP2, SP3, and SP4 illustrated in FIG. 10. 10 may be a defective subpixel line (bad subpixel row) including four subpixels SP1, SP2, SP3, and SP4 illustrated in FIG. 10, and the four subpixels SP1, SP2, It may also be a normal subpixel line (normal subpixel row) different from the defective subpixel line (bad subpixel row) including SP3, SP4.

According to the driving of the first subpixel SP1, which is a bad subpixel among the four subpixels SP1, SP2, SP3, and SP4, through the second transistor T2 shorted in the first subpixel SP1, Abnormal current flows to the reference voltage line RVL.

Accordingly, the sensing value for the subpixel in one subpixel line (subpixel row), which becomes real time sensing (RT sensing), is affected.

More specifically, when real-time sensing (RT sensing) is mobility sensing, when a normal current flows from the subpixel subjected to mobility sensing to the reference voltage line RVL, abnormality is caused by driving of the first subpixel SP1. As the current flows further to the reference voltage line RVL, the sensing value (RT sensing value) for the mobility sensing for the subpixel which is the mobility sensing is increased.

Therefore, the compensation value is determined to be a low value by the abnormally high sensing value (RT sensing value). Accordingly, the subpixels affected by the driving of the defective subpixels appear as dark spots (on-arms and weak-arms) that appear black when the image is driven. Here, the sub-pixels that are on-arm appear completely black, and the sub-pixels that are weakly dark appear almost complete black.

As described above, a sensing error occurs for all subpixels sharing the reference voltage line RVL by driving the defective subpixel SP1, and this sensing error (mobility sensing error) is a compensation error (movement). Error), and eventually all the subpixels sharing the reference voltage line RVL may generate a line defect (LD) that appears black.

The line defect LD may refer to a black band-shaped block. The line defect LD occurs in the column direction (vertical direction) in which the reference voltage line RVL is disposed. The width (row length) of the block corresponding to the line defect LD may be proportional to the number of subpixels sharing the reference voltage line RVL in one subpixel row. The length (column length) of the block corresponding to the line defect LD may be proportional to the length of the reference voltage line RVL or to the number of subpixel rows sharing the reference voltage line RVL.

Referring again to FIG. 12, a first sub belonging to a part of a second subpixel line (a second subpixel row) of all subpixel lines (all subpixel rows) sharing one reference voltage line RVL. Even if only the pixel SP1 is a bad subpixel, the driving influence of the first subpixel SP1 may be propagated to all the subpixels sharing the reference voltage line RVL together with the first subpixel SP1.

That is, only the first subpixel SP1 belonging to a part of the second subpixel line (the second subpixel row) among all the subpixel lines (all the subpixel rows) sharing one reference voltage line RVL is the defective sub All of the subs sharing the reference voltage line RVL connected to the first subpixel SP1, which is the defective subpixel, together by the second transistor T2 shorted in the first subpixel SP1 even if the pixel is a pixel. An error occurs in the sensing value (mobility sensing value) and the compensation value (mobility compensation value) of the subpixels included in the pixel line (all subpixel rows), and eventually, the first subpixel SP1 which is a bad subpixel. ) May cause a line defect LD in which subpixels included in all subpixel lines (all subpixel rows) sharing the reference voltage line RVL connected to each other appear as dark spots (on or weak points).

For reference, sensing errors and compensation errors with respect to the threshold voltage may not occur due to the defective subpixels. This is because the first transistor T1 is turned on in the tracking step S520 during the threshold voltage sensing driving.

13 is a driving timing diagram for sensing a threshold voltage for a normal subpixel and a defective subpixel in the organic light emitting diode display 100 according to the exemplary embodiments of the present invention.

Referring to FIG. 13, since the second transistor T2 is turned on in the tracking step S520 during the threshold voltage sensing driving, the driving transistor DRT may be connected regardless of whether the second transistor T2 is short-circuited. The second node N2 and the reference voltage line RVL may be electrically connected to each other.

Accordingly, the voltage change of the reference voltage line RVL when sensing the threshold voltage of the normal subpixel in which the second transistor T2 is not shorted and the threshold voltage of the defective subpixel in which the second transistor T2 is shorted. When sensing, the voltage change of the reference voltage line RVL is the same.

Therefore, using the threshold voltage sensing driving method, it is not possible to distinguish between a normal subpixel in which the second transistor T2 is not shorted and a defective subpixel in which the second transistor T2 is shorted. That is, the threshold voltage sensing driving cannot be utilized as a bad subpixel detection method.

14 is a driving timing diagram for mobility sensing of a normal subpixel and a defective subpixel in the organic light emitting diode display 100 according to the exemplary embodiments of the present invention.

Referring to FIG. 14, since the second transistor T2 is turned on in the tracking step S620 during the mobility sensing driving, the driving transistor DRT may be connected regardless of whether the second transistor T2 is shorted. The second node N2 and the reference voltage line RVL may be electrically connected to each other.

Accordingly, the voltage change of the reference voltage line RVL when the mobility of the second transistor T2 is shorted and the second transistor T2 are shorted and the mobility of the defective subpixel that the second transistor T2 is shorted. When sensing, the voltage change of the reference voltage line RVL is the same.

Therefore, it is not possible to distinguish between a normal subpixel in which the second transistor T2 is not shorted and a defective subpixel in which the second transistor T2 is short-circuited by using the mobility sensing driving method. That is, mobility sensing driving cannot be utilized as a method of detecting a defective subpixel.

15 is a line defect prevention circuit of an organic light emitting display device 100 according to embodiments of the present invention, and FIG. 16 is a flowchart of a method of preventing line defects of an organic light emitting display device 100 according to embodiments of the present invention. 17 is a driving timing diagram for detecting a defective subpixel of the organic light emitting display device 100 according to embodiments of the present invention, and FIGS. 18 and 19 are organic light emitting display devices according to embodiments of the present invention. In FIG. 100, when the first subpixel SP1 is a defective subpixel among four subpixels sharing one reference voltage line RVL, it is a diagram for describing a line defect prevention operation and an effect thereof.

The organic light emitting display panel 110 includes four subpixels SP1, SP2, SP3, and SP4 and wirings DL1 to DL4, GL1 to GL2, DVL1 to DLV2, and RVL in the region shown in FIG. 15. The pattern may be repeated.

In order to improve the aperture ratio of the organic light emitting display panel 110, when one reference voltage line RVL is disposed in each of two or more subpixel columns, the plurality of reference voltage lines RVL are arranged in the organic light emitting display panel 110. The number of times may be smaller than the number of data lines DL.

In this case, each reference voltage line RVL may be commonly connected to a source node or a drain node of the second transistors T2 included in two or more subpixels.

According to the example of FIG. 15, one reference voltage line RVL is disposed in four subpixel columns. In this case, in the organic light emitting display panel 110, the number of reference voltage lines RVL is one fourth of the number of data lines DL.

Each reference voltage line RVL may be commonly connected to a source node or a drain node of the second transistors T2 included in the four subpixels SP1, SP2, SP3, and SP4.

Referring to FIG. 15, the organic light emitting diode display 100 according to the exemplary embodiments may include a switch circuit electrically connected to one reference voltage line RVL.

The switch circuit includes a sensing drive reference switch SPRE for controlling a connection between each reference voltage line RVL and a sensing drive reference voltage supply node Npres supplied with a reference voltage Vref, and each reference voltage line RVL) and a sampling switch (SAMP) for controlling the connection between the analog-to-digital converter (ADC).

The switch circuit may further include an image driving reference switch RPRE for controlling a connection between each reference voltage line RVL and an image driving reference voltage supply node Nprer supplied with the reference voltage Vref.

The sensing driving reference switch SPRE is a switch used for sensing driving. The reference voltage Vref supplied to the reference voltage line RVL by the sensing driving reference switch SPRE is the sensing driving reference voltage VpreS. The image driving reference switch RPRE is a switch used when driving an image. The reference voltage Vref supplied to the reference voltage line RVL by the image driving reference switch SPRE is the image driving reference voltage VpreR.

The sensing driving reference switch SPRE and the image driving reference switch RPRE may be provided separately or integrated into one. The sensing driving reference voltage VpreS and the image driving reference voltage VpreR may be the same voltage value or different voltage values.

Referring to FIG. 15, a plurality of subpixels SP disposed on the organic light emitting display panel 110 may include a first subpixel through which the reference voltage Vref is commonly supplied through the first reference voltage line RVL. SP1), a second subpixel SP2, a third subpixel SP3, and a fourth subpixel SP4. Here, the first subpixel SP1 represents the first subpixel column, the second subpixel SP2 represents the second subpixel column, and the third subpixel SP3 represents the third subpixel column. The fourth subpixel SP4 represents the fourth subpixel column.

When the second transistor T2 in the first subpixel SP1 is short-circuited, the data driving circuit DDC is configured to generate a first subpixel in a driving period (eg, an image driving period) of the first subpixel SP1. The first specific data voltage OFF_Vdata for turning off the driving transistor DRT in the pixel SP1 may be supplied to the first subpixel SP1 through the first data line DL.

Accordingly, even when the first subpixel SP1, which is a bad subpixel, is driven, current does not flow from the first subpixel SP1 to the reference voltage line RVL, and thus, the first subpixel SP1 is a bad subpixel. The subpixels SP2, SP3, and SP4 coupled to the reference voltage line RVL are not affected by the driving of the first subpixel SP1, which is a defective subpixel. Therefore, line defect LD may not occur.

In the driving period of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subconnected to the first reference voltage line RVL together with the first subpixel SP1. Mobility sensing of the driving transistor DRT included in one of the pixels SP4 may be performed.

In the driving period of the first subpixel SP1, the first subpixel SP1 is connected to the first reference voltage line RVL together with a subpixel different from the first to fourth subpixels SP1 to SP4. Mobility sensing of the driving transistors DRT in the subpixels included in the row may be performed.

As described above, during the driving period of the first subpixel SP1 that is the defective subpixel, the specific data voltage OFF_Vdata that the driving transistor DRT in the first subpixel SP1 may turn off is turned on in the first data line. The first subpixel SP1 is supplied to the first subpixel SP1 through DL1, so that during the driving period of the first subpixel SP1, the other subpixel connected to the reference voltage line RVL together with the first subpixel SP1. Mobility sensing can proceed without a sensing error.

Referring to FIG. 15, in the organic light emitting diode display 100 according to the exemplary embodiments of the present invention, a short circuit of the second transistor T2 in a subpixel to be checked among a plurality of subpixels SP during a bad subpixel detection period. The apparatus may further include a defective subpixel detection circuit DPDC that detects the verification target subpixel as the defective subpixel.

The defective subpixel detection circuit DPDC is configured to generate the first subpixel in the verification subpixel while the second scan signal SENSE of the turn-off level voltage is applied to the gate node of the second transistor T2 in the verification subpixel. On the basis of whether the voltage change of the reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 or the magnitude of the voltage change, it is determined whether the second transistor T2 in the target subpixel is short-circuited. Can be.

The defective subpixel detection circuit DPDC may store the position information of the defective subpixel in the memory MEM when the defective subpixel having the short circuit of the second transistor T2 is detected.

The controller 140 replaces the image data DATA to be supplied to the defective subpixel with the specific image data OFF_DATA that turns off the driving transistor DRT in the defective subpixel with reference to the memory MEM. The data driving circuit 120 may output the data.

Accordingly, the data driver circuit 120 may convert the specific image data OFF_DATA into the specific data voltage OFF_Vdata through the digital analog converter DAC and output the converted data. Here, the specific data voltage OFF_Vdata is a data voltage that causes the driving transistor DRT in the bad subpixel to be turned off.

The bad subpixel detection circuit DPDC may be included in the controller 140. The memory MEM may be a register included in the controller 140.

The specific data voltage OFF_Vdata that causes the driving transistor DRT in the bad subpixel to be turned off may change over time when the bad subpixel is driven. When the threshold voltage or mobility of the driving transistor DRT in the bad subpixel is changed, the specific data voltage OFF_Vdata that may turn off the driving transistor DRT may also change.

Referring to FIG. 16, the organic light emitting diode display 100 may provide a method for preventing line defects.

To this end, the organic light emitting diode display 100 performs driving to detect whether the sub-object to be checked is a defective sub-pixel (S1610).

The organic light emitting diode display 100 determines whether the second transistor T2 is short-circuited in the sub-pixel to be verified according to a driving result for detecting a defective sub-pixel (S1620).

If it is determined in operation S1620 that the second transistor T2 in the verification target subpixel is short-circuited, the organic light emitting diode display 100 detects the verification target subpixel as a defective subpixel and detects the defect. The position information of the subpixel is stored in the memory MEM (S1630), and when driving the defective subpixel, the line defect prevention driving is performed by supplying a specific data voltage OFF_Vdata to the defective subpixel to prevent the line defect. It may be (S1640).

If it is determined in operation S1620 that the second transistor T2 in the verification target subpixel is not short-circuited, the organic light emitting diode display 100 detects the verification target subpixel as a normal subpixel (S1650). In operation S1660, when driving the normal subpixel, the normal driving may be performed.

Referring to FIG. 17, the organic light emitting diode display 100 may determine a subpixel to be verified according to whether or not the second transistor T2 in the subpixel SP of the plurality of subpixels SP is shorted during the detection period of the defective subpixel SP. Detects as a bad subpixel.

Accordingly, the organic light emitting display device 100 must determine whether the second transistor T2 is shorted in the confirmation subpixel in order to distinguish whether or not the confirmation subpixel is a defective subpixel.

The gate driving circuit 130 applies the second scan signal SENSE of the turn-off level voltage to the gate node of the second transistor T2 in the subpixel to be checked through the second gate line GL2 ( S1720).

In this case, the analog-to-digital converter ADC senses the voltage of the reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the subpixel to be checked, and senses the sensed voltage as a digital value. The value is converted and output (S1730).

The defective subpixel detection circuit DPDC, based on the sensing value output to the analog-to-digital converter ADC, grasps whether the voltage of the reference voltage line RVL has changed or the magnitude of the voltage change, and based on this, the sub-object to be checked It may be determined whether the second transistor T2 is shorted.

Referring to FIG. 17, during a bad subpixel detection period, a first detection driving step S1710, a second detection driving step S1720, a third detection driving step S1730, and the like may be included.

In the first detection driving step S1710, the gate driving circuit 130 supplies the first scan signal SCAN of the turn-on level voltage to the gate node of the first transistor T1 in the subpixel to be checked. Accordingly, the detection driving data voltage is applied to the first node N1 of the driving transistor DRT. The detection driving data voltage may be a data voltage corresponding to data DATA + VTH whose threshold voltage Vth is compensated for.

In the first detection driving step S1710, the gate driving circuit 130 supplies the second scan signal SENSE of the turn-on level voltage to the gate node of the second transistor T2 in the verification subpixel. The reference driving SPRE for sensing driving is turned on. Accordingly, the sensing driving reference voltage VpreS is applied to the second node N2 of the driving transistor DRT.

In the first detection driving step S1710, the sampling switch SAMP is turned off.

In the second detection driving step S1720, the gate driving circuit 130 supplies the first scan signal SCAN of the turn-off level voltage to the gate node of the first transistor T1 in the subpixel to be checked. Accordingly, the detection driving data voltage is not applied to the first node N1 of the driving transistor DRT, and the first node N1 of the driving transistor DRT is in a floating state.

In the second detection driving step S1720, the sensing driving reference switching SPRE is turned off. Accordingly, the sensing driving reference voltage VpreS may not be applied to the reference voltage line RVL. In addition, the second node N2 of the driving transistor DRT is in a floating state.

In addition, in the second detection driving step S1720, the gate driving circuit 130 supplies the second scan signal SENSE of the turn-off level voltage to the gate node of the second transistor T2 in the subpixel to be checked. .

In the second detection driving step S1720, the sampling switch SAMP is turned off.

During the second detection driving step S1720, both the first node N1 and the second node N2 of the driving transistor DRT are in a floating state. In addition, the voltages of each of the first node N1 and the second node N2 of the driving transistor DRT are increased.

If the subpixel to be checked is a normal subpixel in which the second transistor T2 is not shorted, during the second detection driving step S1720, the second transistor T2 is connected to the turn-off level voltage applied to the gate node. Since the second scan signal SENSE is turned off, the rising voltage of the second node N2 of the driving transistor DRT is not transmitted to the reference voltage line RVL.

Accordingly, when the subpixel to be checked is the normal subpixel, the voltage of the reference voltage line RVL is not changed.

If the subpixel to be checked is a defective subpixel in which the second transistor T2 is short-circuited, during the second detection driving step S1720, the second transistor T2 may perform a second scan signal having a turn-off level voltage. Even though SENSE) is applied to the gate node, it is abnormally turned on by a short circuit. Therefore, the rising voltage of the second node N2 of the driving transistor DRT is transferred to the reference voltage line RVL through the second transistor T2.

Accordingly, when the sub-object to be checked is a bad sub-pixel, a voltage variation may occur in the reference voltage line RVL.

After the second detection driving step S1720 elapses for a predetermined time, the third detection driving step S1730 may proceed.

In the third detection driving step S1730, only the sampling switch SAMP is turned on.

Accordingly, the analog-to-digital converter ADC is connected to the reference voltage line RVL through the turned-on sampling switch SAMP.

Therefore, the analog-to-digital converter ADC senses the voltage of the reference voltage line RVL and converts the sensed voltage into a sensing value corresponding to a digital value.

The bad subpixel detection circuit DPDC, based on the sensing value, whether or not the voltage change or the voltage change magnitude of the reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the subpixel to be checked. By determining whether the second transistor T2 in the verification target subpixel is short-circuited.

Referring to the example of FIG. 15, the defective subpixel detection circuit DPDC may short-circuit the second transistor T2 in the first subpixel SP1 as a subpixel to be checked before the driving period of the first subpixel SP1. While the second scan signal SENSE of the turn-off level voltage is being applied to the gate node of the second transistor T2 in the first subpixel SP1 (S1720 to S1730), the first sub When it is determined that the voltage of the first reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the pixel SP1 is increased, the second transistor T2 in the first subpixel SP1 is increased. ) Is determined to be a short circuit, and the first subpixel SP1 can be detected as a defective subpixel.

Referring to the example of FIG. 15, the bad subpixel detection circuit DPDC scans a turn-off level voltage to the gate node of the second transistor T2 in the second subpixel SP2 as the verification subpixel. While the signal SENSE is being applied (S1720 to S1730), the voltage change of the first reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the second subpixel SP2. If it is not found or if the magnitude of the voltage change is less than or equal to a predetermined threshold level, it is determined that the second transistor T2 in the second subpixel SP2 is not shorted, and the second subpixel SP2 is regarded as a normal subpixel. Can be detected.

In this case, the data driver circuit 120 is configured to turn off the driving transistor DRT in the first subpixel SP1 when the second subpixel SP2 is driven (sensing driving or image driving). 1 The specific data voltage OFF_Vdata may be supplied to the first subpixel SP1 through the first data line DL1. Accordingly, the second subpixel SP2 is not affected by the driving of the first subpixel SP1 that is the defective subpixel.

Referring to FIG. 18, according to the above-described line defect prevention driving, the first specific data voltage OFF_Vdata for turning off the driving transistor DRT in the first subpixel SP1, which is a defective subpixel, may be turned off. When the pixel SP1 is supplied to the pixel SP1, the sensing value and the compensation value are normally maintained even though the other subpixels SP2, SP3, and SP4 connected to the reference voltage line RVL together with the first subpixel SP1 are driven. As a result, image driving of the other subpixels SP2, SP3, and SP4 connected to the reference voltage line RVL together with the first subpixel SP1 may also normally proceed.

Referring to FIGS. 17 and 18, the other subpixels SP2, SP3, and SP4 connected to the reference voltage line RVL together with the first subpixel SP1 that are the bad subpixels are the first subpixel that is the bad subpixel. It may be a bad subpixel line including (SP1), or may be a normal subpixel line different from the included bad subpixel line.

For example, a first subpixel SP1 and a second subpixel SP2 are commonly connected to the first reference voltage line RVL, and the first subpixel SP1 is a bad subpixel. When the two subpixels SP2 are normal subpixels, the first subpixel SP1 and the second subpixel SP2 may be disposed in the same subpixel row (same subpixel line), and different subpixel rows. (Different subpixel lines).

17 and 18, according to the line defect prevention driving, the first specific data voltage OFF_Vdata for turning off the driving transistor DRT of the first subpixel SP1 that is the defective subpixel is turned off. Since it is supplied to the pixel SP1, the first subpixel SP1 is seen as a dark point (on point). However, in comparison with FIG. 11, all other subpixels SP2, SP3, and SP4 connected to the reference voltage line RVL together with the first subpixel SP1 are not normally seen as dark spots.

On the other hand, the bad subpixel detection period may proceed before the power-on signal is generated and display driving starts, or after the power-off signal occurs, or may proceed in real time during display driving.

 In other words, referring to FIG. 7, the bad subpixel detection operation may be progressed to an on-sensing process, to an off-sensing process, or to a real-time sensing process.

When the defective subpixel detection operation is performed in the on-sensing process, the organic light emitting diode display 100 may newly start display driving without being affected by the defective subpixel.

When the bad subpixel detection operation proceeds to the off-sensing process, the organic light emitting display device 100 may perform the bad subpixel detection operation without affecting the display, and since there is time, all sub There is an advantage that a detection operation can be performed on the pixels.

When a bad subpixel detection operation is performed in a real-time sensing process, there is an advantage that a bad subpixel can be dealt with promptly as soon as it occurs.

Meanwhile, referring to FIG. 15, the recovery step S1740 may proceed after the third detection driving step S1730 proceeds in the bad subpixel detection period.

In the recovery step S1740, the first transistor T1 is turned on by the first scan signal SCAN having the turn-on level voltage, so that the data voltage Vdata is turned on by the first node of the driving transistor DRT. N1).

In the recovery step S1740, the data voltage Vdata transferred to the first node N1 of the driving transistor DRT may be a data voltage obtained by converting the black data BLK.

In the recovery step S1740, the data voltage converted from the black data BLK may be applied to the first node N1 of the driving transistor DRT, and the data voltage converted from the recovery data REC may be applied. . The recovery data REC may be data corresponding to the image data DATA supplied to the corresponding subpixel SP before the defective subpixel detection operation.

In the recovery step S1740, the second transistor T2 is turned on by the second scan signal SENSE of the turn-on level voltage. The image driving reference switch RPRE is turned on. Accordingly, the reference voltage VpreR supplied to the reference voltage line RVL is applied to the second node N2 of the driving transistor DRT through the second transistor T2.

20 and 21 illustrate a data driving circuit 120 according to embodiments of the present invention.

Referring to FIG. 20, the data driver circuit 120 according to the exemplary embodiments of the present invention may include a latch circuit 2010 that stores input image data DATA, and converts image data DATA into analog signals. The digital analog conversion circuit 2020 and the data voltages Vdata corresponding to the analog signals to n data channels DCH1 to DCHn corresponding to n (n is a natural number of 4 or more) data lines DL. And an output circuit 2030 for outputting.

The latch circuit 2010 may include n or 2n or more latches. One or more latches may correspond to each of the n data channels DCH1 to DCHn.

The digital analog conversion circuit 2020 may include n digital analog converters DACs corresponding to n data channels DCH1 to DCHn.

The output circuit 2030 may include n output buffers corresponding to n data channels DCH1 to DCHn.

Referring to FIG. 20, the data driving circuit 120 according to the exemplary embodiments of the present invention may convert analog voltages of m reference voltage lines RVL (m is one or more natural numbers) into digital values and output the digital values. The circuit 2040 may include a switch circuit 2050 connected between the m reference channels RCH1 to RCHm corresponding to the m reference voltage lines RVL and the analog-to-digital conversion circuit 2040.

Referring to FIG. 21, the analog-to-digital conversion circuit 2040 may include m analog-to-digital converters ADC corresponding to m reference channels RCH1 to RCHm.

Referring to FIG. 21, the switch circuit 2050 may include a sensing driving reference switch for controlling a connection between each reference voltage line RVL and a sensing driving reference voltage supply node Npres supplied with a reference voltage Vref. And a sampling switch (SAMP) for controlling the connection between each reference voltage line RVL and the analog-to-digital converter ADC.

The switch circuit 2050 may further include an image driving reference switch RPRE for controlling a connection between each reference voltage line RVL and an image driving reference voltage supply node Nprer supplied with the reference voltage Vref. Can be.

The sensing driving reference switch SPRE is a switch used for sensing driving. The reference voltage Vref supplied to the reference voltage line RVL by the sensing driving reference switch SPRE is the sensing driving reference voltage VpreS. The image driving reference switch RPRE is a switch used when driving an image. The reference voltage Vref supplied to the reference voltage line RVL by the image driving reference switch SPRE is the image driving reference voltage VpreR.

The sensing driving reference switch SPRE and the image driving reference switch RPRE may be provided separately or integrated into one. The sensing driving reference voltage VpreS and the image driving reference voltage VpreR may be the same voltage value or different voltage values.

The number of reference channels m may be smaller than the number of data channels n. For example, the number n of data channels may be an integer multiple of two or more times the number m of reference channels. That is, n = k * m (k is a natural number of 2 or more).

Each of the m reference voltage lines RVL may be commonly connected to a source node or a drain node of the second transistors T2 included in two or more subpixels SP.

The plurality of subpixels SP may include a first subpixel SP1 and a second subpixel that are commonly supplied with the reference voltage Vref through the first reference voltage line RVL among the m reference voltage lines RVL. SP2).

When the second transistor T2 in the first subpixel SP1 is short-circuited, the driving transistor DRT in the first subpixel SP1 is turned off in the driving period of the first subpixel SP1. The first specific data voltage OFF_Vdata may be output to the first data line DL1 and supplied to the first subpixel SP1.

In the driving period (image driving period or sensing driving period) of the first subpixel SP1, the analog-to-digital conversion circuit 2040 is connected to the first reference voltage line RVL together with the first subpixel SP1. The elevated voltage of the second node N2 of the driving transistor DRT in the two subpixels SP2 may be sensed through the first reference voltage line RVL. Here, the sensed voltage may be a voltage reflecting mobility (see FIG. 6).

The second transistor T2 in the second subpixel SP2 is unshorted, and when the second subpixel SP2 is driven (sensing driving or image driving), the driving transistor in the first subpixel SP1 ( The first specific data voltage OFF_Vdata for turning off the DRT may be supplied to the first subpixel SP1 through the first data line DL1.

22 illustrates a controller 140 according to embodiments of the present invention.

Referring to FIG. 22, the controller 140 according to embodiments of the present invention may include a first first common voltage Vref supplied through a first reference voltage line RVL among a plurality of subpixels SP. A memory MEM that stores information in which the second transistor T2 in the first subpixel SP1 is shorted or the position information of the first subpixel SP1 among the subpixel SP1 and the second subpixel SP2. And the second transistor T2 in the first subpixel SP1 is shorted with reference to the memory MEM, during the driving period of the first subpixel SP1. Image data to be supplied to the data driving circuit 120 by replacing the image data DATA to be supplied with the first specific image data OFF_DATA to turn off the driving transistor DRT in the first sub-pixel SP1. Feeders (VDS) and the like.

In the driving period of the first subpixel SP1, the mobility sensing of the driving transistor DRT in the second subpixel SP2 connected to the first reference voltage line RVL along with the first subpixel SP1 may be performed. Can be.

Referring to FIG. 22, the controller 140 according to the embodiments of the present invention may determine whether the second transistor T2 in the sub-object to be verified is shorted among the plurality of subpixels SP during the bad subpixel detection period. The display apparatus may further include a defective subpixel detection circuit DPDC that detects whether or not the checked subpixel is a defective subpixel.

The defective subpixel detection circuit DPDC is configured to generate the first subpixel in the verification subpixel while the second scan signal SENSE of the turn-off level voltage is applied to the gate node of the second transistor T2 in the verification subpixel. On the basis of whether the voltage change of the reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 or the magnitude of the voltage change, it is determined whether the second transistor T2 in the target subpixel is short-circuited. Can be.

23 and 24 are flowcharts illustrating a method of driving the organic light emitting display device 100 according to the exemplary embodiments of the present invention.

Referring to FIG. 23, the driving method of the organic light emitting display device 100 according to the exemplary embodiments of the present invention may include a normal driving step (S2310) and a line defect prevention step (S2330).

In the normal driving operation S2310, the data driving circuit 120 of the organic light emitting display device 100 has the reference voltage Vref in common through the first reference voltage line RVL among the plurality of subpixels SP. In the driving period of the first sub-pixel SP1 among the first sub-pixel SP1 and the second sub-pixel SP2, the data voltage Vdata for driving the image is generated through the first data line DL1. It can be supplied to one subpixel SP1.

In the line defect prevention step S2330, when the second transistor T2 in the first subpixel SP1 is short-circuited, the data driver circuit 120 of the organic light emitting diode display 100 may have a first subpixel ( In the driving period of SP1, a first specific data voltage OFF_Vdata for turning off the driving transistor DRT in the first subpixel SP1 through the first data line DL1 is applied to the first subpixel SP1. ) Can be supplied.

In the line defect prevention step S2330, the mobility sensing of the driving transistor DRT in the second subpixel SP2 connected to the first reference voltage line RVL along with the first subpixel SP1 may be performed.

Referring to FIG. 23, in the driving method of the organic light emitting display device 100 according to the exemplary embodiment of the present invention, between the normal driving step S2310 and the line defect prevention step S2330, a plurality of subpixels SP are included. The bad subpixel which determines whether the second transistor T2 in the first subpixel SP1 which is the check target subpixel is short-circuited and detects whether or not the first subpixel SP1 which is the check target subpixel is a bad subpixel. The method may further include a detecting step S2320.

In a bad subpixel detection step S2320, the bad subpixel detection circuit DPDC receives the second scan signal SENSE of the turn-off level voltage at the gate node of the second transistor T2 in the first subpixel SP1. ) Is applied based on whether the voltage of the first reference voltage line RVL is electrically connected to the source node or the drain node of the second transistor T2 in the first subpixel SP1 or the magnitude of the voltage change. It may be determined whether the second transistor T2 is shorted in the subpixel to be checked.

The bad subpixel detection circuit DPDC receives the first subpixel while the second scan signal SENSE of the turn-off level voltage is applied to the gate node of the second transistor T2 in the first subpixel SP1. When it is determined that the voltage of the first reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the pixel SP1 is increased, the second transistor T2 in the first subpixel SP1 is increased. ), It is determined that a short circuit has occurred, and the first subpixel SP1 can be detected as a defective subpixel.

Referring to FIG. 24, the bad subpixel detection step S2320 may include a first detection driving step S1710, a second detection driving step S1720, a third detection driving step S1730, and a sensing value obtaining step S2410. And determining whether the second transistor T2 is shorted (S2420).

In the first detection driving step S1710, the gate driving circuit 130 supplies the first scan signal SCAN of the turn-on level voltage to the gate node of the first transistor T1 in the subpixel to be checked. The gate driver circuit 130 supplies the second scan signal SENSE of the turn-on level voltage to the gate node of the second transistor T2 in the subpixel to be checked. The reference driving SPRE for sensing driving is turned on. The sampling switch SAMP is turned off.

The sensing driving reference switching SPRE and the sampling switch SAMP may be connected to a reference voltage line RVL electrically connected to a source node or a drain node of the second transistor T2 in the subpixel to be checked.

In the second detection driving step S1720, the gate driving circuit 130 supplies the first scan signal SCAN of the turn-off level voltage to the gate node of the first transistor T1 in the subpixel to be checked. The second scan signal SENSE having the turn-off level voltage is supplied to the gate node of the second transistor T2 in the verification subpixel. The sensing driving reference switching SPRE is turned off and the sampling switch SAMP is turned off.

In the third detection driving step S1730, the gate driving circuit 130 supplies the first scan signal SCAN having the turn-off level voltage to the gate node of the first transistor T1 in the subpixel to be checked. The second scan signal SENSE of the turn-off level voltage is supplied to the gate node of the second transistor T2 in the verification target subpixel. The sensing driving reference switching SPRE is turned off and the sampling switch SAMP is turned on.

In the sensing value acquisition step S2410, the analog-to-digital converter ADC is connected to the reference voltage line RVL through the turned-on sampling switch SAMP and sensed by sensing the voltage of the reference voltage line RVL. The voltage is converted into a sensing value corresponding to a digital value and output.

In a step S2420 of determining whether the second transistor T2 is short-circuited, the bad subpixel detection circuit DPDC is electrically connected to the source node or the drain node of the second transistor T2 in the verification target subpixel based on the sensing value. The voltage of the reference voltage line RVL connected to the voltage change or the magnitude of the voltage change may be checked to determine whether the second transistor T2 in the subpixel to be checked is shorted.

When it is determined that the second transistor T2 in the confirmation subpixel is short-circuited, the defective subpixel detection circuit DPDC may detect the confirmation subpixel as a defective subpixel.

If it is determined that the second transistor T2 in the verification target subpixel is not shorted, the defective subpixel detection circuit DPDC may detect the verification subpixel as a normal subpixel.

According to the embodiments of the present invention described above, the organic light emitting display device 100, the data driver circuit 120, the controller 140, and the driving method which can improve the image quality by preventing the line defect LD. Can provide.

According to embodiments of the present invention, an organic light emitting display device 100, a data driver circuit 120, a controller 140, and a driving method capable of detecting a defective subpixel that generates a line defect LD may be provided. Can be.

According to the exemplary embodiments of the present invention, the organic light emitting display device 100 and the data driving circuit which can improve image quality by preventing the detection and compensation errors of other normal subpixels by driving the defective subpixels do not occur. 120, the controller 140, and a driving method may be provided.

The above description and the accompanying drawings are merely illustrative of the technical idea of the present invention, and those skilled in the art to which the present invention pertains may combine the configurations without departing from the essential characteristics of the present invention. Various modifications and variations may be made, including separation, substitution, and alteration. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present invention.

100: organic light emitting display device
110: organic light emitting display panel
120: data driving circuit
130: gate driving circuit
140: controller

Claims (21)

An organic light emitting display panel in which a plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are disposed, and the plurality of data lines and the plurality of subpixels defined by the plurality of gate lines are arranged in a matrix type;
A data driver circuit driving the plurality of data lines;
A gate driving circuit driving the plurality of gate lines; And
A controller for controlling the data driver circuit and the gate driver circuit;
Each of the plurality of subpixels,
An organic light emitting diode, a driving transistor for driving the organic light emitting diode, a first transistor controlled by a first scan signal and electrically connected between a first node of the driving transistor and one of the data lines; A second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line of the plurality of reference voltage lines, between the first node and the second node; A capacitor electrically connected to the
The number of the plurality of reference voltage lines is less than the number of the plurality of data lines, and each of the plurality of reference voltage lines is commonly connected to source nodes or drain nodes of second transistors included in at least two subpixels.
A reference switch controlling a connection between each of the plurality of reference voltage lines and a reference voltage supply node supplied with a reference voltage, and a sampling switch controlling the connection between each of the plurality of reference voltage lines and an analog-digital converter,
When the second transistor in the first subpixel among the two or more subpixels commonly supplied with the reference voltage through the first reference voltage line has a short circuit, the data driving circuit may include:
And a first specific data voltage for turning off a driving transistor in the first subpixel to the first subpixel through a first data line in a driving period of the first subpixel.
The method of claim 1,
In the driving period of the first subpixel,
A controller of an organic light emitting display device in which mobility sensing of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel is performed.
The method of claim 1,
And a bad subpixel detection circuit for detecting the checked subpixel as a bad subpixel according to whether a second transistor in the checked subpixel of the plurality of subpixels is short-circuited during a predefined bad subpixel detection period. ,
The bad subpixel detection circuit,
While a second scan signal of a turn-off level voltage is applied to a gate node of a second transistor in the verification subpixel,
Determining whether the second transistor in the verification subpixel is shorted based on whether the voltage of the reference voltage line electrically connected to the source node or the drain node of the second transistor in the verification subpixel or the magnitude of the voltage change. Light emitting display device.
The method of claim 3,
The bad subpixel detection circuit,
Before the driving period of the first subpixel, it is determined whether the second transistor in the first subpixel is shorted as the confirmation subpixel,
The first electrically connected to a source node or a drain node of a second transistor in the first subpixel while a second scan signal of a turn-off level voltage is applied to a gate node of a second transistor in the first subpixel. And if it is determined that the voltage of the first reference voltage line is increased, the second transistor in the first subpixel is determined to be a short circuit, and the first subpixel is detected as a defective subpixel.
The method of claim 3,
The bad subpixel detection circuit,
A second scan of a turn-off level voltage at a gate node of a second transistor in the second subpixel when the second subpixel connected to the first reference voltage line together with the first subpixel is the verification subpixel; While the signal is being applied,
If it is determined that there is no voltage change of the first reference voltage line electrically connected to the source node or the drain node of the second transistor in the second subpixel, or the magnitude of the voltage change is less than or equal to a predetermined threshold level,
And determining that the second transistor in the second subpixel is not short-circuited, thereby detecting the second subpixel as a normal subpixel.
The method of claim 5,
The data drive circuit,
And a first specific data voltage which causes the driving transistor in the first subpixel to be turned off when the second subpixel is driven to the first subpixel through the first data line.
The method of claim 3,
The bad subpixel detection period is
Proceeds before the power-on signal is generated and display drive starts,
Proceed after the power off signal occurs, or
An organic light emitting display device that proceeds in real time while driving a display.
The method of claim 1,
The second subpixel connected to the first reference voltage line together with the first subpixel is applied with a data voltage such that a driving transistor is turned on in a driving period.
The second subpixel is disposed in the same subpixel row as the first subpixel.
The method of claim 1,
The second subpixel connected to the first reference voltage line together with the first subpixel is applied with a data voltage such that a driving transistor is turned on in a driving period.
And the second subpixel is disposed in a subpixel row different from the first subpixel.
The method of claim 1,
The second transistor further comprises a memory for storing the position information of the defective sub-pixel short-circuited,
The controller,
And the image data, which is to be supplied to the defective subpixels, by referring to the memory, and outputs the image data to the data driving circuit by replacing the image data which turns off the driving transistor in the defective subpixels.
The method of claim 1,
And the first specific data voltage changes with time.
An organic light emitting diode, a driving transistor for driving the organic light emitting diode, a first transistor controlled by a first scan signal and electrically connected between a first node of the driving transistor and one of the data lines; A second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line of the plurality of reference voltage lines, between the first node and the second node; A data driving circuit electrically connected to an organic light emitting display panel including a plurality of subpixels including a capacitor electrically connected to the organic light emitting display panel.
A latch circuit for storing input image data;
A digital analog conversion circuit for converting the image data into analog signals;
An output circuit for outputting data voltages corresponding to the analog signals to n data lines corresponding to n data lines (where n is a natural number of 2 or more);
an analog-digital converting circuit for converting the voltages of m (m is one or more natural numbers) reference voltage lines into digital values and outputting the digital values; And
A switch circuit connected between the m reference channels corresponding to the m reference voltage lines and the analog to digital conversion circuit,
N is an integer multiple of 2 or more of m,
Each of the m reference voltage lines is commonly connected to a source node or a drain node of second transistors included in at least two subpixels.
When the plurality of subpixels are shorted by a second transistor in a first subpixel among two or more subpixels commonly supplied with a reference voltage through a first reference voltage line among the m reference voltage lines,
And a first specific data voltage which causes the driving transistor in the first subpixel to be turned off in the driving period of the first subpixel and is supplied to the first data line and supplied to the first subpixel.
The method of claim 12,
In the driving period of the first subpixel, the analog to digital conversion circuit,
And a rising voltage of a second node of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel through the first reference voltage line.
The method of claim 12,
When the second transistor in the second subpixel connected to the first reference voltage line together with the first subpixel is not shorted and the second subpixel is driven,
And a first specific data voltage for turning off the driving transistor in the first subpixel to the first subpixel through the first data line.
A plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are arranged, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged in a matrix type, and the plurality of subpixels Each of the organic light emitting diodes, a driving transistor for driving the organic light emitting diodes, and a first scan signal and electrically connected between the first node of the driving transistors and one of the plurality of data lines. A first transistor, a second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line of the plurality of reference voltage lines, the first node and the second transistor; An organic light emitting display including an organic light emitting display panel having capacitors electrically connected between nodes; In the driving method of an optical display device,
In a driving period of a first subpixel among two or more subpixels commonly supplied with a reference voltage through a first reference voltage line among the plurality of subpixels, a data voltage for driving an image is supplied through the first data line. A normal driving step of feeding the subpixels; And
When the second transistor in the first subpixel is short-circuited, the first specific data voltage is set so that the driving transistor in the first subpixel is turned off in the driving period of the first subpixel. And driving a line defect to supply the first subpixel to the first subpixel.
The method of claim 15,
In the line defect prevention step,
And a method of sensing mobility of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel.
The method of claim 15,
Between the normal driving step and the line fault prevention step,
Detecting a defective subpixel of the plurality of subpixels to determine whether the second transistor in the first subpixel, which is a verification target subpixel, is short-circuited to detect whether the first subpixel that is the verification subpixel is a defective subpixel. More steps,
The bad subpixel detection step,
A first electrically connected to a source node or a drain node of a second transistor in the first subpixel while a second scan signal of a turn-off level voltage is applied to a gate node of a second transistor in the first subpixel On the basis of whether the voltage change in the reference voltage line or the magnitude of the voltage change, it is determined whether or not the short circuit of the second transistor in the target sub-pixel,
The first electrically connected to a source node or a drain node of a second transistor in the first subpixel while a second scan signal of a turn-off level voltage is applied to a gate node of a second transistor in the first subpixel. And if it is determined that the voltage of the first reference voltage line rises, it is determined that a short circuit occurs in the second transistor in the first subpixel, thereby detecting the first subpixel as a defective subpixel.
The method of claim 17,
The bad subpixel detection step,
Supplying a first scan signal of a turn-on level voltage to a gate node of a first transistor in the first subpixel, and a second scan signal of a turn-on level voltage to a gate node of a second transistor in the first subpixel Supply a reference voltage, turn on a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in the first subpixel, and turn on a source node of a second transistor in the first subpixel. Or turning off a sampling switch connected to a first reference voltage line electrically connected to the drain node;
After the first step, the first scan signal of the turn-off level voltage is supplied to the gate node of the first transistor in the first subpixel, and the turn-off level is supplied to the gate node of the second transistor in the first subpixel. Supply a second scan signal of a voltage, turn off a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in the first subpixel, and turn off a reference switch in the first subpixel Turning off a sampling switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor;
After the second step, the first scan signal of the turn-off level voltage is supplied to the gate node of the first transistor in the first subpixel, and the turn-off level is supplied to the gate node of the second transistor in the first subpixel. Supply a second scan signal of a voltage, turn off a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in the first subpixel, and turn off a reference switch in the first subpixel Turning on a sampling switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor;
As the sampling switch is turned on, the analog-to-digital converter senses the voltage of the first reference voltage line electrically connected through the sampling switch to convert the sensed voltage into a sensing value corresponding to the digital value. ; And
A fifth step of detecting whether the first subpixel is a defective subpixel by determining whether the second transistor is shorted by checking whether the voltage of the first reference voltage line or the magnitude of the voltage change is short, based on the sensing value A method of driving an organic light emitting display device comprising.
A plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are arranged, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged in a matrix type, and the plurality of subpixels Each of the organic light emitting diodes, a driving transistor for driving the organic light emitting diodes, and a first scan signal and electrically connected between the first node of the driving transistors and one of the plurality of data lines. A first transistor, a second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line of the plurality of reference voltage lines, the first node and the second transistor; In the controller of the organic light emitting display device having a capacitor connected electrically between the nodes book,
Among the plurality of reference voltage lines, the second transistor in the first subpixel among the two or more subpixels which are commonly supplied with the reference voltage through the first reference voltage line stores information short-circuited or position information of the first subpixel. Memory; And
When the second transistor in the first subpixel is shorted with reference to the memory, in the driving period of the first subpixel, image data to be supplied to the first subpixel is driven in the first subpixel. And an image data supplier for replacing the transistor with the first specific image data to turn off the transistor and outputting the image data to a data driving circuit.
The method of claim 19,
And sensing a mobility of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel during a driving period of the first subpixel.
The method of claim 19,
A bad subpixel detection circuit for detecting whether the checked subpixel is a bad subpixel or not according to whether a second transistor in the checked subpixel of the plurality of subpixels is shorted during the bad subpixel detection period;
The bad subpixel detection circuit,
While a second scan signal of a turn-off level voltage is applied to a gate node of a second transistor in the verification subpixel,
Determining whether the second transistor in the verification subpixel is shorted based on whether the voltage of the reference voltage line electrically connected to the source node or the drain node of the second transistor in the verification subpixel or the magnitude of the voltage change. Controller of the light emitting display device.

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