KR102510121B1 - Organic light emitting display device, data driving circuit, controller, and driving method - Google Patents

Abstract

The present invention relates to an organic light emitting display device, a data driving circuit, a controller, and a driving method, and more particularly, detects a defective sub-pixel causing a line defect in which a block in the form of a black band is visible, and detects the defective sub-pixel. An organic light emitting display device, a data driving circuit, a controller, and a driving method capable of improving image quality by preventing line defects by supplying data voltages that prevent pixel driving from affecting other subpixels to defective subpixels. will be.

Description

Organic light emitting display device, data driving circuit, controller and driving method {ORGANIC LIGHT EMITTING DISPLAY DEVICE, DATA DRIVING CIRCUIT, CONTROLLER, AND DRIVING METHOD}

The present invention relates to an organic light emitting display device, a data driving circuit, a controller, and a driving method.

Recently, an organic light emitting display device that has been in the limelight as a display device uses an organic light emitting diode (OLED) that emits light by itself, and has advantages such as fast response speed, luminous efficiency, luminance, and viewing angle.

An organic light emitting display device arranges organic light emitting diodes and subpixels including driving transistors for driving them in a matrix form, and controls brightness of subpixels selected by a scan signal according to grayscale of data.

In the conventional organic light emitting display device, there is a problem in that a screen abnormality occurs in which blocks in the form of black bands are visible. Such a line defect is a problem in which it is difficult to find out the cause and location of occurrence of the line defect, and may have a great influence on the quality of the organic light emitting display device.

Against this background, an object of embodiments of the present invention is to provide an organic light emitting display device, a data driving circuit, a controller, and a driving method capable of improving image quality by preventing line defects in which black band-shaped blocks are visible. there is.

Another object of the embodiments of the present invention is to provide an organic light emitting display device, a data driving circuit, a controller, and a driving method capable of detecting defective subpixels causing line defects.

Another object of the embodiments of the present invention is an organic light emitting display device capable of improving image quality by preventing sensing and compensation errors of other normal subpixels from occurring due to driving of a defective subpixel, a data driving circuit, and the like. It is to provide a controller and a driving method.

In one aspect, embodiments of the present invention may provide an organic light emitting display device capable of preventing line defects, a data driving circuit, a controller, and a driving method.

On the other hand, in embodiments of the present invention, a plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are disposed, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are of a matrix type. An organic light emitting display including an organic light emitting display panel arranged in a manner, a data driving circuit driving a plurality of data lines, a gate driving circuit driving a plurality of gate lines, and a controller controlling the data driving circuit and the gate driving circuit. device can be provided.

Each of the plurality of subpixels is controlled by an organic light emitting diode, a driving transistor for driving the organic light emitting diode, and a first scan signal, and is electrically connected between a first node of the driving transistor and one data line among the plurality of data lines. A connected first transistor, a second transistor controlled by the second scan signal and electrically connected between the second node of the driving transistor and one reference voltage line among a plurality of reference voltage lines, and between the first node and the second node. It may include a capacitor electrically connected to.

The number of reference voltage lines may be less than the number of data lines.

Each of the plurality of reference voltage lines may be commonly connected to source nodes or drain nodes of second transistors included in two or more subpixels.

The organic light emitting display device further includes a reference switch that controls a connection between each of a plurality of reference voltage lines and a reference voltage supply node to which the reference voltage is supplied, and a sampling switch that controls a connection between each of the plurality of reference voltage lines and an analog-to-digital converter. can include

Among two or more subpixels commonly supplied with a reference voltage through the first reference voltage line, when the second transistor in the first subpixel is short-circuited, the data driving circuit, during the driving period of the first subpixel, A first specific data voltage for turning off a driving transistor in a subpixel may be supplied to the first subpixel through the first data line.

During the driving period of the first subpixel, mobility sensing of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel may be performed.

An organic light emitting display device detects a subpixel to be checked as a defective subpixel according to whether a second transistor in a subpixel to be checked is short-circuited among a plurality of subpixels during a predefined defective subpixel detection period. may further include.

The defective subpixel detecting circuit is connected to the source node or drain node of the second transistor in the subpixel to be checked while the second scan signal of the turn-off level voltage is being applied to the gate node of the second transistor in the subpixel to be checked. Based on whether or not the voltage of the electrically connected reference voltage line changes or the magnitude of the voltage change, whether or not the second transistor in the subpixel to be checked may be short-circuited may be determined.

The bad subpixel detecting circuit determines whether a second transistor in the first subpixel is short-circuited as a subpixel to be checked before a driving period of the first subpixel, and turns off the gate node of the second transistor in the first subpixel. If it is confirmed that the voltage of the first reference voltage line electrically connected to the source node or the drain node of the second transistor in the first subpixel is increased while the second scan signal of the level voltage is being applied, the second scan signal in the first subpixel is increased. By determining that the two transistors are short-circuited, the first subpixel may be detected as a defective subpixel.

When the second subpixel connected to the first reference voltage line together with the first subpixel is a subpixel to be checked, the defective subpixel detection circuit outputs a turn-off level voltage to a gate node of a second transistor in the second subpixel. While the second scan signal is being applied, when it is confirmed that there is no voltage change of the first reference voltage line electrically connected to the source node or drain node of the second transistor in the second subpixel or the magnitude of the voltage change is less than or equal to a predetermined threshold level. , it is determined that the second transistor in the second subpixel is not short-circuited, and the second subpixel can be detected as a normal subpixel.

The data driving circuit may supply a first specific data voltage that turns off a driving transistor in the first subpixel to the first subpixel through the first data line when the second subpixel is driven.

The defective subpixel detection period may proceed before the power-on signal is generated and display driving starts, may proceed after the power-off signal is generated, or may proceed in real time during display driving.

When the second subpixel connected to the first reference voltage line together with the first subpixel is a normal subpixel, a data voltage for turning on the driving transistor may be applied during the driving period.

The second subpixel, which is a normal subpixel, may be disposed in the same subpixel row as the first subpixel, which is a defective subpixel, or may be disposed in a different subpixel row.

The organic light emitting display device may further include a memory storing location information of the defective subpixel in which the second transistor is shorted.

The controller may refer to the memory to replace image data to be supplied to the defective subpixel with specific image data for turning off a driving transistor in the defective subpixel and output the same to a data driving circuit.

In another aspect, embodiments of the present invention may provide a data driving circuit capable of preventing line defects.

The data driving circuit includes a latch circuit for storing input image data, a digital-to-analog conversion circuit for converting the image data into analog signals, and data voltages corresponding to the analog signals to n data lines corresponding to n (n is a natural number greater than or equal to 2) an output circuit outputting data channels, an analog-to-digital conversion circuit converting the voltages of m (m is a natural number greater than or equal to 1) reference voltage lines into digital values and outputting them, and corresponding to m reference voltage lines It may include a switch circuit connected between the m reference channels and the analog-to-digital conversion circuit.

n may be an integer multiple of 2 or more of m.

Each of the m reference voltage lines may be commonly connected to source nodes or drain nodes of second transistors included in two or more subpixels.

Among two or more subpixels that are commonly supplied with a reference voltage through a first reference voltage line among m reference voltage lines, the first subpixel is driven when the second transistor in the first subpixel is short-circuited. During the period, a first specific data voltage for turning off the driving transistor in the first subpixel may be output through the first data line and supplied to the first subpixel.

During the driving period of the first subpixel, the analog-to-digital conversion circuit converts the increased voltage of the second node of the driving transistor in the second subpixel connected to the first reference voltage line to the first reference voltage line. can be sensed through

The second transistor in the second subpixel connected to the first reference voltage line together with the first subpixel is short-circuited, and the driving transistor in the first subpixel is turned off when the second subpixel is driven. 1 A specific data voltage may be supplied to the first subpixel through the first data line.

In another aspect, embodiments of the present invention may provide a method for driving an organic light emitting display device capable of preventing line defects.

The driving method includes a data voltage for driving an image through a first data line during a driving period of a first subpixel among two or more subpixels that are commonly supplied with a reference voltage through a first reference voltage line among a plurality of subpixels. During the normal driving phase of supplying power to the first subpixel and the driving period of the first subpixel when the second transistor in the first subpixel is short-circuited, the first driving transistor in the first subpixel is turned off. A line defect prevention step of supplying a specific data voltage to the first subpixel through the first data line may be included.

In the line defect prevention step, mobility sensing of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel may be performed.

In the driving method, between a normal driving step and a line defect prevention step, it is determined whether or not a second transistor in a first subpixel, which is a subpixel to be checked, is short-circuited among a plurality of subpixels, so that a first subpixel, which is a subpixel to be checked, is defective. A defective subpixel detection step of detecting whether the subpixel is a subpixel or not may be further included.

The detecting of the defective subpixel may include contacting a source node or a drain node of a second transistor in the first subpixel while a second scan signal having a turn-off level voltage is applied to the gate node of the second transistor in the first subpixel. Based on whether or not the voltage of the electrically connected first reference voltage line changes or the magnitude of the voltage change, whether or not the second transistor in the subpixel to be checked may be short-circuited may be determined.

The detecting of the defective subpixel may include contacting a source node or a drain node of a second transistor in the first subpixel while a second scan signal having a turn-off level voltage is applied to the gate node of the second transistor in the first subpixel. When it is determined that the voltage of the electrically connected first reference voltage line increases, it is determined that the second transistor in the first subpixel is short-circuited, and the first subpixel may be detected as a defective subpixel.

In the detecting of the defective subpixel, a first scan signal having a turn-on level voltage is supplied to a gate node of a first transistor in the first subpixel, and a turn-on level voltage is supplied to a gate node of a second transistor in the first subpixel. supplies a second scan signal of, turns on a reference switch connected to a first reference voltage line electrically connected to the source node or drain node of a second transistor in the first subpixel, and turns on the second transistor in the first subpixel A first step of turning off a sampling switch connected to a first reference voltage line electrically connected to a source node or a drain node of ; After the first step, the first scan signal of the turn-off level voltage is supplied to the gate node of the first transistor in the first subpixel, and the second scan signal of the turn-off level voltage is supplied to the gate node of the second transistor in the first subpixel. Supplying 2 scan signals, turning off the reference switch connected to the first reference voltage line electrically connected to the source node or drain node of the second transistor in the first subpixel, and turning off the source of the second transistor in the first subpixel a second step of turning off a sampling switch connected to a node or a first reference voltage line electrically connected to the drain node; After the second step, the first scan signal of the turn-off level voltage is supplied to the gate node of the first transistor in the first subpixel, and the second scan signal of the turn-off level voltage is supplied to the gate node of the second transistor in the first subpixel. Supplying 2 scan signals, turning off the reference switch connected to the first reference voltage line electrically connected to the source node or drain node of the second transistor in the first subpixel, and turning off the source of the second transistor in the first subpixel a third step of turning on a sampling switch connected to a node or a first reference voltage line electrically connected to the drain node; A fourth step of sensing a voltage of a first reference voltage line electrically connected to the analog-to-digital converter through the sampling switch and converting the sensed voltage into a sensed value corresponding to a digital value as the sampling switch is turned on; and a fifth step of determining whether or not the first subpixel is a defective subpixel by determining whether or not the second transistor is short-circuited by checking whether or not the voltage of the first reference voltage line has changed or the magnitude of the voltage change based on the sensed value. can do.

In another aspect, embodiments of the present invention may provide a controller of an organic light emitting display device capable of preventing line defects.

The controller stores information on the short-circuit of a second transistor in a first subpixel among two or more subpixels commonly supplied with a reference voltage through a first reference voltage line among a plurality of reference voltage lines or location information of the first subpixel. With reference to the memory and the memory, when the second transistor in the first subpixel is short-circuited, during the driving period of the first subpixel, image data to be supplied to the first subpixel is transmitted to the driving transistor in the first subpixel. and an image data supplier that replaces the image data with first specific image data that turns off and outputs the image data to the data driving circuit.

During the driving period of the first subpixel, mobility sensing of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel may be performed.

The controller may further include a defective subpixel detection circuit that detects whether or not the subpixel to be checked is a defective subpixel according to whether or not the second transistor in the subpixel to be checked is short-circuited among the plurality of subpixels during the defective subpixel detection period. .

The defective subpixel detecting circuit is connected to the source node or drain node of the second transistor in the subpixel to be checked while the second scan signal of the turn-off level voltage is being applied to the gate node of the second transistor in the subpixel to be checked. Based on whether or not the voltage of the electrically connected reference voltage line changes or the magnitude of the voltage change, whether or not the second transistor in the subpixel to be checked may be short-circuited may be determined.

According to the embodiments of the present invention described above, it is possible to provide an organic light emitting display device, a data driving circuit, a controller, and a driving method capable of improving image quality by preventing line defects.

According to embodiments of the present invention, it is possible to provide an organic light emitting display device, a data driving circuit, a controller, and a driving method capable of detecting defective subpixels causing line defects.

According to embodiments of the present invention, an organic light emitting display device, a data driving circuit, a controller, and a data driving circuit capable of improving image quality by preventing sensing and compensation errors of other normal subpixels from occurring due to driving of a defective subpixel. A driving method can be provided.

1 is a schematic system configuration diagram of an organic light emitting display device according to embodiments of the present invention.
2 is an exemplary diagram illustrating system implementation of an organic light emitting display device according to embodiments of the present invention.
3 is a circuit of a sub-pixel of an organic light emitting display device according to example embodiments of the present invention.
4 is a compensation circuit of an organic light emitting display device according to example embodiments.
5 is a driving timing diagram for sensing a threshold voltage of an organic light emitting display device according to embodiments of the present invention.
6 is a driving timing diagram for sensing mobility of an organic light emitting display device according to embodiments of the present invention.
7 is a diagram illustrating a sensing process of an organic light emitting display device according to embodiments of the present invention.
8 is a layout view of wires connected to four subpixels in an organic light emitting display device according to example embodiments.
9 is a circuit diagram of a subpixel (defective subpixel) in which a second transistor is shorted in an organic light emitting display device according to embodiments of the present invention.
FIG. 10 is an equivalent circuit for four subpixels when a defective subpixel exists among four subpixels sharing one reference voltage line in an organic light emitting display device according to embodiments of the present invention.
11 and 12 are diagrams of an organic light emitting display device according to embodiments of the present invention, when there is a defective subpixel among four subpixels sharing one reference voltage line, a signal generated by driving the defective subpixel is present. These are drawings for explaining sensing and compensation errors and line defect phenomena generated accordingly.
13 is a driving timing diagram for sensing threshold voltages for normal subpixels and defective subpixels in an organic light emitting display device according to embodiments of the present invention.
14 is a driving timing diagram for sensing mobility of a normal subpixel and a defective subpixel in an organic light emitting display device according to embodiments of the present invention.
15 is a line defect prevention circuit of an organic light emitting display device according to embodiments of the present invention.
16 is a flowchart of a method for preventing line defects in an organic light emitting display device according to embodiments of the present invention.
17 is a driving timing diagram for detecting defective subpixels of an organic light emitting display device according to embodiments of the present invention.
18 and 19 are diagrams illustrating an operation of preventing line defects when a first subpixel among four subpixels sharing one reference voltage line is a defective subpixel in an organic light emitting display device according to embodiments of the present invention; These are drawings for explaining the effect.
20 and 21 are diagrams illustrating data driving circuits according to example embodiments of the present invention.
22 is a diagram illustrating a controller according to embodiments of the present invention.
23 and 24 are flowcharts of a method of driving an organic light emitting display device according to example embodiments.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments of the present invention are described in detail below with reference to exemplary drawings. In adding reference numerals to components of each drawing, the same components may have the same numerals as much as possible even if they are displayed on different drawings. In addition, in describing the present invention, if it is determined that a detailed description of a related known configuration or function may obscure the gist of the present invention, the detailed description may be omitted.

Also, terms such as first, second, A, B, (a), and (b) may be used in describing the components of the present invention. These terms are only used to distinguish the component from other components, and the nature, sequence, order, or number of the corresponding component is not limited by the term. When an element is described as being “connected,” “coupled to,” or “connected” to another element, that element is or may be directly connected to that other element, but intervenes between each element. It will be understood that may be "interposed", or each component may be "connected", "coupled" or "connected" through other components.

1 is a schematic system configuration diagram of an organic light emitting display device 100 according to embodiments of the present invention.

Referring to FIG. 1 , an organic light emitting display device 100 according to the present embodiments includes a plurality of data lines DL and a plurality of gate lines GL, and a plurality of data lines DL and a plurality of gate lines GL. It may include an organic light emitting display panel 110 in which a plurality of subpixels SP defined by the gate line GL are arranged in a matrix type, and a driving circuit for driving the organic light emitting display panel 110 .

From a functional point of view, the driving circuit includes a data driving circuit 120 driving a plurality of data lines DL, a gate driving circuit 130 driving a plurality of gate lines GL, and a data driving circuit 120 ) and a controller 140 that controls the gate driving circuit 130.

In the organic light emitting display panel 110, the plurality of data lines DL and the plurality of gate lines GL may be disposed to cross each other. For example, the plurality of gate lines GL may be arranged in rows or columns, and the plurality of data lines DL may be arranged in columns or rows. Hereinafter, for convenience of explanation, it is assumed that the plurality of gate lines GL are arranged in rows and the plurality of data lines DL are arranged in columns.

In addition to the plurality of data lines DL and the plurality of gate lines GL, other types of wires may be disposed on the organic light emitting display panel 110 .

The controller 140 may supply image data DATA to the data driving circuit 120 .

In addition, the controller 140 supplies various control signals (DCS, GCS) necessary for driving the data driving circuit 120 and the gate driving circuit 130 to operate the data driving circuit 120 and the gate driving circuit 130. can control the operation of

The controller 140 starts scanning according to the timing implemented in each frame, converts the input image data input from the outside to suit the data signal format used in the data driving circuit 120, and converts the converted image data DATA. and controls data drive at an appropriate time according to the scan.

The controller 140, in order to control the data driving circuit 120 and the gate driving circuit 130, a vertical sync signal (Vsync), a horizontal sync signal (Hsync), an input data enable (DE: Data Enable) signal, A timing signal such as a clock signal CLK is received from an external source (eg, a host system), and various control signals are generated and output to the data driving circuit 120 and the gate driving circuit 130 .

For example, in order to control the gate driving circuit 130, the controller 140 includes a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE). : Gate Output Enable) and various gate control signals (GCS: Gate Control Signal) are output.

In addition, the controller 140, in order to control the data driving circuit 120, a source start pulse (SSP: Source Start Pulse), a source sampling clock (SSC: Source Sampling Clock), a source output enable signal (SOE: Source It outputs various data control signals (DCS: Data Control Signal) including Output Enable) and the like.

The controller 140 may be a timing controller used in a typical display technology or a control device that may further perform other control functions including a timing controller.

The controller 140 may be implemented as a component separate from the data driving circuit 120 or integrated with the data driving circuit 120 and implemented as an integrated circuit.

The data driving circuit 120 drives the plurality of data lines DL by receiving the image data DATA from the controller 140 and supplying data voltages to the plurality of data lines DL. Here, the data driving circuit 120 is also referred to as a source driving circuit.

The data driving circuit 120 may include a shift register, a latch circuit, a digital to analog converter (DAC), an output buffer, and the like.

The data driving circuit 120 may further include one or more analog to digital converters (ADCs) according to circumstances.

The gate driving circuit 130 sequentially drives the plurality of gate lines GL by sequentially supplying scan signals to the plurality of gate lines GL. Here, the gate driving circuit 130 is also referred to as a scan driving circuit.

The gate driving circuit 130 may include a shift register, a level shifter, and the like.

The gate driving circuit 130 sequentially supplies scan signals of an on voltage or an off voltage to the plurality of gate lines GL under the control of the controller 140 .

When a specific gate line is opened by the gate driving circuit 130, the data driving circuit 120 converts the image data DATA received from the controller 140 into an analog data voltage to generate a plurality of data lines DL. supplied with

The data driving circuit 120 may be located only on one side (eg, the upper or lower side) of the organic light emitting display panel 110, and in some cases, the organic light emitting display panel 110 ) may be located on both sides (eg, upper and lower sides).

The gate driving circuit 130 may be located only on one side (eg, the left or right side) of the organic light emitting display panel 110, and in some cases, the organic light emitting display panel 110 ) may be located on both sides (e.g., left and right).

The data driving circuit 120 may be implemented by including at least one source driver integrated circuit (SDIC).

Each source driver integrated circuit (SDIC) is connected to a bonding pad of the organic light emitting display panel 110 in a Tape Automated Bonding (TAB) method or a Chip On Glass (COG) method, or the organic light emitting display panel 110 It can also be placed directly on top. In some cases, each source driver integrated circuit (SDIC) may be integrated and disposed on the organic light emitting display panel 110 . In addition, each source driver integrated circuit (SDIC) may be implemented in a COF (Chip On Film) method. In this case, each source driver integrated circuit SDIC may be mounted on a circuit film and electrically connected to the data lines DL of the organic light emitting display panel 110 through the circuit film.

In the gate driving circuit 130 , one or more gate driver integrated circuits (GDICs) may be connected to bonding pads of the organic light emitting display panel 110 in a TAB method or a COG method. In addition, the gate driving circuit 130 may be implemented as a GIP (Gate In Panel) type and directly disposed on the organic light emitting display panel 110 . In addition, the gate driving circuit 130 may be implemented in a COF (Chip On Film) method. In this case, each gate driver integrated circuit (GDIC) included in the gate driving circuit 130 is mounted on a circuit film and is electrically connected to the gate lines GL of the organic light emitting display panel 110 through the circuit film. can be connected...

2 is an exemplary system implementation diagram of an organic light emitting display device 100 according to embodiments of the present invention.

In the example of FIG. 2, each source driver integrated circuit (SDIC) included in the data driving circuit 120 is implemented in a COF (Chip On Film) method among various methods (TAB, COG, COF, etc.), and the gate driving circuit (130) is implemented as a GIP (Gate In Panel) type among various methods (TAB, COG, COF, GIP, etc.).

Each of the plurality of source driver integrated circuits (SDICs) included in the data driving circuit 120 may be mounted on the source-side circuit film (SF).

One side of the source-side circuit film SF may be electrically connected to the organic light emitting display panel 110 .

Wires for electrically connecting the source driver integrated circuit SDIC and the organic light emitting display panel 110 may be disposed on the source-side circuit film SF.

The organic light emitting display device 100 mounts at least one source printed circuit board (SPCB), control parts, and various electrical devices for circuit connection between a plurality of source driver integrated circuits (SDICs) and other devices. It may include a control printed circuit board (CPCB) for

The other side of the source-side circuit film SF on which the source driver integrated circuit SDIC is mounted may be connected to at least one source printed circuit board SPCB.

That is, one side of the source-side circuit film SF on which the source driver integrated circuit (SDIC) is mounted is electrically connected to the organic light emitting display panel 110 and the other side is electrically connected to the source printed circuit board (SPCB). can

In the control printed circuit board (CPCB), the controller 140 for controlling operations of the data driving circuit 120 and the gate driving circuit 130, the organic light emitting display panel 110, the data driving circuit 120, and the gate A power management integrated circuit (PMIC) 210 or the like that supplies various voltages or currents to the driving circuit 130 or controls various voltages or currents to be supplied may be mounted.

The at least one source printed circuit board (SPCB) and the control printed circuit board (CPCB) may be circuitically connected through at least one connecting member. Here, the connecting member may be, for example, a flexible printed circuit (FPC) or a flexible flat cable (FFC).

At least one source printed circuit board (SPCB) and one control printed circuit board (CPCB) may be integrated into one printed circuit board.

The organic light emitting display device 100 may further include a set board 230 electrically connected to the control printed circuit board (CPCB). This set board 230 may also be referred to as a power board.

The set board 230 may include a main power management circuit 220 (M-PMC: Main Power Management Circuit) that manages overall power of the organic light emitting display device 100 .

The power management integrated circuit 210 is a circuit that manages power for the display module including the organic light emitting display panel 110 and its driving circuits 120, 130 and 140, and the main power management circuit 220 is It is a circuit that manages the entire power including the module, and can work with the power management integrated circuit 210 .

Each subpixel (SP) arranged on the organic light emitting display panel 110 included in the organic light emitting display device 100 according to the present embodiments includes an organic light emitting diode (OLED), which is a self light emitting element, It may be composed of circuit elements such as a driving transistor for driving an organic light emitting diode (OLED).

The type and number of circuit elements constituting each sub-pixel SP may be variously determined according to a provided function and a design method.

3 is a circuit of a subpixel of the organic light emitting display device 100 according to example embodiments.

The organic light emitting display panel 110 according to embodiments of the present invention includes a plurality of data lines DL, a plurality of gate lines GL, a plurality of driving voltage lines DVL, and a plurality of reference voltage lines RVL. etc. can be placed.

Each subpixel SP in the organic light emitting display panel 110 includes an organic light emitting diode OLED, a driving transistor DRT for driving the organic light emitting diode OLED, and a first node of the driving transistor DRT. A first transistor (T1) electrically connected between (N1) and a corresponding data line (DL) among the plurality of data lines (DL), the second node (N2) of the driving transistor (DRT) and a plurality of reference voltage lines ( A second transistor T2 electrically connected between the corresponding reference voltage line RVL of RVL and a storage capacitor electrically connected between the first node N1 and the second node N2 of the driving transistor DRT ( Cst) and the like.

An organic light emitting diode (OLED) may include an anode electrode, an organic light emitting layer, and a cathode electrode.

According to the circuit example of FIG. 3 , the anode electrode of the organic light emitting diode OLED may be electrically connected to the second node N2 of the driving transistor DRT. The ground voltage EVSS may be applied to the cathode electrode of the organic light emitting diode OLED. Here, the base voltage EVSS may be, for example, a ground voltage or a voltage higher or lower than the ground voltage. Also, the electromotive voltage EVSS may vary according to the driving state. For example, the base voltage EVSS during image driving and the base voltage EVSS during sensing driving may be set differently.

The driving transistor DRT drives the organic light emitting diode (OLED) by supplying a driving current to the organic light emitting diode (OLED).

The driving transistor DRT may include a first node N1 , a second node N2 , and a third node N3 . The first node N1 of the driving transistor DRT is a node corresponding to a gate node. The first node N1 of the driving transistor DRT may be electrically connected to a source node or a drain node of the first transistor T1. The second node N2 of the driving transistor DRT may be a source node or a drain node. The second node N2 of the driving transistor DRT may be electrically connected to the anode electrode (or cathode electrode) of the organic light emitting diode OLED, and may be electrically connected to the source node or drain node of the second transistor T2. can The third node N3 of the driving transistor DRT may be a drain node or a source node. The third node N3 of the driving transistor DRT is a node to which the driving voltage EVDD is applied, and may be electrically connected to a driving voltage line (DVL) supplying the driving voltage EVDD.

Hereinafter, for convenience of explanation, the second node N2 of the driving transistor DRT is a source node and the third node N3 is a drain node.

The storage capacitor Cst is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT to generate a data voltage Vdata corresponding to the video signal voltage or a voltage corresponding thereto. You can keep it for frame time.

The drain node or source node of the first transistor T1 is electrically connected to the corresponding data line DL, and the source node or drain node of the first transistor T1 is connected to the first node N1 of the driving transistor DRT. , and the gate node of the first transistor T1 is electrically connected to the corresponding gate line to receive the first scan signal SCAN1 .

The first transistor T1 may be turned on and off by receiving the first scan signal SCAN1 to a gate node through a corresponding gate line.

The first transistor T1 is turned on by the first scan signal SCAN1 and transfers the data voltage Vdata supplied from the corresponding data line DL to the first node N1 of the driving transistor DRT. can do it

The drain node or source node of the second transistor T2 is electrically connected to the reference voltage line RVL, and the source node or drain node of the second transistor T2 is connected to the second node N2 of the driving transistor DRT. can be electrically connected to A gate node of the second transistor T2 may be electrically connected to the corresponding gate line to receive the second scan signal SCAN2.

The on/off of the second transistor T2 may be controlled by receiving the second scan signal SCAN2 to a gate node through a corresponding gate line.

The second transistor T2 is turned on by the second scan signal SCAN2 and transfers the reference voltage Vref supplied from the corresponding reference voltage line RVL to the second node N2 of the driving transistor DRT. can do it

Meanwhile, the storage capacitor Cst is not a parasitic capacitor (eg, Cgs or Cgd) that is an internal capacitor existing between the first node N1 and the second node N2 of the driving transistor DRT. , may be an external capacitor intentionally designed outside the driving transistor DRT.

Each of the driving transistor DRT, the first transistor T1 and the second transistor T2 may be an n-type transistor or a p-type transistor.

Meanwhile, the first scan signal SCAN1 and the second scan signal SCAN2 may be separate gate signals. In this case, the first scan signal SCAN1 and the second scan signal SCAN2 may be respectively applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through different gate lines. there is.

In some cases, the first scan signal SCAN1 and the second scan signal SCAN2 may be the same gate signal. In this case, the first scan signal SCAN1 and the second scan signal SCAN2 may be commonly applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through the same gate line. .

Each sub-pixel structure illustrated in FIG. 3 is a 3T (transistor) 1C (capacitor) structure, which is only an example for description, and may further include one or more transistors or, in some cases, one or more capacitors. may be Alternatively, each of a plurality of subpixels may have the same structure, and some of the plurality of subpixels may have a different structure.

Below, an image driving operation of each sub-pixel (SP) will be briefly described as an example.

The image driving operation of each sub-pixel SP may proceed to an image data recording step, a boosting step, and an emission step.

In the image data writing step, the data voltage Vdata corresponding to the image signal is applied to the first node N1 of the driving transistor DRT, and the reference voltage Vref is applied to the second node N2 of the driving transistor DRT. ) can be authorized. Here, a voltage similar to the reference voltage Vref is applied to the second node N2 of the driving transistor DRT due to a resistance component between the second node N2 of the driving transistor DRT and the reference voltage line RVL. (Vref+ΔV) may be applied.

The reference voltage Vref for image driving is also referred to as VpreR.

In the image data writing step, the first transistor T1 and the second transistor T2 may be turned on simultaneously or with a slight time difference.

In the image data recording step, the storage capacitor Cst may be charged with an electric charge corresponding to a potential difference between both ends (Vdata-Vref or Vdata-(Vref+ΔV)).

Application of the image data voltage Vdata to the first node N1 of the driving transistor DRT is referred to as image data writing.

In the boosting step following the image data writing step, the first node N1 and the second node N2 of the driving transistor DRT may be electrically floated simultaneously or with a slight time difference.

To this end, the first transistor T1 may be turned off by the turn-off level voltage of the first scan signal SCAN1. Also, the second transistor T2 may be turned off by the turn-off level voltage of the second scan signal SCAN2.

In the boosting step, while the voltage difference between the first node N1 and the second node N2 of the driving transistor DRT is maintained, the first node N1 and the second node N2 of the driving transistor DRT Voltage can be boosted.

During the boosting step, the voltages of the first node N1 and the second node N2 of the driving transistor DRT are boosted, and the increased voltage of the second node N2 of the driving transistor DRT is constant. When the voltage is higher than that, the light emitting stage is entered.

In this light emitting step, a driving current flows into the organic light emitting diode (OLED). Accordingly, the organic light emitting diode (OLED) may emit light.

The driving transistor DRT disposed in each of the plurality of subpixels SP arranged in the organic light emitting display panel 110 according to the exemplary embodiments has unique characteristic values such as threshold voltage and mobility.

The driving transistor DRT may be deteriorated according to driving time. Accordingly, the unique characteristics of the driving transistor DRT may change according to driving time.

The on-off timing of the driving transistor DRT may vary or the driving capability of the organic light emitting diode OLED may vary according to a change in characteristic value. That is, the timing at which current is supplied to the organic light emitting diode (OLED) and the amount of current supplied to the organic light emitting diode (OLED) may be changed according to a change in characteristic values of the driving transistor DRT. Depending on the change in the characteristic value of the driving transistor DRT, the luminance of the corresponding subpixel SP may be different from the desired luminance.

Also, the plurality of subpixels SP arranged on the organic light emitting display panel 110 may have different driving times. Therefore, deviations in characteristic values between the driving transistors DRT in each subpixel SP may occur.

The characteristic value deviation between the driving transistors DRT may cause a luminance deviation between the subpixels SP. Accordingly, the luminance uniformity of the organic light emitting display panel 110 may be deteriorated, resulting in a deterioration in image quality.

Accordingly, the organic light emitting display device 100 according to embodiments of the present invention may include a compensation circuit capable of compensating for a characteristic value deviation between driving transistors DRT, and may provide a compensation method using the compensation circuit. This will be described in more detail with reference to FIGS. 4 to 7 .

4 is a compensation circuit of the organic light emitting display device 100 according to example embodiments.

The organic light emitting display device 100 according to embodiments of the present invention needs to sense a characteristic value or change in characteristic value of each driving transistor DRT in order to compensate for a characteristic value deviation between the driving transistors DRT.

The compensation circuit of the organic light emitting display device 100 according to the embodiments of the present invention drives (sensing drive) a subpixel SP having a 3T1C structure or a modified structure based on the 3T1C structure to drive within the subpixel SP. Components for sensing a characteristic value or change in characteristic value of the transistor DRT may be included.

According to the sensing drive of the organic light emitting display device 100 according to the embodiments of the present invention, the characteristic value of the driving transistor DRT in the sub-pixel SP or its change may be expressed as the voltage of the reference voltage line RVL. can

More specifically, according to the sensing operation of the organic light emitting display device 100 according to the embodiments of the present invention, the characteristic value of the driving transistor DRT or its change is the voltage of the second node N2 of the driving transistor DRT. (e.g. Vdata-Vth).

The voltage of the second node N2 of the driving transistor DRT may correspond to the voltage of the reference voltage line RVL when the second transistor T2 is in a turn-on state. The line capacitor Cline on the reference voltage line RVL may be charged by the voltage of the second node N2 of the driving transistor DRT. The reference voltage line RVL may have a voltage corresponding to the voltage of the second node N2 of the driving transistor DRT by the charged line capacitor Cline.

The compensation circuit of the organic light emitting display device 100 according to embodiments of the present invention drives the second node N2 of the driving transistor DRT to be in a voltage state reflecting the characteristic value, thereby reflecting the characteristic value. In order to sense the voltage of the second node N2 of the driving transistor DRT, an analog-to-digital converter ADC for measuring the voltage of the reference voltage line RVL and converting it into a sensing value corresponding to a digital value, and sensing A switch circuit for driving may be included.

The switch circuit for sensing driving includes a sensing driving reference switch (SPRE) for controlling a connection between each reference voltage line (RVL) and a sensing driving reference voltage supply node (Npres) to which the reference voltage (Vref) is supplied, and each A sampling switch (SAMP) controlling a connection between the reference voltage line (RVL) and the analog-to-digital converter (ADC) may be included.

The aforementioned reference switch SPRE for sensing driving is a switch used for sensing driving. The reference voltage Vref supplied to the reference voltage line RVL by the sensing driving reference switch SPRE is the sensing driving reference voltage VpreS.

Meanwhile, referring to FIG. 4 , the switch circuit may include an image driving reference switch RPRE used when driving an image.

The image driving reference switch RPRE may control the connection between each reference voltage line RVL and the image driving reference voltage supply node Nprer to which the reference voltage Vref is supplied.

The image driving reference switch RPRE mentioned above is a switch used when driving an image. The reference voltage Vref supplied to the reference voltage line RVL by the image driving reference switch SPRE is the image driving reference voltage VpreR.

The reference switch for sensing driving (SPRE) and the reference switch for image driving (RPRE) may be provided separately or may be integrated into one. The reference voltage VpreS for sensing driving and the reference voltage VpreR for image driving may have the same voltage value or different voltage values.

The compensation circuit of the organic light emitting display device 100 according to embodiments of the present invention includes a memory MEM that stores a sensing value output from an analog-to-digital converter (ADC) or previously stores a reference sensing value, and a memory ( A compensator (COMP) that compares the sensing value stored in the MEM with a reference sensing value to calculate a compensation value for compensating for a characteristic value deviation may be further included.

The compensation value calculated by the compensator COMP may be stored in the memory MEM.

The controller 140 changes the image data Data to be supplied to the data driving circuit 120 using the compensation value calculated by the compensator COM, and outputs the changed image data Data_comp to the data driving circuit 120. can do.

Accordingly, the data driving circuit 120 may convert the image data Data_comp changed through the digital-to-analog converter DAC into a data voltage Vdata_comp in the form of an analog signal and supply the converted data voltage Vdata_comp to the corresponding subpixel SP. Accordingly, characteristic value deviations (threshold voltage deviation and mobility deviation) of the driving transistor DRT of the corresponding subpixel SP may be compensated for.

5 is a driving timing diagram for sensing a threshold voltage of the organic light emitting display device 100 according to embodiments of the present invention.

Referring to FIG. 5 , threshold voltage sensing driving may proceed to an initialization step ( S510 ), a tracking step ( S520 ), and a sampling step ( S530 ).

In the initialization step S510, the first transistor T1 is turned on by the first scan signal SCAN of the turn-on level voltage. Accordingly, the first node N1 of the driving transistor DRT is initialized with the data voltage Vdata for driving the threshold voltage sensing.

In the initialization step S510, the second transistor T2 is turned on and the sensing driving reference switch SPRE is turned on by the second scan signal SENSE of the turn-on level voltage. . Accordingly, the second node N2 of the driving transistor DRT is initialized to the reference voltage VpreS for sensing driving.

The tracking step ( S520 ) is a step of tracking the threshold voltage (Vth) of the driving transistor (DRT).

In the tracking step ( S520 ), the first transistor T1 and the second transistor T2 maintain a turned-on state, and the sensing drive reference switch SPRE is turned off. Accordingly, the second node N2 of the driving transistor DRT floats, and the voltage of the second node N2 of the driving transistor DRT starts to rise from the sensing driving reference voltage VpreS.

Since the second transistor T2 is turned on, an increase in the voltage of the second node N2 of the driving transistor DRT leads to an increase in the voltage of the reference voltage line RVL.

The voltage of the second node N2 of the driving transistor DRT rises and then becomes saturated. The saturated voltage of the second node N2 of the driving transistor DRT corresponds to the voltage difference (Vdata−Vth) between the threshold voltage Vth of the driving transistor DRT in the data voltage Vdata for driving the threshold voltage sensing. do.

Therefore, when the voltage of the second node N2 of the driving transistor DRT is saturated, the voltage of the reference voltage line RVL is the voltage difference between the threshold voltage of the driving transistor DRT and the threshold voltage sensing driving data voltage ( It corresponds to Vdata-Vth).

When the voltage of the second node N2 of the driving transistor DRT reaches saturation, the sampling switch SAMP is turned on, and a sampling step ( S530 ) proceeds.

In the sampling step S530, the analog-to-digital converter ADC may sense the voltage of the reference voltage line RVL by the sampling switch SAMP and convert the sensed voltage into a sensed value corresponding to a digital value. Here, the voltage sensed by the analog-to-digital converter (ADC) corresponds to Vdata-Vth.

The compensator (COMP) can determine the threshold voltage of the driving transistor (DRT) of the corresponding sub-pixel (SP) based on the sensing value output from the analog-to-digital converter (ADC), and determine the threshold voltage of the driving transistor (DRT) can compensate

The compensator (COMP) determines the value of the driving transistor (DRT) from the sensing value (digital value corresponding to Vdata-Vth) measured through sensing driving and the known threshold voltage sensing and driving data (digital value corresponding to Vdata). The threshold voltage (Vth) can be identified.

The compensator COMP compares the identified threshold voltage Vth of the corresponding driving transistor DRT with a reference threshold voltage or a threshold voltage of another driving transistor DRT to compensate for the threshold voltage deviation between the driving transistors DRT. can do it Here, the threshold voltage deviation compensation may mean image data change processing (processing of adding or subtracting a compensation value (offset) to image data).

6 is a driving timing diagram for sensing mobility of the organic light emitting display device 100 according to embodiments of the present invention.

Referring to FIG. 6 , mobility sensing driving may proceed to an initialization step ( S610 ), a tracking step ( S620 ), and a sampling step ( S630 ).

In the initialization step ( S610 ), the first transistor T1 is turned on by the first scan signal SCAN of the turn-on level voltage. Accordingly, the first node N1 of the driving transistor DRT is initialized with the data voltage Vdata for driving the mobility sensing.

In the initialization step S610, the second transistor T2 is turned on and the sensing drive reference switch SPRE is turned on by the second scan signal SENSE of the turn-on level voltage. . Accordingly, the second node N2 of the driving transistor DRT is initialized to the reference voltage VpreS for sensing driving.

The tracking step ( S620 ) is a step of tracking the mobility of the driving transistor DRT. Mobility of the driving transistor DRT may indicate current driving capability of the driving transistor DRT.

In the tracking step S620, the first transistor T1 is turned off and the sensing drive reference switch SPRE is turned off by the first scan signal SCAN of the turn-off level voltage. Accordingly, both the first node N1 and the second node N2 of the driving transistor DRT are floated. Accordingly, the voltages of the first node N1 and the second node N2 of the driving transistor DRT both rise. In particular, the voltage of the second node N2 of the driving transistor DRT starts to rise from the sensing driving reference voltage VpreS.

Since the second transistor T2 is turned on, an increase in the voltage of the second node N2 of the driving transistor DRT leads to an increase in the voltage of the reference voltage line RVL.

When a predetermined time Δt has elapsed from the point at which the voltage of the second node N2 of the driving transistor DRT starts to rise, the sampling switch SAMP is turned on and the sampling step S630 proceeds.

In the sampling step S630, the analog-to-digital converter ADC may sense the voltage of the reference voltage line RVL by the sampling switch SAMP and convert the sensed voltage into a sensed value corresponding to a digital value. Here, the voltage sensed by the analog-to-digital converter ADC corresponds to a voltage (VpreS+ΔV) increased by a predetermined voltage (ΔV) from the sensing driving reference voltage (VpreS).

The compensator COMP may determine the mobility of the driving transistor DRT of the corresponding subpixel SP based on the sensing value output from the analog-to-digital converter ADC, and determine the mobility of the driving transistor DRT. can compensate

The compensator COMP determines the value of the driving transistor DRT from the sensing value (digital value corresponding to VpreS+ΔV) measured through sensing driving, the already known reference voltage for sensing driving (VpreS) and the elapsed time (Δt). mobility can be identified.

The mobility of the driving transistor DRT is proportional to the amount of voltage variation (ΔV/Δt) per unit time of the reference voltage line RVL in the tracking step S620. That is, the mobility of the driving transistor DRT is proportional to the slope of the voltage waveform of the reference voltage line RVL in FIG. 6 .

The compensator COMP may compensate for a mobility deviation between driving transistors DRT by comparing the mobility of the corresponding driving transistor DRT with a reference mobility or mobility of other driving transistors DRT. Here, the mobility deviation compensation may mean image data change processing (an operation processing of multiplying image data by a compensation value (gain)).

7 is a diagram illustrating a sensing process of the organic light emitting display device 100 according to example embodiments.

Referring to FIG. 7 , when a power-on signal is generated, the organic light-emitting display device 100 performs a predetermined on-sequence process for starting display driving, and when the on-sequence process is completed, normal display driving begins.

When a power off signal is generated, the organic light emitting display device 100 stops display driving in progress and performs a predetermined off sequence process. When the off sequence process is completed, the organic light emitting display device 100 enters a completely off state.

In relation to the power processing timing, sensing driving (threshold voltage sensing driving and mobility sensing driving) may be performed.

Sensing driving may be performed after the power-on signal is generated and before display driving starts. Such sensing and sensing processes are referred to as on-sensing and on-sensing processes.

Also, sensing driving may be performed after the power off signal is generated. Such sensing and sensing processes are referred to as off-sensing and off-sensing processes.

Also, sensing driving may be performed in real time during display driving. Such sensing and sensing processors are referred to as real-time (RT) sensing and RT Sensing Process.

In the case of a real-time sensing process, sensing driving may be performed for one or more subpixels SP in one or more subpixel lines (subpixel rows) for every blank time during display driving. Here, a subpixel line (subpixel row) for which sensing is driven for each blank time may be randomly selected. Accordingly, an abnormal image phenomenon in a sub-pixel line subjected to sensing driving in an active time after sensing driving in a blank time may be alleviated. In addition, after the sensing drive in the blank time, the recovery data voltage corresponding to the data voltage before the sensing drive may be supplied to the subpixel that has been sensing driven in the active time. Accordingly, an abnormal image phenomenon in a sub-pixel line subjected to sensing driving in an active time after sensing driving in a blank time may be further alleviated.

Meanwhile, in the case of threshold voltage sensing driving, since it may take a long time to saturate the voltage of the second node N2 of the driving transistor DRT, an off-sensing process may be performed for a rather long time.

In the case of mobility sensing driving, since it requires a relatively short time compared to threshold voltage sensing driving, it may be performed as an on-sensing process that proceeds for a short time and/or a real-time sensing process.

Meanwhile, one data voltage (Vdata), two scan signals (SCAN and SENSE), a reference voltage (Vref), a driving voltage (EVDD), and the like must be supplied to one sub-pixel (SP). Therefore, one subpixel (SP) should be electrically connected to one data line (DL), one or two gate lines (GL), one reference voltage (RVL), and one driving voltage line (DVL). (see Figure 3).

In order to turn on or off one subpixel row, one or two gate lines GL should be disposed for each subpixel row. In addition, since the data voltage Vdata must be supplied to each subpixel SP, one data line DL can be disposed for each subpixel column. In some cases, one data line DL may be commonly arranged for every two subpixel columns.

Since the driving voltage EVDD may be a common voltage, one driving voltage line DVL may be disposed for each subpixel column (or one subpixel row), or two or more subpixel columns (or two subpixel rows). One driving voltage line (DVL) may be disposed for every subpixel column).

Similarly, since the reference voltage Vref may be a common voltage, one reference voltage line RVL may be disposed for each subpixel column (or one subpixel row), and two or more subpixel columns ( Alternatively, one reference voltage line RVL may be disposed for every two or more subpixel columns).

When one driving voltage line (DVL) and/or one reference voltage line (RVL) is disposed for every two or more subpixel columns (or two or more subpixel columns), the aperture ratio of the organic light emitting display panel 110 is can elevate

Below, in order to increase the aperture ratio of the organic light emitting display panel 110, one driving voltage line DVL is disposed in parallel with the data line DL for every 4 or more sub-pixel columns, and 4 or more sub-pixel columns A structure in which one reference voltage line RVL is arranged in parallel with the data line DL for each will be described with reference to FIG. 8 .

8 illustrates wires DL1 to DL2, GL1 to GL2, and DVL1 to DVL2 connected to four subpixels SP1, SP2, SP3, and SP4 in the organic light emitting display device 100 according to embodiments of the present invention. , RVL) is a layout diagram.

The four subpixels SP1, SP2, SP3, and SP4 may be, for example, a subpixel emitting red light, a subpixel emitting white light, a subpixel emitting green light, and a subpixel emitting blue light. can

As described above, the first scan signal SCAN and the second scan signal SENSE may be supplied through the same gate line, but may be supplied through different gate lines GL1 and GL2.

The example of FIG. 8 is a case in which the first scan signal SCAN and the second scan signal SENSE are supplied through different gate lines GL1 and GL2. In this case, four subpixels SP1 and SP2 , SP3, and SP4 are arranged, the first gate line GL1 for supplying the first scan signal SCAN to the gate node of the first transistor T1 and the second transistor T2 A second gate line GL2 for supplying the second scan signal SENSE to the gate node may be disposed.

Referring to FIG. 8 , when four subpixels (SP1, SP2, SP3, and SP4) are arranged in a row direction, four subpixels for supplying data voltages to each of the four subpixels (SP1, SP2, SP3, and SP4) are provided. The data lines DL1 , DL2 , DL3 , and DL4 may be arranged in a column direction.

Referring to FIG. 8 , in order to increase the aperture ratio of the organic light emitting display panel 110, the first subpixel SP1 and the second subpixel SP2 pass a driving voltage EVDD through a first driving voltage line DVL1. ) can be commonly supplied. The third subpixel SP3 and the fourth subpixel SP4 may receive the driving voltage EVDD in common through the second driving voltage line DVL2 .

Both the subpixels arranged in the same column as the first subpixel SP1 and the subpixels arranged in the same column as the second subpixel SP2 generate a driving voltage EVDD through the first driving voltage line DVL1. can be supplied in common. Both the subpixels arranged in the same column as the third subpixel SP3 and the subpixels arranged in the same column as the fourth subpixel SP4 generate a driving voltage EVDD through the second driving voltage line DVL2. can be supplied in common.

Referring to FIG. 8 , in order to increase the aperture ratio of the organic light emitting display panel 110, the four sub-pixels SP1, SP2, SP3, and SP4 apply a reference voltage Vref through one reference voltage line RVL. can be supplied in common.

Subpixels arranged in the same column as the first subpixel SP1, subpixels arranged in the same column as the second subpixel SP2, subpixels arranged in the same column as the third subpixel SP3, , and all of the subpixels arranged in the same column as the fourth subpixel SP4 may receive the reference voltage Vref in common through one reference voltage line RVL.

In other words, subpixels arranged in the same column as the first subpixel SP1, subpixels arranged in the same column as the second subpixel SP2, and subpixels arranged in the same column as the third subpixel SP3. All of the pixels and subpixels arranged in the same column as the fourth subpixel SP4 share one reference voltage line RVL.

Here, subpixels arranged in the same column as the first subpixel SP1, subpixels arranged in the same column as the second subpixel SP2, and subpixels arranged in the same column as the third subpixel SP3 and the subpixels arranged in the same column as the fourth subpixel SP4 are subpixel groups sharing one reference voltage line RVL.

If an anomaly occurs in any subpixel among subpixel groups sharing one reference voltage line RVL, the abnormal phenomenon may propagate to the entire subpixel group through one reference voltage line RVL. there is.

9 is a circuit diagram of a subpixel (defective subpixel) in which the second transistor T2 is shorted in the organic light emitting display device 100 according to example embodiments.

During the panel manufacturing process, when a foreign substance is generated near the second transistor T2 of the organic light emitting display panel 110, the second transistor T2 may be short-circuited. In addition to this, the second transistor T2 may be short-circuited due to various factors such as internal or external impact after product shipment.

A short circuit of the second transistor T2 may mean a short circuit between a source node and a drain node of the second transistor T2.

In addition, the short circuit of the second transistor T2 may refer to any situation in which the second transistor T2 is abnormally turned on in a situation where the second transistor T2 should be turned off.

For example, even though the gate driving circuit 130 outputs the second scan signal SENSE of the turn-off level voltage to the second gate line GL2 connected to the gate node of the second transistor T2, The second transistor T2 may be abnormally turned on because the second gate line GL2 is short-circuited with other wires having a voltage similar to the turn-on level voltage.

Below, the subpixel SP in which the second transistor T2 is short-circuited is referred to as a defective subpixel. A subpixel SP in which the second transistor T2 is not short-circuited is referred to as a normal subpixel.

When the normal subpixel is image-driven, the voltage of the second node N2 of the driving transistor DRT, which is floated in the boosting step after the image data writing step, turns off the non-shorted second transistor T2. Accordingly, it is not transferred to the reference voltage line (RVL).

However, when the defective subpixel is image-driven, the voltage of the second node N2 of the driving transistor DRT, which is floated in the boosting step after the image data writing step, is the voltage of the second transistor T2 to be turned off. By the short circuit of , it can be transferred to the reference voltage line (RVL).

10 shows that among four subpixels (SP1, SP2, SP3, and SP4) sharing one reference voltage line (RVL) in the organic light emitting display device 100 according to embodiments of the present invention, a defective subpixel exists. In this case, it is an equivalent circuit for four sub-pixels (SP1, SP2, SP3, and SP4), and FIGS. 11 and 12 show one reference voltage line in the organic light emitting display device 100 according to embodiments of the present invention. If there is a bad sub-pixel among 4 sub-pixels (SP1, SP2, SP3, SP4) that share (RVL), the sensing and compensation error caused by driving the bad sub-pixel and the line defect phenomenon that occurs accordingly These are drawings for explaining.

One or more of the four subpixels SP1 , SP2 , SP3 , and SP4 sharing one reference voltage line RVL may be defective subpixels.

In the example of FIG. 10 , among the four subpixels SP1 , SP2 , SP3 , and SP4 that share one reference voltage line RVL, the first subpixel SP1 has a defect in which the second transistor T2 is short-circuited. It is a sub-pixel.

If all four subpixels SP1, SP2, SP3, and SP4 sharing one reference voltage line RVL are normal subpixels, when the first subpixel SP1, which is a normal subpixel, is driven, an image During driving, since the second transistor T2 is turned off during the boosting stage and the light emitting stage, current does not flow from the first subpixel SP1 to the reference voltage line RVL.

However, when the first sub-pixel SP1 among the four sub-pixels SP1, SP2, SP3, and SP4 sharing one reference voltage line RVL is a defective sub-pixel in which the second transistor T2 is short-circuited. , similar to that turned on by a short circuit even in a situation where current should not flow from the first subpixel SP1 to the reference voltage line RVL when the first subpixel SP1, which is a defective subpixel, is driven. An abnormal current flows from the first subpixel SP1 to the reference voltage line RVL through the second transistor T2.

As shown in FIG. 10, a subpixel line (subpixel row) including four subpixels (SP1, SP2, SP3, and SP4) sharing a reference voltage line (RVL) is a defective subpixel line (defective subpixel). row) is It is assumed that the remaining subpixel lines (subpixel rows) except for the defective subpixel line (defective subpixel row) among all subpixel lines sharing the reference voltage line (RVL) are normal subpixel lines (normal subpixel rows). do. That is, it is assumed that only the first subpixel SP1 of FIG. 10 is a defective subpixel among all subpixels sharing the reference voltage line RVL in the organic light emitting display panel 110 .

Meanwhile, while the four subpixels SP1, SP2, SP3, and SP4 shown in FIG. 10 are display driven (image driven), all or some of the subpixels included in one subpixel line (subpixel row) may be real-time sensing (RT sensing).

One subpixel line (subpixel row) that becomes real-time sensing (RT sensing) may share a reference voltage line (RVL) with four subpixels (SP1, SP2, SP3, SP4) shown in FIG. , may be a defective subpixel line (defective subpixel row) including the four subpixels SP1, SP2, SP3, and SP4 shown in FIG. It may be a normal subpixel line (normal subpixel row) different from the defective subpixel line (defective subpixel row) including SP3 and SP4.

According to driving of the first sub-pixel SP1, which is a defective sub-pixel among the four sub-pixels SP1, SP2, SP3, and SP4, through the short-circuited second transistor T2 in the first sub-pixel SP1, An abnormal current flows into the reference voltage line RVL.

Accordingly, a sensing value for a subpixel in one subpixel line (subpixel row) that is real-time sensing (RT sensing) is affected.

More specifically, when real-time sensing (RT sensing) is mobility sensing, when a normal current flows from a subpixel for which mobility is sensed to the reference voltage line (RVL), an abnormality is caused by the driving of the first subpixel (SP1). As the current further flows into the reference voltage line RVL, a sensing value (RT sensing value) for mobility sensing for a subpixel to be mobility sensing increases.

Therefore, the compensation value is determined to be a low value by the abnormally high sensing value (RT sensing value). Accordingly, the subpixels affected by the driving of the defective subpixels appear as dark dots (hot dark, weak dark) when the image is driven. Here, a subpixel with an on-darkness is seen as completely black, and a subpixel with a weak darkness is seen as almost completely black.

As described above, the driving of the defective subpixel SP1 causes a sensing error for all subpixels sharing the reference voltage line RVL, and this sensing error (mobility sensing error) is a compensation error (movement error). This also leads to a compensation error), and eventually all subpixels sharing the reference voltage line (RVL) may generate a line defect (LD: Line Defect) that appears black.

The line defect LD may mean a phenomenon in which a black band-shaped block is visible. The line defect LD occurs in a column direction (vertical direction) in which the reference voltage line RVL is disposed. A width (length in a row direction) of a block corresponding to a line defect LD may be proportional to the number of subpixels sharing the reference voltage line RVL in one subpixel row. The length (length in the column direction) of the block corresponding to the line defect LD may be proportional to the length of the reference voltage line RVL or proportional to the number of subpixel rows sharing the reference voltage line RVL.

Referring again to FIG. 12, a first subpixel belonging to some second subpixel lines (second subpixel rows) among all subpixel lines (all subpixel rows) sharing one reference voltage line (RVL). Even if only the pixel SP1 is a defective subpixel, the driving effect of the first subpixel SP1 may propagate to all subpixels sharing the reference voltage line RVL with the first subpixel SP1.

That is, among all subpixel lines (all subpixel rows) sharing one reference voltage line RVL, only the first subpixels SP1 belonging to some second subpixel lines (second subpixel rows) are defective subpixels. Even if it is a pixel, all sub-pixels sharing the reference voltage line RVL to which the first sub-pixel SP1, which is a defective sub-pixel, are connected by the second transistor T2 short-circuited in the first sub-pixel SP1. Errors are generated in the sensing values (mobility sensing values) and compensation values (mobility compensation values) of the subpixels included in the pixel line (all subpixel rows), and eventually, the first subpixel SP1 that is a defective subpixel A line defect LD may occur in subpixels included in all subpixel lines (all subpixel rows) sharing the reference voltage line RVL to which ) is connected as dark spots (hot spots or weak spots).

For reference, a sensing error and a compensation error for the threshold voltage may not occur due to the defective subpixel. This is because the first transistor T1 is turned on in the tracking step S520 during threshold voltage sensing driving.

13 is a driving timing diagram for sensing threshold voltages for normal subpixels and defective subpixels in the organic light emitting display device 100 according to example embodiments.

Referring to FIG. 13, since the second transistor T2 is turned on in the tracking step (S520) during threshold voltage sensing driving, regardless of whether or not the second transistor T2 is short-circuited, the voltage of the driving transistor DRT The second node N2 and the reference voltage line RVL may be electrically connected.

Therefore, when sensing the threshold voltage of the normal subpixel in which the second transistor T2 is not short-circuited, the voltage change of the reference voltage line RVL and the threshold voltage of the defective subpixel in which the second transistor T2 is short-circuited are sensed. During sensing, the voltage change of the reference voltage line RVL is the same.

Therefore, it is impossible to distinguish between a normal subpixel in which the second transistor T2 is not short-circuited and a defective subpixel in which the second transistor T2 is short-circuited by using the threshold voltage sensing driving method. That is, threshold voltage sensing driving cannot be used as a method for detecting defective subpixels.

14 is a driving timing diagram for sensing mobility of a normal subpixel and a defective subpixel in the organic light emitting display device 100 according to embodiments of the present invention.

Referring to FIG. 14 , since the second transistor T2 is turned on in the tracking step (S620) during the mobility sensing drive, regardless of whether or not the second transistor T2 is short-circuited, the voltage of the driving transistor DRT The second node N2 and the reference voltage line RVL may be electrically connected.

Therefore, when the mobility of the normal subpixel in which the second transistor T2 is not short-circuited is sensed, the voltage change of the reference voltage line RVL and the mobility of the defective subpixel in which the second transistor T2 is short-circuited are sensed. During sensing, the voltage change of the reference voltage line RVL is the same.

Therefore, it is impossible to distinguish between a normal subpixel in which the second transistor T2 is not short-circuited and a defective subpixel in which the second transistor T2 is short-circuited using the mobility sensing driving method. That is, mobility sensing driving cannot be used as a method for detecting a defective subpixel.

15 is a circuit for preventing line defects in an organic light emitting display device 100 according to embodiments of the present invention, and FIG. 16 is a flowchart of a method for preventing line defects in an organic light emitting display device 100 according to embodiments of the present invention. 17 is a driving timing diagram for detecting defective subpixels of the organic light emitting display device 100 according to embodiments of the present invention, and FIGS. 18 and 19 are organic light emitting display devices according to embodiments of the present invention. In 100, when a first subpixel SP1 among four subpixels sharing one reference voltage line RVL is a defective subpixel, these are diagrams for explaining a line defect prevention operation and the resulting effect.

The organic light emitting display panel 110 includes four sub-pixels (SP1, SP2, SP3, and SP4) shown in FIG. 15 and arrangement of wires (DL1 to DL4, GL1 to GL2, DVL1 to DLV2, and RVL) in the area. Patterns can be repeated.

In order to improve the aperture ratio of the organic light emitting display panel 110, when one reference voltage line RVL is disposed in each of two or more sub-pixel columns, a plurality of reference voltage lines RVL disposed in the organic light emitting display panel 110 The number of may be less than the number of the plurality of data lines DL.

In this case, each reference voltage line RVL may be commonly connected to source nodes or drain nodes of second transistors T2 included in two or more subpixels.

According to the example of FIG. 15 , one reference voltage line RVL is disposed in four sub-pixel columns. In this case, in the organic light emitting display panel 110, the number of reference voltage lines RVL is 1/4 of the number of data lines DL.

Each reference voltage line RVL may be commonly connected to source nodes or drain nodes of the second transistors T2 included in the four sub-pixels SP1 , SP2 , SP3 , and SP4 .

Referring to FIG. 15 , the organic light emitting display device 100 according to example embodiments may include a switch circuit electrically connected to one reference voltage line RVL.

The switch circuit includes a sensing driving reference switch SPRE for controlling a connection between each reference voltage line RVL and a sensing driving reference voltage supply node Npres to which the reference voltage Vref is supplied, and each reference voltage line ( RVL) and an analog-to-digital converter (ADC) may include a sampling switch (SAMP) that controls the connection.

The switch circuit may further include a video image driving reference switch RPRE for controlling a connection between each reference voltage line RVL and a video image driving reference voltage supply node Nprer to which the reference voltage Vref is supplied.

The reference switch SPRE for sensing driving is a switch used for sensing driving. The reference voltage Vref supplied to the reference voltage line RVL by the sensing driving reference switch SPRE is the sensing driving reference voltage VpreS. The image driving reference switch RPRE is a switch used when driving an image. The reference voltage Vref supplied to the reference voltage line RVL by the image driving reference switch SPRE is the image driving reference voltage VpreR.

The reference switch for sensing driving (SPRE) and the reference switch for image driving (RPRE) may be provided separately or may be integrated into one. The reference voltage VpreS for sensing driving and the reference voltage VpreR for image driving may have the same voltage value or different voltage values.

Referring to FIG. 15 , the plurality of subpixels SP disposed on the organic light emitting display panel 110 are the first subpixels commonly supplied with the reference voltage Vref through the first reference voltage line RVL ( SP1 ), a second subpixel SP2 , a third subpixel SP3 , and a fourth subpixel SP4 may be included. Here, the first subpixel SP1 represents the first subpixel column, the second subpixel SP2 represents the second subpixel column, and the third subpixel SP3 represents the third subpixel column. and the fourth subpixel SP4 represents the fourth subpixel row.

When the second transistor T2 in the first sub-pixel SP1 is short-circuited, the data driving circuit DDC, during the driving period of the first sub-pixel SP1 (eg, the image driving period), The first specific data voltage OFF_Vdata for turning off the driving transistor DRT in the pixel SP1 may be supplied to the first subpixel SP1 through the first data line DL.

Accordingly, even when the first subpixel SP1, which is a defective subpixel, is driven, current does not flow from the first subpixel SP1 to the reference voltage line RVL, and thus the first subpixel SP1, which is a defective subpixel, and The subpixels SP2 , SP3 , and SP4 connected together to the reference voltage line RVL are not affected by the driving of the first subpixel SP1 , which is a defective subpixel. Accordingly, line defects LD may not occur.

During the driving period of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP2 connected to the first reference voltage line RVL together with the first subpixel SP1. Mobility sensing of the driving transistor DRT included in one of the pixels SP4 may be performed.

In addition, during the driving period of the first subpixel SP1, a subpixel different from the first to fourth subpixels SP1 to SP4 is connected to the first reference voltage line RVL together with the first subpixel SP1. Sensing the mobility of the driving transistor DRT in the subpixel included in the row may be performed.

As described above, during the driving period of the first subpixel SP1, which is a defective subpixel, a specific data voltage OFF_Vdata capable of being turned off by the driving transistor DRT in the first subpixel SP1 is applied to the first data line By being supplied to the first sub-pixel SP1 through DL1, during the driving period of the first sub-pixel SP1, the voltage for other sub-pixels connected to the reference voltage line RVL together with the first sub-pixel SP1 is increased. Mobility sensing may be performed without a sensing error.

Referring to FIG. 15 , in the organic light emitting display device 100 according to embodiments of the present invention, during the detection period of the defective subpixel, the second transistor T2 in the subpixel to be checked among the plurality of subpixels SP is short-circuited. Depending on whether or not the subpixel is checked, a defective subpixel detection circuit (DPDC) for detecting the subpixel to be checked as a defective subpixel may be further included.

While the second scan signal SENSE of the turn-off level voltage is being applied to the gate node of the second transistor T2 in the subpixel to be checked, the defective subpixel detection circuit DPDC is 2 It is determined whether the second transistor T2 in the subpixel to be checked is short-circuited based on whether or not the voltage of the reference voltage line RVL electrically connected to the source node or the drain node of the transistor T2 changes or the magnitude of the voltage change. can

When a defective subpixel in which the second transistor T2 is short-circuited is detected, the defective subpixel detection circuit DPDC may store location information of the defective subpixel in the memory MEM.

The controller 140 refers to the memory MEM and replaces the image data DATA to be supplied to the defective subpixel with specific image data OFF_DATA for turning off the driving transistor DRT in the defective subpixel. It can be output to the data driving circuit 120.

Accordingly, the data driving circuit 120 may convert the specific image data OFF_DATA into the specific data voltage OFF_Vdata through the digital-to-analog converter DAC and output the converted data voltage OFF_Vdata. Here, the specific data voltage OFF_Vdata is a data voltage for turning off the driving transistor DRT in the defective subpixel.

The defective subpixel detection circuit (DPDC) may be included inside the controller 140 . The memory MEM may be a register included in the controller 140 .

A specific data voltage (OFF_Vdata) for turning off the driving transistor DRT in the defective subpixel may change according to the elapse of time during which the defective subpixel is driven. When the threshold voltage or mobility of the driving transistor DRT in the defective sub-pixel changes, the specific data voltage OFF_Vdata capable of turning off the driving transistor DRT may also change.

Referring to FIG. 16 , the organic light emitting display device 100 according to example embodiments may provide a line defect prevention method.

To this end, the organic light emitting display device 100 performs driving to detect whether or not the subpixel to be checked is a defective subpixel (S1610).

The organic light emitting display device 100 determines whether or not the second transistor T2 in the subpixel to be checked is short-circuited according to the driving result for detecting the defective subpixel (S1620).

When the organic light emitting display device 100 determines that the second transistor T2 in the subpixel to be checked is shorted as a result of the determination in step S1620, the organic light emitting display device 100 detects the subpixel to be checked as a defective subpixel, and detects the detected defect. Position information of the subpixel is stored in the memory (MEM) (S1630), and when the defective subpixel is driven, a specific data voltage (OFF_Vdata) for preventing the line defect is supplied to the defective subpixel to perform line defect prevention driving. It can (S1640).

When it is determined that the second transistor T2 in the subpixel to be checked is not shorted as a result of the determination in step S1620, the organic light emitting display device 100 detects the subpixel to be checked as a normal subpixel (S1650). , normal driving may be performed when driving for normal subpixels (S1660).

Referring to FIG. 17 , the organic light emitting display device 100 selects a subpixel to be checked among a plurality of subpixels SP during a defective subpixel detection period according to whether or not the second transistor T2 in the subpixel to be checked is short-circuited. It is detected as a bad sub-pixel.

Accordingly, the organic light emitting display device 100 must determine whether the second transistor T2 in the subpixel to be checked is short-circuited in order to distinguish whether the subpixel to be checked is a defective subpixel.

The gate driving circuit 130 applies the second scan signal SENSE of the turn-off level voltage to the gate node of the second transistor T2 in the subpixel to be checked through the second gate line GL2 ( S1720).

At this time, the analog-to-digital converter ADC senses the voltage of the reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the subpixel to be checked, and senses the sensed voltage as a digital value. It is converted into a value and output (S1730).

The defective subpixel detection circuit (DPDC) determines whether or not the voltage of the reference voltage line (RVL) changes or the magnitude of the voltage change based on the sensing value output to the analog-to-digital converter (ADC), and based on this, determines the subpixel to be checked. It is possible to determine whether or not the second transistor T2 is short-circuited.

Referring to FIG. 17 , during the detection period of the defective subpixel, a first detection and driving step ( S1710 ), a second detection and driving step ( S1720 ), and a third detection and driving step ( S1730 ) may be included.

In the first detection and driving step ( S1710 ), the gate driving circuit 130 supplies the first scan signal SCAN of the turn-on level voltage to the gate node of the first transistor T1 in the subpixel to be checked. Accordingly, the data voltage for detection and driving is applied to the first node N1 of the driving transistor DRT. Here, the data voltage for detection and driving may be a data voltage corresponding to data (DATA+VTH) for which the threshold voltage (Vth) is compensated.

In the first detection and driving step ( S1710 ), the gate driving circuit 130 supplies the second scan signal SENSE of the turn-on level voltage to the gate node of the second transistor T2 in the subpixel to be checked. The reference switching (SPRE) for sensing drive is turned on. Accordingly, the sensing driving reference voltage VpreS is applied to the second node N2 of the driving transistor DRT.

In the first detection driving step (S1710), the sampling switch SAMP is turned off.

In the second detection and driving step (S1720), the gate driving circuit 130 supplies the first scan signal SCAN having a turn-off level voltage to the gate node of the first transistor T1 in the subpixel to be checked. Accordingly, the data voltage for detection and driving is not applied to the first node N1 of the driving transistor DRT, and the first node N1 of the driving transistor DRT is in a floating state.

In the second detection driving step (S1720), the reference switching SPRE for sensing driving is turned off. Accordingly, the reference voltage VpreS for sensing driving is not applied even to the reference voltage line RVL. Also, the second node N2 of the driving transistor DRT becomes a floating state.

In addition, in the second detection and driving step (S1720), the gate driving circuit 130 supplies the second scan signal SENSE of the turn-off level voltage to the gate node of the second transistor T2 in the subpixel to be checked. .

In the second detection driving step (S1720), the sampling switch SAMP is turned off.

During the second detection and driving step S1720, both the first node N1 and the second node N2 of the driving transistor DRT are in a floating state. Also, voltages of the first node N1 and the second node N2 of the driving transistor DRT increase.

If the subpixel to be checked is a normal subpixel in which the second transistor T2 is not short-circuited, during the second detection and driving step (S1720), the second transistor T2 outputs the turn-off level voltage applied to the gate node. Since it is turned off by the second scan signal SENSE, the rising voltage of the second node N2 of the driving transistor DRT is not transferred to the reference voltage line RVL.

Accordingly, when the subpixel to be checked is a normal subpixel, the voltage of the reference voltage line RVL does not vary.

If the subpixel to be checked is a defective subpixel in which the second transistor T2 is shorted, during the second detection and driving step S1720, the second scan signal ( SENSE) is applied to the gate node, but it is in an abnormal turn-on state due to a short circuit. Accordingly, the rising voltage of the second node N2 of the driving transistor DRT is transmitted to the reference voltage line RVL through the second transistor T2.

Accordingly, when the subpixel to be checked is a defective subpixel, voltage fluctuations may occur in the reference voltage line RVL.

After the second detection driving step ( S1720 ) has elapsed for a predetermined time, the third detection driving step ( S1730 ) may proceed.

In the third detection and driving step (S1730), only the sampling switch SAMP is turned on.

Accordingly, the analog-to-digital converter ADC is connected to the reference voltage line RVL through the turned-on sampling switch SAMP.

Therefore, the analog-to-digital converter ADC senses the voltage of the reference voltage line RVL, converts the sensed voltage into a sensed value corresponding to a digital value, and outputs the converted value.

Based on the sensed value, the defective subpixel detection circuit DPDC determines whether the voltage of the reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the subpixel to be checked changes or the size of the voltage change. It is possible to determine whether the second transistor T2 in the subpixel to be checked is short-circuited by checking .

Referring to the example of FIG. 15 , the defective subpixel detection circuit DPDC shorts the second transistor T2 in the first subpixel SP1 as a subpixel to be checked before the driving period of the first subpixel SP1. While the second scan signal SENSE of the turn-off level voltage is being applied to the gate node of the second transistor T2 in the first sub-pixel SP1 (S1720 to S1730), the first sub-pixel When it is confirmed that the voltage of the first reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the pixel SP1 increases, the second transistor T2 in the first subpixel SP1 ) is short-circuited, the first subpixel SP1 may be detected as a defective subpixel.

Referring to the example of FIG. 15 , the defective subpixel detection circuit DPDC performs a second scan of the turn-off level voltage at the gate node of the second transistor T2 in the second subpixel SP2 as the subpixel to be checked. While the signal SENSE is being applied (S1720 to S1730), the voltage of the first reference voltage line RVL electrically connected to the source node or drain node of the second transistor T2 in the second subpixel SP2 changes. When it is confirmed that there is no or the magnitude of voltage change is less than a predetermined threshold level, it is determined that the second transistor T2 in the second subpixel SP2 is not short-circuited, and the second subpixel SP2 is treated as a normal subpixel. can be detected.

In this case, the data driving circuit 120 turns off the driving transistor DRT in the first subpixel SP1 when the second subpixel SP2 is driven (sensing driven or image driven). 1 A specific data voltage (OFF_Vdata) may be supplied to the first subpixel SP1 through the first data line DL1. Accordingly, the second subpixel SP2 is not affected by the driving of the first subpixel SP1, which is a defective subpixel.

Referring to FIG. 18 , according to the above-described line defect prevention driving, the first specific data voltage OFF_Vdata for turning off the driving transistor DRT in the first sub-pixel SP1 that is a defective sub-pixel is applied to the first sub-pixel. When supplied to the pixel SP1, even if the other subpixels SP2, SP3, and SP4 connected to the reference voltage line RVL along with the first subpixel SP1 are sensing driven, the sensing value and the compensation value are normally Accordingly, image driving of the other subpixels SP2 , SP3 , and SP4 connected to the reference voltage line RVL together with the first subpixel SP1 may proceed normally.

17 and 18, the other subpixels SP2, SP3, and SP4 connected to the reference voltage line RVL along with the first subpixel SP1, which is a defective subpixel, are the first subpixel, which is a defective subpixel. It may be a defective subpixel line including (SP1) or a normal subpixel line different from the included defective subpixel line.

For example, it is assumed that there are a first subpixel SP1 and a second subpixel SP2 that can be connected in common with the first reference voltage line RVL, the first subpixel SP1 is a defective subpixel, and the second subpixel SP1 is a defective subpixel. When the 2 subpixels SP2 are normal subpixels, the first subpixel SP1 and the second subpixel SP2 may be arranged in the same subpixel row (same subpixel line), and in different subpixel rows. (different subpixel lines).

17 and 18, according to line defect prevention driving, a first specific data voltage OFF_Vdata for turning off the driving transistor DRT of the first sub-pixel SP1, which is a defective sub-pixel, is applied to the first sub-pixel. Since it is supplied to the pixel SP1, the first subpixel SP1 appears as a dark spot (hot spot). However, when compared with FIG. 11 , all other subpixels SP2 , SP3 , and SP4 connected to the reference voltage line RVL along with the first subpixel SP1 do not appear as dark dots but appear normal.

Meanwhile, the bad subpixel detection period may proceed before the power-on signal is generated and display driving starts, may proceed after the power-off signal is generated, or may proceed in real time during display driving.

In other words, referring to FIG. 7 , the defective subpixel detection operation may be performed as an on-sensing process, an off-sensing process, or a real-time sensing process.

When the defective subpixel detection operation proceeds as an on-sensing process, the organic light emitting display device 100 may newly start display driving normally without being affected by the defective subpixel.

When the defective subpixel detection operation proceeds as an off-sensing process, the organic light emitting display device 100 can perform the defective subpixel detection operation without affecting the display, and since there is time, all subpixel detection operations are performed. There is an advantage to being able to perform detection operations on pixels.

When the detection of the defective subpixels is carried out as a real-time sensing process, there is an advantage in that the defective subpixels can be promptly dealt with as soon as they occur.

Meanwhile, referring to FIG. 15 , a recovery step ( S1740 ) may be performed after the third detection and driving step ( S1730 ) is performed in the bad subpixel detection period.

In the recovery step S1740, the first transistor T1 is turned on by the first scan signal SCAN of the turn-on level voltage, and the data voltage Vdata is applied to the first node of the driving transistor DRT ( delivered to N1).

In the recovery step S1740, the data voltage Vdata transmitted to the first node N1 of the driving transistor DRT may be a data voltage obtained by converting the black data BLK.

In the recovery step S1740, the data voltage into which the black data BLK is converted may be applied, and then the data voltage into which the recovery data REC is converted may be applied to the first node N1 of the driving transistor DRT. . The recovery data REC may be data corresponding to the image data DATA supplied to the corresponding subpixel SP before the defective subpixel detection operation.

In the recovery step S1740, the second transistor T2 is turned on by the second scan signal SENSE of the turn-on level voltage. And, the image driving reference switch RPRE is turned on. Accordingly, the reference voltage VpreR supplied to the reference voltage line RVL is applied to the second node N2 of the driving transistor DRT through the second transistor T2.

20 and 21 are diagrams illustrating a data driving circuit 120 according to embodiments of the present invention.

Referring to FIG. 20 , a data driving circuit 120 according to embodiments of the present invention includes a latch circuit 2010 that stores input image data DATA and converts the image data DATA into analog signals. A digital-to-analog conversion circuit 2020 and data voltages Vdata corresponding to analog signals are converted to n data lines DL (where n is a natural number equal to or greater than 4) and n data channels DCH1 to DCHn corresponding to the analog signals. An output circuit 2030 for outputting may be included.

The latch circuit 2010 may include n or more than 2n latches. One or more latches may correspond to each of the n data channels DCH1 to DCHn.

The digital-to-analog conversion circuit 2020 may include n digital-to-analog converters (DACs) corresponding to n data channels DCH1 to DCHn.

The output circuit 2030 may include n output buffers corresponding to n data channels DCH1 to DCHn.

Referring to FIG. 20 , the data driving circuit 120 according to embodiments of the present invention converts the voltages of m (m is a natural number equal to or greater than 1) reference voltage lines RVL into digital values and outputs the converted analog to digital values. A switch circuit 2050 connected between the circuit 2040, the m reference channels RCH1 to RCHm corresponding to the m reference voltage lines RVL, and the analog-to-digital conversion circuit 2040 may be included.

Referring to FIG. 21 , the analog-to-digital conversion circuit 2040 may include m analog-to-digital converters (ADCs) corresponding to m reference channels RCH1 to RCHm.

Referring to FIG. 21 , the switch circuit 2050 includes a sensing driving reference switch (which controls the connection between each reference voltage line RVL and a sensing driving reference voltage supply node Npres to which the reference voltage Vref is supplied). SPRE) and a sampling switch (SAMP) for controlling the connection between each reference voltage line (RVL) and the analog-to-digital converter (ADC).

The switch circuit 2050 may further include a video image driving reference switch RPRE for controlling a connection between each reference voltage line RVL and the image driving reference voltage supply node Nprer to which the reference voltage Vref is supplied. can

The reference switch SPRE for sensing driving is a switch used for sensing driving. The reference voltage Vref supplied to the reference voltage line RVL by the sensing driving reference switch SPRE is the sensing driving reference voltage VpreS. The image driving reference switch RPRE is a switch used when driving an image. The reference voltage Vref supplied to the reference voltage line RVL by the image driving reference switch SPRE is the image driving reference voltage VpreR.

The reference switch for sensing driving (SPRE) and the reference switch for image driving (RPRE) may be provided separately or may be integrated into one. The reference voltage VpreS for sensing driving and the reference voltage VpreR for image driving may have the same voltage value or different voltage values.

The number of reference channels (m) may be less than the number of data channels (n). For example, the number n of data channels may be an integer multiple of 2 or more of the number m of reference channels. That is, n=k*m (k is a natural number greater than or equal to 2).

Each of the m reference voltage lines RVL may be connected in common to source nodes or drain nodes of second transistors T2 included in two or more subpixels SP.

The plurality of subpixels SP includes a first subpixel SP1 and a second subpixel (SP1) commonly supplied with a reference voltage Vref through a first reference voltage line RVL among m reference voltage lines RVL ( SP2) may be included.

When the second transistor T2 in the first subpixel SP1 is short-circuited, the driving transistor DRT in the first subpixel SP1 is turned off during the driving period of the first subpixel SP1. A first specific data voltage (OFF_Vdata) to be output to the first data line DL1 may be supplied to the first subpixel SP1.

During the driving period (image driving period or sensing driving period) of the first subpixel SP1, the analog-to-digital conversion circuit 2040 is connected to the first reference voltage line RVL together with the first subpixel SP1. The increased voltage of the second node N2 of the driving transistor DRT in the two sub-pixels SP2 may be sensed through the first reference voltage line RVL. Here, the sensed voltage may be a voltage that reflects mobility (see FIG. 6).

The second transistor T2 in the second subpixel SP2 is not short-circuited, and when the second subpixel SP2 is driven (sensing driven or image driven), the driving transistor in the first subpixel SP1 ( The first specific data voltage OFF_Vdata for turning off the DRT may be supplied to the first subpixel SP1 through the first data line DL1.

22 is a diagram illustrating a controller 140 according to embodiments of the present invention.

Referring to FIG. 22 , the controller 140 according to embodiments of the present invention includes a first reference voltage Vref commonly supplied through a first reference voltage line RVL among a plurality of subpixels SP. A memory MEM that stores information about the short-circuit of the second transistor T2 in the first sub-pixel SP1 among the sub-pixel SP1 and the second sub-pixel SP2 or location information of the first sub-pixel SP1 And, referring to the memory MEM, when the second transistor T2 in the first subpixel SP1 is short-circuited, the first subpixel SP1 during the driving period of the first subpixel SP1 Image data to be supplied to the data driving circuit 120 by replacing the image data DATA with first specific image data OFF_DATA for turning off the driving transistor DRT in the first subpixel SP1. A supply device (VDS) and the like may be included.

During the driving period of the first subpixel SP1, the mobility sensing of the driving transistor DRT in the second subpixel SP2 connected to the first reference voltage line RVL together with the first subpixel SP1 is performed. can

Referring to FIG. 22 , the controller 140 according to embodiments of the present invention determines whether or not the second transistor T2 is shorted in a subpixel to be checked among a plurality of subpixels SP during a defective subpixel detection period. A defective subpixel detection circuit (DPDC) for detecting whether or not the subpixel to be verified is a defective subpixel may be further included.

While the second scan signal SENSE of the turn-off level voltage is being applied to the gate node of the second transistor T2 in the subpixel to be checked, the defective subpixel detection circuit DPDC is 2 It is determined whether the second transistor T2 in the subpixel to be checked is short-circuited based on whether or not the voltage of the reference voltage line RVL electrically connected to the source node or the drain node of the transistor T2 changes or the magnitude of the voltage change. can

23 and 24 are flowcharts of a method of driving the organic light emitting display device 100 according to example embodiments.

Referring to FIG. 23 , the driving method of the organic light emitting display device 100 according to example embodiments may include a normal driving step (S2310) and a line defect preventing step (S2330).

In the normal driving step (S2310), the data driving circuit 120 of the organic light emitting display device 100 shares the reference voltage Vref through the first reference voltage line RVL among the plurality of subpixels SP. During the driving period of the first sub-pixel SP1 among the first and second sub-pixels SP1 and SP2 being supplied, the data voltage Vdata for image driving is supplied through the first data line DL1. It can be supplied with 1 subpixel (SP1).

In the line defect prevention step S2330, the data driving circuit 120 of the organic light emitting display device 100, when the second transistor T2 in the first subpixel SP1 is short-circuited, the first subpixel ( During the driving period of SP1, the first specific data voltage OFF_Vdata for turning off the driving transistor DRT in the first subpixel SP1 is transmitted through the first data line DL1 to the first subpixel SP1. ) can be supplied.

In the line defect prevention step ( S2330 ), the mobility of the driving transistor DRT in the first subpixel SP1 and the second subpixel SP2 connected to the first reference voltage line RVL may be sensed.

Referring to FIG. 23 , in the driving method of the organic light emitting display device 100 according to embodiments of the present invention, between a normal driving step (S2310) and a line defect preventing step (S2330), a plurality of subpixels (SP) A defective subpixel for detecting whether or not the first subpixel SP1, a subpixel to be checked, is a defective subpixel by determining whether the second transistor T2 in the first subpixel SP1, which is a subpixel to be checked, is short-circuited. A detection step (S2320) may be further included.

In the defective subpixel detection step S2320, the defective subpixel detection circuit DPDC outputs a second scan signal SENSE having a turn-off level voltage to the gate node of the second transistor T2 in the first subpixel SP1. ) is being applied, based on whether the voltage of the first reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the first subpixel SP1 changes or the size of the voltage change. , it is possible to determine whether or not the second transistor T2 in the subpixel to be checked is short-circuited.

While the second scan signal SENSE of the turn-off level voltage is being applied to the gate node of the second transistor T2 in the first subpixel SP1, the defective subpixel detection circuit DPDC is configured to detect the first subpixel SP1. When it is confirmed that the voltage of the first reference voltage line RVL electrically connected to the source node or the drain node of the second transistor T2 in the pixel SP1 increases, the second transistor T2 in the first subpixel SP1 ) is determined to be short-circuited, the first subpixel SP1 may be detected as a defective subpixel.

Referring to FIG. 24 , the defective subpixel detection step (S2320) includes a first detection and driving step (S1710), a second detection and driving step (S1720), a third detection and driving step (S1730), and a sensing value acquisition step (S2410). and determining whether the second transistor T2 is short-circuited (S2420).

In the first detection and driving step ( S1710 ), the gate driving circuit 130 supplies the first scan signal SCAN of the turn-on level voltage to the gate node of the first transistor T1 in the subpixel to be checked. The gate driving circuit 130 supplies the second scan signal SENSE of the turn-on level voltage to the gate node of the second transistor T2 in the subpixel to be checked. The reference switching (SPRE) for sensing drive is turned on. The sampling switch (SAMP) is turned off.

Here, the sensing driving reference switching SPRE and the sampling switch SAMP may be connected to a reference voltage line RVL electrically connected to a source node or a drain node of the second transistor T2 in the subpixel to be checked.

In the second detection and driving step (S1720), the gate driving circuit 130 supplies the first scan signal SCAN having a turn-off level voltage to the gate node of the first transistor T1 in the subpixel to be checked. The second scan signal SENSE of the turn-off level voltage is supplied to the gate node of the second transistor T2 in the subpixel to be checked. The reference switching SPRE for sensing drive is turned off, and the sampling switch SAMP is turned off.

In the third detection and driving step ( S1730 ), the gate driving circuit 130 supplies the first scan signal SCAN having a turn-off level voltage to the gate node of the first transistor T1 in the subpixel to be checked. The second scan signal SENSE of the turn-off level voltage is supplied to the gate node of the second transistor T2 in the subpixel to be checked. The reference switching SPRE for sensing driving is turned off, and the sampling switch SAMP is turned on.

In the sensing value acquisition step (S2410), the analog-to-digital converter (ADC) is connected to the reference voltage line (RVL) through the turned-on sampling switch (SAMP), and senses the voltage of the reference voltage line (RVL) to obtain the sensed It converts the voltage into a sensed value corresponding to a digital value and outputs it.

In the step of determining whether the second transistor T2 is short-circuited ( S2420 ), the defective subpixel detection circuit DPDC electrically connects the source node or drain node of the second transistor T2 in the subpixel to be checked based on the sensed value. It is possible to determine whether the second transistor T2 in the sub-pixel to be checked is short-circuited by checking whether or not the voltage change or the magnitude of the voltage change of the reference voltage line RVL connected to .

The defective subpixel detection circuit DPDC may detect the subpixel to be checked as a defective subpixel when it is determined that the second transistor T2 in the subpixel to be checked is short-circuited.

The defective subpixel detection circuit DPDC may detect the subpixel to be checked as a normal subpixel when it is determined that the second transistor T2 in the subpixel to be checked is not short-circuited.

According to the embodiments of the present invention described above, an organic light emitting display device 100, a data driving circuit 120, a controller 140, and a driving method capable of improving image quality by preventing line defects (LD) are provided. can provide

According to embodiments of the present invention, an organic light emitting display device 100 capable of detecting a defective subpixel causing a line defect LD, a data driving circuit 120, a controller 140, and a driving method are provided. can

According to embodiments of the present invention, an organic light emitting display device 100 capable of improving image quality by preventing a sensing and compensation error of other normal subpixels from occurring due to driving of a defective subpixel, and a data driving circuit 120, a controller 140 and a driving method can be provided.

The above description and accompanying drawings are merely illustrative of the technical idea of the present invention, and those skilled in the art can combine the configuration within the scope not departing from the essential characteristics of the present invention. , various modifications and variations such as separation, substitution and alteration will be possible. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. The protection scope of the present invention should be construed according to the following claims, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

100: organic light emitting display device
110: organic light emitting display panel
120: data driving circuit
130: gate driving circuit
140: controller

Claims (21)

an organic light emitting display panel on which a plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are disposed, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged in a matrix type;
a data driving circuit for driving the plurality of data lines;
a gate driving circuit for driving the plurality of gate lines; and
A controller for controlling the data driving circuit and the gate driving circuit;
Each of the plurality of subpixels,
An organic light emitting diode, a driving transistor for driving the organic light emitting diode, and a first transistor controlled by a first scan signal and electrically connected between a first node of the driving transistor and one of the plurality of data lines. and a second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line among the plurality of reference voltage lines, and between the first node and the second node. a capacitor electrically connected to
The number of the plurality of reference voltage lines is less than the number of the plurality of data lines, and each of the plurality of reference voltage lines is commonly connected to source nodes or drain nodes of second transistors included in two or more subpixels;
Further comprising a reference switch controlling a connection between each of the plurality of reference voltage lines and a reference voltage supply node to which a reference voltage is supplied, and a sampling switch controlling a connection between each of the plurality of reference voltage lines and an analog-to-digital converter,
When a second transistor in a first sub-pixel among two or more sub-pixels commonly supplied with a reference voltage through a first reference voltage line is short-circuited, the data driving circuit
An organic light emitting display device supplying a first specific data voltage for turning off a driving transistor in the first subpixel to the first subpixel through a first data line during a driving period of the first subpixel.
According to claim 1,
During the driving period of the first subpixel,
An organic light emitting display device in which mobility sensing of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel is performed.
According to claim 1,
and a defective subpixel detection circuit for detecting the subpixel to be checked as a defective subpixel according to whether a second transistor in the subpixel to be checked is short-circuited among the plurality of subpixels during a predefined defective subpixel detection period. ,
The defective subpixel detection circuit,
While the second scan signal of the turn-off level voltage is being applied to the gate node of the second transistor in the subpixel to be checked,
Determining whether or not the second transistor in the subpixel to be checked is short-circuited based on whether or not the voltage of a reference voltage line electrically connected to the source node or the drain node of the second transistor in the subpixel to be checked is changed or the size of the voltage change. light emitting display.
According to claim 3,
The defective subpixel detection circuit,
determining whether a second transistor in the first subpixel is short-circuited as the subpixel to be checked before a driving period of the first subpixel;
While the second scan signal having the turn-off level voltage is being applied to the gate node of the second transistor in the first subpixel, the first subpixel is electrically connected to the source node or drain node of the second transistor in the first subpixel. 1. The organic light emitting display device detecting the first subpixel as a defective subpixel by determining that a second transistor in the first subpixel is short-circuited when it is confirmed that the voltage of the reference voltage line has increased.
According to claim 3,
The defective subpixel detection circuit,
When the second subpixel connected to the first reference voltage line together with the first subpixel is the subpixel to be checked, the second scan of the turn-off level voltage is applied to the gate node of the second transistor in the second subpixel. While the signal is being applied,
When it is confirmed that there is no voltage change of the first reference voltage line electrically connected to a source node or a drain node of a second transistor in the second subpixel or that the magnitude of the voltage change is less than or equal to a predetermined threshold level,
The organic light emitting display device detects the second subpixel as a normal subpixel by determining that the second transistor in the second subpixel is not short-circuited.
According to claim 5,
The data driving circuit,
An organic light emitting display device supplying a first specific data voltage to turn off a driving transistor in the first subpixel to the first subpixel through the first data line when the second subpixel is driven.
According to claim 3,
The defective subpixel detection period,
The power-on signal occurs and proceeds before the display drive starts,
It proceeds after the power off signal occurs, or
An organic light emitting display that progresses in real time while the display is running.
According to claim 1,
A data voltage for turning on a driving transistor is applied to a second subpixel connected to the first reference voltage line together with the first subpixel during a driving period;
The second subpixel is disposed in the same subpixel row as the first subpixel.
According to claim 1,
A data voltage for turning on a driving transistor is applied to a second subpixel connected to the first reference voltage line together with the first subpixel during a driving period;
The second subpixel is disposed in a different subpixel row from the first subpixel.
According to claim 1,
a memory configured to store location information of a defective subpixel in which the second transistor is short-circuited;
The controller,
An organic light emitting display device for replacing image data to be supplied to the defective subpixel with specific image data for turning off a driving transistor in the defective subpixel with reference to the memory and outputting the image data to the data driving circuit.
According to claim 1,
The first specific data voltage is changed over time.
An organic light emitting diode, a driving transistor for driving the organic light emitting diode, a first transistor controlled by a first scan signal and electrically connected between a first node of the driving transistor and one of a plurality of data lines; , A second transistor controlled by a second scan signal and electrically connected between the second node of the driving transistor and one reference voltage line among a plurality of reference voltage lines, and electrically connected between the first node and the second node. In a data driving circuit electrically connected to an organic light emitting display panel in which a plurality of subpixels including capacitors connected to are arranged,
a latch circuit for storing input image data;
a digital-to-analog conversion circuit that converts the image data into analog signals;
an output circuit for outputting data voltages corresponding to the analog signals to n data lines and corresponding n (n is a natural number equal to or greater than 2) data channels;
an analog-to-digital conversion circuit for converting voltages of m (m is a natural number equal to or greater than 1) reference voltage lines into digital values and outputting the converted digital values; and
A switch circuit connected between m reference channels corresponding to the m reference voltage lines and the analog-to-digital conversion circuit;
wherein n is an integer multiple of 2 or more of m,
Each of the m reference voltage lines is connected in common with source nodes or drain nodes of second transistors included in two or more subpixels;
When a second transistor in a first subpixel among two or more subpixels commonly supplied with a reference voltage through a first reference voltage line among the m reference voltage lines is shorted,
A data driving circuit in which a first specific data voltage for turning off a driving transistor in the first subpixel is output to a first data line and supplied to the first subpixel during a driving period of the first subpixel.
According to claim 12,
During the driving period of the first subpixel, the analog-to-digital conversion circuit,
A data driving circuit for sensing an increased voltage of a second node of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel through the first reference voltage line.
According to claim 12,
When a second transistor in a second subpixel connected to the first reference voltage line together with the first subpixel is unshorted and the second subpixel is driven,
A data driving circuit in which a first specific data voltage for turning off a driving transistor in the first subpixel is supplied to the first subpixel through the first data line.
A plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are disposed, a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged in a matrix type, and the plurality of subpixels Each is controlled by an organic light emitting diode, a driving transistor for driving the organic light emitting diode, and a first scan signal and electrically connected between a first node of the driving transistor and one of the plurality of data lines. a first transistor; a second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line among the plurality of reference voltage lines; A method of driving an organic light emitting display device including an organic light emitting display panel having capacitors electrically connected between nodes, comprising:
During a driving period of a first subpixel among two or more subpixels that are commonly supplied with a reference voltage through a first reference voltage line among the plurality of subpixels, a data voltage for driving an image is supplied to the first subpixel through a first data line. A normal driving step for supplying subpixels; and
When the second transistor in the first subpixel is short-circuited, a first specific data voltage for turning off the driving transistor in the first subpixel is applied to the first data line during the driving period of the first subpixel. and preventing a line defect from being supplied to the first sub-pixel through a line defect.
According to claim 15,
In the line defect prevention step,
A method of driving an organic light emitting display device in which mobility sensing of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel is performed.
According to claim 15,
Between the normal driving step and the line defect preventing step,
Defective subpixel detection for detecting whether or not the first subpixel, which is the subpixel to be checked, is a defective subpixel by determining whether or not the second transistor in the first subpixel, which is the subpixel to be checked, is short-circuited among the plurality of subpixels. Including more steps,
In the detecting of the defective subpixel,
While the second scan signal having the turn-off level voltage is applied to the gate node of the second transistor in the first subpixel, the first subpixel electrically connected to the source node or drain node of the second transistor in the first subpixel. Based on whether or not the voltage of the reference voltage line changes or the magnitude of the voltage change, whether or not the second transistor in the subpixel to be checked is short-circuited is determined;
While the second scan signal having the turn-off level voltage is being applied to the gate node of the second transistor in the first subpixel, the first subpixel is electrically connected to the source node or drain node of the second transistor in the first subpixel. 1. A method of driving an organic light emitting display device, determining that a second transistor in the first subpixel is short-circuited when it is confirmed that the voltage of the reference voltage line has risen, and detecting the first subpixel as a defective subpixel.
According to claim 17,
In the detecting of the defective subpixel,
A first scan signal of a turn-on level voltage is supplied to a gate node of a first transistor in the first subpixel, and a second scan signal of a turn-on level voltage is supplied to a gate node of a second transistor in the first subpixel. and turns on a reference switch connected to a first reference voltage line electrically connected to the source node or drain node of a second transistor in the first subpixel, and the source node of the second transistor in the first subpixel or a first step of turning off a sampling switch connected to a first reference voltage line electrically connected to the drain node;
After the first step, a first scan signal having a turn-off level voltage is supplied to a gate node of a first transistor in the first subpixel, and a turn-off level voltage is supplied to a gate node of a second transistor in the first subpixel. Supplying a second scan signal of voltage, turning off a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in the first subpixel, a second step of turning off a sampling switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor;
After the second step, a first scan signal having a turn-off level voltage is supplied to a gate node of a first transistor in the first subpixel, and a turn-off level voltage is supplied to a gate node of a second transistor in the first subpixel. Supplying a second scan signal of voltage, turning off a reference switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor in the first subpixel, a third step of turning on a sampling switch connected to a first reference voltage line electrically connected to a source node or a drain node of a second transistor;
a fourth step of sensing a voltage of a first reference voltage line electrically connected through an analog-to-digital converter and converting the sensed voltage into a sensed value corresponding to a digital value when the sampling switch is turned on; and
A fifth step of detecting whether or not the first subpixel is a defective subpixel by determining whether or not the second transistor is short-circuited by checking whether or not the voltage of the first reference voltage line has changed or the magnitude of the voltage change based on the sensed value. A method of driving an organic light emitting display device comprising:
A plurality of data lines, a plurality of gate lines, and a plurality of reference voltage lines are disposed, a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged in a matrix type, and the plurality of subpixels Each is controlled by an organic light emitting diode, a driving transistor for driving the organic light emitting diode, and a first scan signal and electrically connected between a first node of the driving transistor and one of the plurality of data lines. a first transistor; a second transistor controlled by a second scan signal and electrically connected between a second node of the driving transistor and one reference voltage line among the plurality of reference voltage lines; A controller of an organic light emitting display device having a capacitor electrically connected between nodes, the controller comprising:
Storing information that a second transistor in a first sub-pixel among two or more sub-pixels commonly supplied with a reference voltage through a first reference voltage line among the plurality of reference voltage lines is short-circuited or location information of the first sub-pixel Memory; and
With reference to the memory, when the second transistor in the first subpixel is short-circuited, during the driving period of the first subpixel, image data to be supplied to the first subpixel is driven in the first subpixel. A controller of an organic light emitting display device including an image data supply unit that replaces a transistor with first specific image data that causes a transistor to be turned off and outputs the image data to a data driving circuit.
According to claim 19,
A controller of an organic light emitting display device in which mobility of a driving transistor in a second subpixel connected to the first reference voltage line together with the first subpixel is sensed during a driving period of the first subpixel.
According to claim 19,
a defective subpixel detection circuit for detecting whether or not the subpixel to be checked is a defective subpixel according to whether a second transistor in the subpixel to be checked is short-circuited among the plurality of subpixels during a defective subpixel detection period;
The defective subpixel detection circuit,
While the second scan signal of the turn-off level voltage is being applied to the gate node of the second transistor in the subpixel to be checked,
Determining whether or not the second transistor in the subpixel to be checked is short-circuited based on whether or not the voltage of a reference voltage line electrically connected to the source node or the drain node of the second transistor in the subpixel to be checked is changed or the size of the voltage change. A controller for a light emitting display device.

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