KR20190002394A - Light emitting device emiting near-uv rays and iii-nitride semiconductor template used for the smae - Google Patents

Abstract

Disclosed are a near-UV (300~400 nm) light emitting semiconductor light emitting element and a group III nitride semiconductor template used for the same which are capable of manufacturing commercially the same. The near-UV light emitting semiconductor light emitting element and a group III nitride semiconductor template used for the same comprises: a seed layer of Al_xGa(1_x)N (0 < x < = 1, x > y); and a single crystal group III nitride semiconductor layer of Al_yGa(1_y)N (y > 0).

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a near-ultraviolet light emitting semiconductor light emitting device and a III-

This disclosure generally relates to near-ultraviolet light emitting semiconductor light emitting devices and III-nitride semiconductor templates used therein. In particular, the present invention relates to a near-ultraviolet light emitting semiconductor light emitting device using AlGaN and a III-nitride semiconductor template used therein. Here, the semiconductor light emitting element means a semiconductor light emitting element that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting element. The Group III nitride semiconductor is made of a compound of Al (x) Ga (y) In (1-xy) N (0? X? 1, 0? Y? 1, 0? X + y? Mg, and the like.

Herein, the background art relating to the present disclosure is provided, and these are not necessarily meant to be known arts.

1 is a diagram showing an example of a method for growing a Group III nitride semiconductor layer disclosed in U.S. Patent No. 5,290,393, wherein a growth substrate 10 is formed of Al _x Ga _1-x N (x? 0) A seed layer 20 is grown, and then a Group III nitride semiconductor layer 21 made of Al _y Ga _1-y N (y? 0) is grown. For example, a seed layer 20 made of GaN is formed at a temperature of 500 ° C, and then a Group III nitride semiconductor layer 21 made of GaN is formed at a temperature of 1020 ° C. This technology also shows examples of growing a seed layer 20 containing Al and a group III nitride semiconductor layer 21 containing Al. However, in the case of actually growing a Group III nitride semiconductor light emitting device (e.g., LED, LD) There is a limitation in growing the III-nitride semiconductor layer 21 including Al by the method disclosed in this patent.

FIG. 2 is a view showing an example of a III-nitride semiconductor light-emitting device disclosed in U.S. Patent No. 7,759,140. The semiconductor light-emitting device includes a growth substrate 10, a seed layer (not shown), an n-type III nitride semiconductor layer An active layer 40 (InGaN / (In) GaN multiple quantum well structure) that generates light by recombination of electrons and holes, a p-type III nitride semiconductor layer 50 (Mg-doped GaN a p-side electrode 70, and an n-side electrode 80, respectively. The material constituting the seed layer, the n-type III nitride semiconductor layer 30 and the p-type III nitride semiconductor layer 50 is GaN, and the growth substrate 10 (for example, a C-plane sapphire substrate) And a growth substrate 11 is formed. This growth substrate is referred to as PSS (Patterned Sapphire Substrate).

BACKGROUND ART Group III nitride semiconductor light-emitting devices used mainly for blue light or green light emission have recently attracted attention as a semiconductor light-emitting device that emits ultraviolet light. Ultraviolet rays can be divided into UVA (315 to 400 nm), UVB (280 to 315 nm), and UVC (100 to 280 nm), and the present invention is mainly directed to the near-ultraviolet region (300 to 400 nm).

However, there is a limitation in applying the epitaxial structure of a conventional blue light-emitting III-nitride semiconductor light-emitting device to a near-ultraviolet light-emitting semiconductor light-emitting device. For example, in the case of near-ultraviolet light having a wavelength of 365 nm, a problem occurs that a part is absorbed in GaN (band gap energy: 3.4 eV).

Therefore, in manufacturing a near-ultraviolet light-emitting Group III nitride semiconductor light-emitting device, it is necessary to minimize the content of GaN. However, as described above with reference to FIG. 1, It is generally not easy to grow the Group III nitride semiconductor layer 21. In the conventional case, after growing a Group III nitride semiconductor layer 21 of good quality made of GaN in contact with the growth substrate 10, A technique of growing a near-ultraviolet light-emitting Group III nitride semiconductor light-emitting structure and removing the growth substrate 10 and the Group III nitride semiconductor layer 21 made of GaN is proposed. The semiconductor light emitting device in which the growth substrate 10 is removed in this manner is called a vertical chip.

For example, U.S. Patent No. 7,759,146 discloses that it is not easy to grow a high-quality layer containing Al on a growth substrate (the growth rate is slowed as the content of Al increases, the content of Al increases A stress is increased in the Al-containing layer and cracks are generated in the case of a thick AlGaN layer, etc.). In order to solve this problem, an ultraviolet light emitting epitaxial structure is grown on the GaN layer, Is removed as a sacrificial layer together with the growth substrate.

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, in a III-nitride semiconductor template for a near-ultraviolet (300-400 nm) light emitting semiconductor light emitting device, a growth substrate; A seed layer of Al _x Ga _1-x N (0 < x &lt; ₁ , x &gt;y); And a single-crystal III-nitride semiconductor layer of Al _y Ga _1-y N (y> 0).

According to another aspect of the present disclosure, there is provided a near-ultraviolet (300-400 nm) light emitting semiconductor light emitting device comprising: a growth substrate; A seed layer of Al _x Ga _1-x N (0 < x? 1); A single crystal III-nitride semiconductor layer of Al _y Ga _1-y N (y>0); A light emitting structure that emits near ultraviolet rays through recombination of electrons and holes on the Group III nitride semiconductor layer; A first electrode for supplying electrons and holes to the light emitting structure; And an Al composition value y of the Group III nitride semiconductor layer is determined so that the Group III nitride semiconductor layer does not absorb near ultraviolet light emitted from the light emitting structure. / RTI &gt;

This will be described later in the Specification for Implementation of the Invention.

1 is a diagram showing an example of a method for growing a Group III nitride semiconductor layer disclosed in U.S. Patent No. 5,290,393,
2 is a view showing an example of a Group III nitride semiconductor light-emitting device disclosed in U.S. Patent No. 7,759,140,
3 is a diagram showing an example of a Group III nitride semiconductor template according to the present disclosure,
4 is a diagram showing an example of a method of manufacturing a Group III nitride semiconductor template according to the present disclosure,
5 is a diagram showing another example of a Group III nitride semiconductor template according to the present disclosure,
6 is a photograph showing an example of a group III nitride semiconductor layer in which crystal growth is not performed well on the concavities and convexities,
7 is a diagram showing experimental results for a Group III nitride semiconductor template produced according to the present disclosure,
8 is a view showing an example of a near-ultraviolet light emitting semiconductor light emitting device according to the present disclosure,
9 is a view showing another example of a near-ultraviolet light emitting semiconductor light emitting device according to the present disclosure,
10 is a view showing the results of integration test of the near-ultraviolet light emitting semiconductor light emitting device shown in FIG.

3 is a diagram showing an example of a III-nitride semiconductor template according to the present disclosure. The template includes a growth substrate 10, a nucleation layer 20, and a III-nitride semiconductor layer 21.

For example, a sapphire (Al ₂ O ₃ ) substrate may be used, and the seed layer 20 and the Group III-V nitride semiconductor layer The growth of the nitride semiconductor layer 21 is generally performed on the C-plane of the sapphire substrate.

The seed layer 20 is a layer introduced for crystal growth of the Group III nitride semiconductor layer 21 on a growth substrate 10 made of a dissimilar material and composed of Al _x Ga _1-x N (0 <x? 1) And is generally grown at a temperature lower than the growth temperature of the Group III nitride semiconductor layer 21. As the content of Al increases, the absorption of light generated in the active layer can be reduced. From this perspective, AlN is most preferred.

The Group III nitride semiconductor layer 21 is preferably made of Al _y Ga _1-y N (y> 0) and has a band gap energy that does not absorb light emitted from the light emitting structure grown thereon. For example, when near-ultraviolet light of 365 nm is emitted, it may be made of Al _0.05 Ga _0.95 N. The bandgap energy becomes large because the content of Al is large. However, as described above, since the crystallinity of the Group III nitride semiconductor layer 21 may be adversely affected, the crystallinity is badly influenced by the extent of not absorbing the emitted light Is minimized. The III nitride semiconductor layer 21 may include a dopant such as Si or Mg or In as a constituent material, but is not preferable from the viewpoint of crystallinity.

FIG. 4 is a diagram showing an example of a method for manufacturing a Group III nitride semiconductor template according to the present invention. First, after a pretreatment well known in the art such as cleaning of the growth substrate 10, The layer 20 is grown. Next, at a second temperature higher than the first temperature, the Group III nitride semiconductor layer 21 is grown. Crystallization of the seed layer 20 is performed at a third temperature, preferably higher than the first temperature and lower than the second temperature, prior to growth of the III-nitride semiconductor layer 21. Growth of the seed layer 20 and the Group III nitride semiconductor layer 21 is generally performed by an MOCVD apparatus.

The growth of the seed layer 20 may be performed in an epitaxial growth device (e.g., MOCVD device) while minimizing thermo-dynamical effects on the elemental molecules (Al, N, Ga) (First temperature), which is more influenced by the physical source injection of the gas and the gas flow in the reactor. That is, if the reactor is tuned to have a high uniformity of source deposition in the low temperature region, uniform physical deposition can be made on the growth substrate 10. The seed layer 20 made of Al _x Ga _1-x N (0 < x &lt; _{= 1)} which is low temperature grown at the first temperature is a polycrystalline film composed of a mixture of AlN and GaN, Can be adjusted according to the composition ratio of Al in the nitride semiconductor layer (21). This is to match the lattice constant with the Group III nitride semiconductor layer 21. However, since the seed layer 20 is a polycrystalline film, the degree of correspondence of lattice constants is not limited to the crystallinity of the Group III nitride semiconductor layer 21. However, the mode of crystal can be controlled by the combination ratio of AlN and GaN. That is, when the ratio of AlN is high, the crystal grows into a '3D-like crystal growth mode', and when the ratio of GaN is high, it is adjusted to a 2D-like crystal growth mode. By controlling this ratio, the quality of the crystal of the Group III nitride semiconductor layer 21 can be optimized.

After the seed layer 20 is grown, the seed layer 20, which is a polycrystalline film, is crystallized in the process of raising the temperature to the temperature at which the group III nitride semiconductor layer 21 is grown (second temperature) and / And the crystal growth mode of the seed layer 20 can be changed in this process. The present disclosure relates to a method of growing a seed layer 20 by using a process of growing the seed layer 20 to a temperature higher than the second temperature (third temperature) and / or crystallizing the seed layer 20 in a heated state, Crystallization of the Group III nitride semiconductor layer 21 can be further improved while crystallization of the Group III nitride semiconductor layer 20 is promoted. When the seed layer 20 is crystallized using a third temperature higher than the second temperature, the second temperature is a temperature suitable for crystal growth of the III-nitride semiconductor layer 21, which is a single crystal film, In order to crystallize the layer 20 (in order for the seed layer 20 to maintain thermodynamic stability at the third temperature), it is preferred that the seed layer 20 is made of a material having thermodynamic stability in the region of the third temperature, In the Al-Ga-N material system constituting the constituent layer of the invention, it is preferable that the Al-Ga-N material system has a high Al composition ratio. For example, when the Group III nitride semiconductor layer 21 is made of Al _0.05 Ga _0.95 N, the x value of the seed layer 20 made of Al _x Ga _1-x N (0 <x? 1) In this respect, if the seed layer 20 is made of AlN (x = 1), the process upper limit value of the third temperature can be maximized.

The seed layer 20 is recrystallized at a third temperature and provides a structure that minimizes crystal defect density due to lattice mismatch in growth at a second temperature. In order to satisfy these two technical requirements, a proper Al composition range is required. _X is preferably 0.5 or more in Al _x Ga ₁ -xN (0 < x 1). That is, when x is close to 1, the thermodynamic stability at the third temperature rises, and the 3D island growth mode is activated, leading to a lateral growth mode in a direction parallel to the growth surface of the growth substrate 10 at the second temperature . However, if the composition ratio of Al is too high, if the density of the 3D island is too high, it is difficult to obtain a smooth growth surface because the growth surface is not sufficiently merged during the growth of the second temperature. (0.5? X? 1) is required.

The thickness of the seed layer 20 as well as the composition ratio of Al are important process variables. The thickness of the seed layer 20 grown at the first temperature is an important parameter determining the height and width of the 3D island formed at the third temperature. The empirical range according to the experiment is preferably in the range of 10 to 100 nm. If the thickness is too thin, the height of the 3D island is insufficient and the effect is small. If the thickness is too large, the height of the 3D island is too large to obtain a sufficiently smooth surface.

The seed layer 20 preferably has a thickness in the range of 10 to 100 nm and an Al composition ratio in the range of 50 to 100% and the growth temperature can be grown in a temperature range of 400 to 600 ° C where the Surface Kinetics Limited Condition prevails have. Growth pressure is generally not a sensitive process parameter in forming the seed layer 20, and can be grown in various manners, typically in the pressure range of 100 to 760 torr. In addition, the flow rate of the MO source or the carrier gas may be optimized depending on the MOCVD condition to be used.

The third temperature is preferably higher than the second temperature by about 10 to 300 ° C. Since the second temperature is usually about 1000 to 1100 ° C, the temperature range is preferably 1010 to 1400 ° C. The range of the optimized temperature depends on the thickness of the seed layer 20 and the composition ratio of Al. The optimized third temperature is generally higher as the thickness is higher and the Al composition ratio is higher. The shape and size of the 3D islands are determined according to the third temperature. If the temperature is too high, the thermodynamic stability of the seed layer 20 may be broken and surface dis- posal may occur. The duration of the third temperature as well as the optimal range of the third temperature and the temperature rise time from the first temperature to the third temperature also affect the size and shape of the 3D islands, Source, V / III ratio, pressure of the reactor, etc.).

In the Group III nitride semiconductor layer 21 made of Al _y Ga _1-y N (y> 0), the Al composition ratio and the composition value y are in the range of from 0.1 to 10% by weight based on the seed layer 20 made of Al _x Ga ₁ -xN (0 < ), Which is an Al composition ratio of x. This is because the 3D island formed by the seed layer 20 through the process of the third temperature interval is converted into the 2D growth mode in the III nitride semiconductor layer 21 of the second temperature range to form a smooth epi layer. Generally, the smaller the composition ratio of Al is, the stronger the tendency of the 2D growth mode is. Therefore, the closer to the minimum value of the Al composition ratio that the Group III nitride semiconductor layer 21 can have, the more preferable the maximum value is smaller than the Al composition ratio of the seed layer 20. The Group III nitride semiconductor layer 21 corresponds to a so-called buffer layer when constituting the device. The thickness thereof is preferably in the range of 1 to 6 mu m. If it is too large, it may be insufficient for the function of the original buffer layer. If the thickness is too large, wafer boring due to lattice constant mismatch between the growth substrate 10 and the Group III nitride semiconductor layer 21 becomes large, . &Lt; / RTI &gt;

For example, in the growth of Al _0.05 Ga _0.95 N, the reactor pressure typically uses a relatively low pressure of 50 to 200 torr, depending on the MOCVD used. This is to increase the velocity of the carrier gas to prevent the TMAl used from aggravating NH ₃ and parasitic reactions in the gaseous state. The growth temperature is usually in the range of 1000 to 1100 DEG C, and a growth temperature region which is similar to the growth temperature of GaN or which is about 10 to 50 DEG C or so is used. This is to increase the surface mobility of the Al precursor adsorbed on the growth surface so that the growth precisely locates the growth Kink site. Since the V / III ratio, which is the ratio of the flow rate of the MO source to NH ₃ , may vary depending on the type of reactor used and the purpose of the growth, it is preferable to use the V / III ratio within a range of conditions optimized for each reactor. The typical growth rate of the Group III nitride semiconductor layer 21 is preferably 1 to 4 탆 / h. In general, the slower the growth rate, the better the crystallinity, and the larger the crystal degrades. However, if it is too slow, growth efficiency tends to decrease.

5 shows another example of a III-nitride semiconductor template according to the present disclosure, wherein the template includes a growth substrate 10, a nucleation layer 20, and a III-nitride semiconductor layer 21 . The growth substrate 10 is provided with projections and depressions 11 for light scattering. As shown in the drawing, the projections and depressions 11 form protrusions on the growth substrate 10 through etching, so that the protrusions constitute a protrusion portion, and the bottom surface of the growth substrate 10 exposed by etching is recessed or the depression portion may be formed in the growth substrate 10 by etching so that the surface of the growth substrate 10 remaining unetched may form a convex portion. But it is generally formed by forming protrusions through etching.

The protrusions 11 may be, for example, in the shape of a hemispherical lens, and may have a hemisphere width of about 1.5 to 3 탆 and a height of about 1 to 2 탆.

In the case of providing the concavity and convexity 11, the growth of the Group III nitride semiconductor layer 21 made of Al _y Ga ₁ -yN (y> 0) is higher than that in the case of manufacturing the template shown in FIG. Technical difficulty is required. This is because it is not easy for the Group III nitride semiconductor layers 21 grown from the bottom surface of the growth substrate 10 to coalesce with each other while stably covering the projections and depressions 11. FIG. 6 shows an example of the Group III nitride semiconductor layer 21 in which crystal growth fails to grow on the concave and convex portions to cause crystal defects.

According to the present disclosure, a solution to this problem is presented by forming the Group III nitride semiconductor layer 21 in a divided manner into a first layer 22, a second layer 23 and a third layer 24. First, the seed layer 20 is formed, and then the first layer 22 is grown under growth conditions in which growth in the vertical direction is active. For example, the first layer 22 is formed to a point of 80 to 90% of the height of the projection. Next, the growth of the second layer 23 is carried out under growth conditions in which the growth is active in the horizontal direction to cover the projections, while the second layer 23 is well joined. Finally, the third layer 24 is formed under the condition that the flat layer is formed, that is, in the 2D growth mode.

FIG. 7 is a graph showing experimental results of a Group III nitride semiconductor template produced according to the present disclosure. In the PL wavelength mapping, the average value is 352 nm, which indicates that the composition ratio of Al in the Group III nitride semiconductor layer 21 is about 5 %. The uniformity of the wavelength is 2% or less, which is very uniform. The average thickness was 6 μm and the thickness uniformity was 3% or less. XRD (002) and (102) of the template obtained 131 arcsec and 211 arcsec, respectively. The XRD crystallinity of the Group III nitride semiconductor layer 21 made of Al _0.05 Ga _0.95 N can be said to be the best result on the basis of documents reported in academia, to the extent that the present inventor (s) perceives it. Generally, it is known that a commercially available level of semiconductor light emitting device can be obtained by obtaining 400 arcsec or less on the basis of XRD (102).

The first layer 22 is a growth condition suitable for the seed layer 20 and the connection layer to a metal-rich surface of the c-growth axis. This is not largely offset by the growth conditions of conventional high crystallinity III-nitride semiconductors, but it is preferable that the V / III ratio is larger than 500. [ The second layer 23 that is subsequently grown is a grown-plane merge layer with enhanced 2D growth mode. And the growth surfaces that approach each other in the transverse direction along the hemispherical lens surface are layers that meet with each other. Since the structures of the dangling bonds on the surfaces of different growth planes are different from each other, it is the layer that finds the optimum conditions for smooth connection. For this purpose, two methods of insensitivity to the direction of the growth surface crystal structure can be attempted: 1) a growth layer in a low-temperature region, and 2) a method in which the growth rate is extremely lowered and sufficiently combined in order. It is preferable that the growth layer in the low temperature region grows by about 20 to 100 DEG C lower than the temperature of the third layer 24. [ The growth rate is preferably in the range of 0.1 to 1 탆 / h. The effective parameter in the growth condition of the second layer 23 is the growth pressure. Generally, the higher the pressure, the better the smooth merging. However, when the pressure is high, the carrier gas is slowed down, and TMAl, which is a precursor of Al, is consumed much by the parasitic reaction in the vapor phase, so that it is difficult to efficiently grow AlGaN. Therefore, the optimal pressure of the two variables exists. Once a smooth growth surface is created in the second layer 23, the third layer 24 may grow in accordance with growth conditions of a generally highly crystalline Group III nitride semiconductor layer.

8 is a diagram showing an example of a near-ultraviolet light emitting semiconductor light emitting device according to the present disclosure. The semiconductor light emitting device includes a growth substrate 10, a seed layer 20, a group III nitride semiconductor layer 21, An active layer 40 (e.g., a multi quantum well structure having an InGaN quantum well) that emits near ultraviolet rays through recombination of electrons and holes, a first semiconductor layer 30 (e.g., an n-type AlGaN layer) A second semiconductor layer 50 (p-type AlGaN layer) having a second conductivity, a first electrode 80 electrically connected to supply electrons to the first semiconductor layer 30 and functioning as a bonding pad : A stacked structure of Cr / Ni / Au) A second electrode 70 (p-side electrode; e.g., Cr / Ni / Au) electrically connected to supply holes to the second semiconductor layer 50 and functioning as a bonding pad ). &Lt; / RTI &gt; The protrusions and depressions 11 are formed on the growth substrate 10 and the second semiconductor layer 50 and the second electrode 70 are formed on the growth substrate 10, It is general that a transmissive current diffusion electrode 60 (e.g., ITO) is provided over the entire surface. A chip having such a structure is called a lateral chip, and wire bonding is performed to supply electricity to the first electrode 80 and the second electrode 70 from the outside. The first semiconductor layer 30 and the second semiconductor layer 50 may be formed of a plurality of layers. For example, the second semiconductor layer 50 may include an electron blocking layer having a high Al composition on the side adjacent to the active layer 40, (Electron Blocking Layer). The conductivity of both may be changed and the first semiconductor layer 30, the active layer 40 and the second semiconductor layer 50 are referred to as a light emitting structure.

9 is a diagram showing another example of the near-ultraviolet light emitting semiconductor light emitting device according to the present invention. Unlike the horizontal chip shown in Fig. 8, the light transmitting current diffusion electrode 60 is omitted, and the second electrode 70 : Ag / Ni / Au or Al / Ni / Au) is formed over substantially the entire surface of the second semiconductor layer 50. The second electrode 70 functions as a bonding pad while serving as a reflective film for reflecting the near ultraviolet rays generated in the active layer 40 from the growth substrate 10. It is needless to say that the light-transmitting current diffusion electrode 60 may be additionally provided. A structure in which the second electrode 70 functions only as a bonding pad and a DBR is provided between the second electrode 70 and the second semiconductor layer 50 is also possible. This type of chip is called a flip chip.

FIG. 10 is a graph showing the results of integration test of the near-ultraviolet light emitting semiconductor light emitting device shown in FIG. 9. As a result of the integration test, the semiconductor light emitting device according to the present disclosure has a vertical semiconductor light emitting Compared with the device, it showed similar behavior and showed 3 ~ 4 times higher light output than the flip chip including GaN underneath.

In the following, various embodiments in accordance with the present disclosure are presented.

(1) A Group III nitride semiconductor template for a near-ultraviolet (300-400 nm) light emitting semiconductor light emitting device, comprising: a growth substrate; A seed layer of Al _x Ga _1-x N (0 < x &lt; ₁ , x &gt;y); And a single-crystal III-nitride semiconductor layer of Al _y Ga _1-y N (y> 0).

(2) The Group III nitride semiconductor template for a near-ultraviolet light emitting semiconductor light-emitting device, wherein the growth substrate has irregularities for light scattering, and the Group III nitride semiconductor layer covers the irregularities.

(3) The Group III nitride semiconductor layer includes a first layer grown from the seed layer, a second layer covering the unevenness over the first layer, and a third layer formed flat over the second layer. Group III nitride semiconductor template for near ultraviolet light emitting semiconductor light emitting device.

(4) The Al composition value x of the seed layer has a value larger than the Al composition value y of the Group III nitride semiconductor layer so that the seed layer is not decomposed at the growth temperature of the Group III nitride semiconductor layer. III-nitride semiconductor template for a light emitting device.

(5) The Group III nitride semiconductor template for a near-ultraviolet light emitting semiconductor light-emitting device, wherein the seed layer is made of AlN.

(6) Near-ultraviolet light (300 to 400 nm) light emitting semiconductor light emitting device, comprising: a growth substrate; A seed layer of Al _x Ga _1-x N (0 < x? 1); A single crystal III-nitride semiconductor layer of Al _y Ga _1-y N (y>0); A light emitting structure that emits near ultraviolet rays through recombination of electrons and holes on the Group III nitride semiconductor layer; A first electrode for supplying electrons and holes to the light emitting structure; And a second electrode, wherein an Al composition value y of the Group III nitride semiconductor layer is determined so that the Group III nitride semiconductor layer does not absorb near-ultraviolet light emitted from the light-emitting structure. This is because the band gap energy of the single crystal III-nitride semiconductor layer is made larger than the wavelength of the near ultraviolet ray to be emitted, and if the y value is increased, the band gap energy becomes large.

(7) The near-ultraviolet light-emitting semiconductor light-emitting device according to (7), wherein the Al composition value x of the seed layer is larger than the Al composition value y of the III-nitride semiconductor layer.

(8) The near-ultraviolet light-emitting semiconductor light-emitting device according to (8), wherein the growth substrate has irregularities for scattering near-ultraviolet light emitted from the light-emitting structure.

(9) The Group III nitride semiconductor layer covers the unevenness, and the Group III nitride semiconductor layer includes a first layer grown from the seed layer, a second layer covering the unevenness over the first layer, And a second layer formed on the third layer.

(10) The near-ultraviolet light-emitting semiconductor light-emitting device, wherein the seed layer is made of AlN.

According to one near-ultraviolet light emitting semiconductor light emitting device and a Group III nitride semiconductor template used therein, it is possible to manufacture a commercially available near ultraviolet light emitting semiconductor light emitting device template and a semiconductor light emitting device.

The seed layer 20, the Group III nitride semiconductor layer 21, the first semiconductor layer 30, the active layer 40, the second semiconductor layer 50, the first electrode 80, The two electrodes 70,

Claims (10)

In a III-nitride semiconductor template for near-ultraviolet (300 to 400 nm) light-emitting semiconductor light emitting devices,
Growth substrate;
A seed layer of Al _x Ga _1-x N (0 < x &lt; ₁ , x &gt;y); And,
And a single crystal III-nitride semiconductor layer of Al _y Ga _1-y N (y> 0). The method according to claim 1,
The growth substrate has irregularities for light scattering,
III nitride semiconductor layer for near-ultraviolet light-emitting semiconductor light-emitting devices, wherein the III-nitride semiconductor layer covers unevenness. The method of claim 2,
The Group III nitride semiconductor layer includes a first layer grown from the seed layer, a second layer covering the unevenness over the first layer, and a third layer formed flat on the second layer. III-nitride semiconductor template for semiconductor light emitting device. The method according to claim 1,
Wherein the Al composition value x of the seed layer has a value larger than an Al composition value y of the Group III nitride semiconductor layer so that the seed layer is not decomposed at the growth temperature of the Group III nitride semiconductor layer III nitride semiconductor template. The method according to any one of claims 1 to 4,
Wherein the seed layer is made of AlN. The III-nitride semiconductor template for near-ultraviolet light emitting semiconductor light-emitting device according to claim 1, wherein the seed layer is made of AlN. In a near-ultraviolet (300-400 nm) light emitting semiconductor light emitting device,
Growth substrate;
A seed layer of Al _x Ga _1-x N (0 < x? 1);
A single crystal III-nitride semiconductor layer of Al _y Ga _1-y N (y>0);
A light emitting structure that emits near ultraviolet rays through recombination of electrons and holes on the Group III nitride semiconductor layer; And,
A first electrode for supplying electrons and holes to the light emitting structure; And a second electrode,
Wherein an Al composition value y of the Group III nitride semiconductor layer is determined so that the Group III nitride semiconductor layer does not absorb the near ultraviolet light emitted from the light emitting structure. The method of claim 6,
Wherein an Al composition value x of the seed layer is larger than an Al composition value y of the group III nitride semiconductor layer. The method according to claim 6 or 7,
Wherein the growth substrate has irregularities for scattering near-ultraviolet rays emitted from the light-emitting structure. The method of claim 8,
The Group III nitride semiconductor layer covers the irregularities,
The Group III nitride semiconductor layer includes a first layer grown from the seed layer, a second layer covering the unevenness over the first layer, and a third layer formed flat on the second layer. Semiconductor light emitting device. The method of claim 9,
Wherein the seed layer is made of AlN.

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