KR20180014383A - Organic light emitting display device - Google Patents

Abstract

The present invention relates to an organic light emitting display device which prevents spark generated in a cathode electrode exposed through a mask during a CVD process to prevent damage to a substrate, and can reduce a bezel region, comprising: a substrate including an active region and a bezel region outside the active region; an encapsulation substrate disposed to face the substrate to expose a portion of the bezel region of the substrate; an organic light emitting diode including a first electrode disposed in the active region of the substrate, an organic layer for exposing the first electrode to define a pixel region and disposed on a bank layer extending from the active region to the bezel region to be in contact with the exposed anode electrode, and a second electrode extending from the active region to the bezel region and disposed on the bank layer to cover the organic layer; and a functional layer disposed between the encapsulation substrate and a capping layer to prevent penetration of moisture from the outside and attaching the encapsulation substrate to the substrate. A first alignment mark is formed at one or more positions of the substrate overlapping the encapsulation substrate, and a second alignment mark is formed at one or more positions of the encapsulation substrate.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

The present invention relates to an organic light emitting display.

2. Description of the Related Art In recent years, various flat panel display devices capable of reducing weight and volume, which are disadvantages of CRT (Cathode Ray Tube), have been developed. Examples of such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting display (OLED) Organic Light Emitting Display).

Of these flat panel display devices, an organic light emitting display device is a self-luminous display device that excites an organic compound to emit light, and does not require a backlight used in an LCD, so that it is lightweight and thin, and can simplify a process. Further, the organic light emitting display device is widely used because it can be manufactured at low temperature, has a response speed of 1 ms or less and has a high response speed as well as low power consumption, wide viewing angle, and high contrast have.

The OLED display includes a light emitting layer made of an organic material between the anode electrode and the cathode electrode so that the holes supplied from the anode electrode and the electrons received from the cathode electrode are combined in the light emitting layer to form an exciton as a hole- The exciton emits light due to the energy generated when the exciton returns to the ground state.

Hereinafter, a conventional OLED display will be described with reference to FIG. 1 is a cross-sectional view of a conventional organic light emitting diode display.

1, an anode electrode AN is formed on a substrate SUB provided with an alignment mark ALM and a power source pad unit P and a light emitting layer for emitting light is formed on the anode electrode AN. The organic film layer OL is formed. Since the power source pad portion PD must be in contact with the cathode electrode CAT, the power source pad portion is masked with the first mask so that the organic layer is not formed on the power source pad portion PD, and then the organic layer OL is deposited. A cathode electrode CAT is formed on the substrate SUB on which the organic film layer OL is formed. The cathode electrode CAT is formed using a second mask different from the first mask so as to cover the organic film layer OL and to contact the exposed power supply pad portion P. [ An encapsulation substrate ENC is arranged on the substrate SUB on which the cathode electrode CAT is formed so as to expose the alignment mark ALM and a substance FS is provided between the cathode electrode CAT and the encapsulation substrate ENC. Is filled to allow the encapsulation substrate ENC to be planarized. A protective film (not shown) made of an inorganic insulating film may be disposed between the cathode electrode CAT and the cathode FS to protect the cathode electrode CAT.

As described above, in the conventional organic light emitting diode display, in order to enable the alignment mark (ALM) to be recognized by a camera or the like in the front and rear process of the cell and in the module process, The alignment mark ALM is positioned at the position exposed by the alignment mark ALM.

However, in the conventional OLED display device, the bezel area is increased by the alignment mark (ALM) by the alignment mark (ALM). Therefore, there is a problem that it becomes difficult to implement a narrow bezel due to the above-mentioned alignment marks.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an OLED display device capable of realizing a narrow bezel by preventing an increase in size of a bezel region.

An organic light emitting diode display for achieving the object of the present invention includes: a substrate including an active region and a bezel region outside the active region; An encapsulation substrate disposed opposite the substrate to expose a portion of the bezel region of the substrate; A first electrode disposed on an active region of the substrate; a second electrode disposed on the bank layer extending from the active region to the bezel region to expose the first electrode to define a pixel region, And a second electrode extending from the active region to the bezel region and disposed on the bank layer to cover the organic film layer, wherein the second electrode is disposed between the encapsulation substrate and the capping layer, And a functional film for preventing moisture penetration and attaching the encapsulation substrate to the substrate, wherein a first alignment mark is formed in at least one position of the substrate overlapping the encapsulation substrate, And a second alignment mark is formed on at least one position of the alignment substrate.

The organic light emitting display of the present invention includes a capping layer having a smaller area than the second electrode of the organic light emitting diode and disposed on the second electrode so as to expose a rim of the second electrode in the bezel region, And an organic material residual film extending from the capping layer and terminating inside the rim of the second electrode.

In addition, the functional film may include a protective film disposed on the capping layer to prevent water penetrating from the outside and to be planarized; And a substance disposed on the protective film and attaching the encapsulation substrate to the protective film.

Further, the end portion of the organic film layer may extend further outward than the end portion of the capping layer.

Alternatively, the end of the organic layer and the end of the capping layer may be at the same position, or the end of the capping layer may extend further outward than the end of the organic layer.

Also, the capping layer may be selected from allylamine-based organic materials.

The first alignment mark may be used in at least one of a bezel printing process of a module process, a polarizing plate attaching process, a laser cutting process of a polarizing plate, and an assembling and attaching process.

In addition, the second alignment marks are used for the primary cutting process, the simple lighting process, the secondary cutting for final product shipment, the grinding process of the encapsulation substrate, the final inspection of the cell, May be used for at least one.

The second alignment marks may be used in at least one of a TAB (Tape Automated Bonding) process, a side sealing process, and a PCB (Printed Circuit Board) process of a module process.

Since the first alignment mark ALM1 and the second alignment mark ALM2 can be appropriately used in the post-cell process and the module process, the first alignment mark ALM1 ) Need not be formed outside the encapsulation substrate ENC. Therefore, by forming the first alignment mark ALM1 on the outside of the encapsulation substrate ENC, it is possible to prevent an increase in the size of the bezel area that can be brought about, thereby realizing a narrow bezel.

In addition, an effect of reducing the number of masks can be obtained by using the same mask as the mask used for forming the organic film layer under the second electrode on the capping layer formed on the second electrode.

In addition, since the organic residual film formed after the capping layer formation exposes only a very small portion of the second electrode, spark is generated in the second electrode in the subsequent process, thereby preventing the substrate from being damaged.

1 is a cross-sectional view schematically showing a conventional organic light emitting display device,
2 is a block diagram schematically showing an organic light emitting diode display according to an embodiment of the present invention.
FIG. 3 is an equivalent circuit diagram schematically showing one pixel region of a display panel of the organic light emitting diode display shown in FIG. 2. FIG.
4 is a plan view showing a partial area of a display panel of an organic light emitting display according to an embodiment of the present invention,
5 is a cross-sectional view taken along line I-I 'of FIG. 4;

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. In addition, the component names used in the following description may be selected in consideration of easiness of specification, and may be different from the parts names of actual products.

Hereinafter, an organic light emitting display according to an embodiment of the present invention will be described with reference to FIGS. 2 and 3. FIG.

FIG. 2 is a block diagram schematically showing an organic light emitting display according to an embodiment of the present invention, and FIG. 3 is an equivalent circuit diagram schematically illustrating a pixel region of a display panel of the organic light emitting display shown in FIG. 2 .

2, the OLED display includes a display panel 10, a data driver disposed at one side of the display panel 10, a gate driver LS, a timing controller TC, .

The timing controller TC receives a data signal RGB in addition to a drive signal including a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal from an external host system HS.

The timing controller TC generates a gate timing control signal GDC for controlling the operation timing of the gate drivers LS and SR and a data timing control signal DDC for controlling the operation timing of the data driver based on the drive signal Output. The timing controller TC may be formed on the flexible printed circuit board 30 in an IC form.

The data driver samples and latches the data signal RGB supplied from the timing controller TC in response to the data timing control signal DDC supplied from the timing controller TC to convert the sampled data signal into a gamma reference voltage, To the data lines DL of the display panel 10 in synchronization with the gate pulse (or scan pulse).

The data driver IC (DIC) of the data driver may be connected to the data lines DL of the display panel 10 by a COF (Chip On Film) process or a TAB (Tape Automated Bonding) process. In the embodiment of FIG. 2, the data driving IC DIC is connected to one end of the source printed circuit board (DPCB), and the other side is mounted on a chip-on film (COF) For example.

The gate driver outputs a gate signal while shifting the level of the gate voltage in response to the gate timing control signal GDC supplied from the timing controller TC. 2 shows an example in which the gate driver is a GIP (Gate In Panel) type. The level shifter LS mounted on the flexible printed circuit board 30 and the substrate SUB of the display panel 10 (Not shown).

The level shifter LS receives signals such as a start pulse ST, gate shift clocks GLCK and flicker signal FLK from the timing controller TC and also outputs a gate high voltage VGH, (VGL) or the like.

The level shifter LS shifts the start pulse ST input from the timing controller TC and the shift clock signal GCLK level-shifted to the gate high voltage VGH and the gate low voltage VGL, (CLK). Therefore, the start pulse VST and the shift clock signals CLK output from the level shifter LS swing between the gate high voltage VGH and the gate low voltage VGL, respectively. The level shifter LS can reduce the flicker by lowering the gate high voltage according to the flicker signal FLK to lower the kickback voltage Vp of the liquid crystal cell.

The start pulse VST, the clock signals CLK1 to CLKn, the gate low voltage VGL and the gate high voltage VGH are input to the shift register SR as shown in FIG. The shift register SR includes a plurality of stages (not shown) connected in a dependent manner. The clock signals CLK1 to CLKn are n (n is a natural number of 2 or more) upper clock signals whose phases are sequentially delayed. The clock signals CLK1 to CLKn are supplied to the respective stages through clock signal supply lines (not shown).

The shift register SR shifts the start pulse VST input from the level shifter LS in accordance with the gate shift clock signals CLK1 to CLKn to generate a swing voltage VGH between the gate high voltage VGH and the gate low voltage VGL. Are sequentially shifted. The gate pulse output from the shift register SR is sequentially supplied to the gate lines GL.

The display panel 10 includes an active area AA and a bezel area BA. The active area AA is an area where a pixel array is arranged in an area where an input image is displayed. The bezel area BA is an area in which an input image is not displayed, and is a region in which a shift register of the gate drive circuit, various signal lines, and a power supply line are disposed.

The pixel array of the display panel 10 includes pixels defined by the intersection of the data lines DL and the gate lines GL. Each of the pixels includes an organic light emitting diode (OLED), which is a self light emitting device.

Referring to FIG. 3, a plurality of data lines DL and a plurality of gate lines GL are intersected with each other in the display panel 10, and pixels are arranged in a matrix form in each of the intersection areas. Each of the pixels includes an organic light emitting diode OLE, a driving thin film transistor (hereinafter referred to as TFT) DT for controlling the amount of current flowing in the organic light emitting diode OLE, a gate- And a programming portion SC for setting a voltage.

The programming portion SC may include at least one switch TFT and at least one storage capacitor.

The switch TFT is turned on in response to a scan signal from the gate line GL, thereby applying a data voltage from the data line DL to one electrode of the storage capacitor.

The driving TFT DT controls the amount of current supplied to the organic light emitting diode OLE according to the magnitude of the voltage charged in the storage capacitor to control the amount of light emitted from the organic light emitting diode OLE. The amount of light emission of the organic light emitting diode (OLE) is proportional to the amount of current supplied from the driving TFT DT.

Each pixel is connected to a high potential power source voltage source EVDD and a low potential power source voltage source EVSS to receive a high potential power supply voltage and a low potential power supply voltage from a power generation unit (not shown).

The TFTs constituting the pixel may be implemented as a p-type or an n-type. Further, the semiconductor layer of the TFTs constituting the pixel may include amorphous silicon, polysilicon, or an oxide. The organic light emitting diode OLE includes an anode electrode ANO, a cathode electrode CAT and an organic film layer (not shown) interposed between the anode electrode ANO and the cathode electrode CAT. The anode electrode ANO is connected to the driving TFT DT. The organic layer includes a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and a light emitting layer (EML) An electron injection layer (EIL) may be disposed.

Next, with reference to FIGS. 4 and 5, the structure of the organic light emitting diode display according to the embodiment of the present invention will be described in more detail.

FIG. 4 is a plan view showing a partial area of a display panel of an organic light emitting diode display according to an embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along line I-I 'of FIG.

An organic light emitting display according to an embodiment of the present invention includes an active area AA including a plurality of subpixels on a substrate SUB and displaying an image through light emission and an image outside the active area AA And a bezel area BA which is a non-display area.

As described above, the active area AA is an area where an image is displayed through light emission in the organic light emitting diodes (OLE). The organic light emitting diode OLE may be composed of red (R), green (G), and blue (B) subpixels, or may further include white (W) subpixels. In addition, the organic light emitting diode (OLE) is composed of white (W) subpixels and can realize full color through a color filter. The structure of the subpixel of the present invention is not particularly limited, and various known structures can be applied.

The bezel area BA includes a data pad DP for supplying a data voltage to the data lines DL, a shift register SR for supplying a gate voltage to the gate lines GL, A low potential pad (not shown) for supplying the low potential power supply EVSS to the cathode electrode CAT of the cathode electrode ANT and a high potential pad VDP for supplying the high potential voltage EVDD to the anode electrode ANO, .

Referring to FIGS. 4 and 5, at least one first alignment mark ALM1 is formed in a partial area (for example, a corner) on the substrate SUB belonging to the bezel area BA. The first alignment mark ALM1 may be used in the module process of the OLED display. For example, the first alignment mark ALM1 may be used in a bezel printing process for printing the lines and the like of the bezel area to improve visibility of the user, a polarizing plate attaching process, a laser cutting process of a polarizing plate, .

Each sub pixel of the active area AA includes a switching TFT ST formed on a transparent substrate SUB, a driving TFT DT connected to the switching TFT ST, an organic light emitting diode OLE connected to the driving TFT DT, . The switching TFT ST is formed at a portion where the gate line GL and the data line DL intersect each other. The switching TFT (ST) functions to select a pixel. The switching TFT ST includes a gate electrode SG, a semiconductor layer SA, a source electrode SS and a drain electrode SD which branch off from the gate line GL.

The driving TFT DT serves to drive the anode electrode ANO of the subpixel selected by the switching TFT ST. The driving TFT DT includes a gate electrode DG connected to the drain electrode SD of the switching TFT ST, a source electrode DS connected to the semiconductor layer DA, the high voltage line EVDD, Electrode DD. The drain electrode DD of the driving TFT DT is connected to the anode electrode ANO of the organic light emitting diode.

4 and 5 show a case in which the driving TFT DT and the switching TFT ST have a top gate structure. In this case, the semiconductor layer DA of the switching TFT ST and the semiconductor layer DA of the driving TFT DT are formed first on the substrate SUB, and the gate electrodes G1 and G2 are formed on the gate insulating film GI, SG, and DG are formed overlapping the center portions of the semiconductor layers SA and DA. Source electrodes SS and DS and drain electrodes SD and DD are connected to both sides of the semiconductor layers SA and DA through a contact hole. The source electrodes SS and DS and the drain electrodes SD and DD are formed on the interlayer insulating film INT covering the gate electrodes SG and DG. 4 and 5 illustrate that the driving TFT DT and the switching TFT ST have a top gate structure. However, the present invention is not limited thereto, and the gate electrode may be disposed under the semiconductor layer Bottom-gate structures are of course applicable.

A data pad DP formed at one end of each data line DL and a high potential voltage pad VDP formed at one end of the high potential voltage line EVDD are disposed on the outer periphery of the active area AA .

The first protective film PAS1 is entirely coated on the substrate SUB on which the switching TFT ST and the driving TFT DT are formed. The first protective film PAS1 is patterned to include contact holes that expose the data electrodes DP, the high potential pads VDP, and the drain electrodes DD of the driving TFT DT.

A flattening film PL is applied on the active region AA in the substrate SUB. The planarizing film PL protects the switching TFT ST and the driving TFT DT and flattens a stepped portion between the switching TFT ST and the driving TFT DT.

The planarizing film PL has a contact hole exposing the drain electrode DD of the driving TFT DT and is patterned so that the data pad GP portion is completely exposed. The planarization layer PL serves to uniformize the roughness of the substrate surface in order to apply the organic material constituting the organic light emitting diode in a smooth planar state.

The first electrode ANO is located on the planarizing film PL. The first electrode ANO is electrically connected to the drain electrode DD of the driving TFT DT exposed through the contact hole of the planarization film PL and the first protective film PAS1. The first electrode ANO may be formed of, for example, indium tin oxide (ITO), indium zinc oxide (IZO), gallium-doped zinc oxide (GZO), indium cerium oxide (ICO) Can be formed of a transparent conductive material that has a high work function and can transmit light.

The data pad DP and the high potential voltage pad VDP exposed through the contact holes DPH and VPH formed in the first protective film PAS1 are formed in the bezel area BA in which the planarization film PL is not formed. A data pad terminal DPT and a high-potential voltage pad terminal VDPT are formed on the semiconductor substrate 1, respectively.

The bank layer BA is located on the first electrode ANO. The bank layer BA is formed to expose a part of the first electrode ANO, and can define a sub-pixel region.

An organic film layer OL is located on the bank layer BA and the exposed first electrode ANO.

The organic layer OL includes a light emitting layer that emits light by coupling electrons and holes, and may include a hole injection layer, a hole transport layer, an electron transport layer, or an electron injection layer.

A second electrode (CAT) is formed on a substrate (SUB) on which an organic layer (OL) is formed. The second electrode (CAT) may be made of magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag) or an alloy thereof having a low work function as a cathode electrode.

The organic light emitting display according to the embodiment of the present invention includes a bottom emission type in which light emitted from the organic layer OL is emitted toward the substrate SUB and light emitted from the organic layer OL is emitted to the second electrode CAT ) Direction, as shown in FIG. Here, in the case of a bottom emission type display device, the first electrode ANO is made to transmit light and the second electrode CAT is made thick enough to reflect light. In the case of a top emission type display device, the first electrode ANO may further include a reflective layer formed of any one of aluminum (Al), silver (Ag), and nickel (Ni) Is made to be thin enough to allow light to pass therethrough and may preferably have a thickness of 1 to 50 ANGSTROM.

The capping layer CPL is formed on the substrate SUB on which the second electrode CAT is formed so as to have an area narrower than the area of the second electrode CAT. The capping layer CPL is formed to expose a certain region along the rim of the second electrode CAT. The capping layer (CPL) is formed of an allylamine-based organic material. Therefore, the same mask as the organic film layer formation mask (hereinafter, referred to as an organic film formation mask) used for forming the organic film layer OL in forming the capping layer (CPL) can be used, It is possible to reduce the number of masks. Alternatively, another capping layer (CPL) may be formed using another mask.

In addition, since the capping layer (CPL) can be formed on the second electrode (CAT) by using a relatively low-temperature thermal deposition or the like without using a plasma CVD method, It is possible to prevent the spark from being generated in the second electrode (CAT) exposed through the mask, thereby preventing damage to the substrate (SUB).

More specifically, when organic materials are deposited by thermal evaporation, they are distributed more widely than when depositing inorganic materials by CVD. Therefore, the organic film forming mask used for forming the organic layer OL can be used to form caps When forming the pinned layer (CPL), the capping layer (CPL) is formed to conform to the step coverage of the second electrode (CAT) in consideration of the reliability bezel region for ensuring the product reliability against oxygen or moisture penetration You do not have to. Therefore, even though the capping layer CPL is not formed to coincide with the step coverage of the second electrode CAT, the capping layer CPL extends over the second electrode CAT to form the second electrode CAT (CPLr) that substantially covers the organic film. Accordingly, the organic residue film CPLr extends from the capping layer CPL and terminates inside the rim of the second electrode CAT. According to this structure, the second electrode (CAT) is covered by the organic material residual film (CPLr) even when the second protective film (PAS2) as an inorganic material for preventing oxygen and moisture penetration in the subsequent process is deposited by CVD deposition. Therefore, spark can be prevented from being generated in the second electrode (CAT) by the organic material residual film (CPLr), so that the substrate damage can be prevented.

Further, as described above, it is necessary to form the capping layer (CPL) so as to coincide with at least the area of the second electrode (CAT) in order to secure the reliability bezel region (region ensuring product reliability against oxygen or moisture permeation) The effect of reducing the bezel area can be obtained.

After the second protective film PAS2 is formed, a functional film is formed on the second protective film PAS2. The functional film is formed on the second protective film and includes a second protective film PAS2 for preventing oxygen and moisture penetration from the outside and a second protective film PAS2 applied to the second protective film PAS2 for attaching the encapsulation substrate ENC FS).

The encapsulation substrate ENC is actually attached to the substrate SUB. That is, the substrate SUB and the encapsulation substrate ENC are completely sealed together by using the substance FS sandwiched therebetween. The data pad DP and the data pad terminal DPT are exposed to the outside of the encapsulation substrate ENC and are connected to an external device through various connecting means.

The encapsulation substrate ENC includes a second alignment mark ALM2 formed in a part of its upper surface (e.g., a corner). The second alignment mark ALM2 is disposed so as to correspond to the same position as the first alignment mark ALM1 or at a constant position of the lower substrate SUB. The second alignment mark ALM2 can be obtained through printing using an inkjet printer or imprinting using a laser marking machine. The second alignment marks ALM2 may be formed while manufacturing the encapsulation substrate ENC, or may be formed after the laminating process is performed in the panel manufacturing process. If the second alignment mark ALM2 is formed on the encapsulation substrate after the laminating process is completed, a process error that may occur in the laminating process can be reflected. Therefore, the second alignment mark ALM2 is formed before the laminating process There is an advantage that the deviation with respect to the formation position can be minimized.

The second alignment mark ALM2 is for use in a process where the first alignment mark ALM1 formed on the lower substrate ALM1 can not be aligned and the alignment should be performed on the upper alignment mark ALM1. The second alignment mark ALM2 is formed by a post-cell process (manufacturing of a switching TFT and a driving TFT and a process after manufacturing an organic light-emitting diode) such as a cutting process into a cell unit (one display panel) And can be used for module fabrication processes. For example, the second alignment mark ALM2 is used for the first cutting (rough cell-by-cell cutting) and the subsequent simple lighting inspection (the manufacturing process of the switching TFT and the driving TFT, and the organic (Cutting of the final cell) for the final product shipment, a grinding process for polishing the edge of the encapsulation substrate thereafter, a final inspection of the cell (product inspection) (E. G., Inspection of whether or not the technology applied to the device is properly implemented), and repair process.

Since the above-described process is mainly performed at the upper part, and the first alignment marks ALM1 are hidden from view by the encapsulation substrate ENC, the second alignment marks ENC formed on the encapsulation substrate ENC It is preferable to carry out the alignment operation using the in-mark ALM2. When the second alignment mark ALM2 is used, not only the alignment operation can be easily performed at the upper portion but also the bezel area can be reduced. The second alignment marks ALM2 may also be used for a TAB (Tape Automated Bonding) process, a side sealing process, a PCB (Printed Circuit Board) process, and the like, if necessary. As a result, it is necessary to form a first alignment mark ALM1 outside the encapsulation substrate ENC for cell unit cutting and cell lighting inspection in which the first alignment mark ALM1 can not be used and for some module processes none. Therefore, by forming the first alignment mark ALM1 on the outside of the encapsulation substrate ENC, it is possible to prevent an increase in the size of the bezel area that can be brought about, thereby realizing a narrow bezel.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention.

For example, in FIG. 4 of the present invention, the end of the organic film layer OL is shown as being formed further outward than the capping layer CPL, but this is only for convenience in the drawing, (CPL) may be formed to coincide with each other. Alternatively, the end of the organic film layer OL may be located further inside than the capping layer CPL.

Also, in the organic light emitting device according to the embodiment of the present invention, the first alignment mark ALM1 is formed at two positions on the substrate SUB, the second alignment mark ALM2 is formed at the two positions on the encapsulation substrate ENC, But the present invention is not limited thereto. The first alignment mark ALM1 and the second alignment mark ALM2 may be formed at one, three or four positions.

In addition, in the organic light emitting device according to the embodiment of the present invention, the first alignment mark ALM1 and the second alignment mark ALM2 are formed in a cross shape, but the present invention is not limited thereto, It should be construed as belonging to the present invention regardless of its shape.

Therefore, the present invention should not be limited to the details described in the detailed description, but should be defined by the claims.

SUB: substrate GI: gate insulating film
ST: switching TFT DT: driving TFT
PAS1, PAS2: Protective film PL: Planarization film
OL: organic film layer CPL: capping layer
CPLr: organic residual film INT: interlayer insulating film
FS: real ENC: encapsulation substrate
ALM1, ALM2: Align mark

Claims (10)

A substrate including an active region and a bezel region outside the active region;
An encapsulation substrate disposed opposite the substrate to expose a portion of the bezel region of the substrate;
A first electrode disposed on an active region of the substrate; a second electrode disposed on the bank layer extending from the active region to the bezel region to expose the first electrode to define a pixel region, An organic light emitting diode comprising: an organic film layer; and a second electrode extending from the active region to the bezel region and disposed on the bank layer to cover the organic film layer; And
And a functional film disposed between the encapsulation substrate and the capping layer to prevent moisture penetration from the outside and adhere the encapsulation substrate to the substrate,
A first alignment mark is formed in at least one position of a bezel region of the substrate overlapping the encapsulation substrate,
And a second alignment mark is formed on at least one position of the encapsulation substrate. The method according to claim 1,
A capping layer having a smaller area than the second electrode of the organic light emitting diode and disposed on the second electrode so as to expose a rim of the second electrode in the bezel region;
And an organic material remaining film extending from the capping layer and terminating inside a rim of the second electrode. 3. The method of claim 2,
The functional film may be,
A protective layer disposed on the capping layer to prevent moisture from penetrating from the outside and to be planarized; And
And a substance disposed on the protective film and attaching the encapsulation substrate to the protective film. 3. The method of claim 2,
Wherein an end of the organic film layer extends further outward than an end of the capping layer. 3. The method of claim 2,
Wherein an end of the organic film layer and an end of the capping layer are in the same position. 3. The method of claim 2,
Wherein an end of the capping layer extends further outward than an end of the organic layer. 7. The method according to any one of claims 1 to 6,
Wherein the capping layer is selected from allylamine-based organic materials. 7. The method according to any one of claims 1 to 6,
Wherein the first alignment mark is used in at least one of a bezel printing process of a module process, a polarizing plate attaching process, a laser cutting process of a polarizing plate, and an assembling and attaching process. 9. The method of claim 8,
The second alignment mark may be at least one of a primary cutting process of a post-cell process substrate, a simple lighting process, a secondary cutting process for final product shipment, a grinding process of an encapsulation substrate, a final cell inspection process, and a repair process And the organic light emitting display device. 10. The method of claim 9,
Wherein the second alignment mark is used in at least one of a TAB (Tape Automated Bonding) process, a side sealing process, and a PCB (Printed Circuit Board) process of a module process.

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