KR20170115823A - Light emitting package and display device having thereof - Google Patents

Abstract

An embodiment includes a substrate including a plurality of lead electrodes disposed on one surface and a plurality of electrode pads disposed on the other surface and electrically connected to the plurality of lead electrodes; A plurality of light emitting elements arranged on the substrate and electrically connected to the plurality of lead electrodes; And a light-transmitting layer covering the plurality of light-emitting elements, wherein the light-transmitting layer includes a first sidewall to a fourth sidewall connecting the upper surface and the lower surface, and a first sidewall to a fourth sidewall connecting the first sidewall and the fourth sidewall, Disclosed is a light emitting device package including a first chamfer formed and a display device including the same.

Description

[0001] LIGHT EMITTING PACKAGE AND DISPLAY DEVICE HAVING THEREOF [0002]

An embodiment relates to a light emitting device package and a display device including the same.

A light emitting diode (LED) is one of light emitting devices that emits light when current is applied. The light emitting diode is capable of emitting light with high efficiency at a low voltage, thus providing excellent energy saving effect. In recent years, the problem of luminance of a light emitting diode has been greatly improved, and it has been applied to various devices such as a backlight unit of a liquid crystal display device, a display board, a display device, and a home appliance.

A typical liquid crystal display device displays an image or an image with light passing through a color filter by controlling the light emitted from the light emitting diode and the transmittance of the liquid crystal. However, it is difficult to realize a high-quality large-screen display device due to the yield and cost of a liquid crystal display device and an organic field display device having complicated configurations, which are generally used in general. have.

The embodiment provides a light emitting device package and a display device which are easy to recognize.

An embodiment provides a light emitting device package and a display device capable of providing full color.

The embodiment provides a light emitting device package and a display device that can simplify the structure and are advantageous for slimming.

The embodiment provides a display device having excellent image and image straightness.

The embodiment provides a display device capable of realizing a large-sized display device of high resolution.

A light emitting device package according to an embodiment includes a substrate including a plurality of lead electrodes disposed on one surface and a plurality of electrode pads disposed on the other surface and electrically connected to the plurality of lead electrodes; A plurality of light emitting elements arranged on the substrate and electrically connected to the plurality of lead electrodes; And a light-transmitting layer covering the plurality of light-emitting elements, wherein the light-transmitting layer includes a first sidewall to a fourth sidewall connecting the upper surface and the lower surface, and a first sidewall to a fourth sidewall connecting the first sidewall and the fourth sidewall, And a first chamfer formed.

One side of the substrate may include a first region exposed by the first chamfer.

The substrate may include a second chamfer disposed in a region corresponding to the first chamber of the light-transmitting layer.

The height of the light-transmitting layer in the first direction may be greater than the height of the substrate in the first direction, and the first direction may be parallel to the other surface direction on one side of the substrate.

The ratio of the height of the light-transmitting layer in the first direction to the height of the substrate in the first direction may satisfy 1.2: 1 to 3: 1.

The first side and the second side of the substrate facing each other, and the third side and the fourth side facing each other, and the lengths of the first side and the third side of the substrate are different from each other, As shown in FIG.

The ratio of the length of the first side face and the third side face of the substrate to the height of the upper face of the light transmitting layer from the other face of the substrate may satisfy a ratio of 1: 0.5 to 1: 0.8.

The first linear distance from the center of the substrate to the first chamfer may be longer than a plurality of second linear distances connecting the plurality of light emitting elements at the center of the substrate.

According to the embodiment, it becomes easy to recognize and arrange a light emitting device package that is miniaturized.

Further, the plurality of light emitting elements are individually driven to provide full color.

Further, the display device of the embodiment can simplify the structure and have advantages advantageous to slimming.

Further, since the light emitting device package can be aligned using the magnetic force, the alignment time and the bonding time of the light emitting device can be shortened.

Embodiments can implement a display device of high luminance and high reproducibility by arranging light emitting diodes emitting different colors in one pixel as subpixels.

The various and advantageous advantages and effects of the present invention are not limited to the above description, and can be more easily understood in the course of describing a specific embodiment of the present invention.

1 is a conceptual view of a light emitting device package according to a first embodiment of the present invention,
Fig. 2 is a plan view of Fig. 1,
Fig. 3 is a first modification of Fig. 1,
Fig. 4 is a second modification of Fig. 1,
FIG. 5 is a view showing a lead electrode disposed on one surface of the substrate of FIG. 1,
Fig. 6 is a modification of Fig. 5,
FIG. 7 is a view showing electrode pads disposed on the other surface of the substrate of FIG. 1,
FIG. 8 is a view showing a state in which a lead electrode and an electrode pad of the circuit board of FIG. 1 are electrically connected,
9 is a view illustrating a state in which a plurality of light emitting devices are electrically connected to a circuit board,
FIG. 10 is a view for explaining the light emitting device of FIG. 9,
11 is a conceptual view of a light emitting device package according to a second embodiment of the present invention,
12 is a conceptual view of a light emitting device package according to a third embodiment of the present invention,
13 is a conceptual view of a light emitting device package according to a fourth embodiment of the present invention,
14 is a conceptual view of a light emitting device package according to a fifth embodiment of the present invention,
FIG. 15 is a view showing a lead electrode disposed on one surface of the substrate of FIG. 14,
16 is a conceptual diagram of a display device according to an embodiment of the present invention.

The embodiments may be modified in other forms or various embodiments may be combined with each other, and the scope of the present invention is not limited to each embodiment described below.

Although not described in the context of another embodiment, unless otherwise described or contradicted by the description in another embodiment, the description in relation to another embodiment may be understood.

For example, if the features of configuration A are described in a particular embodiment, and the features of configuration B are described in another embodiment, even if the embodiment in which configuration A and configuration B are combined is not explicitly described, It is to be understood that they fall within the scope of the present invention.

In the description of the embodiments, in the case where one element is described as being formed "on or under" another element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention.

FIG. 1 is a conceptual view of a light emitting device package according to a first embodiment of the present invention, FIG. 2 is a plan view of FIG. 1, FIG. 3 is a first modification of FIG. 1, to be.

Referring to FIGS. 1 and 2, a light emitting device package 10 according to an embodiment includes a substrate 200, a plurality of light emitting devices 100A, 100B, and 100C disposed on the substrate 200, And a light-transmitting layer 300 covering the elements 100A, 100B, and 100C.

The substrate 200 may include an upper surface 211 and an opposite surface 212 and a plurality of side surfaces 221, 222, 223, and 224. Illustratively, the substrate 200 is a polyhedral structure and may include four corners and four sides. The first side surface 221 and the second side surface 222 may be disposed opposite to each other and the third side surface 223 and the fourth side surface 224 may be disposed opposite to each other.

The planar shape (top view) of the substrate 200 may correspond to the pixel structure of the display device. For example, the planar shape of the substrate 200 may be variously modified, such as a rectangular shape, a polygonal shape, an elliptical shape, and a circular shape.

The plurality of light emitting devices 100A, 100B, and 100C may be disposed on the substrate 200. [ The plurality of light emitting devices 100A, 100B, and 100C includes a first light emitting device 100A that emits light of a blue wavelength band, a second light emitting device 100B that emits light of a green wavelength band, a second light emitting device 100B that emits light of a red wavelength band, 3 light emitting device 100C. The second light emitting device 100B and the third light emitting device 100C may be a combination of a blue chip and a phosphor. Additional light emitting devices may be further disposed to improve optical properties (e.g., color rendering, uniformity, etc.).

The first to third light emitting devices 100A, 100B, and 100C are individually driven to realize full color. The method of individually driving the first to third light emitting devices 100A, 100B, and 100C is not particularly limited.

The light-transmitting layer 300 is formed on the substrate 200 to cover the first to third light emitting devices 100A, 100B, and 100C. The light-transmitting layer 300 includes first to fourth side walls 321, 322, 323 and 324 for connecting the upper surface and the lower surface and first and second side walls 321, 322, 323, and 324 formed at the corners of the first and second side walls 321 and 324. And may include a chamfer 325. The first chamfer 325 may be formed by removing the corner between the first sidewall 321 and the fourth sidewall 324.

The light emitting device package according to the embodiment may function as a pixel of a display device, not a backlight or a light source for illumination. Since the light emitting device package according to the embodiment is not intended to provide uniform white light, it may be advantageous to remove the optical layer in a region where the light emitting device package is not disposed. It is also possible to improve the contrast ratio. Therefore, it may be advantageous that the first chamfer 325 is made as large as possible within a range that does not hinder the optical characteristics of the light emitting device package. The substrate 200 is exposed to the first region P1 by the first chamfer 325. [

The size of the light emitting device package may vary depending on the pixel size of the display device. If the display device has UH (Ultra HD) resolution (3480 ⅹ 2160) or UHD or higher resolution (eg 4K (K = 1000), 8K, etc.), the light emitting device package should be smaller. However, when the size (lateral width) of the light emitting device package is reduced to 0.8 mm x 0.8 mm or less, chip mounting and alignment may become difficult. The light emitting device package according to the embodiment can easily recognize the chip direction by the first chamfer even if the chip size is small. Therefore, the alignment of the chips can be facilitated.

The horizontal width d1 and the vertical width d2 of the light transmitting layer 300 and the substrate 200 may be the same except for the first chamfer 325. [ Illustratively, the width d1 and the width d2 of the substrate 200 and the light-transmitting layer 300 may be 0.6 mm to 1.2 mm. Illustratively, the widths d1 and d2 of the substrate 200 and the light-transmitting layer 300 may be 0.6 mm or 0.8 mm. That is, the plane shape of the substrate 200 and the light-transmitting layer 300 may be square.

The height h2 of the light emitting device package may be smaller than the width d1 and the vertical width d2 of the light emitting device package. The height h2 of the light emitting device package and the widths d1 and d2 of the light emitting device package may satisfy the following relational expression 1:

[Relation 1]

d1 > d2 > h2

Here, d1 is the width of the light emitting device package, d2 is the vertical width of the light emitting device package, and h2 is the height of the light emitting device package.

However, the present invention is not limited to this, and the width of the light emitting device package and the width of the light emitting device package may satisfy the following relational expression (2).

[Relation 2]

h2 > d1 > d2

The ratio (d1: h2) of the width (or length) width to height of the light emitting device package may be 1: 0.5 to 1: 0.8. That is, the light emitting device package according to the embodiment may not be a cube. Illustratively, the height h2 of the light emitting device package may be 0.4 mm to 1.0 mm, and the widths d1 and d2 of the light emitting device package may be 0.6 mm to 1.2 mm.

The thickness h1 of the light-transmitting layer 300 may be thicker than the thickness h3 of the substrate 200. [ The ratio h1: h3 of the height h1 of the light-transmitting layer 300 to the height h3 of the substrate 200 may be 1.2: 1 to 3: 1. When this condition is satisfied, the thickness of the light-transmitting layer 300 becomes thick, so that the light-emitting element can be sufficiently protected and alignment can be facilitated. Illustratively, the thickness h1 of the light-transmitting layer 300 may be 0.3 mm to 0.6 mm, and the thickness of the substrate 200 may be 0.1 mm to 0.4 mm.

Referring to FIG. 2, the first light emitting device 100A and the second light emitting device 100B may be disposed on the substrate 200 in the X direction. In addition, the third light emitting device 100C may be spaced apart from the first light emitting device 100A in the Y direction.

Each of the first to third light emitting devices 100A, 100B and 100C may have a major axis d32 and a minor axis d31 width of 0.25 mm x 0.15 mm based on the substrate 200 of 0.8 mm x 0.8 mm. However, the present invention is not limited thereto, and the first to third light emitting devices 100A, 100B, and 100C may have a size of 0.25 mm x 0.25 mm.

The first to third light emitting devices 151, 152, and 153 are disposed at intervals of 0.05 mm or more to improve the damage caused by the friction of the first to third light emitting devices 100A, 100B, and 100C during the mounting process have.

The first to third light emitting devices 100A, 100B, and 100C are disposed at intervals of 0.05 mm or more, so that the light of each of the first to third light emitting devices 100A, 100B, and 100C is interfered with Can be improved.

The substrate 200 has a first imaginary line A1 crossing the center C1 and the first side 221 and a second imaginary line A2 crossing the center C2 and the third side 223 And can be divided into the first to fourth quadrants. The first quadrant may be defined as an upper left region, the second quadrant may be defined as an upper right region, the third quadrant may be defined as a lower left region, and the fourth quadrant may be defined as a lower right region.

The first light emitting device 100A may be disposed in the first quadrant, the second light emitting device 100B may be disposed in the second quadrant, and the third light emitting device 100C may be disposed in the third quadrant. The first chamfer 325 may be formed in the fourth quadrant where the light emitting device is not disposed.

At this time, the first straight distance R1 from the center C1 of the substrate 200 to the first chamfer 325 is the distance from the center of the substrate 200 to the first to third light emitting devices 100A, 100B, May be longer than a plurality of second straight line distances (R2, R3) connecting the centers of the first straight lines (R2, R3). That is, the first chamfer 325 does not intersect the imaginary circle C2 having the second straight line distances R2, R3 as radii.

When these conditions are satisfied, the characteristics of the light emitted from the first to third light emitting devices 100A, 100B, and 100C may not be lowered by the first chamfer 325. [ The distance R1-R2 between the first chamfer 325 and the imaginary circle C2 may be between 5% and 20% of the diagonal length of the substrate 200. [ Illustratively, the size of the substrate may be 0.8 mm x 0.8 mm and the spacing R1-R2 between the first chamfer 325 and the imaginary circle C2 may be about 0.02 mm to 0.2 mm.

The plurality of second straight line distances R2 connecting the centers of the first through third light emitting devices 100A, 100B and 100C may be variable according to the pixel size of the display device. Illustratively, the second straight line distance R2 may be between 30% and 50% of the pixel size. The second straight line distance R2 may be between 12% and 25% of the diagonal length of the substrate 200. Illustratively, the size of the substrate may be 0.8 mm x 0.8 mm and the second linear distance R2 may be 0.20 mm to 0.28 mm.

The area of the first area P1 may be 1/5 to 1/16, or 1/5 to 1/10 of the total area of the substrate 200. [ Since the light emitting device package according to the embodiment is a small chip having a size of 0.8 mm x 0.8 mm or less, the area of the first region P1 is relatively large. Therefore, the area of the first area P1 can be recognized as an alignment mark only when it is 1/5 to 1/16 of the entire package area.

If the size of the substrate 200 is 0.8mm x 0.8mm, the area of the first region (P1) may be 0.02 mm ² to about 0.1mm ^2. The width of the first chamfer 325 may be 0.2 mm to 0.5 mm, or 0.3 mm to 0.4 mm.

Referring to FIG. 3, the first chamfer 325a may have a curvature. The curvature may be convex toward the center of the substrate 200. With such a configuration, the distance F1 between the center and the edge of the first chamfer 325 can be widened, which can be advantageous for alignment.

However, the present invention is not limited thereto, and the curvature of the first chamfer 325 may be concave toward the center.

Referring to FIG. 4, the first chamfer 325b may have a bent surface. According to this configuration, the first region of the substrate 200 may have a polygonal shape. As described above, in the light emitting device package according to the embodiment, each light emitting device functions as a subpixel of a display device, not a surface emitting light. Therefore, the fourth quadrant in which the light emitting element is not disposed may be eliminated. Further, the area of the light-transmitting layer 300 can be reduced, and the price competitiveness can be enhanced.

FIG. 5 is a view showing a lead electrode disposed on one surface of the substrate of FIG. 1, and FIG. 6 is a modification of FIG.

Referring to FIG. 5, the circuit board includes a plurality of lead electrodes arranged on one surface. The substrate 200 may include a resin-based printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, and an FR-4 substrate.

The plurality of lead electrodes include first to fourth lead electrodes 231, 232, 233, and 234. The first to fourth lead electrodes 231, 232, 233 and 234 are electrically insulated by the insulating layer 240.

The first lead electrode 231 may extend from the first edge 271. The first lead electrode 231 may be spaced apart from the second through fourth lead electrodes 232, 233, and 234. The first lead electrode 231 may have a shape extending from the first edge 271 to the center of the substrate 200. The first lead electrode 231 may be disposed between the second and fourth lead electrodes 232 and 234. The first lead electrode 231 may be disposed between the third and fourth lead electrodes 233 and 234.

The second lead electrode 232 may extend from the second edge 272. The second lead electrodes 232 may be spaced apart from the first and third lead electrodes 231 and 233 at regular intervals. And the second lead electrode 232 may be disposed in parallel with the third lead electrode 233 in the X direction.

The second lead electrode 232 may be spaced apart from the third lead electrode 233 in the X direction by a predetermined distance. The spacing distance may be 0.075 mm to 0.1 mm, but is not limited thereto.

And the second lead electrode 232 may be disposed in parallel with the first lead electrode 231 in the Y direction. The second lead electrode 232 may be spaced apart from the first lead electrode 231 in the Y direction by a predetermined distance. The spacing distance may be 0.075 mm to 0.1 mm, but is not limited thereto.

The third lead electrode 233 may extend from the third edge 273. The third lead electrode 233 may be spaced apart from the first lead electrode 231 and the second lead electrode 232 at regular intervals. And the third lead electrode 233 may be disposed in parallel with the second lead electrode 232 in the X direction. The third lead electrode 233 may be spaced apart from the first lead electrode 231 in the X direction by a predetermined distance. The interval may be 0.075 mm to 0.1 mm, but is not limited thereto.

The fourth lead electrode 234 may extend from the fourth edge 274. The fourth lead electrode 234 may be spaced apart from the first lead electrode 231. [ The distance between the fourth lead electrode 234 and the first lead electrode 231 may be 0.075 mm or more, but is not limited thereto. The fourth lead electrode 234 may be disposed in parallel with the first lead electrode 231. [

The fourth lead electrode 234 may have a sloped surface 234a at a portion facing the fourth edge 274. The sloping surface 234a may be parallel to an imaginary line L1 connecting one point of the first side surface 221 and one point of the fourth side surface 224. [ According to this structure, since the fourth lead electrode 234 is not exposed to the outside of the light-transmitting layer 300, a separate protective layer may not be further provided. The angle [theta] formed by the inclined plane 234a with the side surface of the substrate may be 10 degrees to 80 degrees. The fourth lead electrode 234 may be formed using a separate photomask process.

The first lead electrode 231 may perform a common electrode function. For example, the first lead electrode 231 may be connected to the anodes of the first through third light emitting devices 100A, 100B, and 100C, and the second through fourth lead electrodes 232, 233, and 234 may be connected to the first, And may be connected to the cathodes of the third light emitting devices 100A, 100B, and 100C, respectively.

The first light emitting device 100A may be electrically connected to the second lead electrode 232 and the first lead electrode 231 and the second light emitting device 100B may be electrically connected to the third lead electrode 233 and the first lead electrode 231. [ (Not shown). The first light emitting device 100A and the second light emitting device 100B may be a flip chip type in which electrodes are disposed on the other surface.

The third light emitting device 100C may be disposed on the first lead electrode 231. [ The third light emitting device 100C may be a red light emitting diode. When a red light emitting diode is manufactured using a GaAs substrate, the yield of the light emitting structure may be reduced in the process of removing the GaAs substrate. Therefore, the third light emitting device 100C may be manufactured as a vertical type, disposed on the common electrode, and electrically connected to the fourth lead electrode 234 by the wire W1. At this time, the size of the third light emitting device 100C may be larger than that of the first light emitting device 100A and the second light emitting device 100B.

Referring to FIG. 6, the inclined surface 234b may be formed on the first lead electrode 231. FIG. The sloping surface 234b may be parallel to the virtual line L2 extending a point on the first side surface 221 and the third side surface 223. At this time, the third light emitting device 100C may be disposed at the center of the substrate 200. According to this structure, a separate mask process performed to form the fourth lead electrode 234 can be omitted.

FIG. 7 is a view showing electrode pads arranged on the other surface of the substrate of FIG. 1, FIG. 8 is a view showing a state where lead electrodes and electrode pads of the circuit board of FIG. 1 are electrically connected to each other, Is electrically connected to the circuit board.

Referring to FIG. 7, the substrate 200 includes first to fourth electrode pads 251, 252, 253, and 254 disposed on the other surface. The first to fourth electrode pads 251, 252, 253 and 254 are electrically insulated by the insulating layer 240. Each of the electrode pads 251, 252, 253, and 254 may be electrically connected to the lead electrode by a penetrating electrode.

8 and 9, the first electrode pad 251 is connected to the first lead electrode 231 by the first penetrating electrode 261, and the second electrode pad 252 is connected to the second penetrating electrode The third electrode pad 253 is connected to the third lead electrode 233 by the third penetrating electrode 263 and the fourth electrode pad 254 is connected to the second lead electrode 232 by the second through- May be connected to the fourth lead electrode 234 by a fourth penetrating electrode 264.

10 is a view for explaining the light emitting device of FIG.

10, the light emitting device 100 includes a light emitting structure 150 disposed under the substrate 110, a pair of electrode pads 171 and 172 disposed on one side of the light emitting structure 150, .

The substrate 110 includes a conductive substrate or an insulating substrate. The substrate 110 may be a material suitable for semiconductor material growth or a carrier wafer. The substrate 110 may be formed of a material selected from the group consisting of sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge. The substrate 110 can be removed as needed.

A buffer layer (not shown) may be further provided between the first semiconductor layer 120 and the substrate 110. The buffer layer may mitigate the lattice mismatch between the substrate 110 and the light emitting structure 150 provided on the substrate 110.

The buffer layer may be a combination of Group III and Group V elements or may include any one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. The buffer layer may be doped with a dopant, but is not limited thereto.

The buffer layer can be grown as a single crystal on the substrate 110, and the buffer layer grown with a single crystal can improve the crystallinity of the first semiconductor layer 120.

The light emitting structure 150 includes a first semiconductor layer 120, an active layer 130, and a second semiconductor layer 140. In general, the light emitting structure 150 may be cut together with the substrate 110 to be separated into a plurality of light emitting structures 150.

The first semiconductor layer 120 may be formed of a compound semiconductor such as group III-V or II-VI, and the first semiconductor layer 120 may be doped with a first dopant. The first semiconductor layer 120 may be a semiconductor material having a composition formula of In _{x 1} Al _{y 1} Ga _{1 -x1-y1} N (0? _{X1? 1} , 0 _{? Y1? 1} , 0? X1 + y1? GaN, AlGaN, InGaN, InAlGaN, and the like. The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first semiconductor layer 120 doped with the first dopant may be an n-type semiconductor layer.

The active layer 130 is a layer where electrons (or holes) injected through the first semiconductor layer 120 and holes (or electrons) injected through the second semiconductor layer 140 meet. As the electrons and the holes recombine, the active layer 130 transitions to a low energy level and can generate light having a wavelength corresponding thereto.

The active layer 130 may have any one of a single well structure, a multiple well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, Is not limited thereto.

The second semiconductor layer 140 is formed on the active layer 130 and may be formed of a compound semiconductor such as group III-V or II-VI group. The second semiconductor layer 140 may be doped with a second dopant . A second semiconductor layer 140 is a semiconductor material having a compositional formula of _{In x5 Al y2 Ga 1 -x5- y2} N (0≤x5≤1, 0≤y2≤1, 0≤x5 + y2≤1) or AlInN, AlGaAs , GaP, GaAs, GaAsP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second semiconductor layer 140 doped with the second dopant may be a p-type semiconductor layer.

An electron blocking layer (EBL) may be disposed between the active layer (130) and the second semiconductor layer (140). The electron blocking layer can block the flow of electrons supplied from the first semiconductor layer 120 to the second semiconductor layer 140 and increase the probability of recombination of electrons and holes in the active layer 130. [ The energy band gap of the electron blocking layer may be greater than the energy band gap of the active layer 130 and / or the second semiconductor layer 140.

The electron blocking layer may be formed of a semiconductor material having a composition formula of In _{x 1} Al _{y 1} Ga _{1 -x 1 -y 1} N (0? _{X 1 ? 1} , 0? _{Y 1 ? 1} , 0? _{X 1 + y 1 ? 1} ), for example, AlGaN, InGaN, InAlGaN, and the like, but is not limited thereto.

The light emitting structure 150 includes a through hole H formed in the second semiconductor layer 140 in the direction of the first semiconductor layer 120. The insulating layer 160 may be formed on the side surfaces of the light emitting structure 150 and the through holes H. [ At this time, the insulating layer 160 may expose one surface of the second semiconductor layer 140.

The electrode layer 141 may be disposed on one side of the second semiconductor layer 140. The electrode layer 141 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide , At least one of AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IrOx, RuOx, RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO And is not limited to these materials.

The electrode layer 141 may be formed of one of In, Co, Si, Ge, Au, Pd, Pt, Ru, Re, Mg, Zn, Hf, Ta, Rh, Ir, W, Ti, Ag, Cr, Mo, , Ni, Cu, and WTi.

The first pad 171 may be electrically connected to the first semiconductor layer 120. Specifically, the first pad 171 may be electrically connected to the first semiconductor layer 120 through the through hole H. The first pad 171 may be electrically connected to the first solder bump 181.

The second pad 172 may be electrically connected to the second semiconductor layer 140. Specifically, the second pad 172 may be electrically connected to the electrode layer 141 through the insulating layer 160. The second pad 172 may be electrically connected to the second solder bump 182.

FIG. 11 is a conceptual diagram of a light emitting device package according to a second embodiment of the present invention, FIG. 12 is a conceptual view of a light emitting device package according to a third embodiment of the present invention, FIG. 14 is a conceptual view of a light emitting device package according to a fifth embodiment of the present invention, and FIG. 15 is a view showing lead electrodes disposed on one surface of the substrate of FIG.

Referring to FIG. 11, the substrate 200 may include a second chamfer 225 corresponding to the first chamfer 325 of the light-transmitting layer 300. According to such a configuration, there is an advantage that the process is simplified by simultaneously cutting the light-transmitting layer 300 and the edge of the substrate 200.

Referring to FIG. 12, the angle 2 between the first chamfer 325 and the fourth side surface 224 of the substrate may be 10 degrees to 70 degrees. That is, the planar shape of the first region P1 exposed by the first chamfer 325 may not be an isosceles triangle.

13, the horizontal and vertical widths of the light-transmitting layer 300 may be smaller than the horizontal and vertical widths d1 and d2 of the substrate 200. Illustratively, the width of the light-transmitting layer 300 may be 0.80 mm to 0.90 mm, and the width of the light-transmitting layer 300 may be 0.80 mm to 0.90 mm. The substrate 200 may have a width of 0.90 mm to 1.2 mm and a width of 0.90 mm to 1.2 mm. That is, the planar shapes of the light-transmitting layer 300 and the substrate 200 are both a square structure, but the size of the light-transmitting layer 300 can be made smaller. According to such a configuration, since the second region P2 near the edge is exposed in addition to the first region P1, the substrate 200 can be more easily recognized.

The width of the second area P2 may be 1/20 to 1/8 of the width d1 of the substrate 200. [ Illustratively, the size of the substrate 200 may be 0.8 mm x 0.8 mm and the width of the second region P2 may be 0.05 mm to 0.08 mm.

Referring to FIGS. 14 and 15, the third lead electrode 234 may be partially exposed to the first region P1 of the substrate 200. FIG. According to this structure, the mask process for separately forming the third lead electrode 234 can be omitted. That is, the first to fourth lead electrodes 231, 232, 233, and 234 can be simultaneously formed on a plurality of unit substrates using one circuit pattern. At this time, a separate protective coating may be applied to the exposed third lead electrode 234.

According to the embodiment, the first to fourth lead electrodes 231, 232, 233, and 234 may include a ferromagnetic material. Also, the first and second electrode pads 251, 252, 253, and 254 may also include a ferromagnetic material.

Here, a material having ferromagnetism is a material strongly magnetized in the direction of a magnetic field when a magnetic field is applied, and may include nickel (Ni), iron (Fe), and cobalt (Co). According to this configuration, the light emitting device package can be quickly arranged on the panel using the magnetic field.

16 is a conceptual diagram of a display device according to an embodiment of the present invention.

16, the display device includes an array substrate 60 in which a plurality of common wiring lines 241 and a driving wiring line 242 cross each other, and a light emitting device package 10 disposed in each pixel region P A first driver 20 for applying a driving signal to the common wiring 241; a second driver 30 for applying a driving signal to the driving wiring 242; 2 < / RTI >

The array substrate 60 may be a circuit board on which the light emitting device package 10 is mounted. The array substrate 60 may be a single-layer or multi-layer rigid substrate or a flexible substrate. The common wiring 241 and the driving wiring 242 may be formed on the array substrate 60. [

The pixel region P may be defined as a region where a plurality of common lines 241 and the driving line 242 intersect and the pixel region P may be a concept including RGB subpixels. The light emitting device package 10 in which the first to third light emitting devices 100A, 100B, and 100C are disposed may be mounted on the pixel region P to serve as an RGB sub-pixel. Hereinafter, three light emitting devices function as RGB subpixels, but the number of light emitting devices can be adjusted as needed.

The first light emitting device 100A may serve as a first subpixel for outputting light of a blue wavelength band. And the second light emitting device 100B may serve as a second subpixel for outputting light of a green wavelength band. And the third light emitting device 100C may serve as a third subpixel for outputting light of a red wavelength band.

The second light emitting device 100B and the third light emitting device 100C may convert the green light and the red light into a blue light emitting diode chip by arranging a wavelength conversion layer. The wavelength conversion layer may include a phosphor or a quantum dot (QD).

The common wiring 241 may be electrically connected to the light emitting elements disposed in the plurality of pixel regions P arranged in the first direction (X direction).

The electrical connection method of the common wiring 241 and the light emitting elements 100A, 100B, and 100C is not limited. Illustratively, the common wiring 241 and the light emitting element may be electrically connected using a penetrating electrode or a lead electrode of the substrate.

The first to third driving wirings 243, 244 and 245 may be electrically connected to the light emitting elements arranged in the plurality of pixel regions P arranged in the second direction (Y direction).

The first driving wiring 243 is electrically connected to the first light emitting element 100A and the second driving wiring 244 is electrically connected to the second light emitting element 100B, And may be electrically connected to the device 100C.

The electrical connection method of the driving wiring 242 and the light emitting elements 100A, 100B, and 100C is not limited. Illustratively, the driving wiring 242 and the light emitting element may be electrically connected using a penetrating electrode or by using a lead electrode of the substrate.

The protective layer 47 may be disposed between the light emitting device packages 10. The protective layer 47 can protect the circuit patterns of the light emitting device package 10 and the array substrate 60.

The protective layer 47 may be formed of the same material as the solder resist, or may be formed of an insulating material. The protective layer 47 may include at least one of SiO ₂ , Si ₃ N ₄ , TiO ₂ , Al ₂ O ₃ , and MgO.

The protective layer 47 may comprise a black matrix material. When the protective layer 47 is made of a black matrix material, it may be implemented, for example, of carbon black, graphite, or poly pyrrole.

The controller 50 outputs control signals to the first and second drivers 20 and 30 so that power is selectively applied to the common wiring 241 and the first to third driving wirings 243, 244 and 245, The first to third light emitting devices 100A, 100B, and 100C in the pixel P can be individually controlled.

The display device is equipped with a standard definition (760 × 480) resolution, HD (high definition) resolution (1180 × 720), FHD (Full HD) resolution (1920 × 1080), UH (Ultra HD) (E.g., 4K (K = 1000), 8K, etc.). At this time, the first to third light emitting devices 100A, 100B, and 100C according to the embodiment may be arranged and connected in plural according to the resolution.

The display device may be a display panel or a TV having a diagonal size of 100 inches or more, and the pixel may be implemented by a light emitting diode (LED). Therefore, power consumption can be reduced, can be provided with a long lifetime at a low maintenance cost, and can be provided as a self-luminous display with high brightness.

The embodiment realizes images and images using the light emitting device package 100, and thus has an advantage of excellent color purity and color reproduction.

The embodiment realizes images and images using a light emitting device package excellent in linearity, and thus a large display device of 100 inches or more can be realized.

The embodiment can realize a large-sized display device of 100 inches or more with high resolution at low cost.

The light emitting device package 100 according to the embodiment can be applied not only to the display device but also to an illumination unit, a pointing device, a lamp, a streetlight, a vehicle lighting device, a vehicle display device, a smart watch, and the like.

10: Light emitting device package
100A, 100B, and 100C:
200: substrate
300:
325: first chamfer

Claims (13)

A substrate having a plurality of lead electrodes disposed on one surface thereof and a plurality of electrode pads disposed on the other surface and electrically connected to the plurality of lead electrodes;
A plurality of light emitting elements arranged on the substrate and electrically connected to the plurality of lead electrodes; And
And a light-transmitting layer covering the plurality of light-emitting elements,
Wherein the light-transmitting layer includes a first sidewall to a fourth sidewall connecting the upper surface and the lower surface, and a first chamfer formed at an edge between the first sidewall and the fourth sidewall.
The method according to claim 1,
Wherein one surface of the substrate includes a first region exposed by the first chamfer.
3. The method of claim 2,
And the area of the first region is 1/5 to 1/16 of the total area of the substrate.
The method according to claim 1,
And the substrate includes a second chamfer disposed in a region corresponding to the first chamber of the light-transmitting layer.
The method according to claim 1,
Wherein the height of the light-transmitting layer in the first direction is greater than the height in the first direction of the substrate, and the first direction is parallel to the other surface direction on one side of the substrate.
6. The method of claim 5,
Wherein the ratio of the height of the light-transmitting layer in the first direction to the height of the substrate in the first direction is 1.2: 1 to 3: 1.
The method according to claim 1,
A first side and a second side of the substrate facing each other, and a third side and a fourth side opposite to each other,
Wherein the width of the first side of the substrate is greater than the height from the other side of the substrate to the upper surface of the light-transmitting layer.
8. The method of claim 7,
A width of the first side of the substrate,
Wherein a ratio of a height from the other surface of the substrate to a top surface of the light transmitting layer is 1: 0.5 to 1: 0.8.
The method according to claim 1,
Wherein the first straight distance from the center of the substrate to the first chamfer,
And a plurality of second linear distances connecting the plurality of light emitting elements at the center of the substrate.
The method according to claim 1,
Wherein the plurality of light emitting elements include:
A first light emitting element for emitting light of a blue wavelength band;
A second light emitting element for emitting light of a green wavelength band; And
And a third light emitting element for emitting light of a red wavelength band.
The method according to claim 1,
Wherein the plurality of lead electrodes comprise:
A first lead electrode extending to a first edge of the substrate;
A second lead electrode extending from the second edge;
A third lead electrode extending from the third edge; And
And a fourth lead electrode extending from the fourth edge.
An array substrate; And
And a plurality of light emitting device packages disposed on the array substrate,
Wherein the light emitting device package includes:
A substrate having a plurality of lead electrodes disposed on one surface thereof and a plurality of electrode pads disposed on the other surface and electrically connected to the plurality of lead electrodes;
A plurality of light emitting elements arranged on the substrate and electrically connected to the plurality of lead electrodes; And
And a light-transmitting layer covering the plurality of light-emitting elements,
The light-transmitting layer includes a first sidewall to a fourth sidewall connecting the upper surface and the lower surface, and a first chamfer formed at an edge between the first sidewall and the fourth sidewall.
A panel according to claim 12;
A first driver for applying an electric signal to the common wiring;
A second driver for applying an electric signal to the plurality of driving wirings; And
And a controller for controlling the first driver and the second driver.

Images