KR102472353B1 - Light emitting device, array substrate, panel, and display device including the same - Google Patents

Abstract

Embodiments include a first light emitting unit, a second light emitting unit, and a third light emitting unit; a housing supporting the first to third light emitting units; a first electrode electrically connected to the first to third light emitting units and exposed to a bottom surface of the housing; a 2-1 electrode electrically connected to the first light emitting unit and exposed to the bottom surface of the housing; a 2-2 electrode electrically connected to the second light emitting unit and exposed to the bottom surface of the housing; and a 2-3 electrode electrically connected to the third light emitting unit and exposed to a bottom surface of the housing, wherein the first electrode and the 2-1 to 2-3 electrodes are electrically insulated from each other; Disclosed are a light emitting element, an array substrate, a panel, and a display device including the same having a rotationally symmetrical shape with respect to a central axis passing through the center of the bottom surface.

Description

Light emitting device, array substrate, panel, and display device including the same

The embodiment relates to a light emitting device, an array substrate, a panel, and a display device including the same.

A light emitting diode (LED) is one of light emitting elements that emit light when current is applied. A light emitting diode can emit light with high efficiency at a low voltage and thus has an excellent energy saving effect. Recently, the luminance problem of light emitting diodes has been greatly improved, and they are applied to various devices such as backlight units of liquid crystal display devices, electronic signboards, displays, and home appliances.

A typical liquid crystal display displays an image or video with light emitted from a light emitting diode and light passing through a color filter by controlling transmittance of liquid crystal. Recently, high-definition and large-screen display devices higher than HD are required, but it is difficult to implement a high-definition large-screen display device due to yield and cost in liquid crystal display devices and organic electric field display devices that have complex configurations that are mainly used in general. have.

The embodiment may provide a substrate, panel, and display device having simplified circuit patterns.

The embodiment provides a light emitting device panel and a display device capable of implementing a plurality of colors, respectively, at a chip level.

The embodiment may provide a substrate, a panel, and a display device in which a plurality of light emitting elements emitting different colors are disposed in each of a plurality of pixel areas.

The embodiment may provide a substrate, panel, and display device capable of improving productivity and yield.

The embodiment may provide a display device capable of realizing a high-resolution, large-sized display device.

A light emitting device according to an embodiment of the present invention includes a first light emitting unit, a second light emitting unit, and a third light emitting unit; a housing supporting the first to third light emitting units; a first electrode electrically connected to the first to third light emitting units and exposed to a bottom surface of the housing; a 2-1 electrode electrically connected to the first light emitting unit and exposed to the bottom surface of the housing; a 2-2 electrode electrically connected to the second light emitting unit and exposed to the bottom surface of the housing; and a 2-3 electrode electrically connected to the third light emitting unit and exposed to a bottom surface of the housing, wherein the first electrode and the 2-1 to 2-3 electrodes are electrically insulated from each other; It has a rotationally symmetrical shape with respect to a central axis passing through the center of the bottom surface.

The first light emitting unit may emit light in a blue wavelength range, the second light emitting unit may emit light in a green wavelength range, and the third light emitting unit may emit light in a red wavelength range.

The first electrode is disposed at the center of the bottom surface, the 2-1 electrode has a shape surrounding the first electrode, and the 2-2 electrode has a shape surrounding the 2-1 electrode, The 2-3 electrode may have a shape surrounding the 2-2 electrode.

An array substrate according to an embodiment of the present invention includes a plurality of common wires and driving wires defining a plurality of pixel areas; and pixel electrodes disposed in the plurality of pixel areas, wherein the pixel electrodes include first to fourth lead electrodes electrically insulated from each other, and each of the common wires is disposed in a plurality of pixels in a first direction. The first lead electrodes of the electrode are electrically connected, the first direction is parallel to the extending direction of the common wiring, and the second to fourth lead electrodes are spaced apart from the common wiring.

The second to fourth lead electrodes may be separated based on the common wiring.

The second to fourth lead electrodes may include 2-1st to 4-1st lead electrodes disposed on one side and 2-2nd to 4-2nd lead electrodes disposed on the other side of the common wiring. have.

The pixel electrode may be symmetrical with respect to a first virtual line perpendicular to the common wire and passing through the center of the first lead electrode.

The pixel electrode may be symmetrical with respect to a second virtual line that is horizontal to the common wire and passes through the center of the first lead electrode.

The pixel electrode includes a first lead electrode disposed in the center; a second lead electrode surrounding the first lead electrode; a third lead electrode surrounding the second lead electrode; and a fourth lead electrode surrounding the third lead electrode.

The array substrate may include a first insulating layer; first to third driving wires disposed on the first insulating layer; a second insulating layer covering the first to third driving wires; the plurality of pixel electrodes and common wiring disposed on the second insulating layer; and a third insulating layer covering the common wiring and exposing the plurality of pixel electrodes.

The first driving wiring is electrically connected to the second lead electrode of the pixel electrode, the second driving wiring is electrically connected to the third lead electrode of the pixel electrode, and the third driving wiring is electrically connected to the fourth lead electrode of the pixel electrode. It may be electrically connected to the lead electrode.

A panel according to an embodiment of the present invention includes an array substrate; and a plurality of light emitting elements disposed on the array substrate, wherein the array substrate includes: a plurality of common wires and driving wires defining a plurality of pixel areas; and a plurality of pixel electrodes respectively disposed in the plurality of pixel areas, wherein the pixel electrodes include first to fourth lead electrodes electrically insulated from each other, and each common wire is disposed in a first direction. First lead electrodes of the plurality of pixel electrodes are electrically connected, the first direction is an extending direction of the common wiring, and the second to fourth lead electrodes are spaced apart from the common wiring.

The plurality of light emitting elements may include a first light emitting unit, a second light emitting unit, and a third light emitting unit; a housing supporting the first to third light emitting units; a first electrode electrically connected to the first to third light emitting units and exposed to a bottom surface of the housing; a plurality of 2-1 electrodes electrically connected to the first light emitting unit and exposed to the bottom surface of the housing; a 2-2 electrode electrically connected to the second light emitting unit and exposed to the bottom surface of the housing; and a 2-3 electrode electrically connected to the third light emitting unit and exposed to a bottom surface of the housing, wherein the first electrode and the 2-1 to 2-3 electrodes are electrically insulated from each other; It may be rotationally symmetric with respect to a central axis passing through the center of the bottom surface.

The first electrode of the light emitting element is electrically connected to the first lead electrode of the pixel electrode, the 2-1 electrode of the light emitting element is electrically connected to the second lead electrode of the pixel electrode, and the The 2-2 electrode may be electrically connected to the third lead electrode of the pixel electrode, and the 2-3 electrode of the light emitting device may be electrically connected to the fourth lead electrode of the pixel electrode.

At least one of the first electrode and the 2-1 to 2-3 electrodes of the light emitting device may include a ferromagnetic material.

At least one of the first to fourth lead electrodes of the array substrate may include a ferromagnetic material.

An area of the first electrode exposed to the bottom surface may be smaller than an area of the first lead electrode.

Areas of the 2-1 to 2-3 electrodes exposed to the bottom surface may be greater than areas of the second to fourth lead electrodes.

The housing is disposed between the first to third light emitting units, and the housing may include carbon black, graphite, or poly pyrrole.

According to the embodiment, a single light emitting device can simultaneously implement a plurality of colors at a chip level. The light emitting element may function as a pixel of a display device. Therefore, a color filter or the like of the display device can be omitted.

In addition, if a chip-level light emitting device is used as a pixel, pixel density can be increased in a display device of the same size. Accordingly, a large display device with high resolution can be implemented.

The embodiment can align the light emitting device to the substrate using magnetic force, thereby shortening the alignment time and bonding time of the light emitting device.

According to an embodiment, a circuit pattern of an array substrate may be simplified by sharing a common wiring between a plurality of lead electrodes.

According to the embodiment, the lead electrode and the common wire are disposed on the same plane, so that the substrate can be made of a thin film.

In the embodiment, a display device with high luminance and high reproducibility may be implemented by arranging light emitting diodes emitting different colors as sub-pixels in one pixel.

Examples can improve productivity and improve yield.

Various advantageous advantages and effects of the present invention are not limited to the above description, and will be more easily understood in the process of describing specific embodiments of the present invention.

1 is a conceptual diagram of a display device according to an embodiment of the present invention;
2 is a circuit diagram showing a structure in which light emitting units of a pixel area of FIG. 1 are divided and driven;
3 is a view showing a state in which a plurality of light emitting units disposed in a pixel area are electrically connected to an array substrate;
4 is a view for explaining a structure in which a plurality of light emitting units are integrally formed;
5 is a conceptual diagram of a light emitting device according to an embodiment of the present invention;
6 is a diagram for explaining an electrode structure of a light emitting device according to an embodiment of the present invention;
7 is a modified example of FIG. 6;
8 is a view showing an array substrate according to an embodiment of the present invention,
9 is a view showing a state in which a plurality of lead electrodes are disposed in a pixel area;
10 is an enlarged view of the fourth lead electrode of FIG. 9;
11 is a view showing a state in which light emitting elements are electrically connected to lead electrodes of an array substrate;
12 is a diagram showing the arrangement relationship between a common wiring and a lead electrode;
13 is a cross-sectional view in the AA direction of FIG. 12;
14 is a view showing the arrangement relationship between drive wiring and lead electrodes;
15 is a cross-sectional view in the direction BB of FIG. 14;
16 is a first modified example of an array substrate according to an embodiment of the present invention;
17 is a second modified example of an array substrate according to an embodiment of the present invention;
18 is a third modified example of an array substrate according to an embodiment of the present invention;
19 is a fourth modified example of an array substrate according to an embodiment of the present invention.

The present embodiments may be modified in other forms or combined with each other, and the scope of the present invention is not limited to each of the embodiments described below.

Even if a matter described in a specific embodiment is not described in another embodiment, it may be understood as a description related to another embodiment, unless there is a description contrary to or contradictory to the matter in another embodiment.

For example, if the characteristics of component A are described in a specific embodiment and the characteristics of component B are described in another embodiment, the opposite or contradictory description even if the embodiment in which components A and B are combined is not explicitly described. Unless there is, it should be understood as belonging to the scope of the present invention.

In the description of the embodiment, in the case where an element is described as being formed “on or under” of another element, on or under (on or under) or under) includes both elements formed by directly contacting each other or by indirectly placing one or more other elements between the two elements. In addition, when expressed as "on or under", it may include the meaning of not only the upward direction but also the downward direction based on one element.

Hereinafter, with reference to the accompanying drawings, embodiments of the present invention will be described in detail so that those skilled in the art can easily carry out the present invention.

1 is a conceptual diagram of a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 1 , the display device includes a panel 40 where a plurality of common wires 241 and a driving wire 242 intersect, and first to third light emitting units 100A and 100B disposed in the pixel area P, respectively. , 100C), the first driver 20 for applying a driving signal to the common wiring 241, the second driver 30 for applying a driving signal to the driving wiring 242, and the first driver 20 and the second driver 20. A controller 50 controlling the driver 30 may be included.

The pixel area P may be defined as an area where a plurality of common wires 241 and driving wires 242 intersect, and the pixel area P may include RGB sub-pixels. The first to third light emitting units 100A, 100B, and 100C may be disposed in the pixel area P to serve as RGB sub-pixels. The number of light emitting units may be adjusted as needed.

The first light emitting unit 100A may serve as a first subpixel outputting light in a blue wavelength range. The second light emitting unit 100B may serve as a second subpixel outputting light in a green wavelength range. The third light emitting unit 100C may serve as a third subpixel outputting light in a red wavelength range.

The second light emitting unit 100B and the third light emitting unit 100C may convert green light and red light by disposing a wavelength conversion layer on the blue light emitting diode. The wavelength conversion layer may include both phosphors or quantum dots (QDs).

The common wire 241 may extend in a first direction (X direction) and be electrically connected to the plurality of light emitting devices 100 disposed in the first direction.

A method of electrically connecting the common wire 241 and the light emitting device 100 is not particularly limited. Illustratively, the common wire 241 and the light emitting device 100 may be electrically connected using a through electrode or a lead electrode of a substrate.

The first to third driving wires 243 , 244 , and 245 may be electrically connected to the plurality of light emitting devices 100 disposed in the second direction (Y direction).

Illustratively, the first driving wire 243 is electrically connected to the first light emitting unit 100A, the second driving wire 244 is electrically connected to the second light emitting unit 100B, and the third driving wire may be electrically connected to the third light emitting unit 100C.

A method of electrically connecting the driving wiring 242 and the light emitting device 100 is not limited. Illustratively, the drive wire 242 and the light emitting element may be electrically connected using a through electrode or a lead electrode of a substrate.

The controller 50 outputs a control signal to the first and second drivers 20 and 30 so that power is selectively applied to the common wire 241 and the first to third drive wires 243, 244 and 245, The first to third light emitting units 100A, 100B, and 100C in the pixel P may be individually controlled.

The display device is SD (Standard Definition) level resolution (760 x 480), HD (High definition) level resolution (1180 x 720), FHD (Full HD) level resolution (1920 x 1080), UH (Ultra HD) level resolution (3480 x 2160), or UHD level It can be implemented with higher resolution (eg, 4K (K=1000), 8K, etc.). In this case, the first to third light emitting units 100A, 100B, and 100C according to the embodiment may be arranged and connected in plurality according to the resolution.

The display device may be an electronic display board or TV having a diagonal size of 100 inches or more, and pixels may be implemented as light emitting diodes (LEDs). Therefore, it can be provided with low power consumption, low maintenance cost, long lifespan, and a high-brightness self-luminous display.

The array substrate 200 may be a circuit board on which a plurality of light emitting devices 100 are mounted. The array substrate 200 may be a single layer or multi-layer rigid substrate or a flexible substrate. A plurality of lead electrodes may be electrically connected to the common wiring 241 and the driving wiring 242 on the array substrate 200 .

FIG. 2 is a circuit diagram showing a structure in which light emitting units in the pixel area of FIG. 1 are divided and driven, and FIG. 3 is a diagram showing a state in which light emitting elements disposed in the pixel area are electrically connected to an array substrate.

Referring to FIG. 2 , one end of the first to third light emitting units 100A, 100B, and 100C may be connected to one common wiring 241, and the other ends may be connected to respective drive wirings 243, 244, and 245. . Here, the common wire 241 may be an anode or a cathode, but is not limited thereto. The first to third light emitting units 100A, 100B, and 100C may be individually driven according to signals applied to the driving wires 243 , 244 , and 245 .

Referring to FIG. 3 , the light emitting device 100 may be a package of a known type in which a plurality of light emitting diodes are disposed. For example, the light emitting device 100 may be a package in which a blue light emitting diode, a green light emitting diode, and a red light emitting diode are bonded to a housing. However, the light emitting device 100 is not necessarily limited thereto, and the light emitting device 100 may have a structure (eg, a wafer level package) having first to third light emitting units 100A, 100B, and 100C at a chip level.

The light emitting device 100 includes a first electrode 191 and 2-1 to 2-3 electrodes 192 , 193 , and 194 . The first electrode 191 may be connected to the common wire 241 , and the 2-1st to 2-3 electrodes 192 , 193 , and 194 may be connected to the driving wires 243 , 244 , and 245 . Hereinafter, a structure having the first to third light emitting units 100A, 100B, and 100C at the chip level will be described.

The first electrode 191 is connected to the first lead electrode 211 of the array substrate 200, the 2-1 electrode 192 is connected to the second lead electrode 212, and the 2-2 electrode 193 ) may be connected to the third lead electrode 213, and the 2-3 electrode 194 may be connected to the fourth lead electrode 214. The electrode of the light emitting device and the lead electrode of the substrate may be metal bonded or eutectic bonded, but are not limited thereto.

At least one or all of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 of the light emitting device 100 include an electrode having a ferromagnetic material, and the array substrate At least one or all of the first to fourth lead electrodes 211, 212, 213, and 214 of (200) may include a ferromagnetic material.

Here, the ferromagnetism material is a material that is strongly magnetized in the direction of a magnetic field when a magnetic field is applied, and may include nickel (Ni), iron (Fe), and cobalt (Co).

According to the embodiment, when a plurality of light emitting devices are placed on the array substrate 200 and a magnetic field is applied, the plurality of light emitting devices can be self-aligned to each lead electrode by magnetic force. Accordingly, it is possible to reduce the time required to arrange and bond the light emitting device. When one light emitting device chip includes the first to third light emitting units, the time required for arranging and bonding the light emitting device may be reduced by 1/3.

When the lead electrode includes a metal layer having a ferromagnetic material as a single layer, it may have a thickness of 30 nm or more. If the thickness of the layer (s) having a ferromagnetic material in the lead electrode is less than 30 nm, the magnetic force is weakened, and the mutual attraction force may decrease, and there is a problem that the alignment position of the light emitting element may be distorted.

The protective layer 46 may be disposed between the light emitting devices 100 . The protective layer 46 may protect the circuit patterns of the light emitting device 100 and the array substrate 200 .

The protective layer 46 may be formed of a material such as solder resist or an insulating material. The protective layer 46 may include at least one of SiO ₂ , Si ₃ N ₄ , TiO ₂ , Al ₂ O ₃ , and MgO.

The protective layer 46 may include a black matrix material. When the protective layer 46 is made of a black matrix material, it may be made of, for example, carbon black, graphite, or polypyrrole.

The light-transmitting layer 47 may transmit light emitted from the light emitting device. The light-transmitting layer 47 may emit light to the top surface or top and side surfaces. Here, a reflective member, for example, a member in which a metal compound is added in a resin material may be further disposed around the light emitting element for light extraction, but is not limited thereto.

An impurity such as a diffusion agent may be added to the light-transmitting layer 47, but is not limited thereto. The light-transmitting layer 47 may include a resin material, for example, a transparent material such as silicone or epoxy. The light-transmitting layer 47 may be implemented as a transparent film, but is not limited thereto.

4 is a view for explaining a structure in which a plurality of light emitting units are integrally formed, FIG. 5 is a conceptual diagram of a light emitting device according to an embodiment of the present invention, and FIG. 6 is an electrode of a light emitting device according to an embodiment of the present invention. It is a drawing for explaining the structure, and FIG. 7 is a modified example of FIG. 6 .

Referring to FIG. 4 , the plurality of light emitting units 100A, 100B, and 100C may be a single light emitting structure. The plurality of light emitting units 100A, 100B, and 100C may include a first active layer 121 , a second active layer 122 , and a third active layer 123 spaced apart from each other in one direction. One direction may be a direction perpendicular to the thickness direction of the first conductive type semiconductor layer 110 .

Depending on the reflection structure of the chip, light emitted from the plurality of active layers 121, 122, and 123 may be emitted upward or downward based on the drawing.

Illustratively, the first active layer 121 may emit light of a blue wavelength band, and the second active layer 122 may emit light of a green wavelength band. Hereinafter, light in a blue wavelength band may be blue light, light in a green wavelength band is defined as green light, and light in a red wavelength band is defined as red light.

The third active layer 123 may emit blue light. Blue light emitted from the third active layer 123 may be converted into red light by the wavelength conversion layer 131 . However, it is not necessarily limited thereto, and the third active layer 123 may emit red light.

The first to third light-emitting units 100A, 100B, and 100C each independently include active layers 121, 122, and 123 and second conductivity-type semiconductor layers 131, 132, and 133, and first conductivity-type semiconductors. Layer 110 can be shared. According to this configuration, it is possible to prevent cracks from occurring in the light emitting structure 100 due to the relatively thick first conductive type semiconductor layer 110 . In addition, it may have a current spreading effect.

Common power may be applied to the first conductive semiconductor layer 110 , and driving power may be selectively applied to the plurality of second conductive semiconductor layers 131 , 132 , and 133 . According to the embodiment, only the active layer to which the driving voltage is applied can individually emit light.

Illustratively, when power is input only to the second conductivity type semiconductor layer 131 of the first light emitting unit 100A in a state where power is input to the first light emitting unit 110, the first light emitting unit 100A It can emit blue light. Similarly, when power is input to the second conductive type semiconductor layers 131 and 132 of the first light emitting unit 100A and the second light emitting unit 100B, blue light and green light may be simultaneously emitted.

Such a light emitting structure may constitute a pixel of a display, and the first to third light emitting units 100A, 100B, and 100C may function as RGB sub-pixels. For example, the first light emitting unit 100A may function as a blue pixel, the second light emitting unit 100B may function as a green pixel, and the third light emitting unit 100C may function as a red pixel.

When a pixel is implemented using the light emitting structure 100 according to the embodiment, the color filter may be omitted. In addition, a process of packaging three light emitting diodes to configure each RGB pixel can be omitted. In addition, since a light emitting diode chip, which is smaller than an RGB package, is used as a pixel, a panel with high resolution can be manufactured.

The first conductivity type semiconductor layer 110 may be implemented with a compound semiconductor such as group III-V or group II-VI, and the first dopant may be doped in the first conductivity type semiconductor layer 110 .

The first conductive semiconductor layer 110 is a semiconductor material having a composition formula of AlxInyGa(1-x-y)N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), InAlGaN, AlGaAs, GaP , GaAs, GaAsP, AlGaInP may be formed of any one or more, but is not limited thereto.

When the first dopant is an n-type dopant such as Si, Ge, Sn, Se, or Te, the first conductivity-type semiconductor layer 110 may be an n-type nitride semiconductor layer.

In the plurality of active layers 121, 122, and 123, electrons (or holes) injected through the first conductive semiconductor layer 110 and holes (or electrons) injected through the second conductive semiconductor layer 130 meet. It is a layer. The active layer transitions to a lower energy level as electrons and holes recombine, and can generate light having a wavelength corresponding thereto.

The plurality of active layers 121, 122 and 123 may have a single well structure, a multi well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure. And, the structure of the active layer is not limited thereto.

When the plurality of active layers 121, 122 and 123 are formed in a well structure, the well layer/barrier layer of the active layer is InGaN/GaN, InGaN/InGaN, GaN/AlGaN, InAlGaN/GaN, GaAs(InGaAs)/AlGaAs, GaP (InGaP) / AlGaP may be formed in a pair structure of one or more, but is not limited thereto. The well layer may be formed of a material having a band gap smaller than that of the barrier layer.

When each of the plurality of active layers 121, 122, and 123 has a plurality of well layers, each well layer may generate light of the same wavelength range. For example, all of the plurality of well layers disposed on the second active layer 122 may generate green light, and all of the plurality of well layers disposed on the first active layer 121 may generate blue light. The light emitting device 100 according to the embodiment is for realizing a pixel of a display, and is distinguished from a structure that implements white light by mixing RGB light.

The plurality of second conductivity type semiconductor layers 131, 132, and 133 may be implemented with compound semiconductors such as group III-V and group II-VI, and the second conductivity type semiconductor layers 131, 132, and 133 may include 2 dopants may be doped.

The second conductive semiconductor layers 131, 132, and 133 may be a semiconductor material having a composition formula of InxAlyGa1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1), AlInN, or AlGaAs. , GaP, GaAs, GaAsP, may be formed of a material selected from AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second conductivity-type semiconductor layers 131, 132, and 133 doped with the second dopant may be p-type semiconductor layers.

The first conductive semiconductor layer 110 may include a plurality of convex portions 111 and concave portions 113 and a base portion 112 electrically connecting the convex portions 111 to each other. The first to third light emitting portions 100A, 100B, and 100C include the convex portion 111 of the first conductive semiconductor layer 110, the active layers 121, 122, and 123, and the second conductive semiconductor layer 131, 132, 133) may be included, respectively. According to the embodiment, a current spreading effect can be obtained and cracks can be prevented by the first conductive type semiconductor layer 110 .

In the light emitting device according to the embodiment, the first to third light emitting units 100A, 100B, and 100C may be independently turned on. However, when a specific light emitting unit is turned on, some light may be emitted to other light emitting units through the first conductive type semiconductor layer 110 . Therefore, a light interference problem may occur in which the light emitting portion, which should not actually be turned on, emits light.

The convex portion 111 and the concave portion 113 of the first conductive semiconductor layer 110 may be formed during mesa etching to partition the first to third light emitting portions 100A, 100B, and 100C. The optical interference problem may be solved by completely separating the first to third light emitting units 100A, 100B, and 100C.

The thickness d2 of the concave portion 113 may be 10% to 60% of the total thickness d1 of the light emitting structure. If the thickness (d2) of the concave portion 113 is less than 10%, the thickness of the concave portion 113 is too thin and cracks easily occur during the manufacturing process. If the thickness exceeds 60%, the first conduction There is a problem that it is difficult to function as a sub-pixel because the amount of light incident to the adjacent light emitting unit through the type semiconductor layer 110 increases. When the thickness d2 of the concave portion 113 is 10% to 33%, most of the emitted light L3 is reflected upward, effectively reducing the problem of light interference. Here, the thickness d2 of the concave portion 113 is the thickness from the bottom surface of the first conductive type semiconductor layer 110 to the concave portion 113 .

The height d4 of the second active layer 122 may be lower than the heights d3 and d5 of the first active layer 121 and the third active layer 123 . The second light emitting portion 100B may be manufactured by etching the light emitting structure 100 and then regrowing it. Since the light emitting structure 100 may be damaged during re-growth, it is desirable to minimize the re-growth time.

Re-growth time can be reduced by minimizing the thickness of the re-grown first conductivity-type semiconductor layer. In this process, the height d4 of the second active layer 122 may be relatively low. However, it is not necessarily limited thereto, and the height d4 of the second active layer 122 may be higher than the heights d3 and d5 of the first active layer 121 and the third active layer 123 .

The third light emitting unit 100C may implement red light by using the wavelength conversion layer 131 . The wavelength conversion layer 131 may be a red phosphor. The red phosphor may absorb blue light and convert it into red light. In this case, when the first light emitting unit 100A and the third light emitting unit 100C are disposed adjacent to each other, blue light emitted from the first light emitting unit 100A is converted into red light, and light interference may deteriorate.

In general, a red fluorescent material has a lower absorption rate of green light (L4) than blue light. Accordingly, it may be advantageous to improve light interference if the second light emitting unit 100B emitting green light is disposed between the first light emitting unit 100A and the third light emitting unit 100C.

In the wavelength conversion layer 131, wavelength conversion particles may be dispersed in a polymer resin. The polymer resin may be any one or more of a light-transmitting epoxy resin, a silicone resin, a polyimide resin, a urea resin, and an acrylic resin. For example, the polymer resin may be a silicone resin.

The wavelength conversion particles may absorb light emitted from the third active layer 123 and convert it into white light. For example, the wavelength conversion particle may include any one or more of a phosphor and a quantum dot (QD).

Illustratively, the wavelength conversion layer 131 may include a nitride-based phosphor containing N (eg, CaAlSiN3:Eu) or a KSF (K2SiF6) phosphor, but is not necessarily limited thereto.

Referring to FIG. 5 , a light emitting device according to an embodiment may be of a flip chip type. The light emitting device 100 includes first to third light emitting units 100A, 100B, and 100C, a support layer 170, a first electrode 191, and 2-1 to 2-3 electrodes 192, 193, 194).

The support layer 170 may be a housing that supports side surfaces and lower portions of the first to third light emitting units 100A, 100B, and 100C. The support layer 170 may be made of resin such as PC or PMMA. In this case, the support layer 170 may include at least one of SiO ₂ , Si ₃ N ₄ , TiO ₂ , Al ₂ O ₃ , and MgO.

The support layer 170 may serve as a light reflection layer and/or a light absorption layer. The support layer 170 may include light reflective particles to serve as a light reflective layer, and may include carbon black, graphite, or the like to serve as a light absorbing layer. However, it is not necessarily limited to this, and a separate light reflection layer 171 may be further provided.

The first electrode 191 may pass through the support layer 170 and be electrically connected to the first conductive semiconductor layer 110 . In this case, a first ohmic electrode 164 may be disposed between the first conductive semiconductor layer 110 and the first electrode 191 .

The 2-1 to 2-3 electrodes 192 , 193 , and 194 may be electrically connected to the plurality of second ohmic electrodes 161 , 162 , and 163 through the support layer 170 .

Referring to FIG. 6 , the bottom surface 170a of the light emitting device includes a first surface S1 and a second surface S2 facing each other, and a third surface S3 and a fourth surface S4 facing each other. ) may have a square shape.

The first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 formed on the bottom surface may have rotationally symmetrical shapes around the center C of the bottom surface. In addition, it is symmetric based on the first imaginary line A1 and the second imaginary line A2 passing through the centers of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194. may have a human shape. Here, the first imaginary line A1 may be parallel to the first surface S1, and the second imaginary line A2 may be parallel to the third surface S3.

According to this structure, normal electrode connection is possible even when the chip rotates 90 degrees or 180 degrees with respect to the center (C) of the bottom surface when the light emitting element is mounted. Such a non-directional electrode structure may be advantageous when self-aligning the light emitting device to the array substrate 200 .

One of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 may be formed at the center C of the bottom surface, and the other electrodes surround the electrode formed at the center. can be formed as

For example, the electrode structure of the light emitting element includes a first electrode 191 disposed in the center, a 2-1 electrode 192 surrounding the first electrode 191, and a 2-1 electrode surrounding the 2-1 electrode 192. The second electrode 193 and the second-third electrode 194 surrounding the second-second electrode 193 may be included. However, it is not necessarily limited thereto, and the position of each electrode may be variable.

Illustratively, the 2-3 electrode 194 may be disposed in the center, the 2-2 electrode 193 surrounds the 2-3 electrode 192, and the 2-1 electrode 192 is It may also have a structure that surrounds the 2-2 electrode 193 and the first electrode 191 surrounds the 2-1 electrode 192.

At least one of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 may include a ferromagnetic material. For example, the second-third electrode 194 includes at least one of nickel (Ni), cobalt (Co), and iron (Fe), and may include, for example, nickel or a nickel alloy. At least one of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 is at least three of Ti, Cr, Al, Ni, Sn, In, and Au, for example, at least a ferromagnetic material. can include

According to this configuration, when a light emitting element is disposed in a display device, it is possible to self-align the light emitting element to a desired position by applying a magnetic field to the panel.

The first electrode 191 and the 2-1 to 2-3 electrodes 191, 192, and 193 may include a bonding material, for example, tin (Sn) or/and bismuth other than indium (In) ( At least one of Bi), cadmium (Cd), and lead (Pb) or an alloy selectively containing them may be included.

Based on the total area 100 of the bottom surface 170a, the area of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 is 60% to 90%, or 65% to 65%. may be 80%. When the area of the first electrode 191 and the 2-1 to 2-3 electrodes 192, 193, and 194 is less than 60%, the area of the pad becomes small and magnetic force for self-alignment may be insufficient, and 90% If it exceeds , the separation distance between the first electrode 191 and the 2-1st to 2-2nd electrodes 192, 193, and 194 becomes narrow, making it difficult to electrically separate them.

Referring to FIG. 7 , the light emitting device may include a separate electrode substrate 195 to have an electrode structure as shown in FIG. 6 . That is, a light emitting device having an asymmetric electrode structure may be bonded to an electrode substrate 195 having electrode shapes 191a, 192a, 193a, and 194a of FIG. 6 . The electrode shapes 191a, 192a, 193a, and 194a of the electrode substrate 195 may have a shape corresponding to the electrode structure of FIG. 6 . Such an electrode substrate can also be applied to a structure in which an LED package is manufactured by bonding a plurality of light emitting diode chips.

8 is a view showing an array substrate according to an embodiment of the present invention, FIG. 9 is a view showing a state in which a plurality of lead electrodes are disposed in a pixel area, and FIG. 10 is an enlarged view of the fourth lead electrode of FIG. 9 11 is a view showing a state in which light emitting devices are electrically connected to lead electrodes of an array substrate.

Referring to FIG. 8 , the array substrate 200 according to the embodiment includes a plurality of common wires 241 and driving wires 242 defining a plurality of pixel regions P, and a plurality of pixel regions P. It includes a pixel electrode 210 disposed thereon.

The array substrate 200 may include, for example, a resin-based printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, or an FR-4 substrate.

The array substrate 200 may include a film having an electrode pattern, for example, a polyimide (PI) film, a polyethylene terephthalate (PET) film, an ethylene vinyl acetate (EVA) film, a polyethylene naphthalate (PEN) film, TAC (traacetylcellulose) film, PAI (polyamide-imide), PEEK (polyether-ether-ketone), perfluoroalkoxy (PFA), polyphenylene sulfide (PPS), resin film (PE, PP) , PET) and the like.

The pixel area P may be defined as an area where a plurality of common wires 241 and driving wires 242 intersect, and the pixel area P may include RGB sub-pixels. A light emitting device may be disposed in the pixel area P to serve as an RGB sub-pixel. Each of the pixel electrodes 210 may be electrically connected to a light emitting element.

Referring to FIG. 9 , the pixel electrode 210 is a virtual line parallel to the common wiring ( 241 in FIG. 6 ) or driving wiring ( 242 in FIG. 6 ) and passing through the center of the pixel area (or first lead electrode). It can be formed to be symmetrical with reference.

For example, the pixel electrode 210 includes a first virtual line A1 perpendicular to the common wiring and passing through the center of the pixel P, and a second virtual line A1 parallel to the common wiring and passing through the center of the pixel P. It may be symmetrical with respect to the line A2.

The pixel electrode 210 includes first to fourth lead electrodes 211 , 212 , 213 , and 214 . The first to fourth lead electrodes 211, 212, 213, and 214 may be spaced apart from each other and electrically separated by forming an insulating layer in the spaced regions.

At least one of the first to fourth lead electrodes 211 , 212 , 213 , and 214 may be disposed in the center of the pixel P, and the other lead electrodes may be disposed in a shape surrounding the lead electrode disposed in the center.

For example, the first lead electrode 211 has a circular shape, the second lead electrode 212 has a ring shape surrounding the first lead electrode 211, and the third lead electrode 213 has a second lead electrode ( 212), and the fourth lead electrode 214 may be entirely formed in the remaining area except for a spaced area from the third lead electrode 213.

The second to fourth lead electrodes 212 , 213 , and 214 may have a structure in which one side and the other side are separated based on the second imaginary line A2 . Illustratively, the second lead electrode 212 is divided into a 2-1 lead electrode 212a and a 2-2 lead electrode 212b, and the third lead electrode 213 is a 3-1 lead electrode 213a. ) and the 3-2nd lead electrode 213b, and the 4th lead electrode 214 can be separated into the 4-1st lead electrode 214a and the 4-2nd lead electrode 214b.

In this case, the 4-1st lead electrode 214a and the 4-2nd lead electrode 214b may have a corner area larger than the rest area.

In general, when soldering an electrode of a light emitting device and a lead electrode of a substrate, a problem (an alignment problem) may occur in which the electrode is displaced from an intended position. At this time, if the area of each corner of the 4-1st lead electrode 214a and the 4-2nd lead electrode 214b increases, the position of the chip is fixed at each corner, so the alignment problem can be improved.

Referring to FIG. 10 , the 4-2nd lead electrode 214b may include two corner regions P1 and a central region P2 disposed therebetween. The central area P2 may be defined as an area facing the first lead electrode 211, and the corner area P1 may be an area other than the central area P2.

In the embodiment, the area of the central region P2 may be adjusted by adjusting the curvature R1 formed on the central region P2. That is, the curvature R1 may be adjusted so that each corner region P1 is larger than the area of the central region P2. Accordingly, the curvature R1 formed on the central region P2 may be different from the curvature of the first lead electrode 211 .

When the area of any one corner region P1 is 100, the area of the center region P2 may be 10% to 60%. If the area of the central region (P2) is less than 10%, the area of the entire lead electrode may be small and magnetic force for self-alignment may be insufficient, and if the area exceeds 60%, the area with the corner region The difference can be reduced and alignment problems can occur. When these conditions are satisfied, since the area of the corner portion is relatively large, positional deformation during soldering of the electrode of the light emitting device can be prevented.

11, the first electrode 191 is connected to the first lead electrode 211, the 2-1 electrode 192 is connected to the second lead electrode 212, and the 2-2 electrode 193 ) may be connected to the third lead electrode 213, and the 2-3 electrode 194 may be connected to the fourth lead electrode 214. The electrode of the light emitting device 100 and the pixel electrode 210 may be metal bonded or eutectic bonded, but is not limited thereto.

An area of the first electrode 191 of the light emitting device 100 may be smaller than that of the first lead electrode 211 . The area of the first electrode 191 of the light emitting device 100 may be 80% to 90% of the area of the first lead electrode 211 . Accordingly, it is possible to reduce the risk that the first electrode 191 is electrically connected to the second lead electrode 212 due to a tolerance during bonding.

Areas of the 2-1 to 2-3 electrodes 192 , 193 , and 194 may be larger than those of the second to fourth lead electrodes 212 , 213 , and 214 . As will be described later, the second to fourth lead electrodes 212, 213, and 214 are separated to be insulated from the common wiring, so that the areas of the second to fourth lead electrodes 212, 213, and 214 are smaller than those of the 2-1 to 2-3 electrodes 192, 193, and 194 of the light emitting device. can

12 is a view showing the arrangement relationship between common wiring and lead electrodes, FIG. 13 is a cross-sectional view in the A-A direction of FIG. 12, FIG. 14 is a view showing the arrangement relationship between drive wiring and lead electrodes, and FIG. is a directional cross-section.

Referring to FIG. 12 , the common wire 241 may extend in a first direction (X direction) and be electrically connected to the first lead electrode 211 . The first lead electrode 211 may be disposed on the common wire 241 and electrically connected to it. The second to fourth lead electrodes 212 , 213 , and 214 may be separated based on the common wiring 241 .

Referring to FIG. 13 , the array substrate 200 includes a first insulating layer 251 , first to third driving wires 243 , 244 , and 245 disposed on the first insulating layer 251 , and first to third driving wires 243 , 244 , and 245 . The second insulating layer 252 covering the three driving wires 243, 244, and 245, the pixel electrode 210 and the common wiring 241 disposed on the second insulating layer 252, and the common wiring 241 A third insulating layer 254 covering and exposing the plurality of pixel electrodes 210 may be included.

At this time, the common wiring 241 is covered by the third insulating layer 254 and is not exposed to the outside. Therefore, the common wire 241 may be electrically insulated from the light emitting device.

The first to third insulating layers 251, 252, and 254 may be formed of a ceramic, FR-based resin material (eg, FR-4), or a film material. When the first to third insulating layers 251, 252, and 254 are made of a ceramic material, heat dissipation characteristics may be improved.

According to the embodiment, the common wire 241 and the first to fourth lead electrodes 211 , 212 , 213 , and 214 may be disposed on the second insulating layer 252 . Since two circuit patterns can be formed on the same layer, a thin film substrate can be manufactured. In addition, since a separate via hole process and a through electrode can be omitted, the circuit pattern can be simplified. According to the embodiment, one layer may be omitted, as opposed to the prior art in which the common wiring layer and the lead electrode layer are separately manufactured.

14 and 15, the first to third driving wires 243, 244, and 245 are disposed on the first insulating layer 251 and formed by through electrodes 243a, 243b, 244a, 245a, and 245b. It may be electrically connected to the second to fourth lead electrodes 212a, 212b, 213a, 213b, 214a, and 214b. The through electrodes 243a, 243b, 244a, 245a, and 245b may pass through the sub insulating layer 253 to connect the driving wiring and the lead electrode. The sub insulating layer 253 may be the same layer as the third insulating layer 254 or may be a separate layer.

Illustratively, the first through-electrode 243a of the first driving wire 243 may be connected to the second-third lead electrodes 214a, and the second through-electrode 243b of the first driving wire 243 may be connected to the second through-electrode 243b of the first driving wire 243. It may be electrically connected to the 2-3 lead electrode 214b.

The common wiring and the first to third driving wirings 243, 244, and 245 may be disposed on both sides of one insulating layer. That is, the common wiring may be disposed on one surface of the insulating layer, and the first to third driving wires 243, 244, and 245 may be disposed on the other surface of the insulating layer. In this case, a thin film array substrate 200 may be manufactured.

16 is a first modified example of an array substrate according to an embodiment of the present invention, and FIG. 17 is a second modified example of an array substrate according to an embodiment of the present invention.

Referring to FIG. 16, the center of the first lead electrode 211 and the center of the common wire 241 in the second direction (Y direction) are offset in the second direction (Y direction), and the second to fourth lead electrodes Points 212, 213, and 214 may be disposed at either one side or the other side of the common wire 241. The second direction may be a direction perpendicular to the extension direction of the common wire 241 .

According to this configuration, the second to fourth lead electrodes 212, 213, 214 and the common wire 241 can be sufficiently spaced apart. According to the embodiment, since the second lead electrodes 212a and 222a and the common wiring 241 are formed on the same layer, there is a problem in that electrical interference occurs when placed too close to each other. The distance d6 between the second lead electrodes 212a and 222a and the common wire 241 may be about 100 μm to about 200 μm in the first direction. A Y-direction width of the common wire 241 may be 100 μm to 200 μm.

The second to fourth lead electrodes 212 , 213 , and 214 may be disposed on one or the other side of the common wiring 241 . Therefore, in order to maintain the distance d6, the common wire 241 may be offset from the center of the first lead electrodes 211 and 221.

For example, when the second to fourth lead electrodes 212 , 213 , and 214 are disposed on one side of the common wire 241 , the common wire 241 may be offset to the other side as much as possible. In this case, the maximum offset position of the common wire 241 may be a point where an overlapping area with the first lead electrode 211 is 50% or more. When the overlapping area between the common wiring 241 and the first lead electrode 211 is reduced to 50% or less, resistance increases.

Referring to FIG. 17 , the second lead electrode 212 and the fourth lead electrode 214 may be disposed on one side and the third lead electrode 213 may be disposed on the other side of the common wire 241 . According to this structure, the separation distance between the second to fourth lead electrodes 212, 213, and 214 can be increased. Therefore, even if the mounting position of the light emitting element is shifted due to assembly tolerance, it is possible to reduce the risk of short circuit with neighboring lead electrodes.

18 is a third modified example of an array substrate according to an embodiment of the present invention, and FIG. 19 is a fourth modified example of an array substrate according to an embodiment of the present invention.

Referring to FIG. 18 , the shape of the pixel electrode 210 may be variously modified depending on the shape of the electrode of the light emitting device. When the electrode structure of the light emitting device is rectangular rather than circular, the shape of the pixel electrode 210 may also be transformed into a rectangular shape. Also, as shown in FIG. 19, the second to fourth lead electrodes 212, 213, and 214 may be formed only at the corners. According to this structure, since the area of the corner portion is relatively large, positional deformation can be prevented during electrode soldering of the light emitting device.

20: first driver
30: second driver
40: panel
50: controller
100: light emitting element
100A: first light emitting unit
100B: second light emitting unit
100C: third light emitting unit
191: first electrode
192: 2-1 electrode
193: 2-2 electrode
194: 2-3 electrode
200: array substrate
210: pixel electrode
211: first lead electrode
212: second lead electrode
213: third lead electrode
214: fourth lead electrode

Claims (20)

housing;
a first light emitting unit, a second light emitting unit, and a third light emitting unit disposed on the housing;
a first electrode electrically connected to the first to third light emitting units and exposed to a bottom surface of the housing;
a 2-1 electrode electrically connected to the first light emitting unit and exposed to the bottom surface of the housing;
a 2-2 electrode electrically connected to the second light emitting unit and exposed to the bottom surface of the housing; and
And a second-third electrode electrically connected to the third light emitting unit and exposed to the bottom surface of the housing,
The first electrode and the 2-1 to 2-3 electrodes are electrically insulated from each other,
Portions of the first electrode and the 2-1 to 2-3 electrodes exposed to the bottom surface each have a rotationally symmetrical shape with respect to a central axis passing through the center of the bottom surface of the housing.
According to claim 1,
The first electrode is disposed at the center of the bottom surface,
The 2-1 electrode has a shape surrounding the first electrode,
The 2-2 electrode has a shape surrounding the 2-1 electrode,
The 2-3 electrode is a light emitting device having a shape surrounding the 2-2 electrode.
array substrate; and
Including a plurality of light emitting elements disposed on the array substrate,
The light emitting element,
housing;
a first light emitting unit, a second light emitting unit, and a third light emitting unit disposed on the housing;
a first electrode electrically connected to the first to third light emitting units and exposed to a bottom surface of the housing;
a 2-1 electrode electrically connected to the first light emitting unit and exposed to the bottom surface of the housing;
a 2-2 electrode electrically connected to the second light emitting unit and exposed to the bottom surface of the housing; and
And a second-third electrode electrically connected to the third light emitting unit and exposed to the bottom surface of the housing,
The first electrode and the 2-1 to 2-3 electrodes are electrically insulated from each other,
The portions of the first electrode and the 2-1 to 2-3 electrodes exposed to the bottom surface each have a rotationally symmetrical shape with respect to a central axis passing through the center of the bottom surface,
The array substrate,
a plurality of common wires and driving wires defining a plurality of pixel areas; and
Includes a plurality of pixel electrodes respectively disposed in the plurality of pixel areas;
The pixel electrode includes first to fourth lead electrodes electrically insulated from each other,
Each of the common wires electrically connects first lead electrodes of a plurality of pixel electrodes arranged in a first direction;
The first direction is an extension direction of the common wiring,
The second to fourth lead electrodes are spaced apart from the common wiring.
According to claim 3,
The first electrode of the light emitting element is electrically connected to the first lead electrode of the pixel electrode,
The 2-1 electrode of the light emitting element is electrically connected to the second lead electrode of the pixel electrode,
The 2-2 electrode of the light emitting element is electrically connected to the third lead electrode of the pixel electrode,
The second-third electrode of the light emitting element is electrically connected to the fourth lead electrode of the pixel electrode.
According to claim 3,
At least one of the first electrode and the 2-1 to 2-3 electrodes of the light emitting device includes a ferromagnetic material;
At least one of the first to fourth lead electrodes of the array substrate includes a ferromagnetic material.
According to claim 3,
An area of the first electrode exposed to the bottom surface is smaller than an area of the first lead electrode.
According to claim 3,
Areas of the 2-1 to 2-3 electrodes exposed to the bottom surface are larger than areas of the second to fourth lead electrodes. delete delete delete delete delete delete delete delete delete delete delete delete delete

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