KR20170079247A - Display panel with integrated touch electrodes and display apparatus using the same - Google Patents

Abstract

An object of the present invention is to provide a display panel in which touch electrodes are incorporated and which can supply a signal identical to the output signal of the front stage to the Q node of the rear stage after the delay during the touch sensing period, Device. To this end, the display panel in which the touch electrodes are embedded according to the present invention includes a display region in which gate lines, data lines, and touch electrodes are embedded, and a non-display region provided at the periphery of the display region. The non-display area has a built-in gate driver, and the gate driver includes a shift register and a start control unit constituted by stages connected with the gate lines. The start control unit includes at least one start signal supply connected to the first line and the second line, which are connected to the output terminal of the front stage of the stages and the start transistor of the rear stage of the stages and to which signals having opposite polarities are supplied do.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a display panel having a touch electrode,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display panel, and more particularly, to a display panel including touch electrodes and a gate driver, and a display using the same.

Flat panel displays are used in various types of electronic products including mobile phones, tablet PCs, and notebook computers. 2. Description of the Related Art Liquid crystal displays and organic light emitting display devices are widely used in flat panel display devices (hereinafter simply referred to as 'display devices').

The display device includes a gate driver, a data driver, a panel, and a control unit. The panel may be an organic light emitting panel or a liquid crystal panel.

FIG. 1 is a configuration diagram of a general gate-in-panel type gate driver, and FIG. 2 is an exemplary view showing waveforms of signals generated in the gate driver shown in FIG. 2 (a) is an exemplary view showing a waveform of a voltage (VQ) applied to the Q node of the stage of the gate driver 20, (b) shows an example of a waveform of the gate signal Vg Fig. Particularly, the gate driver 20 shown in FIG. 1 is applied to a display device in which a video display period and a touch sensing period are repeatedly generated during one frame period.

The gate-in-panel type gate driver 20 includes a plurality of stages, and each stage outputs a gate signal Vg to a gate line. The gate signal Vg includes a gate pulse.

In the in-cell type display panel in which the touch panel, which is one of the input devices, is built in the display panel, the common electrode functions as a touch electrode. Accordingly, in the display device provided with the in-cell type display panel, the touch sensing period and the image display period are repeated.

The touch sensing period and the image display period may be repeated in units of one frame period, but may be repeated a plurality of times in one frame period.

When controlling the gate output enable signal of the gate driver when the gate driver is composed of an integrated circuit (IC) and mounted on the in-cell type display panel, the touch sensing period and the video display period are repeated several times . However, when a gate driver composed of an integrated circuit (IC) is used, the size of the non-display area of the in-cell type display panel is increased.

In order to prevent this, a gate-panel type gate driver 20 as shown in FIG. 1 may be provided in the in-cell type display panel.

In the gate-in panel type gate driver 20, the gate pulse output from the front stage operates as a start signal of the rear stage. For example, in Fig. 1, the gate pulse output in stage 1 operates as the start signal of stage 4. Fig. In this case, the stage 1 is the front stage and the stage 4 is the rear stage.

In the in-cell type display panel in which the touch sensing period and the video display period are repeated a plurality of times during one frame period, the rear stage applied to the gate-in panel type gate driver 20 outputs the output of the front- Lt; / RTI > In this case, a leakage current is generated in the transistor connected to the Q node of the subsequent stage. Therefore, the voltage (VQ_N + 3) at the Q node of the rear stage is decreased during the touch sensing period (T) as shown in Fig. 2A.

When the video display period D comes after the touch sensing period T, the voltage of the Q-node of the rear stage increases stepwise as shown in Fig. 2 (a). Thus, a gate pulse having a waveform as shown in Fig. 2 (b) is output through the pull-up transistor connected to the Q node. In this case, the maximum voltage of the gate pulse output from the succeeding stage can be Vp.

If there is no delay as described above, no leakage current is generated in the subsequent stage, and therefore, the voltage (VQ_N + 3) of the Q node can be represented by the waveform indicated by the dotted line in (a). In this case, the gate pulse output through the pull-up transistor connected to the node Q may be a waveform indicated by a dotted line in (b).

As shown in FIGS. 2A and 2B, when a delay occurs during the touch sensing period T, a voltage lower than the voltage VQ (ideal) of the Q node when there is no delay is applied to the Q node And a gate pulse having a voltage Vp lower than the voltage Vp (ideal) of the gate pulse when there is no delay is output.

If a gate pulse having a lower voltage Vp than the ideal case is output, the operation of the switching transistor provided in each pixel becomes unstable, and accordingly, the voltage charged in each pixel can be reduced. Therefore, the quality of the image output from the display device may become poor.

An object of the present invention proposed to solve the above problems is to provide a touch sensing device capable of supplying a signal identical to an output signal of the front stage to a Q node of a rear stage, And a display device using the same.

According to an aspect of the present invention, there is provided a display panel including touch electrodes, the display panel including gate lines, data lines, and touch electrodes, and a non-display region provided outside the display region, . In this case, a gate driver is embedded in the non-display area.

The gate driver includes a shift register and a start control unit configured by stages connected with the gate lines.

Wherein the start control unit is connected to the output terminal of the front stage of the stages and the start transistor of the rear stage of the stages and is connected to the first line and the second line to which signals having opposite polarities are supplied, Feeder.

According to the present invention, even if the output of the front stage applied to the Q node of the rear stage is reduced during the touch sensing period, a signal identical to the normal output of the front stage can be applied to the Q node of the rear stage during the video display period. Therefore, a normal precharging function can be performed in the pull-up transistor connected to the Q node. Thus, a gate pulse having a normal level and waveform can be output in the subsequent stage.

1 is a block diagram of a general gate-in-panel type gate driver.
Fig. 2 is an exemplary diagram showing waveforms of signals generated in the gate driver shown in Fig. 1. Fig.
3 is an exemplary view showing a configuration of a display device according to the present invention.
4 is a diagram showing waveforms of a touch synchronous signal applied to driving a display device according to the present invention;
FIG. 5 is a schematic view illustrating a configuration of a gate driver applied to a display panel having a touch electrode embedded therein according to the present invention. FIG.
6 is an exemplary view showing the configuration of the start signal supply device and stage shown in Fig. 5;
7 is an exemplary view showing a waveform of signals generated when the display apparatus according to the present invention is operated.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3 is an exemplary view showing a configuration of a display device according to the present invention. 4 is a diagram showing waveforms of a touch synchronous signal applied to driving a display device according to the present invention.

3, the display device according to the present invention includes gate lines GL1 to GLg, data lines DL1 to DLd, touch electrodes TE, and a gate driver 200 A display panel 100, a data driver 300 for supplying data voltages to the data lines DL1 to DLd, a controller 400 for controlling the gate driver 200 and the data driver 300, And a touch sensing unit 500 for supplying a common voltage to the touch electrodes and supplying a touch signal to the touch electrodes between the touch sensors. The gate driver 200 built in the non-display area 120 of the display panel 100 is connected to the gate lines GL1 to GLg, A delay start signal which is supplied to the rear stage of the stages or cut off the front gate pulse and operates as a start signal of the rear stage is supplied to the rear stage.

First, the display panel 100 includes touch electrodes TE. The touch electrodes TE are connected to the touch sensing unit 500 through touch lines TL1 to TLx. The display panel 100 in which the touch electrodes TE are embedded has a structure in which the gate lines GL1 to GLg, the data lines DL1 to Dld, And a non-display area 120 provided at an outer periphery of the display area 120. The non-display area 120 includes a display area 110 and a non-

At least two touch electrodes (TE) are provided in the display area. A common voltage is supplied to the touch electrodes TE or a touch signal is supplied to the touch electrodes TE.

The gate driver 200 is embedded in the non-display area 120. [

The gate driver 200 is connected to a shift register composed of stages connected to the gate lines GL1 to GLg and an output terminal of the front stage of the stages and a start transistor of the rear stage of the stages, And at least one start signal supply connected to the first line and the second line to which signals having polarities are supplied.

The display panel 100 includes a plurality of gate lines GL1 to GLg and data lines DL1 to DLd and a plurality of pixels.

The structure of the pixel may be variously changed according to the type of the display device.

For example, when the display device is an organic light emitting display, each pixel includes an organic light emitting diode, a plurality of transistors connected to the data line DL and the gate line GL to control the organic light emitting diode, And a storage capacitor Cst. A switching transistor of the transistors is connected to the gate line and the data line. The touch electrode (TE) for sensing a touch may be disposed in the pixel.

When the display device is a liquid crystal display device, each pixel may be configured to include a liquid crystal, the touch electrode TE, a pixel electrode, and a switching transistor. The switching transistor is connected to the gate line, the data line and the pixel electrode.

The transistors included in the display device according to the present invention may be thin film transistors.

A gate signal is supplied from the gate driver 200 to drive the switching transistor.

The gate signal includes a gate pulse for turning on the switching transistor and a pull-down signal for turning off the switching transistor. In this case, the gate pulse and the pull-down signal are generically referred to as a gate signal.

The gate pulse is supplied from the gate driver 200 to the pixels through the gate lines. The gate pulse is sequentially supplied to each gate line.

While the gate pulse is not supplied, the pull-down signal for turning off the transistor is supplied to the gate line. The pull-down signal is also supplied to each gate line through the gate driver 200.

The gate driver 200 is embedded in the non-display area 120 of the panel 100. [ When the switch transistors and various elements constituting the pixels are provided in the display region 110 of the display panel 100, the transistors and various elements constituting the gate driver 200 are connected to the non- (Not shown). The method of embedding the gate driver 200 in the non-display area 120 of the display panel 100 is referred to as a gate-in-panel (GIP) method. The present invention is applied to the display panel 100 manufactured by the gate-in-panel method.

At least two or more touch electrodes TE are provided in the display region 110. The touch electrodes TE may be provided in a mutual manner or in a self-capping manner. 3, the self-cap type touch electrodes TE are shown.

In the present invention, during one frame period, the video display period D for video display and the touch sensing period T for touch sensing are repeated a plurality of times as shown in FIG.

In the display device according to the present invention, the touch may be sensed using the capacitance between the finger and the touch electrodes (TE), or the touch may be sensed using the capacitance between the active pen and the touch electrodes (TE) . The active pen may itself output a touch signal.

Next, the timing controller 400 uses the timing signals input from an external system (not shown), that is, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the data enable signal DE, Generates a gate control signal (GCS) for controlling the operation timing of the gate driver (200) and a data control signal (DCS) for controlling the operation timing of the data driver (300) And generates image data to be processed.

To this end, the timing controller 400 includes a receiver for receiving input image data and timing signals from the external system, a control signal generator for generating various control signals, a rearrangement of the input image data, A data sorting unit for generating data and an output unit for outputting the control signals and the image data to the data driver 300 and the gate driver 200.

The timing controller 400 rearranges input image data input from the external system according to the structure and characteristics of the panel 100 and transmits the rearranged image data to the data driver 300. Such a function can be executed in the data arrangement section.

The timing controller 400 controls the timing of the data driver 300 using the timing signals transmitted from the external system, that is, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the data enable signal DE. And a gate control signal GCS for controlling the gate driver 200 and supplies the control signals to the data driver 300 and the gate driver 200 And performs the function of transmitting. This function can be executed in the control signal generation unit.

The gate control signals (GCS) generated by the control signal generator include a delay start signal, a delay control signal, and a start signal for starting the operation of the gate driver 200. The delay start signal, the delay control signal and the start signal are described below with reference to Figs. 5 to 7.

Next, the data driver 300 converts digital image data transmitted from the timing controller 400 into an analog data voltage, and supplies data voltages for one horizontal line to the gate lines for each period during which the gate pulse is supplied To the data lines DL1 to DLd. The data driver 300 converts the image data into the data voltage using gamma voltages supplied from a gamma voltage generator (not shown), and supplies the data voltage to the data line. The data driver 300 may be formed of an integrated circuit (IC) together with the timing controller 400. [ In addition, the data driver 300 may be configured as one integrated circuit (IC) together with the touch sensing unit 500.

The touch sensing unit 500 supplies a common voltage to the touch electrodes TE during the video display period D and supplies the common voltage to the touch electrodes TE during the touch sensing period T. [ .

In the present invention, during one frame period, as shown in FIG. 4, a plurality of video display periods D and a plurality of touch sensing periods TE are alternately repeated.

The touch sensing unit 500 can determine whether the display panel 100 is touched by using the sensing signals received from the touch electrodes TE by the touch signal.

As described above, the gate driver 200 is mounted on the non-display area 120 of the display panel 100. This method is applicable to a gate-in-panel (GIP) Quot;

The gate driver 200 sequentially supplies gate pulses to the gate lines GL1 to GLg of the display panel 100 in response to the gate control signal input from the timing controller 400. [ Accordingly, the switching transistors TFT formed on each pixel of the corresponding horizontal line to which the gate pulse is input are turned on, and the image can be output to each pixel.

The gate driver 200 sequentially supplies the gate pulses to the gate lines GL1 to GLg for one frame period using the start signal, the gate clock, and the like. Here, one frame period is a period during which one image is output through the display panel 100. [

The gate driver 200 supplies a front stage gate pulse output from the front stage among the stages for sequentially supplying gate pulses to the gate lines GL1 to GLg to the rear stage of the stages, And a delay start signal that operates as a start signal of the subsequent stage is supplied to the subsequent stage after interrupting the previous gate pulse.

The specific configuration and function of the gate driver 200 will be described in detail below with reference to Figs. 5 to 7.

5 is a schematic view illustrating a configuration of a gate driver applied to a display panel having a touch electrode according to an exemplary embodiment of the present invention. In particular, FIG. 5 is an exemplary view schematically showing a configuration of the gate driver 200 shown in FIG. to be

5, the gate driver 200 includes a shift register 210 composed of stages (Stage 1 to Stage n) 211 connected to the gate lines GL1 to GLg, The first line L1 and the second line L2, which are connected to the output stage of the front stage and the start transistors of the rear stage of the stages among the stages Stage 1 to Stage n and to which signals V_LHB1 and V_LHB2 having opposite polarities are supplied, And at least one start signal supply 221 connected to the line L2.

The shift register 210 includes a plurality of stages (Stage 1 to Stage n). The stages (Stage 1 to Stage n) sequentially supply gate pulses to the gate lines GL1 to GLg.

In the following description, the start signal means a signal that causes each stage to start its operation. In this case, at least one of the stages Stage 1 to Stage n starts to be driven by the start signal Vst transmitted from the control unit 400, and each of the remaining stages starts with a gate pulse As a start signal.

That is, in the shift register 210, the gate pulse output from the front stage operates as a start signal of the rear stage.

For example, the start signal Vst transmitted from the controller 400 drives at least one of the stages Stage 1 to Stage n. Accordingly, the gate driver 200 starts operating. 5 shows a gate driver 200 in which the start signal Vst drives three stages (Stage 1 to Stage 3) as an example of the present invention. The number of stages driven by the start signal (Vst) can be variously changed.

The gate pulse output from the stage 1 operates as a start signal of the stage 4. In this case, the stage 1 is the front stage and the stage 4 is the rear stage.

Further, in Fig. 5, the gate pulse output in stage 2 operates as the start signal of stage 5. In this case, the stage 2 is the front stage, and the stage 5 is the rear stage.

Wherein the front stage and the rear stage are determined by input / output directions of gate pulses. Thus, each of the stages (Stage 1 to Stage n) may be a front stage or a rear stage.

For example, in the above example, the stage 4 is a rear stage. However, the gate pulse output from the stage 4 is input to the stage 7 through the start signal feeder 221. In this case, the stage 4 becomes a front stage, and the stage 7 becomes a rear stage.

The number of stages arranged between the front stage and the rear stage may be variously changed. In FIG. 5, a gate driver 200 in which two stages are arranged between the front stage and the rear stage is shown as an example of the present invention.

As described above, each stage outputs the gate signal Vg. The gate signal (Vg) includes the gate pulse and the pull-down signal.

The start control unit 220 includes at least one start signal feeder 221.

The start signal feeder 221 supplies the front stage gate pulse output from the output terminal of the front stage to the rear stage or cuts off the front gate pulse, And supplies the start signal V_LHB1 to the subsequent stage.

The start signal supplier 221 receives the delay start signal V_LHB1 and the delay control signal V_LHB2 through the first line L1 and the second line L2.

The start signal supply unit 221 inputs the gate pulse output from the front stage as it is as the start signal of the subsequent stage or blocks the gate pulse output from the front stage and then outputs the delay start signal V_LHB1 As a start signal of the subsequent stage.

5, the start signal supply unit 221 may be connected to all the subsequent stages or may not output gate pulses during the touch sensing period, and may not output a gate pulse during the touch sensing period Stage stage that outputs a gate pulse.

For example, 100 gate lines are provided, gate pulses are output to the first to tenth gate lines during the first video display period, and a touch signal is applied to the touch electrodes during the first touch sensing period And gate pulses are output to the eleventh gate line through the twentieth gate lines during the second video display period. Assuming that a touch signal is supplied to the touch electrodes during the second touch sensing period, during one frame period 10 video display periods and 10 touch sensing periods are repeatedly generated.

In this case, the number of stages that do not output a gate pulse during the touch sensing period among the stages may be nine. This is because the blank time comes after the tenth touch sensing period, and therefore, there may be no stage that does not output the gate pulse during the tenth touch sensing period. Therefore, in the above example, the start signal feeder 221 may be connected to only nine stages.

6 is a diagram showing an example of the configuration of the start signal feeder and the stage shown in FIG. 5. Particularly, FIG. 6 shows a start signal supply source and a start stage connected to the m + 3th stage Stage_m + 3 and the (m + Fig. 22 is a diagram showing an example of the configuration of the signal feeder 221. Fig.

The start signal supply unit 221 is connected to the output terminal of the front stage of the (m + 3) th stage Stage_m + 3 and supplies the signals having the opposite polarities to the first line L1 and the second line (L2).

The start signal supply unit 221 supplies the front stage gate pulse GP_m output from the output terminal of the front stage to the (m + 3) th stage Stage_m + 3 or the front stage gate pulse GP_m And supplies the delay start signal V_LHB1 supplied through the first line L1 to the (m + 3) th stage Stage_m + 3.

Here, the (m + 3) th stage (Stage_m + 3) performs the function of the rear stage. Hereinafter, the (m + 3) th stage is simply referred to as the following stage (Stage_m + 3). In Fig. 5, two stages are disposed between the front stage and the rear stage. Accordingly, the front stage of the rear stage (Stage_m + 3) shown in FIG. 6 is the m-th stage. In this case, the previous gate signal Vg_m output from the m-th stage includes the m-th gate pulse GP_m.

6, the start signal supply unit 221 supplies the delay start signal V_LHB1 supplied through the first line L1 to the stage Stage_m + 3 And a second switching unit for supplying or blocking the front stage gate pulse GP_m output from the output terminal of the front stage to the rear stage (Stage_m + 3).

The first switching unit may be a first transistor (T1) including a first terminal, a second terminal, and a third terminal. The second switching unit may include a first terminal, a second terminal, and a third terminal. 2 < / RTI > transistor T2.

The first terminal of the first transistor T1 is connected to the first line L1, the second terminal of the first transistor is connected to the first terminal, the third terminal of the first transistor T1 is connected to the first line L1, And the terminal is connected to the second terminal of the second transistor and the rear stage 211.

The first terminal of the second transistor T2 is connected to the second line L2 to which the delay control signal V_LHB2 for controlling the second transistor T2 is supplied, The second terminal is connected to the third terminal of the first transistor T1 and the rear stage 211 and the third terminal of the second transistor T2 is connected to the front stage.

Stage stage 211 receives the front gate pulse GP_m or the delay start signal V_LHB1 from the start signal supply device 221 and supplies the Q node voltage VQ_m + A pull-up transistor Tvst for outputting a gate pulse GP_m + 3 and a gate connected to the Q-node Q for outputting a gate pulse GP_m + 3 using the clock CLK_m + 3 by the Q-node voltage VQ_m_3. A reset transistor Tr for resetting the pull-up transistor Tup and a pull-down transistor Td for outputting a pull-down signal to the gate line in a period during which the gate pulse GP_m + 3 is not outputted, .

The first terminal (gate) of the start transistor Tvst is connected to the start signal supply 221, the second terminal is connected to the first end of the pull-up transistor Tup through the Q node, Is connected to the start signal feeder 221. Therefore, the same signal is supplied to the first terminal and the second terminal of the start transistor Tvst.

The first terminal of the pull-up transistor Tup is connected to the second terminal of the start transistor Tvst through the Q node, the second terminal is connected to the gate line and the third terminal of the pull-down transistor Td, And the third terminal is connected to a clock supply terminal 15 for supplying the clock CLK_m + 3.

A first terminal of the reset transistor Tr is connected to a reset terminal 13 for supplying a reset voltage Vrest and a second terminal is connected to a low voltage supply terminal 14 for supplying a low voltage VSS, And the third terminal is connected to the first terminal of the pull-up transistor Tup through the Q node.

The first terminal of the pull-down transistor Td is connected to the pull-down control terminal 16 for supplying the pull-down control signal Vd and the second terminal is connected to the pull- 2 terminal, and the third terminal is connected to the gate line and the second terminal of the pull-up transistor Tup.

The configuration of the rear stage (Stage_m + 3) may be equally applied to all stages (Stage 1 to Stage n) shown in FIG.

Therefore, the front stage may be formed in the same shape as the rear stage.

Further, the rear stage (Stage - m + 3) shown in Fig. 6 includes only basic configurations. Therefore, the structure of the stages (Stage 1 to Stage n) including the rear stage (Stage_m + 3) is not limited to the structure shown in FIG. 6, and can be changed into various forms.

The start signal supply unit 211 is connected to the start transistor Tvst and the Q node Q connected to the output terminal of the start transistor Tvst is connected to the pull-up transistor Tup in the subsequent stage Stage_m + And the pull-up transistor Tup is connected to the gate line.

The start signal supply unit 211 supplies the front stage gate pulse GP_m to the stage Stage_m + 3 or intercepts the front stage gate pulse GP_m, And supplies the supplied delay start signal V_LHB1 to the next stage Stage_m + 3. The start control unit 220 may include at least one start signal feeder 211.

The start signal supply unit 211 sequentially supplies the first and second k-th image display periods to the k-th image display period and the k-th image display period among the image display periods (D) and the touch sensing periods (T) repeated at least twice in one frame period (K + 1) -th video display period, which is transmitted after the k-th touch sensing period (T), from the front stage to the rear stage (Stage_m + And then supplies the delay start signal V_LHB1 to the subsequent stage Stage_m + 3 after interrupting the gate pulse GP_m.

A method of driving the gate driver 200 will be described below with reference to FIG.

7 is a diagram illustrating waveforms of signals generated when the display apparatus according to the present invention is operated. (a) shows an example of a clock CLK_m inputted to the clock supply terminal 15 of the front stage, (b) shows an example of the start signal VST_m of the front stage, Node voltage (VQ_m) of the front stage, and (d) is an example of a front-end gate signal (Vg_m) output from the front stage. (E) is an example of a clock input to the clock supply terminal 15 of the rear stage (Stage_m + 3), (f) (H) is an example of the delay control signal (V_LHB2), (i) is an example of the delay stage control signal (Vg_m), (g) is an example of the delay start signal (V_LHB1) (Vq_m + 3) of the stage stage m + 3 (Stage_m + 3), and (j) is an example of a rear stage gate signal Vg_m + 3 outputted from the stage stage m_3. the start signal VST_m + 3 represents the start signal VST_m + 3 of the next stage Stage_m + 3 and the start signal VST_m + (Vg_m) supplied to the gate terminal (Tvst).

Before describing the overall driving method of the present invention, the operation method of the start signal supply device 221 will be briefly described as follows.

The phase of the delay start signal V_LHB1 supplied through the first line L1 and the phase of the delay control signal V_LHB2 supplied through the second line L2 are opposite.

When the first transistor T1 and the second transistor T2 are N-type transistors, the delay control signal V_LHB2 has a high level in an image display period, and the delay start signal V_LHB1 has a low level Respectively. Accordingly, the first transistor T1 is turned off and the second transistor T2 is turned on.

When the second transistor T2 is turned on, the previous gate pulse GP_m is applied to the first terminal of the start transistor Tvst of the next stage Stage_m + 3 via the second transistor T2, .

Therefore, the front gate pulse GP_m performs the function of the Q node voltage VQ_m + 3 in the subsequent stage. Then, if the image display period is continuously maintained, the pull-up transistor normally outputs the following gate pulse GP_m + 3 by the Q-node voltage VQ_m + 3 and the clock CLK_m + 3.

However, after the video display period, when the touch sensing period comes, the front gate pulse GP_m is applied to the start transistor Tvst of the rear stage (Stage_m + 3) through the second transistor T2 And is decreased during the touch sensing period.

When the touch sensing period passes and the video display period comes again, the delay control signal V_LHB2 has a low level and the delay start signal V_LHB1 has a high level. Accordingly, the first transistor T1 is turned on and the second transistor T2 is turned off.

When the second transistor T2 is turned off, the previous gate pulse GP_m is no longer supplied to the next stage Stage_m + 3.

When the first transistor T1 is turned on, the delay start signal V_LHB1 having a high level is supplied to the first terminal and the third terminal of the start transistor Tvst of the following stage Stage_m + 3.

The delay start signal V_LHB1 is a signal having the same magnitude and pulse width as the previous gate pulse GP_m output from the previous stage. In other words, the delay start signal V_LHB1 is the same signal as the previous gate pulse GP_m normally supplied to the start transistor Tvst during the video display period.

Therefore, the delay start signal V_LHB1 performs the function of the Q node voltage VQ_m + 3 in the next stage Stage_m + 3.

Accordingly, the pull-up transistor normally outputs the following gate pulse GP_m + 3 by the Q-node voltage VQ_m + 3 and the clock CLK_m + 3.

In other words, if the period from the start of the next stage (Stage_m + 3) to the output of the next gate pulse (GP_m + 3) is not the touch sensing period, The second transistor T2 is turned on so that the previous gate pulse GP_m performs the function of the start signal of the next stage Stage_m + 3. Accordingly, the rear stage (Stage_m + 3) outputs the rear gate pulse (GP_m + 3) by the front gate pulse (GP_m).

However, if the period from the start of the subsequent stage (Stage_m + 3) to the output of the following gate pulse (GP_m + 3) is the touch sensing period, The second transistor T2 of the signal supplier 211 is turned off and the first transistor T1 is turned on.

Accordingly, the delay start signal (V_LHB1) supplied through the first transistor (T1) functions as a start signal of the next stage (Stage_m3). Therefore, the next stage (Stage_m + 3) outputs the next gate pulse (GP_m + 3) by the delay start signal (V_LHB1).

The overall driving method of the display device according to the present invention will now be described. Hereinafter, the driving method of the display device when the period from the start of the operation of the rear stage (Stage_m + 3) to the output of the rear gate pulse (GP_m + 3) is the touch sensing period do.

First, in the front stage, the front end gate signal Vg_m is outputted by the clock CLK_m, the start signal VST_m and the Q node voltage VQ_m during the video output period D. [ Particularly, the front gate pulse GP_m of the front gate signal Vg_m is supplied to the rear stage (Stage_m + 3) through the start signal supplier 221.

The above process is performed during the first period X1 shown in FIG.

Next, the touch sensing period T comes after the previous gate pulse GP_m is outputted.

The delay start signal V_LHB1 and the delay control signal V_LHB2 having waveforms as shown in (g) and (h), even if the touch sensing period T comes after the video display period D, The second transistor T2 maintains a turn-on state and the first transistor T1 maintains a turn-off state.

Therefore, the preceding gate pulse GP_m is continuously supplied to the start transistor Tvst of the subsequent stage Stage_m + 3, and performs the function as the start signal VST_m + 3. However, since the clock CLK_m + 3 is not supplied to the clock supply terminal 15 during the touch sensing period T, the following gate pulse GP_m + 3 is output from the next stage Stage_m + 3 It does not.

In this case, the front gate pulse GP_m supplied to the start transistor Tvst, that is, the start signal VST_m + 3, continuously decreases.

Therefore, the Q node voltage (VQ_m + 3) of the rear stage (Stage_m + 3) also decreases continuously.

The above process is performed during the second period X2 shown in FIG.

Next, the polarity of the delay start signal (V_LHB1) and the delay control signal (V_LHB2) are inverted immediately before the video display period (D) after the touch sensing period (T) comes, The transistor T2 is turned off and the first transistor T1 is turned on.

The above process is performed during the third period X3 shown in FIG. The second period (X2) and the third period (X3) are included in the touch sensing period (T).

The second transistor T2 is turned off and the first transistor T1 is turned on so that the delay start signal V_LHB1 is applied to the first stage transistor Stage_m + And is supplied to the first terminal of the start transistor Tvst.

Thus, precharging is normally generated in the start transistor Tvst.

Finally, when the image display period D arrives, the clock CLK_m + 3 is supplied to the clock supply terminal 15.

Since the Q node voltage VQ_m + 3 is normally precharged by the delay start signal V_LHB1, the Q node voltage VQ_m + 3 is raised to a normal level by the clock CLK_m + 3 . The pull-up transistor Tup can be normally turned on by the Q node voltage VQ_m + 3 because the Q node voltage VQ_m + 3 rises to a normal level.

Accordingly, the next-stage gate pulse GP_m + 3 having the normal level and waveform can be output to the gate line through the pull-up transistor Tup.

This process is performed during the fourth period X4 shown in FIG. The fourth period is a video display period that comes after the touch sensing period (T). The first period X1 is a video display period before the touch sensing period T arrives.

The present invention is briefly summarized as follows.

According to the present invention, when the touch sensing period comes after the output of the previous gate pulse GP_m, the leakage of the previous gate pulse GP_m occurs during the touch sensing period.

However, in the video display period after the touch sensing period, the rear stage (Stage_m + 3) does not use the front gate pulse GP_m as a start signal.

Instead of the preceding gate pulse GP_m, the latter stage Stage_m + 3 uses the delay start signal V_LHB1 having a normal level and waveform as a start signal.

Accordingly, the rear stage (Stage_m + 3) can output the next gate pulse (GP_m + 3) having a normal level and waveform.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: display panel 200: gate driver
300: data driver 400:
210: shift register 220: start control unit
221: Start signal feeder

Claims (9)

A display region in which gate lines, data lines and touch electrodes are embedded; And
And a non-display area provided at an outer periphery of the display area,
A gate driver is built in the non-display area,
The gate driver includes:
A shift register composed of stages connected to the gate lines; And
And a start control circuit connected to the output terminal of the front end stage of the stages and the start transistor of the rear stage of the stages and connected to the first line and the second line to which signals having opposite polarities are supplied, The touch panel including a plurality of touch electrodes. The method according to claim 1,
Wherein the stages sequentially supply gate pulses to the gate lines and the start signal supply supplies a front stage gate pulse output from the output stage of the front stage to the rear stage or blocks the front gate pulse And a touch electrode for supplying a delay start signal supplied through the first line to the rear stage. The method according to claim 1,
The start signal supply unit includes:
A first switching unit supplying or blocking a delay start signal supplied through the first line to the subsequent stage; And
And a second switching unit for supplying or blocking the front stage gate pulse outputted from the output terminal of the front stage to the rear stage. The method of claim 3,
The first switching unit is a first transistor including a first terminal, a second terminal, and a third terminal,
The second switching unit is a second transistor including a first terminal, a second terminal and a third terminal,
The first terminal of the first transistor is connected to the first line, the second terminal of the first transistor is connected to the first terminal, and the third terminal of the first transistor is connected to the second transistor And a second stage of the second stage,
The first terminal of the second transistor is connected to the second line to which a delay control signal for controlling the second transistor is supplied and the second terminal of the second transistor is connected to the third terminal of the first transistor And the third terminal of the second transistor is connected to the front stage. The method according to claim 1,
Wherein the display region includes at least two touch electrodes to which a common voltage is supplied or a touch signal is supplied. The method according to claim 1,
The start signal supply is connected to the start transistor,
In the subsequent stage, the Q node connected to the output terminal of the start transistor is connected to the pull-up transistor,
Wherein the pull-up transistor has built-in touch electrodes connected to a gate line. A display panel in which gate lines, data lines, touch electrodes, and gate drivers are embedded;
A data driver for supplying data voltages to the data lines;
A control unit for controlling the gate driver and the data driver; And
And a touch sensing unit for supplying a common voltage to the touch electrodes during a video display period and supplying a touch signal to the touch electrodes between the touch sensors,
Wherein the gate driver incorporated in the non-display area of the display panel supplies the front stage gate pulse output from the front stage among the stages for sequentially supplying gate pulses to the gate lines to the rear stage of the stages Or a delay start signal that operates as a start signal of the subsequent stage after interrupting the front gate pulse is supplied to the succeeding stage. 8. The method of claim 7,
The gate driver includes:
A shift register including stages for sequentially supplying gate pulses to the gate lines; And
And a start control unit configured to supply the start gate pulse to the succeeding stage or to supply the delay start signal supplied through the first line to the succeeding stage after interrupting the preceding gate pulse, . 9. The method of claim 8,
The start signal supply unit includes:
And transmits the front gate pulse to the next stage between the k-th touch sensor that is continuous in the k-th image display period and the k-th image display period among the video display periods and the touch sensing periods that are repeated at least twice in one frame period And for blocking the gate pulse output from the previous stage during a (k + 1) -th display period following the kth touch sensing period, and supplying a delay start signal to the subsequent stage.

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