KR20170045328A - Constant on-time(cot) control in isolated converter - Google Patents

Abstract

The present invention is directed to a fixed on-time isolated converter comprising a transformer. The primary side of the transformer is connected to an electronic switch and the secondary side is connected to the load and the processor. The processor is connected to the driver on the primary side and to the electronic switch via at least one coupling element. The processor receives an output voltage or an output current at the load and generates a control signal. Wherein the driver adjusts an output voltage and an output current through the transformer by receiving a control signal through the coupling element and changing the ON / OFF state of the electronic switch in accordance with the control signal, Is determined between the moment the control signal changes from negative to positive and the moment the control signal changes from positive to negative to achieve a fast response to a load transient.

Description

[0001] CONSTANT ON-TIME (COT) CONTROL IN ISOLATED CONVERTER [0003]

The present invention relates to an isolated converter, and more particularly to an isolated converter that performs constant control over time to adjust the output voltage.

The present application is based on and claims the benefit of the priority of Chinese (CN) Patent Application No. 201410483054.8, filed September 19, 2014, and United States (US) Patent Application No. 14 / 562,729. The entire invention of Chinese Patent Application No. 201410 483054.8 and US Patent Application No. 14 / 562,729 is incorporated herein by reference.

With recent advances in technology, electronic products have been developed to meet various needs in everyday life. Since these products are made of various electronic components with different power supply and voltage requirements, the AC power supply from the wall needs to be converted to the appropriate voltages for each of the electronics to ensure proper operation .

Conventional AC / DC converters implement an isolated voltage divider configuration. After combining the AC power with the rectifiers, a transformer is used to convert the high voltage alternating current (AC) power into low voltage direct current (DC) power that can be used by the devices. 1, a conventional power converter includes a transformer 10, which is connected to the primary side and load 14 connected to the electronic switch 12, to the processor 18, And a secondary side connected to the output capacitor 15 and the voltage divider 16. Through a photo-coupler 20, the processor 18 is connected to a controller 22 connected to an electronic switch 12 for controlling its switching state. When a voltage is applied to the load 14, the voltage divider 16 transmits the feedback voltage to the processor 18 which receives the feedback voltage from the load and generates an analog signal accordingly, To the controller (22) on the primary side from the secondary side through the photocoupler (20). The controller 22 changes the on / off state of the electronic switch 12 in accordance with the analog signal. Because the processor 18 includes TL431 (a three-terminal programmable shunt regulator) and a VM (voltage-mode) compensation circuit, it reduces the ripple signal of the load voltage Loop gain and zero / pole compensation to compensate for bandwidth to stabilize the entire system. However, since the controller 22 is located on the primary side, the load voltage can not be directly detected. There is also a delay in the TL 431 and the VM compensation circuit that transmits a signal resulting from the feedback voltage of the load to the controller 22, resulting in a load voltage that is not quickly stabilized. In addition, when there is a synchronous rectifier on the secondary side, it is difficult to control in continuous current mode (CCM).

Embodiments of the present invention have been developed in this context.

BRIEF DESCRIPTION OF THE DRAWINGS Embodiments of the present invention will be described in more detail with reference to the accompanying drawings. It should be understood, however, that the appended drawings are illustrative and exemplary only, and are not intended to limit the scope of the invention.
1 is a circuit diagram of a conventional insulated converter.
2 is a circuit diagram of an isolated converter according to a first embodiment of the present invention.
3A shows waveforms and control signals of the feedback voltage DV or the detection voltage DS.
3B shows the waveform of the feedback voltage DV or the detection voltage DS and another control signal.
4 is a circuit diagram of an isolated converter according to a second embodiment of the present invention.
5 is a circuit diagram of an isolated converter according to a third embodiment of the present invention.
6 is a circuit diagram of an isolated converter according to a fourth embodiment of the present invention.
7 is a circuit diagram of an electrical signal extractor connected to a controller, an output capacitor, a load, and a transformer and including a voltage divider.
8 is a circuit diagram of another electric signal extractor connected to a controller, an output capacitor, a load, and a transformer and including a resistor.
9 is a circuit diagram showing the current flow between the controller and the driver.
Figure 10 shows waveforms of the feedback voltage (DV), the second digital signal (D1), and the RX and TX signals.
11 is a schematic diagram of a package structure of a controller, a capacitor, and a driver.
12 is a circuit diagram of an isolated converter according to a fifth embodiment of the present invention.
13 shows waveforms of the D, M, DI and DS signals of a fifth embodiment of the present invention.
14 is a circuit diagram of an isolated converter according to a sixth embodiment of the present invention.
15 is a circuit diagram of an isolated converter according to a seventh embodiment of the present invention.
16 shows waveforms of the detection voltage and the control signal of the present invention.
17 shows the waveforms of the DI signal, the TX signal, and the RX signal.
18 is a circuit diagram of an isolated converter according to an eighth embodiment of the present invention.
19 is an internal circuit diagram of an on-time regulator and other elements of an isolated converter of an eighth embodiment of the present invention.
Fig. 20 shows waveforms of the DE, P2, clk and P3 signals of an eighth embodiment of the present invention.
21 is a circuit diagram of an isolated converter according to a ninth embodiment of the present invention.
22 is an internal circuit diagram of the on-time regulator and other elements of the ninth embodiment of the present invention.
23 shows the waveforms of the DE1, P1, clk1, DE2, P2, clk2 and P4 signals of the ninth embodiment of the present invention.
Figure 24 shows the waveform of the ninth embodiment DOWN, LD, B1, B2, UP, F and I ₀ of the present invention.

2 is a circuit diagram of an isolated converter according to a first embodiment of the present invention. A constant on-time (COT) isolated converter is connected to the input terminal 26 to receive the input voltage V _IN . The converter includes a transformer 28 connected to the input terminal 26 on the primary side and to the output capacitor 30 and load 31 via a diode 29 on the secondary side. The anode of the diode 29 is connected to the secondary side of the transformer 28 and the cathode is connected to the output capacitor 30 and the load 31. The secondary side of the transformer 28 and the load 31 are connected to the processor 32 which is connected to the output 32 of the transformer 28 by means of the start voltage S and the output voltage V _O or the output current I ₀ across the load 31, The control signal C is generated. The transmission medium between the primary side and the secondary side of the transformer 28 may be electrical, magnetic, piezoelectric or light. For this reason, the processor 32 is connected to at least one coupling element 34, such as a capacitor, a transformer, a piezoelectric element or an optical coupling element, for transmitting the control signal C to the primary side . The primary side of the transformer 28 and the coupling element 34 are connected to a driver 36 connected to the input terminal 26. A driver 36 receives the control signal C through the coupling element 34 and amplifies the control signal C to generate a first digital signal D1. The driver 36 also includes a circuit protection function. The primary side of the transformer 28 and the driver 36 are connected to an electronic switch 38, such as N-channel MOSFETs or bipolar junction transistors, which switch the first digital signal D1 Off state to control the output voltage (V _O ) and output current (I _O ) generated through the transformer (28) from the input voltage (V _IN ) via the diode (29) . The duration in which the electronic switch remains in the ON / OFF state is determined by the time it takes for the control signal C to change from negative to positive and then from positive to negative, for example, Since the control signal C is a pulse signal, the first electronic switch 38 is turned on when the signal changes from negative to positive until the signal falls and changes from positive to negative, that is, , Is on. The switch is turned off and is turned off until the signal changes from negative to positive, i.e., the switch is turned on again. The driver 36 also receives the input voltage V _IN from the input terminal 26 and controls the output voltage V _O and the output current I _O across the load 31 via the transformer 28 (S) to the processor (32) to generate a first pulse signal (P1) to change the on / off state of the switch to the electronic switch (38) . When the driver 36 receives the control signal C through the coupling element 34, the driver stops generating the first pulse signal P1.

The processor 32 includes a signal extractor 40 and a controller 42. Since the electric signal extractor 40 is connected to the low potential VSS, the secondary side of the transformer 28 and the load 31, the electric signal extractor 40 outputs the detection voltage (I _O ) corresponding to the feedback voltage DV or the output current I _O DS). The controller 42 is connected to the coupling element 34, the secondary side of the transformer 28 and the signal extractor 40. The controller 42 generates the control signal C by receiving the start voltage S and the feedback voltage DV or the detection voltage DS from the signal extractor 40. 2 and 3A, since the controller 42 is supplied with a predetermined reference voltage, when the feedback voltage DV is lower than the reference voltage, the control signal C has at least one cycle (I.e., a waveform of a plurality of cycles appearing within the time period T1 shown in Fig. 3A). Each of the second pulse signals P2 of the first half cycle is at a high voltage level and each of the second half cycles is at a low voltage level. When the feedback voltage DV is larger than the reference voltage, that is, within the time period T2, the control signal C is at the low voltage level. Similarly, when the detection voltage DS is less than the reference voltage, the control signal C is the second pulse signal P2 of at least one cycle. The second pulse signal P2 of each first half cycle is at a high voltage level and each of the second half cycles is at a low voltage level. When the detection voltage DS is larger than the reference voltage, that is, within the time period T2, the control signal C is at the low voltage level.

As shown in Figure 3b, when the feedback voltage (DV) is smaller than the reference voltage, the control signal (C) is a single cycle a second, such as a waveform in the predetermined period (T _min) of the controller (42) And transmits the pulse signal P2. The second pulse signal P2 in the first half cycle is at a high voltage level and in the second half cycle is at a low voltage level, wherein the duration of the high voltage level is determined by the controller 42 on the secondary side. When the feedback voltage (DV) within a predetermined period (T _min) is greater than the reference voltage, the control signal (C) is a second pulse signal, and then, until the feedback voltage (DV) is smaller than the reference voltage (P2). Similarly, when the detection voltage (DS) is smaller than the reference voltage, the control signal (C) sends a single cycle, the second pulse signal (P2) within a predetermined period (T _min) of the controller (42) . The second pulse signal P2 in the first half cycle is at a high voltage level and in the second half cycle is at a low voltage level, wherein the duration of the high voltage level is determined by the controller 42 on the secondary side. Predetermined period (T _min) when the detected voltage (DS) is greater than the reference voltage in the control signal (C) is then a second pulse signal to when the detection voltage (DS) is smaller than the reference voltage (P2).

The starting mode of operation of the first embodiment is described as follows. First, the driver 36 receives the input voltage V _IN from the input terminal 26 and generates a first pulse signal P1 that is transmitted to the electronic switch 38, The ON / OFF state is changed in order to control the output voltage (V _O ) and the output current (I _O ). The output voltage V _O and the output current I _O are generated through the transformer 28 via the diode 29. The starting voltage S is also transmitted to the controller 42 via the transformer 28. [ The electric signal extractor 40 receives the feedback voltage DV from the output voltage V _O or receives the detection voltage DS corresponding to the output current I _O , To the controller (42) which generates the control signal (C) based on the detection voltage (DV) or the detection voltage (DS) and the starting voltage (S). The duration between the instant when the control signal C changes from negative to positive and the moment when the control signal C changes from positive to negative determines the duration of the on / off state of the electronic switch 38. The coupling element 34 transfers the control signal C from the secondary side to the driver 36 on the primary side. When the driver 36 receives the control signal C, the driver amplifies the control signal C to generate the first digital signal D1 and controls the generation of the first pulse signal P1 Stop. Finally, the electronic switch 38 receives the first digital signal D1 and changes its on / off state accordingly to control the transformer 28 receiving the input voltage V _IN And adjusts the output voltage (V _o ) and the output current (I _o ) through the diode (29). In the prior art, there is a need for a compensation circuit that compensates for gain margin and phase margin to ensure stability of the output voltage of the device. The present invention avoids the complicated technique of gain margin and phase margin adjustment since no compensation circuit is required. Nevertheless, the present invention can directly detect the output voltage (V _O ) or the output current (I _O ) and use the information from the secondary side to determine the time at which the primary side switch is on or off, Can be transferred to the primary side and therefore the output voltage and output current can be adjusted immediately to obtain a fast load transients response. The present invention also uses the coupling element to transfer information from the output voltage or the output current from the secondary side to the primary side and therefore does not require any encoder or decoder as well as encoding or decoding techniques , Effectively isolating the signals on the primary and secondary sides to enable independent secondary regulation of the output voltage (V _o ) and the output current (I _o ).

4 is a circuit diagram of an isolated converter according to a second embodiment of the present invention. Referring to FIG. 4, to improve the efficiency of the system, a second electronic switch 44, for example, an N-channel power MOSFET, replaces the diode 29 of FIG. 2 as synchronous rectifiers. In this embodiment, the secondary side of the transformer 28 is connected directly to the load 31. In addition, the second electronic switch 44 is connected between the secondary side of the transformer 28 and the load 31 and is connected to the controller 42. When the controller 42 generates the control signal C, the controller also controls the second digital signal D2 according to the feedback voltage DV or the detection voltage DS and the start voltage S, And the second electronic switch (44) is in the opposite on / off states of the first electronic switch (38), or both the first electronic switch (38) and the second electronic switch (D2) to the second electronic switch (44) in order to change the on / off state of the second electronic switch (44) to be in the off state, and for this reason the transformer And receives the input voltage (V _IN ) to regulate the output voltage (V _O ) and the output current (I _O ).

The startup mode operation of the system of FIG. 4 is described as follows. First, the driver 36 receives the input voltage V _IN from the input terminal 26 and then generates the first pulse signal P 1 to the first electronic switch 38, so that the switch 38 is turned on / Off state is changed to control the input voltage V _IN applied to the transformer 28 and the output voltage V _O across the load 31 via the second electronic switch 44, And generates the output current I _O. In addition, the starting voltage S is applied to the controller 42 via the transformer 28. The electric signal extractor 40 then recovers the detection voltage DS corresponding to the feedback voltage DV of the output voltage V _O or the output current I _O , And also to the controller 42 which receives and thus generates the control signal C and the second digital signal D2. The duration of the on / off state of the first electronic switch 38 is determined by the duration of the control signal C between the moment the switch changes from negative to positive and the moment the switch changes from positive to negative do. The second electronic switch 44 receives the second digital signal D2 and changes its on / off state, and the coupling element 34 receives the control signal C from the secondary side, To the driver 36 on the side. When the driver 36 receives the control signal C, the driver amplifies the control signal C to generate the first digital signal D1 and controls the generation of the first pulse signal P1 Stop. Finally, the first electronic switch 38 changes its on / off state to control the transformer 28 which receives the first digital signal D1 and accordingly receives the input voltage V _IN , Thereby adjusting the output voltage (V _O ) and the output current (I _O ).

5 is a circuit diagram of an isolated converter according to a third embodiment of the present invention. 5, the starting voltage S is applied to the controller 42 by an external circuit 46 connected to the controller 42 instead of being provided by the transformer 28 described in FIG. 2 . In operation, the output voltage (V _o ) and the output current (I _o ) and the external circuit (46) are already applied to the load (31) and the external circuit (46) The electric signal extractor 40 may recover the detection voltage DS corresponding to the feedback voltage DV of the output voltage V _O or the output current I _O To the controller (42). When the controller 42 receives the detection voltage DS corresponding to the feedback voltage DV of the output voltage V _O or the output current I _O together with the start voltage S, And the duration of the on / off state of the first electronic switch 38 is controlled by the control signal C between the moment the switch changes from negative to positive and the moment the switch changes from positive to negative Is determined by the duration of the control signal (C). Next, the coupling element 34 transfers the control signal C from the secondary side to the driver 36 on the primary side. The driver 36 receives the control signal C and amplifies it to generate a first digital signal D1 and transmits the first digital signal D1 to the first electronic switch 38, Off state of the transformer 28 to control the transformer 28 receiving the input voltage V _IN so that the output voltage V _O and the output current I _O ).

6 is a circuit diagram of an isolated converter according to a fourth embodiment of the present invention. As shown in Fig. 6, the starting voltage S is applied to the controller 42 by an external circuit 46 instead of the transformer 28 shown in Fig. In operation, when it is assumed that the output voltage (V _O ) and the output current are already applied to the load (31) and the external circuit (46) has already supplied the starting voltage to the controller (42) The electric signal extractor 40 recovers the detection voltage DS corresponding to the feedback voltage DV of the output voltage V _O or the output current I _O and transmits the detection voltage DS to the controller 42. When the controller 42 receives the detection voltage DS corresponding to the feedback voltage DV of the output voltage V _O or the output current I _O together with the start voltage S, And the second digital signal (D2), and the duration of the first electronic switch (38) for the on / off state is the instant when the switch changes from negative to positive and the switch Is determined by the duration of the control signal (C) between the positive and negative moments. The second electronic switch 44 receives the second digital signal D2 to change its on / off state and the coupling element 34 outputs the control signal C from the secondary side to the 1 < st > To the driver 36 on the car side. The driver 36 receives the control signal C and amplifies it to generate the first digital signal D1 that is transmitted to the first electronic switch 38. The electronic switch 38 changes its on / off state accordingly to control the transformer 28 which receives the input voltage V _IN so that the output voltage V _O and the output current I _O ).

FIGS. 7 and 8 illustrate alternative circuit diagrams of the electrical signal extractor 40. 7, the electrical signal extractor 40 may be in the form of a voltage divider 48 connected to the secondary side of the transformer 28 via a diode 29, And can capture the feedback voltage DV of the output voltage V _O. 8, the electric signal extractor 40 may be a resistor 50 connected to the secondary side of the transformer 28 via the diode 29 or a secondary side of the transformer 28, Lt; / RTI > When the output current (I _O) is flowing through the resistor 50, the detection voltage (DS) takes place through the resistor 50.

9, the driver 36 includes a comparator 52 and a resistor 54 connected to the positive input terminal of the comparator 52, and the other end of the resistor 54 is grounded. The controller 42 includes a switching control circuit 56, a bias circuit 58, a buffer 60, an inverter 62, a third electronic switch 64 and a fourth electronic switch 66. The switching control circuit 56 is connected to the buffer 60 and the inverter 62 and they are connected to the third electronic switch 64 and the fourth electronic switch 66, respectively. The bias circuit 58 is connected to the third electronic switch 64. The third electronic switch 64 and the fourth electronic switch 66 are connected to the resistor 54 via the coupling elements 34. The signal between the positive input of the resistor 54 and the comparator 52 is called the RX signal and the signal between the coupling element 34 and the third electronic switch 64 is called the TX signal. The switching control circuit 56 controls the third electronic switch 64 and the fourth electronic switch 66 via the buffer 60 and the inverter 62 so that their on / off states are reversed. When the feedback voltage DV is lower than the reference voltage of the controller 42, the switching control circuit 56 turns on the third electronic switch 64 via the buffer 60 and the inverter 62, 4 electronic switch 66 is turned off by a bias circuit 58 to apply a low potential VSS across the third electronic switch 64, the coupling element 34, the resistor 54 and the coupling element 34, Lt; / RTI > current. The comparator 52 receives the RX signal and therefore generates a first digital signal D1. After a given period of time, the switching control circuit 56 turns the third electronic switch 64 off and the fourth electronic switch 66 on via the buffer 60 and the inverter 62, The resistor element 54, the coupling element 34, and the fourth electronic switch 66, as shown in FIG. The waveforms of the RX signal, the TX signal, the feedback voltage DV and the first digital signal D1 are shown in FIG. As shown in FIG. 10, when the feedback voltage DV is lower than the reference voltage, the high voltage level of the first digital signal D1 occurs at a very short delay time.

9 and 11, in order to achieve a compact system, the driver 36, the controller 42 and the coupling element 34 may be integrated into a single package. As shown in FIG. 11, the package includes a first semiconductor chip 68, a dielectric layer 70, and a second semiconductor chip 72 stacked together. The first semiconductor chip 68 includes a controller device 42 and the second semiconductor chip 72 includes a driver 36. The coupling device may be configured such that a capacitor, Wherein the first semiconductor chip 68 and the conductive layer of the second semiconductor chip 72 are formed by a conductive layer on the chip 68, a dielectric layer 70 on the second semiconductor chip 72, A metal layer, or a lead frame. When the coupling element 34 is a transformer, piezoelectric element or optical coupling element, it is integrated into a package structure to reduce the footprint on the printed circuit board and the bill of material (BOM) cost Similar methods can be used.

In Fig. 8, the electric signal extractor 40 is a resistor 50. Fig. Assuming that the reference voltage of the controller 42 is 250 mV, the direct current component of the output current I _o flowing through the resistor 50 is 2.5 amps, which means that the resistance of the resistor 50 is accurate It should be set to 0.1 ohms (ohms) in order to output the control signal C. However, since the resistor 50 is in the main output path, it can not be too large to not increase the loss in output efficiency; If the resistor is too small and smaller also the reference voltage of the controller 42, and otherwise, can not decide the signal waveform of the output current (I _O) to output a correct output control signal (C). However, if the reference voltage of the controller 42 is set too low, the circuit will be difficult to design.

12 is a circuit diagram of an isolated converter according to a fifth embodiment of the present invention. 12, the fixed on time isolated converter is connected to input terminal 74 to receive the input voltage V _IN . The fixed on-time isolated converter includes a transformer 76 having a primary side and a secondary side, the primary side connected to the input terminal 74 and the secondary side connected to a diode 77, a load 78 And an output capacitor 79, The anode of the diode 77 is connected to the secondary side of the transformer 76 and the cathode is connected to the load 78 and the output capacitor 79. There is a waveform signal on the secondary side of the transformer 76 which results in an output voltage V _o and an output current I _o at the load 78. This waveform signal has an AC component and a DC component. The average value of the waveform signal voltages is a voltage value of the DC component. The voltage value of the AC component is obtained by subtracting the voltage value of the DC component from the voltage of the waveform signal. The negative pole of the diode 77, the secondary side of the transformer 76 and the load 78 are connected to the processor 80. This causes the output AC voltage A of the AC component and the output current I _O ). Processor 80 is preset to a reference voltage and converts the (preset), the output current (I _O) for processing the voltage (K). Since the output current I _O is an AC / DC signal, the processing voltage K is also an AC / DC voltage signal, and its DC component is larger than the AC component. Therefore, the processing voltage K includes an AC component and a DC component, and the average voltage value is a voltage value of the DC component. The processor 80 uses the filter 92 to subtract the voltage value of the DC component of the feedback voltage DV to obtain the AC voltage AC of the AC component. The processor 80 sets the voltage value of the direct current component of the processing voltage K to be equal to or slightly higher than the reference voltage and controls the voltage of the control voltage K in accordance with the AC voltage A and the processing voltage K, And generates a signal (C). For example, the processor 80 combines the AC voltage A and the processing voltage K to generate a control voltage CV and generates the control signal C based on the AC voltage A and the reference voltage . The transmission medium between the primary and secondary sides may be electrical, magnetic, piezoelectric or optical elements. The processor 80 is connected to at least one coupling element 82, such as a capacitor, transformer, piezoelectric element or optical coupling element, which is used to transfer the control signal C from the secondary side to the primary side And is connected to the primary and secondary sides of the transformer 76. The input terminal 74, the primary side of the transformer 76 and the coupling element 82 are connected to a driver 84 which receives the control signal C and then generates a digital signal D And amplifies the control signal (C). The primary side of the transformer 76 and the driver 84 are connected to an electronic switch 86 such as an N-channel MOSFET or a bipolar junction transistor which receives the digital signal D, The transformer 76 changes the on / off state to control the received input voltage V _IN and then controls the output voltage V _o and the output current I _o via the diode 77 , And the duration of the on / off state of the electronic switch 86 changes when the control signal C changes from negative to positive and when the control signal C changes from positive to negative For example, when the control signal C is a clock signal, when the clock signal changes from negative to positive, the electronic switch 86 is turned on and until the clock signal changes from positive to negative The electronic switch 86 remains on, State is turned off and ends the electronic switch 86 remains in off state until the clock signal changes from negative back to positive, that is, the OFF state of the electronic switch 86 is ended is again turned on.

The driver 84 receives the input voltage V _IN from the input terminal 74 and generates a first pulse signal P1 in the electronic switch 86 which causes the input voltage V _IN , Off state of the electronic switch 86 so as to control the output voltage V _IN so that the waveform signal, the output voltage V _O and the output current I _O are fed through the diode 77 . The processor 80 then generates a control signal C and transmits it to the driver 84 via the coupling element 82 so that the driver 84 generates a control signal C Stop the generation.

3b and 12, the processor 80 includes a current-to-voltage converter 88, a voltage divider 90, a filter 92, an adder 94 and a controller 96. [ The current-to-voltage converter 88 is connected to the load 78 and recovers the output current I _o to convert it to the processing voltage K. The voltage divider 90 is connected to the low potential VSS, the cathode of the diode 77, the secondary side of the transformer 76 and the load 78. The voltage divider 90 receives the output voltage V _O and captures the feedback voltage DV. The filter 92 is connected to the voltage divider 90 and therefore receives and filters the feedback voltage DV to generate an alternating voltage A. The adder 94 is connected to the filter 92 and the current-to-voltage converter 88 and therefore receives the AC voltage A and the processing voltage K to generate the control voltage CV Combine together. The controller 96 having a preset reference voltage and a predetermined period _{Tmin is} connected to the low potential VSS, the coupling element 82, the adder 82, (94), the secondary side of the transformer (76) and the load (78) and generates the control signal (C). When the control voltage (CV) is lower than the reference voltage, and said control signal (C) is a second pulse signal (P2) of at least one cycle in the range of the predetermined period (T _min), the second The voltage in each of the first half cycles of the pulse signal is at a high voltage level and the voltage in each second half cycle is at a low voltage level. When the control voltage (CV) is greater than the reference voltage at the end of the predetermined period (T _min ), the control signal (C) is at a low voltage level. The current-voltage converter 88 includes a resistor 98 and an amplifier 100. The resistor 98 is connected to the load 78 and the low potential VSS and the output current I _O flows through the resistor 98 so that the detection voltage DS stuck to the resistor 98 . The amplifier 100 is connected to an adder 94, a load 78 and a resistor 98 and receives and amplifies the detection voltage DS that generates the processing voltage K.

In operation of the present embodiment, first, the driver 84 receives the input voltage V _IN from the input terminal 74 to generate a first pulse signal P1 to the electronic switch 86, The on / off state of the electronic switch 86 thus changes, which controls the input voltage V _IN received by the transformer 76 and controls the voltage V _{IN of} the transformer 76 via the diode 77, Generates a waveform signal at the car side and at the same time generates an output voltage V _O and an output current I _O to the load 78 and supplies power to the controller 96 via the transformer 76 do. The output current then flows through the resistor 98 to generate a sense voltage DS at the resistor 98 and further the voltage divider 90 receives the output voltage V _o , And captures the feedback voltage (DV) of the output voltage (V _O ). The amplifier 100 receives and amplifies the detection voltage DS to generate the processing voltage K and the filter 92 receives and filters the feedback voltage DV to generate an AC voltage A . The adder 94 then receives and combines the AC voltage A and the processing voltage K to generate the control voltage CV. The controller 96 receives the reference voltage and the control voltage CV together, and generates the control signal C. [ For example, when the control voltage CV is less than the reference voltage, the control signal C is the second pulse signal P2 of at least one cycle in the predetermined time period T _min . Then, at the end of the predetermined time period (T _min ), when the control voltage (CV) is larger than the reference voltage, the control signal (C) is at a low voltage level. The controller 96 determines the duration between the crossing of the control signal C from negative to positive and positive to negative to set the time for the on / off state of the electronic switch 86 Lt; / RTI > The coupling element 82 transfers the control signal C from the secondary side to the driver 84 on the primary side. When the driver 84 receives the control signal C the driver stops generating the first pulse signal P1 and generates the control signal C to generate the digital signal D. [ Lt; / RTI > Finally, the electronic switch 86 receives the digital signal D, changes its on / off state accordingly to control the input voltage V _IN received by the transformer 76, And adjusts the output voltage (V _o ) and the output current (I _o ) through a diode (77).

13 shows the waveforms of the current M flowing through the electronic switch 86, the current DI flowing through the diode 77, the digital signal D and the detection voltage DS. The AC voltage (A) signal of the waveform signal is generated from the feedback voltage (DV), but may also be obtained from the detection voltage (DS) or the secondary diode current (DI). Referring to Figure 8 and the original setting of the reference voltage and output current I _o , the resistance of the resistor 50 should be set to 0.1 ohms. In this embodiment, however, by using the voltage divider 90, the filter 92, the adder 94 and the amplifier 100, the resistance of the resistor 98 is set to a reference voltage of 25 mV and a voltage of 2.5 amps, It may be set to an ohm (milli-ohms) - of the DC component and the 10 ms to match the output current (I _O). Therefore, the loss of output efficiency is reduced, and the circuit of the controller 96 is easy to design since the reference voltage of the controller 96 need not be set very small.

14 is a circuit diagram of an isolated converter according to a sixth embodiment of the present invention. Unlike the fifth embodiment in which the current-to-voltage converter 88 comprises a resistor 98 and an amplifier 100, in this embodiment the current-to-voltage converter 88 is configured to recover the output current I _o to the load by the Hall element (Hall element) is connected to the (78), and adjusting the appropriate field (磁場), the output current (I _O) is converted to the treatment voltage (K). The operations of the other elements of the system are similar to those in the fifth embodiment.

4, during the start-up mode, the first electronic switch 38 receives the first pulse signal P1 generated by the driver 36, and therefore the controller 42 sends the control signal < RTI ID = 0.0 > C to control the power supplied to the controller 42 by the transformer 28 so as to generate the second digital signal D2 at the same time. In theory, the first electronic switch 38 and the second electronic switch 44 each receive the control signal C and the second digital signal D2 such that their on / off states are opposite. However, if the coupling element 34 is damaged, the control signal C can not be transmitted from the secondary side to the primary side. Since the driver 36 does not receive the control signal C, the driver will continue to generate the first pulse signal P1 on the first electronic switch 38. [ As a result, the first electronic switch 38 and the second electronic switch 44 can not be synchronous and can cause damage to the entire system if turned on at the same time.

The problem described above is solved by the system of Fig. 15 according to the seventh embodiment of the present invention. As shown in FIG. 15, the fixed on time isolated converter is connected to the input terminal 102 to receive the input voltage V _IN . The fixed on-time isolated converter has a primary side connected to an input terminal 102 and its secondary side connected to an output capacitor 105 and a load 106 and an output voltage V _O and an output current I _O And a transformer (104). The primary side and input terminal 102 of the transformer 104 are connected to the driver 108 to receive the input voltage V _IN so that a plurality of wake-up signals W are generated sequentially . The driver 108 is connected to at least one coupling element 110, such as capacitors, transformers, piezoelectric elements or optical coupling elements, which is connected to a transformer (not shown) for transmitting the driving signal W to the secondary side 104, respectively. The secondary side of the coupling element 110, the secondary side of the transformer 104, the low potential VSS, the output capacitor 105 and the load 106 are connected to the output voltage V _O or the output current I _O , The driver 108 is connected to the processor 112 which receives the drive signal W and generates the control signal C through the coupling element 110 and transmits it to the driver 108, And amplifies the control signal C to generate the digital signal D1. The primary side of the transformer 104 and the driver 108 are connected to a first electronic switch 114, such as an N-channel MOSFET or bipolar junction transistor, which receives the first digital signal D1 The output voltage V _o and the output current I _o may be changed by changing the on / off state of the transformer 104 in order to control the input voltage V _IN received from the input terminal 102 . In particular, when the first electronic switch 114 is turned on, the transformer 104 begins to store energy, so that the output voltage decreases. When the first electronic switch 114 is turned off, the transformer 104 starts to emit energy, so that the output voltage increases. Additionally, the ON / OFF duration of the first electronic switch 114 may be controlled such that the moment the control signal C changes from positive to positive at the secondary side, . For example, when the control signal C is a clock signal, when the control signal C becomes positive in the negative, the first electronic switch 114 is turned on and the clock signal is positive It remains on. At this time, the ON state of the first electronic switch 114 is terminated and turned off, and remains in the OFF state until the clock signal becomes positive in the negative, that is, when the OFF state is ended, Turns on again. The driver 108 receives the input voltage V _IN from the input terminal 102 and generates a first pulse signal P1 to the first electronic switch 114 so that the first electronic switch 114, It is therefore turned on in line to generate the output current (I _O) flowing to the output voltage (V _O) and the load 106 is taken to control the input voltage (V _iN) by a transformer (104) receives the load (106) / OFF state and supplies power to the processor 112 via the transformer 104 to generate a control signal C. [ When the first electronic switch 114 is turned on, the transformer 104 stores energy, and the output capacitor 105 supplies energy to the processor 112 to generate the control signal C To generate the output voltage (V _O ) and the output current (I _O ). When the first electronic switch 114 is turned off, the transformer 104 begins to discharge the stored energy to the output capacitor 105 and energizes the processor 112 to generate the control signal (C) , And therefore the transformer 104 generates the output voltage V ₀ and the output current I ₀ . Next, when the driver 108 receives the control signal C through the coupling element 110, it stops generating the first pulse signal P1 and the driving signal W. [

In Fig. 15, the processor 112 includes an electrical signal extractor 116 and a controller 118. The electric signal extractor 116 outputs a low potential VSS, a secondary side of the transformer 104 and a load 106 (hereinafter, referred to as " low side ") to capture the detection voltage DE corresponding to the output voltage V _O or the output current I _O . The controller 118 is connected to the coupling element 110, the secondary side of the transformer 104 and the electrical signal extractor 116 to receive the detection voltage DE and the drive signal W, And generates the control signal (C) based on the detection voltage signal (DE) and the drive signal (W). The control signals in FIG. 15 and gritty described in Figure 16, the controller 118 because the preset reference voltage, when the detection voltage (DE) is less than the reference voltage, the periodic pre-set (T _min) ( C is the second pulse signal P2 of at least one cycle and the voltage in each of the first half cycle of the second pulse signal P2 is a high voltage level and the second half cycle is a low voltage level in each case. At the end of the predetermined period _Tmin , when the detection voltage DE is larger than the reference voltage, the control signal C is at the low voltage level.

A second electronic switch 120, such as an N-channel MOSFET, is connected to the secondary side of the transformer 106, the load 106, the controller 118, the low potential VSS and the electrical signal extractor 116. The controller 118 generates a second digital signal D2 based on the detection voltage signal DE and the drive signal W when the second electronic switch 120 generates the control signal C. [ Off state of the second electronic switch 120 so that the first electronic switch 114 and the second electronic switch 120 are in opposite ON / OFF states, or both are turned off, And the transformer 104 receives the input voltage V _IN to regulate the output voltage V _O and the output current I _O.

The starting operation of the seventh embodiment is described as follows. First, the driver 108 receives the input voltage V _IN from the input terminal 102 and generates a first pulse signal P 1 on the first electronic switch 114, so that the transformer 104 The first electronic switch 114 is turned on and off to control the input voltage V _IN so that the output voltage V (V) is applied to the load 106 via the second electronic switch 120, _O ) and an output current (I _O ). On the other hand, based on the first pulse signal P1, the first electronic switch 114 supplies energy to the controller 118 via the transformer 104, and the driver 108 uses the input voltage Thereby generating a driving signal W. The electric signal extractor 116 then captures the detection voltage DE corresponding to the output voltage V _O or the output current I _O and then transmits the detection voltage DE to the controller 118. The controller 118 receives the drive signal W and the detection voltage DE via the coupling elements 110 and adjusts the control signal C to the energy supplied by the transformer 104 accordingly, The duration between the instant when the control signal C changes from negative to positive and the moment when the control signal changes from positive to negative changes the on / off state of the first electronic switch 114, It is used to determine the duration for changing the state. Next, the second electronic switch 120 receives the second digital signal D2 to change its on / off state, and the coupling element 110 outputs the control signal C from the secondary side To the driver 108 on the primary side. When the driver 108 receives the control signal C, the driver stops generating the first pulse signal P1 and the drive signal W and generates the first digital signal D1 And amplifies the control signal (C). Finally, the first electronic switch 114 receives the first digital signal D1 and changes its on / off state to control the input voltage V _IN received by the transformer 104 accordingly , The output voltage (V _O ), and the output current (I _O ).

15 and 17, the signal between the coupling element 110 and the driver 108 is called the RX signal and the signal between the coupling element 110 and the controller 118 is called the TX signal, The signal also indicates the control signal (C). During a period T1 in which the RX signal indicates a complicated driving signal W, the controller 118 has not yet received the driving signal W, so no TX signal is generated. Next, at the cycle T2, the controller 118 receives the drive signal W, so that the controller generates the control signal C and transmits the control signal to the driver 108 via the coupling element 110 do. Therefore, at this time, the RX signal will be synchronized with the TX signals. On the other hand, if the coupling element 110 is damaged, the driving signal W can not be transmitted to the controller 118 through the coupling element 110. If the controller 118 does not receive the drive signal W, it will not be able to generate the control signal C and the second digital signal D2 and the entire system will not operate, Damage can be avoided.

In Figure 2, when the system is operating in discontinuous mode, the switching frequency of the first electronic switch 38 is represented by equation (1): < EMI ID =

(1)

(One)

Where V _IN is the input voltage, V _O is the output voltage, I _O is the output current, L is the inductance of the transformer 28 and t _on is the on- On-duration. The switching frequency f is inversely proportional to the input voltage V _IN if the load 31 remains unchanged and if t _on remains unchanged. Therefore, when the input voltage V _IN increases, the switching frequency f will decrease accordingly. However, when the switching frequency is too low, the transformer 28 will saturate, there will be no inductance, and the transformer will burn.

18 to 20 illustrate an eighth embodiment of the present invention. This eighth embodiment can reduce the degree of change over the switching frequency for other input voltages to avoid damage to the system. The fixed on-time isolated converter of the present invention is connected to an input terminal 122 for receiving an input voltage V _IN . The fixed on-time isolated converter includes a transformer 124 having a primary side and a secondary side, the primary side connected to an input terminal 122 and the secondary side connected in parallel to a load 128, (Not shown). The driver 130 is connected to the input terminal 122 and receives the input voltage V _IN to generate a first pulse signal P1. The driver 130 and the primary side of the transformer 124 are connected to a first electronic switch 132, such as an N-channel MOSFET or a bipolar junction transistor, which receives the first pulse signal P1, Off state to control the input voltage (V _IN ) received by the transformer 124 to generate an output voltage (V _O ) and an output current (I _O ) And controls the sampled voltage SM including the input voltage V _IN generated on the secondary side of the transformer 124. Processor 134 is connected between the secondary side and the load 128 of the transformer 124, a is set in advance as a first reference voltage (VR1) and the period (T _min). The processor 134 receives the output voltage V ₀ or the output current I ₀ and the sampled voltage SM and also receives the output voltage V ₀ or the output current I ₀ And captures the detection voltage DE. When the detection voltage (DE) is less than the first reference voltage (VR1), the processor 134 is the period (T _min), the pre-set according to the input voltage (V _IN) at the sampled voltage (SM) within The second pulse signal P2 is generated. The second pulse signal P2 is a signal of at least one cycle in which the voltage in each of the first half-cycles is a high-voltage level and the voltage in each of the second half-cycles is a low-voltage level. Processor 134 and driver 130 are coupled to coupling element 136, which may be capacitors, transformers, piezoelectric elements, or optical coupling elements. The coupling element 136 is located between the primary side and the secondary side and the coupling element 136 is coupled to the second pulse signal P2 to interrupt the generation of the first pulse signal P1 of the driver. To the driver 130 on the primary side. The driver 130 further amplifies the second pulse signal P2 to generate the first digital signal D1 and transmits the first digital signal D1 to the first electronic switch 132 . The first electronic switch 132 is connected to the input voltage V _IN received by the transformer 124 from the input terminal 122 to adjust the output voltage V _O and the output current I _O To control it, change the on / off state accordingly. The duration of the on / off state of the first electromagnetic switch 132 is set so that the second pulse signal P2 is changed from positive to negative from the instant when the second pulse signal P2 on the secondary side is changed from negative to positive For example, when the second pulse signal P2 is a clock signal, an instant when the first electronic switch 132 is turned on and the clock signal is changed from positive to negative The ON state of the first electronic switch is terminated and the first electronic switch is turned off. The first electronic switch remains off until the clock signal changes from negative to positive so that the first electronic switch 132 is turned on again. Since the ON / OFF state duration of the first electronic switch 132 depends on the second pulse signal P2 depending on the input voltage V _IN , the second pulse signal P2 and the input settings for the voltage (V _iN) are the higher the input voltage (V _iN) the first electronic switch 132 is shorter, the time remaining in the oN state, the lower the input voltage of the first electronic switch (132) Can be adjusted so that the time remaining in the ON state is prolonged.

As shown in FIG. 18, the processor 134 includes an electrical signal extractor 138, an on-time regulator 140, and a controller 142. The electric signal extractor 138 receives the output voltage V _O or the output current I _O and outputs a low potential VSS to the secondary side of the transformer 124 and a low potential VSS to extract the detection voltage DE, And is connected to the load 128. The on-time regulator 140 is connected to the secondary side of the transformer 124 to receive and capture the sampled voltage SM. The controller 142 is connected to the low potential VSS, the on-time regulator 140, the coupling element 136, the secondary side of the transformer 124 and the electrical signal extractor 138. The controller 142 is preset to the first reference voltage VR1 and the period T _min to receive the detection voltage DE. When the detection voltage DE is less than the first reference voltage VR1, the controller 142 generates the second pulse signal P2 and the clock signal clk corresponding to the preset T _min . When the system is operating in a discontinuous mode, the switching frequency of the first electronic switch 132 is represented by equation (2): < RTI ID = 0.0 >

(2)

(2)

Here, V _IN is the input voltage is, V _O is the output voltage, I _O is the output current, and, L is the inductance of the transformer (124), t _on is that the first electronic switch 132 remains in the on state It is time. In order to prevent the transformer 28 from saturating when the switching frequency is too low, in this example, the higher the input voltage, the shorter the on time of the first electronic switch 132, _Thereby reducing changes in the switching frequency due to the different input voltage V _IN .

The clock signal clk is a positive pulse signal when the second pulse signal P2 changes from negative to positive and the clock signal clk otherwise is a low level signal. The on-time adjuster 140 receives the clock signal clk and generates a third pulse signal P3 together with the input voltage V _IN and transmits the third pulse signal P3 to the controller 142, (P3) is the second pulse signal (P2) is positive and the change to negative in the amount remaining to the next state of the end of at least the predetermined period (T _min), and the clock signal following the time change in an amount in the negative So that the second pulse signal P2 changes from negative to positive. A second electronic switch 144, such as an N-channel MOSFET, is also coupled between the secondary side of the transformer 124 and the load 128 and also to the controller 142. When the controller 142 generates the second pulse signal P2, the controller also generates a corresponding second digital signal D2 to the second electronic switch 144, (132) and the second electronic switch (144) are turned on or off. To capture the input voltage V _IN , the on-time regulator 140 may be coupled to any node on the secondary side of the transformer 124, for example, the on- The on time adjuster 140 may be connected between the switch 144 and the transformer 124 and when the second electronic switch 144 is turned off the on time adjuster 140 may switch between the second electronic switch 144 and the transformer 124, Lt; RTI ID = 0.0 > SM. ≪ / RTI >

19, the on-time regulator 140 includes a sample holder 146, a dependent current source 148, a third electronic switch 150, a capacitor 152 and a comparator 154. A sample holder 146 is connected to the secondary side of the transformer 124 to receive and capture the sampled voltage SM. The dependent current source 148 is connected to the sample holder 146 to receive the sampled voltage SM and generates a dependent current based on the input voltage V _IN in the sampled voltage SM . In order to achieve a short on-time time of the first electronic switch and vice versa as the input voltage is higher, the dependent current source has a larger dependent current as the input voltage is higher and as the input voltage is lower, The dependent current is also designed to be small. The third electronic switch 150 is coupled to the controller 142 and a dependent current source 148 that receives the clock signal clk and is turned on when the positive pulse signal is present but is otherwise turned off . The capacitor 152 is connected in parallel with the third electronic switch 150 and is adapted to receive a dependent current depending on the on / off state of the third electronic switch 150 to store a dependent voltage PV And is connected in series to the dependent current source 148. The capacitor 152 is coupled to the comparator 154 and the controller 142 to receive a second reference voltage VR2 at its negative input terminal and to receive the dependent voltage PV at its positive input terminal, Thereby generating the third pulse signal P3.

The start mode of operation of the system in Fig. 18 is described as follows. First, the driver 130 receives a first pulse signal P1 from the input terminal 122 to generate the input voltage V _{IN in} the first electronic switch 132, The on / off switch 144 is controlled to control the input voltage V _IN received by the transformer 124 to generate an output voltage V _O and an output current I _O at the load 128 via the switch 144. [ Off state. On the other hand, the first pulse signal (P1) is applied to the first switch (132) to control the sample voltage (SM) including the input voltage (V _IN ) generated on the secondary side of the transformer / Off state. When the first pulse signal P1 is at a high level signal the first electronic switch 132 is turned on and the transformer 124 determines whether the output capacitor 126 is at an output voltage V _O and an output current I _O Lt; RTI ID = 0.0 > energy). ≪ / RTI > When the first pulse signal P1 is at a low level signal the first electronic switch 132 is turned off and the transformer 124 is switched off while the energy is stored in the output capacitor 126, _O ), an output current (I ₀ ), and a sample voltage (SM).

Next, the electrical signal extractor 138 captures the detection voltage DE corresponding to the output voltage V _O or the output current I _O and transmits the detection voltage DE to the controller 142. The controller 142 has a second while the controller 142 may give a predetermined (T _min) when receiving the detection voltage (DE), and the detected voltage (DE) is less than the first reference voltage (VR1) And generates a second pulse signal P2 and a corresponding clock signal clk and outputs a second digital signal D2 to the second pulse signal P2 to change the on / off state of the second electronic switch 144. [ To the second electronic switch 144 in accordance with the control signal. On the other hand, the on-time regulator 140 starts operating when the second electronic switch 144 is in an off state. Since the first sample holder 146 receives the sampled voltage SM, it captures the input voltage V _IN from the sampled voltage SM. The dependent current source 148 then receives the input voltage V _IN and generates a dependent current accordingly. When the third electronic switch 150 receives the clock signal clk when the second pulse signal P2 is changed from negative to positive and is a low level signal since the clock signal clk is a positive pulse signal, , The third electronic switch 150 is turned on only when the positive pulse signal appears, and otherwise remains off. In other words, at the start of the second pulse signal P2, the third electronic switch 150 is turned on so that the voltage of the capacitor 152 is zero, and the dependent current flows to the capacitor 152 Charge to the dependent voltage (PV). Finally, the comparator 154 receives the second reference voltage VR2 and the dependent voltage PV to generate the third pulse signal P3. When the dependent voltage PV is equal to the second reference voltage VR2, the third pulse signal P3 will change from negative to positive, and then the controller 142 will change the second pulse signal (P2) the negatively in the amount of feed, the second pulse signal (P2) is a positive pulse signal of the period pre-set and remain in sound conditions of the end of the (T _min), therefore, the clock signal (clk) The second pulse signal P2 is changed from negative to positive. The second pulse signal P2 is transmitted from the secondary side to the driver 130 on the primary side through the coupling element 136 to stop the generation of the first pulse signal P1 do. Finally, the driver 130 amplifies the second pulse signal P2 to generate a first digital signal D1 and transmits it to the first electronic switch 132, The output voltage V _O and the output current I _O are adjusted by changing the ON / OFF state in accordance with the received input voltage V _{IN in} order to control the received input voltage V _IN . In particular, when the first digital signal D1 is a low level signal, the first electronic switch 132 is in an off state and therefore the transformer 124 converts the output voltage V _o and the output current I _o . When the first digital signal D1 is a high level signal, the first electronic switch 132 is turned on and the transformer 124 reduces the output voltage V _o and the output current I _o .

Referring to FIG. 2 and equation (1), when the load 31 is a light load, I _O will decrease, so the switching frequency will decrease accordingly. When the switching frequency reaches 20-20 kHz, it is easily detectable by the human ear. To avoid this problem, the t _on must be reduced whenever the load 31 is lightly loaded. This is described in the ninth embodiment of the present invention shown in Figs. 21 to 23 below.

21, a fixed on-time isolated converter is connected to input terminal 156 and receives an input voltage V _IN which has its primary connected to input terminal 156, (V _O ) crossing the load 162 and an output current I _O (I) that crosses the load 162. The transformer 158 has its secondary side connected to the load 162, To a load 162 having an output signal that includes an output signal. The secondary side of the transformer 158 and the load 162 are coupled to a processor 164 (see FIG. 2) preset with a time period T _min , a first reference voltage VR1, a low threshold frequency, . The processor 164 receives the output signal from the load 162 and sequentially captures the first detection voltage DE1 and the second detection voltage DE2 from the output signal. When the first detection voltage DE1 is less than the first reference voltage VR1, the processor 164 outputs the first pulse signal P1 and the synchronized first clock signal clk1 of the same frequency (T _min ). When the second detection voltage DE2 is smaller than the first reference voltage VR1, at least one frequency F of the first clock signal clk1, the low threshold frequency,高) based on the threshold frequency, the processor 164 is to generate in the second pulse signal (P2) and the preset period of the second clock signal (clk2) of the same frequency synchronized (T _min). The second pulse signal P2 is a signal of at least one cycle and the voltage at each of the first half cycle of the second pulse signal P2 is at a high voltage level and the voltage at each second half cycle is at a low voltage level have. The processor 164 is coupled to at least one coupling element 166, which may be a capacitor, a transformer, a piezoelectric element, or an optical coupling element. The coupling element 166 is connected to both the primary side and the secondary side of the transformer 158 and sequentially couples the first pulse signal P1 and the second pulse signal P2 from the secondary side to the primary side send. The primary side of the transformer 158 and the coupling element 166 are connected to a driver 168 which sequentially receives and amplifies the first pulse signal P1 and the second pulse signal P2 , The first digital signal (D1) and the second digital signal (D2), respectively. The primary side of the transformer 158 and the driver 168 are connected to a first electronic switch 170, such as an N-channel MOSFET or a bipolar junction transistor. The first electronic switch 170 sequentially receives the first digital signal D1 and the second digital signal D2 and controls the input voltage V _IN received from the input terminal 156 , Thereby adjusting the output signal. The duration of the on / off state of the first electronic switch 170 is determined by the time at which the first pulse signal P1 changes from negative to positive and the moment at which the first pulse signal P1 changes from positive to negative Or between the instant when the second pulse signal P2 changes from negative to positive and the moment when the second pulse signal P2 changes from positive to negative. For example, when the first pulse signal P1 is a clock signal and changes from negative to positive, the first electronic switch 170 is turned on and remains on until the clock signal changes from positive to negative, , The first electronic switch 170 is turned off and remains off until the clock signal changes from negative to positive, that is, when the off state is terminated, the first The electronic switch 170 is turned on again. Similarly, when the second pulse signal P2 is a clock signal and changes from negative to positive, the first electronic switch 170 is turned on and remains on until the clock signal changes from positive to negative, , The first electronic switch 170 is turned off when the ON state of the first electronic switch 170 is terminated. The first electronic switch 170 remains off until the clock signal changes from negative to positive, i.e., when the first electronic switch 170 is turned off, the first electronic switch 170 170 are turned on again.

When the first electronic switch 170 is operating in a discontinuous mode, its switching frequency is represented by equation (3): < RTI ID = 0.0 >

(3)

(3)

Here, V _IN is the input voltage is, V _O is the output voltage, and I _O is the output current, L is the inductance of the transformer (158), t _on is the time of the on-state of the first electronic switch (170) to be. In order to prevent the switching frequency f from falling into the human audible range to create a noise problem, if there is only one frequency F lower than the low threshold frequency, that is, The switch 170 receives and turns on the first digital signal D1 and the design of the isolated converter in Figure 21 is such that when it is controlled by the second digital signal D2, And allows the on time t _on of the first electronic switch 170 to be longer when controlled by the signal D1. On the other hand, if F is higher than the high threshold frequency, the on time (t _on ) of the first electronic switch 170 controlled by the first digital signal D1 is the second digital signal D2 The on time of the first electronic switch 170 is shorter than that of the first electronic switch 170 when it is controlled by the first electronic switch 170. [ As such, if the first electronic switch 170 receives the first digital signal D1 and the switching frequency is within the audible range, the first electronic switch 170 will switch the second digital signal D2 ), The switching frequency will be out of the audible range and therefore the noise problem is solved.

When there is a plurality of frequencies F, the processor 164 has a number of features including a low threshold value, a high threshold value, an initial value corresponding to the first pulse signal P1, and a calculation condition. When the frequency F is lower than the low threshold frequency, the initial value is increased by 1 and the initial value is decreased by 1 when the frequency F is higher than the high threshold frequency. The processor 164 uses the low-threshold frequency or the high-threshold frequency and the calculation conditions to sequentially measure each frequency F to obtain an overall value. Also, the total value larger than the high threshold value is rounded down to the high threshold value, and the whole value lower than the low threshold value is rounded to the low threshold value. In addition, the initial value, the low threshold value, the high threshold value, and the total value, all of which are indicated by at least one or more binary numbers, are both greater than zero or equal to zero. For example, if the low threshold value is 00, the high threshold value is 11, the initial value is 00, and there are five frequencies (F), each of which is a high threshold frequency Lower than the low critical frequency, higher than the high critical frequency, lower than the low critical frequency, and the total value thereof is 01. [ The use of five different frequencies (F) that are equal to the low threshold value, the high threshold value, and the initial value but all higher than the high threshold frequency results in an overall value smaller than the low threshold value, This total value is 00. Again, using the same parameters but using a different set of five frequencies (F) lower than the low threshold frequency, the total value is 11, since the total value is higher than the high threshold frequency.

The processor 164 generates the second pulse signal P2 and the second clock signal clk2 according to the total value. Similarly, to reduce noise when the switching frequency is in the audible range, the first electronic switch 170 controlled by the first digital signal D1, when the total value is greater than the initial value, Is longer than the on-time controlled by the second digital signal (D2). The on time for the first electronic switch 170 controlled by the first digital signal Dl is determined by the on time of the first digital signal D2 controlled by the second digital signal D2 when the total value is less than the initial value, It is shorter. The on time for the first electronic switch (170) controlled by the first digital signal (D1) is controlled by the second digital signal (D2) controlled by the second digital signal (D2) when the total value is equal to the initial value 1 < / RTI > Also, the greater the difference between the total value and the initial value, the greater the difference between the on time of the first electronic switch 170 controlled by the first digital signal D1 and the on time of the second digital signal D2 The difference between the ON times of the first electronic switches 170 is also large.

The driver 168 is coupled to the input terminal 156 to receive an input voltage V _IN thereby generating a third pulse signal P 3 to the first electronic switch 170, By switching the on / off state of the switch 170 to control the transformer 158 receiving the input voltage V _IN from the transformer 156 to generate an output signal to the load 162, And further controls the generation of the first pulse signal (P1) and the second pulse signal (P2) by the processor (164). When the driver 168 receives the first pulse signal P1, the driver 168 stops generating the third pulse signal P3.

The processor 164 includes an electrical signal extractor 172, a controller 174 and a on-time adjuster 176. The electric signal extractor 172 is connected to the low potential VSS, the secondary side of the transformer 15 8 and the load 162, and sequentially connects the first detection voltage DE1 and the second detection voltage DE2 And receives the output signal to capture. The controller 174 is coupled to the coupling elements 166, the secondary side of the transformer 158 and the electrical signal extractor 172. The controller 174 is a predetermined period (T _min), the first reference voltage (VR1), the calculation conditions, the low threshold frequency and said high threshold frequency, said initial value, and the low threshold and the high threshold, And sequentially receives the first detection voltage DE1 and the second detection voltage DE2. When the first detection voltage DE1 is less than the first reference voltage VR1, the controller 174 outputs the first pulse signal P1 and the first clock signal clk1 to the pre- T _min ), and uses the low-threshold frequency or the high-threshold frequency and the calculation conditions to chronologically measure each of the frequencies F to obtain an overall value. Next, when the second detection voltage DE2 is smaller than the first reference voltage VR1, the controller 174 controls the second pulse signal P2 and the second pulse signal 2 generates a clock signal (clk2) within the predetermined period (T _min). The second clock signal clk2 is a positive pulse signal when the second pulse signal P2 changes from negative to positive; Otherwise, this signal is a low value signal. The on-time adjuster 176 is coupled to the controller 174 to receive the overall value and the second clock signal clk2 and is coupled to the controller 174 to receive a fourth pulse < RTI ID = 0.0 > generates a signal (P4), said fourth pulse signal (P4) when change in an amount in the negative and the second pulse signal (P2), so turns negative in both the negative end of the period (T _min) the preset State. The second electronic switch 178, such as an N-channel MOSFET, is coupled between the secondary side of the transformer 158 and the load 162 and is also coupled to the low potential VSS and controller 174. When the controller 174 generates the first pulse signal P1 or the second pulse signal P2, the on / off state of the first electromagnetic switch 170 and the second electromagnetic switch 178 And also generates a third digital signal D3 on the second electronic switch 178 to switch the on / off state to the off state.

22, the on-time regulator 176 includes a first current source 180, at least one current generator 182, a third electronic switch 184, a capacitor 186, and a comparator 188 . The first current source 180 generates a first current and the current generator 182 is coupled to the controller 174 to receive the bits Bl and B2 for the total value, Thereby generating a second current or a zero current. The third electronic switch 184 is connected to the controller 174, the first current source 180 and the current generator 182. The third electronic switch 184 receives the first clock signal clk1 and is immediately turned on when the first clock signal clk1 is a positive pulse signal; Otherwise, the third electronic switch 184 is off. Otherwise, the third electronic switch 184 receives the second clock signal clk2 and is immediately turned on when the second clock signal clk2 is a positive pulse signal; Otherwise, the third electronic switch 184 is off. The capacitor 186 and the third electronic switch 184 are connected in parallel and are connected to the first current source 180 and the current generator 182. Depending on the on / off state of the third electronic switch 184, the capacitor 186 stores a dependent voltage to receive the first current and the second current or the zero current. The positive input terminal of the comparator 188 is coupled to a capacitor 186 to receive the dependent voltage and the negative input terminal receives a second reference voltage VR2 and the negative input terminal of the comparator 188 The output terminal is connected to the controller 174. The comparator 188 generates the initial pulse signal PS or the fourth pulse signal P4 according to the dependent voltage stored in the capacitor 186 and the second reference voltage VR2.

In an alternative embodiment, the on-time regulator 176 includes a plurality of current generators 182 which, after receiving the full value of bits Bl and B2, generate a plurality of their respective second currents . When the bit is 0, the corresponding current generator 182 generates a zero current, while when the bit is 1, the current generator 182 generates 2 < th > bits of the bits in the plurality of binary bits of the full value, And generates the second current having a magnitude corresponding to a binary power. 22, the on-time regulator 176 includes two current generators 182 that self-generate two second currents, one current generator 182 generates the lower bit B1 of the full value, And the other current generator 182 receives the upper bit B2 of the total value. Since the first current is generated continuously, the second current has a higher overall value and is larger. In other words, when the total value is higher, the time taken for the dependent voltage stored in the capacitor 186 to reach the second reference voltage VR2 is further shortened, The ON time for the first electronic switch 170 after the reception of the second pulse signal P2 is shortened to avoid the audible range and reduce the noise component .

As shown in FIG. 22, each current generator 182 includes a fourth electronic switch 190 and a second current source 192. The fourth electronic switch 190 is coupled to the controller 174, the third electronic switch 184 and the capacitor 186 to receive one bit of the total value and thereby change the on / off state . The second current source 192 is connected to the fourth electronic switch 190 and generates a second current or a zero current according to the on / off state of the fourth electronic switch 190.

The startup mode operation of the ninth embodiment is described as follows. First, the driver 168 receives the input voltage V _IN from the input terminal 156 to generate the third pulse signal P3 to the first electronic switch 170, The second switch 178 and the electronic signal extractor 172 switch the on / off state to control the input voltage V _IN transmitted to the transformer 158, . On the other hand, the transformer 158 also supplies energy to the controller 174. In particular, when the third pulse signal P3 is a high voltage level signal, the first electronic switch 170 is turned on, so that the transformer 158 stores energy, and the output capacitor 160 generates the output signal And supplies energy to the controller 174 to supply energy. When the third pulse signal P3 is a low voltage level signal, the first electronic switch 170 is turned off so that the transformer 158 generates the output signal and supplies energy to the controller 174 And the energy is stored in the output capacitor 150. [

Next, the electronic signal extractor 172 receives the output signal, captures the corresponding first detection voltage DE1, and transmits the first detection voltage DE1 to the controller 174. The controller 174 receives the first detection voltage DE1 using the energy supplied by the transformer 158 and the capacitor 160 and the first detection voltage DE1 is at the first reference voltage < RTI ID = 0.0 > is less than VR1), the controller 174 is a first pulse signal (P1) and the first clock signal (clk1) of the period pre-set (and generated in the T _min) of the first clock signal (clk1) of Time adjuster 176. The on- The controller 174 also generates a third digital signal D3 according to the first pulse signal P1 and outputs the third digital signal D3 to change the on / To the second electronic switch (178). For example, when the two bits BS1 and BS2 of the initial value are 00, the lower threshold value is 00, and the upper threshold value is 11, the controller 174 outputs 2 bits BS1 and BS2 to the on-time adjuster 176 at the same time.

Inside the on-time regulator 176, the two fourth electronic switches 190 receive the bits BS1 or BS2, respectively, of the initial value 0, so that the switches are in the off state. At the start, the first clock signal clk1 is a positive pulse signal, and at other times it is a low-level signal, and since the first pulse signal P1 also begins to change from negative to positive, 184 are momentarily turned on to cause the voltage across capacitor 186 to be zero and the comparator 188 then causes the capacitor 186 to be energized to generate an initial pulse signal PS at a low level voltage Voltage and the second reference voltage VR2. The first current generated by the first current source 180 then charges the capacitor 186 and when the voltage across the capacitor 186 reaches the second reference voltage VR2, a pulse signal (PS) is changed in an amount in the negative, the first pulse of the wave signal (P1) turns negative in the amount, the second clock signal (clk2) is the period at least the predetermined appearing (T _min) Causing it to remain negative until the end. Within a predetermined period (T _min), the controller 174 captures in generating the five frequency (F) of the first clock signal (clk1) sequence. Using the low-threshold frequency or the high-threshold frequency and the calculation conditions, the controller 174 sequentially measures each frequency F, and if all of the five frequencies F are below the low-threshold frequency , And finds that the two bits (Bl, B2) of the total value are 11. These five frequencies F can be measured from a single cycle or other cycles of the first clock signal clk1.

The first pulse signal P1 is then transmitted from the secondary side to the driver 168 on the primary side via the coupling element 166, which, upon receiving the first pulse signal P1, The generation of the third pulse signal P3 is stopped. Finally, the driver 168 amplifies the first pulse signal P1 that generates the first digital signal D1, and since this signal is transmitted to the first electronic switch 170, the switch 170 regulate the output signal by varying accordingly to control the input voltage V _IN sent to the transformer 158. The on / In particular, when the first digital signal D1 is a low voltage level signal, the first electronic switch 170 is turned off causing the transformer 158 to increase the output signal, In the case of a high voltage level signal, the first electronic switch 170 is turned on and the transformer 158 reduces the output signal.

Then, the electronic signal extractor 172 receives the output signal again and collects the corresponding second detection voltage DE2 and transmits it to the controller 174. [ The controller 174 receives the second detection voltage DE2 using the energy supplied by the transformer 158 and the output capacitor 160 and the second detection voltage DE2 is applied to the first is less than the reference voltage (VR1), the controller 174 generates in the second pulse signal (P2) and the second clock signal (clk2), the predetermined period (T _min) of the relevant, wherein 2 clock signal clk2 to the on-time adjuster 176. The on- The controller 174 also generates the third digital signal D3 in accordance with the second pulse signal P2 and outputs the third digital signal D3 to the second electronic switch D3 to change the on / 178). At the same time, the controller 174 transmits the two bits (B1, B2) of the total value to the on-time adjuster 176.

Inside the on-time regulator 176, since each of the two bits B1 and B2 of the total value individually received by the two fourth electronic switches 190 is one, Both of the electronic switches 190 are turned on. Since the second clock signal clk2 is a positive pulse signal and the remaining time is a low voltage level signal, the signal changes from negative to positive at the start, causing the third electronic switch 184 to momentarily turn on The comparator 188 compares the voltage across the capacitor 186 and the second reference voltage VR2 to generate the fourth pulse signal P4 at the low level voltage because the voltage across the capacitor 186 is zero Compare. Next, a first current generated by the first current source 180 and a second current generated by the second current source 192 charge the capacitor 186. When the voltage across the capacitor 186 reaches the second reference voltage VR2 again, the fourth pulse signal P4 changes from negative to positive and the second pulse signal P2 changes from positive to negative , And remains at least in a negative state until at least the predetermined period (T _min ) is over. The capacitor 186 can reach the second reference voltage VR2 more quickly than when the capacitor 186 receives only the first current so that the second pulse signal P2 is positive Is faster than the instant when the first pulse signal (P1) changes from positive to negative because the duration for the second pulse signal at the high voltage level voltage is greater than the duration of the first pulse signal (P1).

Via the coupling element 166, the second pulse signal P2 is transmitted from the secondary side to the driver 168 on the primary side, which amplifies the second pulse signal P2, Generates the second digital signal D2 and transmits the second digital signal D2 to the first electronic switch 170 which is coupled to the input 156, Adjusts the output signal by changing the on / off state of the first electronic switch 170 accordingly to control the voltage V _IN . In particular, when the second digital signal D2 is a low voltage signal, the first electronic switch 170 is turned off and the transformer 158 increases the output signal. When the second digital signal D2 is a high voltage signal, the first electronic switch 170 is turned on and the transformer 158 reduces the output signal. Since the duration of the second pulse signal (P2) at the high level is shorter than the duration of the first pulse signal (P1), the duration for the second digital signal (D2) It will be shorter than the duration of the digital signal D1, which results in a shorter t _on , thereby reducing the noise component by preventing the switching frequency f from entering the audible range.

In the embodiment described above, the controller 174 uses the energy supplied by the transformer 158 to start operation, which causes the driver 168 to switch the first electronic switch 170 (V _IN ) to generate a third pulse signal (P 3), and further wherein the transformer (158) provides energy to the secondary to cause the controller (174) 158, respectively. However, if the external circuit is directly connected and supplies energy to the controller 174, the driver 168 may generate a third pulse signal P3 (FIG. 3) for driving the first electronic switch 170 and the transformer 158 ≪ / RTI > The isolated converter may receive the output signal directly from the electronic signal extractor 172 to start operation.

Referring to FIGS. 21, 23, and 24, as shown in the analog waveform diagram of FIG. 24, the positive pulse waveform DOWN represents the total value -1, the positive pulse waveform UP represents the total value +1 , The high-level waveform of the LD indicates a load 162 having a small load, the high-level waveform of B1 or B2 indicates a value of 1, and the low-level waveform of B1 or B2 indicates a value of zero. As shown in FIG. 21, I _O decreases when the load 162 is under load. When the frequency F is below the low-threshold frequency, a positive pulse waveform appears at the UP and the bits B1 and B2 of the total value change correspondingly between 1 and 0 to form a high-level waveform and avoid audible range. When the frequency F is higher than the high-threshold frequency, a positive pulse waveform appears at DOWN, and the bits B1 and B2 of the total value change correspondingly between 1 and 0 to form a low-level waveform.

In summary, the present invention accomplishes various objectives while controlling the output signal by using information on the secondary side to determine the duration of the on / off state of the electronic switch on the primary side of the transformer.

While the above description is a complete description of preferred embodiments of the present invention, it is possible to use various alternatives, modifications and equivalents. The scope of the invention should, therefore, be determined with reference to the appended claims, along with their full scope of equivalents, rather than the foregoing description.

Claims (15)

A constant on-time (COT) isolated converter connected to an input terminal to receive an input voltage, comprising:
A transformer including a primary side and a secondary side, the primary side connected to an input terminal and the secondary side connected to a load;
A processor coupled to the secondary side and the load of the transformer and generating a control signal by receiving a start voltage and an output voltage or an output current applied to the load;
At least one coupling element connected to the primary side and the secondary side of the processor and the transformer and for transferring the control signal from the secondary side to the primary side of the transformer;
A driver coupled to the primary side of the transformer and to the coupling element for receiving and amplifying the control signal to generate a first digital signal; And
Switching said transformer connected to said primary side and said driver of said transformer to receive said first digital signal and thereby to control an on / off state of said transformer receiving said input voltage from said input terminal, A first electronic switch for regulating the output voltage and the output current;
Wherein the duration of the on / off state of the first electronic switch is determined by an instant when the control signal changes from negative to positive and a moment when the control signal changes from positive to negative. Fixed on time isolated converter.
2. The method of claim 1 wherein the driver generates a first pulse signal that is coupled to the input terminal to receive the input voltage to be transmitted to the first electronic switch, Generating the output voltage and the output current to be applied to the load by changing the ON / OFF state in accordance with the first pulse signal to control the transformer receiving the voltage;
Wherein the processor receives a start voltage provided from the transformer and generates the control signal to be transmitted to the driver, thereby stopping the generation of the first pulse signal when the driver receives the control signal Fixed on time isolated converter.
2. The fixed on-time isolated converter of claim 1, wherein the processor is coupled to an external circuit to supply the startup voltage to the processor.
2. The transformer of claim 1, further comprising a diode comprising an anode connected to the secondary side of the transformer and a cathode connected to the load, the transformer receiving the input voltage and outputting the output voltage and the output And the current is regulated.
2. The apparatus of claim 1, wherein the processor comprises:
An electric signal extractor connected to the secondary side and the load of the transformer and capturing a detection voltage corresponding to the feedback voltage of the output voltage or the output current; And
A controller coupled to the coupling element, to the secondary side of the transformer and to the electrical signal extractor, for receiving the starting voltage, the feedback voltage or the detection voltage and generating a control voltage signal accordingly;
Wherein the constant on-time isolated converter comprises:
6. The transformer of claim 5, further comprising a second electronic switch coupled between the secondary side of the transformer and the load and further coupled to the controller, wherein the feedback voltage or the detection voltage, , The controller generating the control signal controls the on / off state of the second switch such that the first switch and the second switch are in an opposite on / off state or both are off, And a second digital signal transmitted to the switch.
7. The fixed on-time isolated converter of claim 6, wherein the second electronic switch is an N-channel metal oxide semiconductor field effect transistor (MOSFET).
6. The method of claim 5, wherein when the controller is supplied with a preset reference voltage and the feedback voltage is smaller than the preset reference voltage, the control signal is a second pulse signal of at least one cycle, Each cycle of the two pulse signal supplying a high level voltage in a first half cycle and a low level voltage in a second half cycle;
Wherein the control signal is a low-level voltage when the feedback voltage is greater than the preset reference voltage.
The plasma display apparatus of claim 5, wherein when the controller is supplied with the predetermined reference voltage and the detection voltage is smaller than a preset reference voltage, the control signal is a second pulse signal of at least one cycle, Each cycle of the signal supplying a high level voltage in a first half cycle and a low level voltage in a second half cycle;
Wherein the control signal is a low level voltage when the detected voltage is greater than the preset reference voltage.
6. The fixed on-time isolated converter of claim 5, wherein the electrical signal extractor is a voltage divider that captures a division of the output voltage to supply the feedback voltage.
6. The fixed on-time isolated converter of claim 5, wherein the electrical signal extractor is resistive and the output current flows through the resistor to generate a detection voltage across the resistor.
6. The fixed on-time isolated converter of claim 5, wherein the controller, the coupling element, and the driver are integrated into a packaged structure.
13. The semiconductor device according to claim 12, wherein the coupling element is a capacitor, the first semiconductor chip, the dielectric layer, and the second semiconductor chip in which the package structure is stacked together, the controller is formed on the first semiconductor chip, Is formed on the second semiconductor chip, and the capacitor is formed by the first semiconductor chip, the dielectric layer, and the second semiconductor chip.
2. The fixed on-time isolated converter of claim 1, wherein the first electronic switch is an N-channel metal oxide semiconductor field effect transistor or a bipolar junction transistor.
2. The fixed on-time isolated converter of claim 1, wherein the coupling element is a capacitor, a transformer, a piezoelectric element, or an optical coupling element.

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