JP2013021785A - Power supply control method and power supply control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply control method and a power supply control device which are capable of achieving low loss in a switching power supply and are capable of suppressing generation of harmonic noise due to a pulse current and generation of a rush current.SOLUTION: In the power supply control method or the power supply control device which performs switching control of an input voltage to obtain an output voltage, a predetermined time width in the input voltage is divided into two or more sections, and the number of pulses of a switching element is controlled in accordance with the divided sections, thereby performing switching control.

Description

  The present invention relates to a power supply control method and a power supply control apparatus using a switching power supply.

  In recent years, lighting devices using light-emitting diodes (hereinafter referred to as “LEDs”) have attracted attention as lighting devices that achieve both energy saving and environmental consideration. Since LEDs emit light when current flows and their brightness is proportional to the current value, the current LED lighting equipment controls the brightness of the LED, that is, the current value. Be controlled. In addition to LED lighting devices, various household appliances are controlled by direct current.

  In general, as one method for obtaining a DC voltage from a commercial AC power supply, it is known to use a power supply control device using a pulse width modulation type switching power supply. An example of a power supply control device using a pulse width modulation type switching power supply is shown in FIG. The power supply control device 100 in FIG. 9 includes a noise filter 101 for noise prevention connected to a commercial AC power supply, a rectifier circuit 102 that rectifies the output of the noise filter 101, and a smoothing circuit that smoothes the pulsating current rectified by the rectifier circuit 102. 105 and a switching power supply 103 (hereinafter referred to as “SW power supply 103”) for converting the output voltage of the smoothing circuit 105 into a predetermined voltage.

  FIG. 10 is a diagram showing a schematic configuration of the SW power supply 103. The SW power supply 103 includes a switching element 6 (hereinafter referred to as “SW element 6”) made of a power MOSFET, a transformer 7, a rectifier diode 8, a smoothing capacitor 9, and a switching control unit 130 (hereinafter referred to as “SW control unit 130”). Consists of. In the SW power source 103, the input voltage smoothed by the smoothing circuit 105 is converted to a high frequency pulse by high-speed switching by the SW element 6 and sent to the transformer 7. Then, rectification is performed by the rectifier diode 8 and smoothed by the smoothing capacitor 9 to obtain an output voltage.

  The SW control unit 130 is a control unit that feeds back an output voltage and performs ON / OFF control of the SW element 6, and includes an output voltage detection circuit 321, a comparator 371, an abnormality detector 341, a SW element drive circuit 351, It comprises an oscillator 360 and a triangular wave generator 361. In the SW control unit 130, the square wave generated by the oscillator 360 is converted into a symmetrical triangular wave by the triangular wave generation unit 361 and input to one end of the comparator 371. The output voltage detected by the output voltage detection circuit 321 is input to the other end of the comparator 371. Then, as shown in FIG. 10, the comparator 371 compares the triangular wave with the output voltage, and outputs a drive signal for turning on the SW element 6 only during a period when the triangular wave is larger than the output voltage. The SW element drive circuit 351 drives the SW element 6 based on the drive signal.

  With such a configuration, when the output voltage from the SW power supply 103 increases, the period during which the triangular wave is larger than the output voltage is shortened, and the ON time of the SW element 6 is shortened. The output voltage is adjusted by the duty ratio of the ON state and the OFF state of the SW element 6 controlled in this way. When an abnormality such as an overcurrent, overvoltage, undervoltage or temperature abnormality is detected by the abnormality detector 341, a stop signal is sent from the abnormality detector 341 to the SW element driving circuit 351, and the operation of the SW element 6 is performed. Stopped.

  Next, FIG. 11 shows an operation waveform diagram in the power supply control device 100 of FIG. First, the AC voltage output from the commercial AC power supply is subjected to full-wave rectification by the rectifier circuit 102 after the noise is removed by the noise filter 101. FIG. 11A shows an input voltage waveform after rectification by the rectifier circuit 102. Then, the pulsating flow rectified by the rectifying circuit 102 is smoothed by the smoothing circuit 105, resulting in a voltage waveform shown in FIG. In this case, the current waveform flowing on the primary side (commercial AC power supply side) of the smoothing circuit 105 is a short pulse wave having a high peak value as shown in FIG. Here, since the pulse wave as shown in FIG. 11 (c) contains a large amount of harmonics, if it flows to the outside through the power supply line, it causes a failure due to noise. In addition, there is a problem that although power saving is on average, power generation / power supply / distribution equipment is required to guarantee high peak power. In order to solve such problems, it has been proposed to adopt a power factor correction circuit (PFC) that improves the power factor of the power source and suppresses the generation of harmonics.

  Further, when the power supply control device 100 is turned on, a large capacity smoothing capacitor of the smoothing circuit 105 in an empty state is charged, so that a large current as shown in FIG. Flowing. When such a rush current is generated, it is conceivable that the fuse is blown, the power supply voltage is unstable, and the equipment is affected accordingly. In order to prevent such an effect, it is possible to use a member that can withstand the magnitude of the rush current. However, by using such a member, wasteful costs are generated, and the fuse is abnormal during normal use. There are drawbacks such as the possibility of not functioning.

  Therefore, various methods have been considered to prevent the generation of rush current. As an example, Patent Literature 1 includes a smoothing capacitor bank circuit including a smoothing capacitor for a large capacity bank and a charging resistor for charging the capacitor, in addition to the smoothing capacitor. A configuration for preventing the generation of current is disclosed. In addition to the method described in Patent Document 1, it is conceivable to reduce the capacity of the smoothing capacitor in the smoothing circuit 105 or to eliminate the smoothing circuit 105 itself.

JP-A-9-322539

  Here, since the power factor correction circuit is a step-up type constant voltage power supply, adopting a power factor correction circuit to solve the problem of pulse waves including harmonics means that an extra power supply. This means that installation is necessary, leading to an increase in cost, a reduction in efficiency, and an increase in size of the power supply control device.

  Further, when a smoothing capacitor bank circuit is separately provided as described in Patent Document 1 in order to suppress rush current, the number of parts increases, leading to an increase in product cost and an increase in size. There's a problem. In addition, when the capacity of the smoothing capacitor is reduced or the smoothing circuit 105 itself is eliminated, when the processing by the SW power source 103 is performed according to the pulsating current rectified by the rectifying circuit 102, the input current waveform is as shown in FIG. ), The waveform has two peaks. Also in this case, there are problems of noise due to harmonics and peak guarantee, as in the case of the current waveform shown in FIG. Even when the smoothing circuit 105 is eliminated, a rush current may be generated to charge the smoothing capacitor 9 in the SW power supply 103.

  Further, when the SW power supply 103 is used, the loss is generally smaller than when the series power supply is used, but a relatively large loss occurs during the transition period when the SW element 6 shifts from ON to OFF or vice versa. May occur. This loss can be reduced by resonating the transformer 7 when the SW element 6 is ON or OFF. However, when the pulse width modulation method is used, the process of performing resonance control of the transformer 7 is complicated. There is a problem of becoming.

  The present invention has been made in view of the above problems, and power supply control that can easily realize low loss of a switching power supply and can suppress generation of harmonic noise and rush current due to a pulse current. It is an object to provide a method and a power supply control device.

  In order to solve the above problems, according to the present invention, there is provided a power supply control method for obtaining an output voltage by switching control of an input voltage, wherein a predetermined time width in the input voltage is divided into two or more sections. Accordingly, a power supply control method is provided in which switching control is performed by controlling the number of pulses of the switching element according to the above.

  Further, the power supply control method generates a control signal having a predetermined waveform for each divided section, and controls the number of pulses of the switching element based on a comparison result between the signal that has detected the output voltage and the control signal. It may be.

  Further, the power supply control method sets a predetermined frequency for each divided section, generates a clock signal of a predetermined frequency, counts the number of pulses, generates a control signal having a predetermined waveform, and outputs it. A signal in which the voltage is detected may be compared with a control signal, and the number of pulses of the switching element may be controlled based on the comparison result and the counted value.

  Further, controlling the number of pulses of the switching element may be making the pulse frequency of the switching element variable, generating a clock signal of a predetermined frequency, counting the number of pulses, and detecting the output voltage. A reference value may be set based on the comparison result between the signal and the control signal, and the pulse frequency may be obtained by comparing the reference value with the count value.

  Further, controlling the number of pulses of the switching element may be to change the number of pulses of the switching element per predetermined time, generating a clock signal of a predetermined frequency and counting the number of pulses, Based on the comparison result between the signal that detected the output voltage and the control signal, an up-count or down-count instruction is issued for a predetermined initial value, and the count value of the clock signal, the count value that is up-counted or down-counted, And the number of pulses per predetermined time may be obtained.

  The input voltage is an AC voltage, and the predetermined time width may be obtained by measuring and storing the pulse width of each wave of the pulsating current obtained by rectifying the AC voltage.

  Furthermore, the switching control in the power control method described above gradually increases the number of pulses so that the current value does not rapidly increase in the first half section, gradually decreases the number of pulses in the second half section, and repeats this control for each wave to make a sine wave. It may be performed so as to obtain a close input current.

  Further, according to the present invention, there is provided a power supply control apparatus including a switching power supply that obtains an output voltage by switching an input voltage, and the switching power supply is divided by dividing a predetermined time width in the input voltage into two or more sections. There is provided a power supply control device comprising a switching control unit that performs switching control by controlling the number of pulses of the switching element according to the section.

  According to the present invention, there is also provided a power supply control method for obtaining an output voltage by switching an input voltage, generating a control signal having a predetermined waveform, generating a clock signal having a predetermined frequency, and counting the number of pulses. There is provided a power supply control method characterized in that a signal having an output voltage detected is compared with a control signal, and the pulse frequency of the switching element is made variable based on the comparison result and the counted value.

  Further, according to the present invention, there is provided a power supply control method for obtaining an output voltage by switching an input voltage, generating a control signal having a predetermined waveform, generating a clock signal having a predetermined frequency, and counting the number of pulses. Based on the comparison result between the signal that detected the output voltage and the control signal, the count value of the clock signal and the count value that is up-counted or down-counted are given to the predetermined initial value. And a power supply control method characterized in that the number of pulses of the switching element per predetermined time is made variable.

The power control method and power control device of the present invention have the following effects.
1. By preventing the generation of pulsed current and reducing the peak current value, the current capacity required for power generation, power supply, and distribution facilities can be reduced. In addition, because the power generation capacity and power transmission facilities of the power plant need to be prepared according to the peak current value, the smaller the peak current value, the less current capacity is actually required. As a result, the cost required for these social infrastructures can be reduced.
2. Since the current waveform can be made close to a sine wave, a low radiation noise operation with less unnecessary radiation is possible.
3. Since the generation of harmonics can be reduced without using a power factor correction circuit, miniaturization and cost reduction are possible at the same time.
4). By controlling the ON time of the SW element when the power is turned on, generation of rush current can be prevented.
5. The SW element ON time is measured, and based on this information, the pulsating current output from the rectifier circuit is divided into a plurality of sections, and the logical scale is kept small compared to the case where the ON time control is performed for each section. be able to.
6). By adopting the pulse number modulation method, the resonance of the transformer can be easily controlled, and as a result, the loss reduction by the SW element can be easily realized.

It is a block diagram which shows the outline of the power supply control apparatus in 1st embodiment of this invention. It is a figure which shows the structure of the switching power supply of FIG. It is a flowchart which shows the flow of the process in a control signal production | generation part. It is a figure which shows the operation | movement waveform in the power supply control apparatus of FIG. It is a flowchart which shows the flow of the process in a reference value setting part. It is an operation | movement waveform diagram for demonstrating the process of a reference value setting part. It is a figure which shows the structure of the switching power supply in 2nd embodiment of this invention. It is a figure which shows the structure of the switching power supply in 3rd embodiment of this invention. It is a block diagram which shows the outline of the power supply control apparatus in a prior art. It is a figure which shows the structure of the switching power supply in a prior art. It is a figure which shows the operation | movement waveform in the power supply control apparatus of a prior art.

  Hereinafter, a power supply control device according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a schematic configuration of a power supply control device 10 according to the first embodiment of the present invention. The power supply control device 10 includes a noise filter 1, a rectifier circuit 2, and a switching power supply 3 (hereinafter referred to as “SW power supply 3”). The SW power supply 3 of the present embodiment obtains an output voltage based on the pulsating voltage directly input from the rectifier circuit 2 without passing through the power factor correction circuit or the smoothing circuit. Moreover, although the power supply control apparatus 10 is connected to the commercial AC power supply, the power supply control apparatus 10 of the present invention can be used in addition to the commercial AC power supply.

  The noise filter 1 is for preventing noise generated from the SW power source 3 from radiating or propagating to the outside and not being affected by noise from the outside. The rectifier circuit 2 includes a rectifier diode and performs full-wave rectification on the output from the noise filter 1.

  Next, the configuration of the SW power supply 3 of the present embodiment will be described with reference to FIG. The SW power supply 3 of the present embodiment is a switching power supply using a pulse number modulation method (hereinafter referred to as “PNM (Pulse Number Modulation) method”). In the PNM method, unlike the pulse width modulation method, the output current of the switching element is controlled by making the pulse width of the drive signal for driving the switching element constant and making the number of pulses per predetermined time variable.

  The SW power source 3 includes a switching element 6 such as a power MOFET (hereinafter referred to as “SW element 6”), a transformer 7, a rectifier diode 8, a smoothing capacitor 9, and a switching control unit 30 (hereinafter referred to as “SW control unit 30”). Consists of. In the SW power source 3, the pulsating voltage rectified by the rectifier circuit 2 is sent to the transformer 7 as a high-frequency pulse by high-speed switching by the switching element 6. Then, rectification is performed by the rectifier diode 8 and smoothed by the smoothing capacitor 9 to obtain a DC output voltage. The SW control unit 30 is a control unit that controls the number of ON / OFF times of the SW element 6 by feeding back the output voltage. The control signal generation unit 31, the output voltage detection circuit 32, the pulse number control unit 33, and the abnormality detector 34 And an SW element driving unit 35. In addition, the process of each part of SW control part 30 in this embodiment can be easily implement | achieved using FPGA (Field-Programmable Gate Array) and a gate array with a small logic scale.

  The control signal generation unit 31 generates a control signal to be compared with the output voltage detected by the output voltage detection circuit 32 and includes a time measurement unit 311, a clock control unit 312, and a D / A converter 313. . The time measuring unit 311 has a timer and a storage unit (not shown), and measures and stores a time width exceeding a predetermined detection level as a pulse width WL for each pulsating wave rectified by the rectifying circuit 2. /Update. Further, the time measuring unit 311 divides the stored pulse width WL into n, and sets the stage counter CNT (0 to n−1) for each divided time Tn.

  The clock control unit 312 is a control unit that controls the clock frequency in the D / A converter 313. The clock control unit 312 sets a different clock frequency f for each stage counter CNT set in the time measurement unit 311 with respect to one wave of pulsating flow. The D / A converter 313 is a digital-analog converter including, for example, a 4-bit resistor ladder, and outputs a control signal according to the clock frequency set by the clock control unit 312. Specifically, the D / A converter 313 can be configured by a counter and a resistance ladder. In this case, the counter is counted up / down at the clock frequency f from the clock control unit 312 and a voltage level corresponding to the counter output value is generated by the resistor ladder. According to this configuration, it is possible to generate a control signal having a desired falling (or rising) waveform by adjusting the clock frequency f of the clock control unit 312.

  The SW power supply 3 in the present embodiment measures the pulse width WL exceeding a predetermined voltage level for each wave of the pulsating current rectified by the rectifier circuit 2 by the SW control unit 30, and measures each wave in the width direction. The current value is gradually increased (gradually increased) so that a sharp current increase does not occur at the rising edge of the voltage of each section, and the voltage decreases at the falling edge of the voltage of each section. In order to prevent a sudden increase in current, the current value is gradually decreased (gradually decreased), and this gradual increase and decrease control is repeated for each wave to suppress a steep increase in current and obtain a current waveform with less harmonics. It is to make. In particular, in the present embodiment, the control signal generation unit 31 generates a control signal to be compared with the output voltage for each section, and the pulse number control unit 33 controls the number of pulses for each section as described above. It is the structure which acquires a simple current waveform.

  Specific processing in the control signal generation unit 31 will be described with reference to the flowchart of FIG. 3 and the operation waveform of FIG. 3 and 4, an example in which one wave pulsating flow is divided into four in the width direction will be described. In this process, first, the voltage level of the pulsating current rectified by the rectifying circuit 2 is detected and compared with a predetermined detection level (S1). Here, the predetermined detection level is an operation lower limit voltage value of the SW power supply 3. Then, as shown in FIG. 4A, in the time measuring unit 311, from the time when the pulsating current voltage becomes larger than the detection level (S1: YES) to the time when it becomes smaller (S8, S9: NO) (that is, the pulse). The time width from the time when the current voltage exceeds the operation lower limit value of the SW power supply 3 until it can operate until it becomes less than the operation lower limit value and becomes inoperative is measured as the pulse width WL (FIG. 4B). ) And store (S10). Further, the stored pulse width WL is divided into four, and Tn of each section is obtained (S11). In addition, since the waveform may not be stable when the power is turned on, the pulse width is measured as WL after the lapse of two or more pulsating flows.

  In parallel with the measurement of the pulse width WL, a control signal is generated for each divided section and is output to the pulse number control unit 33. Specifically, when the voltage value of the rectified pulsating voltage is larger than the detection level (S1: YES), the timer of the time measuring unit 311 is started (S2). Then, in the clock control unit 312, the value of the stage counter CNT is set to 0, and the variable T is set to Tn (S3). Here, the time Tn is obtained by dividing the pulse width WL measured in the previous process by the time measuring unit 311 (that is, the pulse width of the previous pulsating flow) into four.

  Subsequently, the clock frequency f of the D / A converter 313 is set to a value (f0) corresponding to the stage counter CNT (in this case, 0) (S4). Here, in the present embodiment, the frequency (f0) corresponding to the stage counter CNT (0) is set so as not to cause a steep current increase at the rising portion. Specifically, the number of pulses for driving the SW element 6 is controlled by the width of the triangular wave output from the D / A converter 313, that is, the inclination (FIGS. 4E to 4H). More specifically, the pulse number control unit 33 reduces the number of pulses that drive the SW element 6 as the slope of the triangular wave becomes steeper, and increases the number of pulses as the slope becomes gentler. The frequency is set. Further, the slope of the triangular wave output from the D / A converter 313 becomes steep as the clock frequency f is increased. Therefore, by setting the frequency (f0) corresponding to the stage counter CNT (0) at the time of rising high, the number of pulses for driving the SW element 6 can be reduced, and the current value can be suppressed. The specific processing of the pulse number control unit 33 will be described in detail later.

  Subsequently, it is determined whether or not the time T has elapsed (S5). If the time T has not elapsed (S5: NO), the process waits until it elapses. During this time, the D / A converter 313 is operated at the clock frequency f0. On the other hand, when the time T has elapsed (S5: YES), 1 is added to the stage counter CNT, and Tn is added to the time T (S6). Then, it is determined whether or not the stage counter CNT is smaller than 4 (S7). If the stage counter CNT is smaller than 4 (S7: YES), it is determined in S9 whether or not the pulsating voltage is larger than the detection level. If the pulsating voltage is greater than the detection level (S9: YES), the process returns to S4. In S4, the clock frequency of the D / A converter 313 is set to a value (f1) corresponding to the stage counter CNT (1 in this case). In this way, the processes from S4 to S6 are repeated until the stage counter CNT is equal to or greater than the number of divisions (4) (S7: NO) or the pulsating voltage is below the detection level (S9: NO). The frequency at is set.

  If the stage counter CNT is 4 or more (S7: NO), it is determined in S8 whether or not the pulsating voltage is larger than the detection level as in S9. Then, when the pulsating voltage is larger than the detection level (S8: YES), it waits until it becomes equal to or lower than the detection level. If it is determined in S8 that the pulsating voltage is below the detection level (S8: NO), and if a similar determination is made in S9 (S9: NO), the value of the timer at that time is changed to the pulse. Stored as the pulse width WL of the flow (S10). Thereafter, the newly stored pulse width WL is divided into four and the time Tn is updated (S11). Then, the timer is reset (S12), the process returns to S1, and the same process is performed for the next pulsating flow.

  4C and 4E to 4H show output waveforms of the D / A converter 313 in the stage counters CNT (0 to 3) when the pulsating flow is divided into four. Here, FIGS. 4E to 4H are enlarged views of the waveforms shown in FIG. As shown in FIG. 4C, the D / A converter 313 outputs triangular waves having different slopes for each section. The repetition frequency of the triangular wave in each section is set to, for example, about 100 kHz when it is low and about 1 MHz when it is high. As shown in FIG. 4, when the stage counter CNT = 0 (FIG. 4E) and the stage counter CNT = 3 (FIG. 4H), the clock control unit 312 uses a relatively high clock. By setting the frequency, a triangular waveform with a steep slope is output. On the other hand, when the intermediate stage counter CNT = 1 (FIG. 4F) and the stage counter CNT = 2 (FIG. 4G), the clock controller 312 sets a relatively low clock frequency. A triangular waveform with a gentle slope is output.

  The output waveform (FIG. 4C) of the D / A converter 313 generated in this way is input to the pulse number control unit 33 as a control signal. The pulse number control unit 33 controls the number of pulses per predetermined time for driving the SW element 6 based on the control signal and the output voltage detected by the output voltage detection circuit 32. As shown in FIG. 2, the pulse number control unit 33 includes a reference value setting unit 331, a reference oscillator 332, a counter 333, and a comparator 334. In the PNM method, the “frequency variable method” in which the time width between pulses (that is, the repetition frequency) in the drive signal is variable, and the time width between pulses is fixed, and the number of repetitions per predetermined time is variable. In this embodiment, a case where the “frequency variable method” is used will be described.

  The reference value setting unit 331 sets a reference value serving as a reference when obtaining the number of pulses of the drive signal, and inputs the reference value to one end of the comparator 334. The reference oscillator 332 oscillates a clock signal having a predetermined frequency, and the counter 333 counts the number of pulses of the clock signal output from the reference oscillator 332. The count value by the counter 333 is input to one end of the comparator 334. Then, the comparator 334 compares the input reference value with the count value, and notifies the SW element driving unit 35 that the target frequency has been reached when both become the same value. Reset the count value. The SW element drive unit 35 generates a drive signal having a frequency that is turned on when the notification from the comparator 334 is received, and drives the SW element 6. Further, when an abnormality such as an overcurrent, overvoltage, undervoltage, or temperature abnormality is detected by the abnormality detector 34, a stop signal is sent from the abnormality detector 34 to the SW element driving unit 35, and the operation of the SW element 6 is performed. Stopped.

  Thus, by arbitrarily setting the reference value, the frequency of the drive signal can be set to a desired frequency, and as a result, the output current of the SW element 6 can be controlled to a target value. As an example, when a clock signal of 25 MHz is oscillated from the reference oscillator 332 and the reference value is set to 25, the frequency of the drive signal is 1 MHz. If the reference value is set to 250, the frequency of the drive signal is 100 kHz. Thus, the higher the reference value is set, the lower the frequency of the drive signal, and the fewer the number of pulses for driving the SW element 6.

  Next, the flow of the reference value setting process in the reference value setting unit 331 will be described based on the flowchart of FIG. 5 and the operation waveform of FIG. In this process, first, it is determined whether or not it is the start point SP of the control signal output from the D / A converter 313 (S101). In the present embodiment, the position of the start point SP that is the starting point for the control of the SW element 6 is uniquely determined without fluctuation. Specifically, as shown in FIGS. 4E to 4H and FIG. 6A, the falling position of the triangular wave output from the D / A converter 313 is set as the start point SP. By uniquely determining the start point SP in this way, it is possible to easily specify the start position even when performing digital processing, and to prevent complication of processing. Further, what is necessary to generate the drive signal is a waveform from the start point SP to the end point where the triangular wave has descended, so any waveform from the end point to the next start point may be used. . By setting it as such a structure, the OFF period between pulsating flows can be set easily.

  And when it is not start point SP (S101: NO), it waits until it becomes start point SP. On the other hand, when the start point SP is reached (S101: YES), counting of the number of pulses of the clock signal is started (S102). Here, the reference value setting unit 331 includes an oscillator (not shown) that oscillates a clock signal having a predetermined frequency shown in FIG. 6B. In S102, the reference value setting unit 331 generates a clock signal output from the oscillator. Start counting pulses. The reference value setting unit 331 may be configured to count the clock signal of the reference oscillator 332 in common with the counter 333 without providing an oscillator.

Subsequently, in S103, the output voltage is compared with the control signal (FIG. 6A). If the output voltage is equal to or lower than the control signal (S103: NO), the pulse count is continued. On the other hand, when the output voltage becomes higher than the control signal (S103: YES), the counting of the number of pulses is stopped and the counted number of pulses is stored (S104). Here, while the control signal is higher than the output voltage, that is, while the count signal shown in FIG. 6C is ON (T ₀ ), the number of pulses of the clock signal is counted. In the present embodiment, it is not necessary to compare the output voltage with the control signal for one ON / OFF operation of the SW element 6, and the output in a predetermined section in which a plurality of ON / OFF operations are performed. What is necessary is just to compare a voltage and a control signal.

  Subsequently, the number of pulses counted this time is compared with the number of pulses counted last time (S105). If the number of pulses counted this time is larger than the number of pulses counted last time (S105: YES), it is determined that the output voltage has decreased, and a reference value is set to increase the number of pulses. Specifically, the reference value is reduced to increase the frequency of the drive signal (S106). On the other hand, when the number of pulses counted this time is smaller than the number of pulses counted last time (S105: NO), it is determined that the output voltage has increased, and the reference value is set to reduce the number of pulses. Specifically, the reference value is increased in order to lower the frequency of the drive signal (S107). In addition, when the increase / decrease in the number of pulses counted at this time is large, it is possible to perform control so that the increase / decrease in the reference value is also large.

  Returning to FIG. 4, the drive signal of the SW element 6 in the present embodiment will be described. FIG. 4D is a signal waveform for driving the SW element 6, and FIG. 4I is an enlarged view of the waveform of FIG. As described above, when the stage counter CNT = 0 and when the stage counter CNT = 3, the slope of the triangular wave (control signal) output from the D / A converter 313 is steep, so the reference value setting unit 331 The reference value is set high. As a result, as shown in FIG. 4I, when the stage counter CNT = 0 and when the stage counter CNT = 3, the SW element 6 is driven at a low frequency, and the output current value also decreases.

  On the other hand, when the intermediate stage counter CNT = 1 and the stage counter CNT = 2, the inclination of the triangular wave (control signal) output from the D / A converter 313 is gentle, so the reference value setting unit 331 The reference value is set low. As a result, as shown in FIG. 4I, when the stage counter CNT = 1 and when the stage counter CNT = 2, the SW element 6 is driven at a high frequency, and the output current value also increases. By controlling the drive of the SW element 6 in this way, the output current waveform can be made a waveform close to a sine wave as shown in FIG.

  As described above, in the above embodiment, by generating a control signal having a predetermined waveform for each section and performing comparison with the output voltage to control the number of pulses, generation of a pulsed current is prevented, It becomes possible to reduce the peak current value. In addition, since the current waveform can be made close to a sine wave, a low radiation noise operation with less unnecessary radiation is possible. Furthermore, since the generation of harmonics can be reduced without using a power factor correction circuit, miniaturization and cost reduction can be achieved at the same time. Further, by controlling the ON time of the SW element 6 to be short at first and gradually increase when the power is turned on, generation of rush current can be prevented.

  As a method of dividing the pulsating flow and controlling the SW element 6 for each section, the ON time of the SW element when there is no restriction on the operation of the SW power source 103 is measured, and the stage is based on this information. It is also possible to control the number of pulses for each counter value. However, in this case, a high-speed clock is required to measure the ON time. Further, when the measured number of clocks is divided, the logical scale is greatly increased. On the other hand, by configuring the SW power supply 3 as in the above-described embodiment, the logic scale can be kept small without requiring a high-speed clock number.

  Further, the SW power supply 3 of the present embodiment can be used as a substitute for the power factor correction circuit. Here, while the power factor correction circuit can generally only boost the voltage, the SW power supply 3 of the present embodiment is more useful in that it can also step down. Furthermore, when the SW power supply 3 of the present embodiment is used in a power control device for an LED lighting apparatus, the luminance of the LED lighting device can be reduced by connecting to a phase control type dimming device compatible with an incandescent bulb. It is also possible to control (dimming).

  Furthermore, it becomes easier to control the resonance of the transformer than in the case of using the pulse width modulation method, and as a result, the loss of the SW element in the transition period can be easily reduced. Further, by controlling the number of pulses using a counter as described above, internal digital processing can be easily performed.

  Next, the power supply control device in the second embodiment of the present invention will be described. The power supply control device in the present embodiment has substantially the same configuration as that of the power supply control device 10 in the first embodiment. In the pulse number control unit 33A, the time width between pulses is fixed and repeated per predetermined time. It differs from the first embodiment only in that the “number of times variable method” in which the number of times is variable is used. Therefore, the description of the same configuration as that of the first embodiment is omitted, and only different points will be described.

  FIG. 7 is a diagram showing the SW power supply 3A in the power supply control device of the present embodiment. As shown in FIG. 7, the SW power source 3A has the same configuration as the SW power source 3 in the first embodiment except that the pulse number control unit 33A includes an up / down counter 335 instead of the reference value setting unit 331. doing. The up / down counter 335 sets the number of repetitions of pulses in the drive signal, and an initial value is set in advance. When the operation of the SW power supply 3A is started, the initial value is counted up or down, and the obtained count value (hereinafter referred to as “UD count value”) is input to one end of the comparator 334. . As in the first embodiment, the reference oscillator 332 oscillates a clock signal having a predetermined frequency, and the counter 333 counts the number of pulses of the clock signal output from the reference oscillator 332, and the comparator 334 A count value (hereinafter referred to as “P count value”) is input to one end.

  The comparator 334 compares the UD count value and the P count value, and when the two values become the same value, notifies the SW element drive unit 35 that the target number of repetitions has been reached, and calculates the count value. Reset. The SW element driving unit 35 generates a drive signal for the SW element 6 that repeats ON / OFF for a desired number of times based on the notification, and drives the SW element 6. Thus, by instructing the up / down counter 335 to count up or down, the number of pulses in the drive signal can be set to a desired value, and as a result, the output current of the SW element 6 can be controlled.

  Further, the up count or down count instruction to the up / down counter 335 is the same as the setting of the reference value in the first embodiment, the control signal from the D / A converter 313 and the output voltage detected by the output voltage detection circuit 32. Based on. Specifically, first, the control signal is compared with the output voltage, and the number of pulses of the clock signal is counted while the count signal is ON (FIG. 6C). If the counted number of pulses is larger than the previously counted number of pulses, it is determined that the output voltage has decreased, and the up / down counter 335 is instructed to increase the number of pulses. On the other hand, if the number of pulses is smaller than the number of pulses counted last time, it is determined that the output voltage has increased, and the up / down counter 335 is instructed to count down to reduce the number of pulses. Further, when the increase / decrease in the number of pulses counted at this time is large, it is also possible to control to count up / down a plurality of times.

  Also in this case, when the stage counter CNT = 0 and when the stage counter CNT = 3, the triangular wave output from the D / A converter 313 is steeply inclined, so the down-count is instructed so that the UD count value becomes low. Is done. Thereby, the number of pulses of the drive signal for driving the SW element 6 is reduced, and the value of the output current is also reduced. On the other hand, when the intermediate stage counter CNT = 1 and the stage counter CNT = 2, the triangular wave output from the D / A converter 313 has a gentle slope, so the up-count is increased so that the UD count value increases. Instructed. As a result, the number of pulses of the drive signal that drives the SW element 6 increases, and the value of the output current increases. As described above, even when the number of pulses for driving the SW element 6 is controlled by the variable number of times method, the output current waveform can be a waveform close to a sine wave as shown in FIG. The same effect can be obtained.

  Next, the power supply control device according to the third embodiment of the present invention will be described. The power supply control device of the present embodiment is different from the power supply control devices in the first and second embodiments in the configuration of the SW control unit 30B in the SW power supply 3B. Specifically, in the first and second embodiments, the control signal generation unit 31 is configured to generate a control signal composed of triangular waves having different slopes for each section obtained by dividing the pulsating flow into a plurality of sections. In this embodiment, the control signal generation unit is not provided, and the frequency of the reference oscillator 332 in the pulse number control unit 33B is controlled for each section. Since other configurations are the same as those in the first embodiment, only different configurations will be described.

  Hereinafter, the SW control unit 30B of the present embodiment will be described with reference to FIG. FIG. 8 is a diagram showing the SW power supply 3B in the power supply control device of the present embodiment. As shown in FIG. 8, the SW control unit 30B of the SW power supply 3B includes an oscillator 360, a triangular wave generation unit 361, an output voltage detection circuit 32, a time measurement unit 311B, a clock control unit 312B, a pulse number control unit 33B, and an SW element. The drive unit 35 and the abnormality detector 34 are included.

  The oscillator 360 oscillates a square wave having a predetermined frequency, and the triangular wave generation unit 361 converts the square wave output from the oscillator 360 into a symmetrical triangular wave having the same slope and inputs it to the reference value setting unit 331 of the pulse number control unit 33B. To do. The output voltage detection circuit 321 detects the output voltage and inputs it to the reference value setting unit 331. Then, the reference value setting unit 331 performs the processing shown in the flowchart of FIG. 5 as in the first embodiment, sets a reference value according to the output voltage, and inputs the reference value to the comparator 334. The reference value in this case corresponds only to the output voltage, and is not controlled for each section as in the first embodiment.

  In addition, the time measuring unit 311B has a timer and a storage unit (not shown) similarly to the time measuring unit 311 in the first embodiment, and for each pulsating current wave rectified by the rectifying circuit 2, a predetermined time is measured. The time width exceeding the detection level is measured as the pulse width WL, and stored / updated. Further, the stored pulse width WL is divided into n, and the stage counter CNT (0 to n−1) is set for each divided time Tn. The clock control unit 312B is a control unit that controls the frequency of the clock signal in the reference oscillator 332, and sets a different frequency f for each stage counter CNT set in the time measurement unit 311B with respect to a pulsating current of one wave. . Specifically, first, the frequency corresponding to the first stage counter CNT is set low so that a steep current increase at the rising portion does not occur. The frequency corresponding to the intermediate stage counter CNT is set high, and the frequency corresponding to the last stage counter CNT is set low.

  The reference oscillator 332 oscillates a clock signal at a frequency set by the clock control unit 312B. The counter 333 counts the number of pulses of the clock signal output from the reference oscillator 332, and inputs the count value to one end of the comparator 334. The comparator 334 compares the reference value with the count value, detects when the count value becomes the same as the reference value, and notifies the SW element drive unit 35 that the target frequency has been reached, Reset the count value. The SW element drive unit 35 generates a drive signal that turns on the SW element 6 when notified from the comparator 334, and drives the SW element 6.

  Also in this case, since the frequency of the clock signal output from the reference oscillator 332 is set low in the first and last stage counters CNT, the frequency is compared with the reference value as shown in FIG. The drive signal is low. On the other hand, in the case of the intermediate stage counter CNT, since the frequency of the clock signal output from the reference oscillator 332 is set high, the high frequency drive as shown in FIG. Signal. Also in this case, the output current waveform can be a waveform close to a sine wave as shown in FIG.

  As described above, even when the frequency of the clock signal compared with the reference value is variable for each section, the output is the same as when the slope of the triangular wave in the control signal is variable for each section as in the first embodiment. The current waveform can be controlled, and the same effect as in the first embodiment can be obtained. In the above description, the case where the “frequency variable method” is used has been described. However, the “variable number of times method” may be used in the third embodiment.

The above is the description of the exemplary embodiments of the present invention. Specific aspects of the embodiments of the present invention are not limited to those described above, and can be arbitrarily changed within the scope of the technical idea expressed by the description of the scope of claims. For example, in the above-described embodiment, the case where the pulsating flow is divided into four parts has been described. However, the present invention is not limited to this and can be divided into an arbitrary number. However, when performing digital processing, it is practical to divide into ²ⁿ . Moreover, the setting of the frequency in each section is not limited to the above embodiment, and various current waveforms can be obtained by setting the frequency to an arbitrary value.

  In the above embodiment, the pulse number control in the case where the pulsating flow is divided into a plurality of sections is described. However, the pulse number control method of the present invention can be applied even when the sectioning is not performed. It is.

  Furthermore, although the said embodiment demonstrated the case where a commercial AC power supply was connected to the power supply control apparatus, this invention is not limited to this, The same process is performed even when a DC power supply is connected. Is possible. In this case, a predetermined time width WL 'is determined in advance, and this WL' is divided into a plurality of sections. Then, by generating a control signal having triangular waves with different slopes for each section as in the first and second embodiments, or by setting the frequency of the reference oscillator 332 for each section as in the third embodiment, The number of pulses for driving the SW element 6 can be controlled. In this case, the number of pulses is reduced only for the first operation start section so that a sharp current increase at the rising portion does not occur, and normal processing is performed thereafter. By controlling the SW element 6 in this way, it is possible to suppress the generation of a rush current even in the case of DC operation. In the case of direct current operation, it is possible to adopt a configuration in which processing other than the method using the stage counter CNT is performed.

DESCRIPTION OF SYMBOLS 1 Noise filter 2 Rectifier circuit 3 Switching power supply 6 Switching element 7 Transformer 8 Rectifier diode 9 Smoothing capacitor 10 Power supply control apparatus 30 Switching control part 31 Control signal generation part 32 Output voltage detection circuit 33 Pulse number control part 34 Abnormality detector 35 Switching element Drive unit 311 Time measurement unit 312 Clock control unit 313 D / A converter 331 Reference value setting unit 332 Reference oscillator 333 Counter 334 Comparator 335 Up / down counter

Claims (20)

A power supply control method for obtaining an output voltage by switching control of an input voltage,
Dividing a predetermined time width in the input voltage into two or more sections;
A power supply control method, wherein the switching control is performed by controlling the number of pulses of a switching element according to the divided section. Generating a control signal having a predetermined waveform for each of the divided sections;
2. The power supply control method according to claim 1, wherein the number of pulses of the switching element is controlled based on a comparison result between the signal that has detected the output voltage and the control signal. Set a predetermined frequency for each of the divided sections,
Generate a clock signal of the predetermined frequency, count the number of pulses,
Generating a control signal having a predetermined waveform;
Comparing the control signal with the signal that detected the output voltage,
The power supply control method according to claim 1, wherein the number of pulses of the switching element is controlled based on the comparison result and the counted value.   4. The power supply control method according to claim 1, wherein controlling the number of pulses of the switching element includes changing a pulse frequency of the switching element. 5. Generate a clock signal of a predetermined frequency and count the number of pulses,
A reference value is set based on a comparison result between the signal that has detected the output voltage and the control signal,
The power supply control method according to claim 4, wherein the pulse frequency is obtained by comparing the reference value with the count value.   4. The power supply control method according to claim 1, wherein controlling the number of pulses of the switching element includes changing a number of pulses of the switching element per predetermined time. 5. Generate a clock signal of a predetermined frequency and count the number of pulses,
Based on the comparison result between the signal that detected the output voltage and the control signal, an up-count or down-count instruction is given for a predetermined initial value,
The power supply control method according to claim 6, wherein the number of pulses per predetermined time is obtained by comparing the count value of the clock signal with the count value counted up or down. The input voltage is an alternating voltage;
The said predetermined time width is calculated | required by measuring and memorize | storing the pulse width for every wave of the pulsating flow which rectified | cured the said alternating voltage, It is characterized by the above-mentioned. Power control method.   The switching control gradually increases the number of pulses so that the current value does not rapidly increase in the first half section, gradually decreases the number of pulses in the second half section, and repeats this control for each wave so as to obtain an input current close to a sine wave. The power supply control method according to any one of claims 1 to 8, wherein the power supply control method is performed as follows. A power supply control device including a switching power supply that obtains an output voltage by switching an input voltage,
The switching power supply is
Dividing a predetermined time width in the input voltage into two or more sections;
A power supply control device comprising: a switching control unit that performs the switching control by controlling the number of pulses of the switching element according to the divided section. The switching control unit further includes:
Generating a control signal having a predetermined waveform for each of the divided sections;
The power supply control device according to claim 10, wherein the number of pulses of the switching element is controlled based on a comparison result between a signal in which the output voltage is detected and the control signal. The switching control unit further includes:
Generating a control signal having a predetermined waveform;
Set a predetermined frequency for each of the divided sections,
Generate a clock signal of the predetermined frequency and count the number of pulses,
Comparing the control signal with the signal that detected the output voltage,
The power supply control device according to claim 10, wherein the number of pulses of the switching element is controlled based on the comparison result and the counted value.   The power supply control device according to any one of claims 10 to 12, wherein the switching control unit controls the number of pulses of the switching element by making a pulse frequency of the switching element variable. . The switching control unit further includes:
Generate a clock signal of a predetermined frequency and count the number of pulses,
A reference value is set based on a comparison result between the signal that has detected the output voltage and the control signal,
The power supply control device according to claim 13, wherein the pulse frequency is obtained by comparing the reference value with the count value.   The switching control unit according to any one of claims 10 to 12, wherein the switching control unit controls the number of pulses of the switching element by making the number of pulses of the switching element per predetermined time variable. The power supply control device described. The switching control unit further includes:
Generate a clock signal of a predetermined frequency and count the number of pulses,
Based on the comparison result between the signal that detected the output voltage and the control signal, an up-count or down-count instruction is given for a predetermined initial value,
16. The power supply control device according to claim 15, wherein the number of pulses per predetermined time is obtained by comparing the count value of the clock signal with the count value counted up or down. The input voltage is an alternating voltage;
The said predetermined time width is calculated | required by measuring and memorize | storing the pulse width for every wave of the pulsating flow which rectified | straightened the said alternating voltage, It is characterized by the above-mentioned. Power supply control device.   The switching control device gradually increases the number of pulses so that the current value does not rapidly increase in the first half section, gradually decreases the number of pulses in the second half section, and repeats this control for each wave to obtain an input current close to a sine wave. The power supply control device according to any one of claims 10 to 17, wherein A power supply control method for obtaining an output voltage by switching control of an input voltage,
Generating a control signal having a predetermined waveform;
Generate a clock signal of a predetermined frequency and count the number of pulses,
Comparing the control signal with the signal that detected the output voltage,
A power supply control method, wherein the pulse frequency of the switching element is made variable based on the comparison result and the counted value. A power supply control method for obtaining an output voltage by switching control of an input voltage,
Generating a control signal having a predetermined waveform;
Generate a clock signal of a predetermined frequency and count the number of pulses,
Based on the comparison result between the signal that detected the output voltage and the control signal, an up-count or down-count instruction is given for a predetermined initial value,
A power supply control method comprising: comparing the count value of the clock signal with the count value counted up or down, and changing the number of pulses of the switching element per predetermined time.

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