KR20170029297A - Multilayer pcb comprising recessed portion for component installation and method for manufactuting the same - Google Patents

Multilayer pcb comprising recessed portion for component installation and method for manufactuting the same Download PDF

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Publication number
KR20170029297A
KR20170029297A KR1020150126462A KR20150126462A KR20170029297A KR 20170029297 A KR20170029297 A KR 20170029297A KR 1020150126462 A KR1020150126462 A KR 1020150126462A KR 20150126462 A KR20150126462 A KR 20150126462A KR 20170029297 A KR20170029297 A KR 20170029297A
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KR
South Korea
Prior art keywords
layer substrate
outer layer
component mounting
inner layer
substrate
Prior art date
Application number
KR1020150126462A
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Korean (ko)
Inventor
최광종
Original Assignee
주식회사 티엘비
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Publication date
Application filed by 주식회사 티엘비 filed Critical 주식회사 티엘비
Priority to KR1020150126462A priority Critical patent/KR20170029297A/en
Publication of KR20170029297A publication Critical patent/KR20170029297A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards

Abstract

A method of manufacturing a multilayer printed circuit board including a component mounting groove according to the present invention includes the steps of forming a plurality of inner layer substrates including a circuit formed of copper foil, laminating the plurality of inner layer substrates, Applying a solder resist to a surface of an innerlayer substrate disposed at an outermost one of the innerlayer substrates to cure the outerlayer substrate; forming a component mounting groove in an outerlayer substrate having a copper foil on the insulator; A step of laminating a dry film on the surface of the outer layer substrate, a step of exposing and developing the dry film, and a step of etching the copper foil of the outer layer substrate, A solder resist is removed from the surface of the inner layer substrate at a portion where the component mounting groove is to be formed, And removing the copper foil of the outer layer substrate from the edge of the component mounting groove on the surface of the outer layer substrate to expose the insulator constituting the outer layer substrate to the outside .
According to the present invention, the thickness of the entire circuit board can be reduced while the semiconductor parts are mounted on the multilayer printed circuit board.
In addition, it is possible to reduce the percentage of defects generated in manufacturing a multilayer printed circuit board for component mounting.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed circuit board including a component mounting groove,

The present invention relates to a multilayer printed circuit board and a method of manufacturing the same, and more particularly, to a multilayer printed circuit board capable of reducing the thickness of an entire circuit board while mounting a semiconductor component on a multilayer printed circuit board, And a component mounting groove that is configured to reduce the percentage of defects that are generated, and a method of manufacturing the same.

Recently, electronic technology related technology has been progressing in multi-function and high-speed. In order to cope with this trend, semiconductor chip manufacturing technology is also rapidly developing.

The manufacturing technology continues to evolve according to Moore's law, where the amount of data that can be stored in a semiconductor chip is doubled every 18 months.

In particular, the thickness of printed circuit boards has also been reduced in order to reduce the thickness of finished electronic products. In recent years, technologies related to multilayer printed circuit boards that constitute more circuit layers in the same thickness printed circuit board have been researched and developed.

 The multilayer printed circuit board is usually formed by heat pressing a plurality of printed circuit boards including a prepreg formed by impregnating an epoxy resin with glass fiber and a copper foil circuit formed on the surface thereof.

The multilayer printed circuit board generally comprises a multilayer of 10 or more layers, and the circuits of each layer are electrically connected through a via hole.

When mounting a component such as a semiconductor chip on the surface of a multilayer printed circuit board, the dry film is brought into close contact with the outermost copper foil of the multilayer printed circuit board, exposed, developed and etched to form a BGA ball grid array (hereinafter referred to as " ball grid array ") region, and a semiconductor chip is mounted on the non-chip area using a solder ball.

 However, when the memory component is mounted on the surface of the multilayer printed circuit board, the thickness of the memory component itself protrudes from the surface of the circuit board, which increases the thickness of the finally formed circuit board, And serves as a limitation in reducing the overall thickness of the finished electronic product.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a component mounting groove which is configured to minimize an increase in thickness of an entire circuit board even when a semiconductor component is mounted on a multilayer printed circuit board And a method of manufacturing the same.

It is another object of the present invention to provide a multilayer printed circuit board including a component mounting groove configured to reduce a defective ratio in manufacturing a multilayer printed circuit board for mounting components and a method of manufacturing the same.

According to another aspect of the present invention, there is provided a method of manufacturing a multilayer printed circuit board including a component mounting groove according to the present invention, the method including: forming a plurality of innerlayer substrates including a circuit formed of a copper foil; A step of applying a solder resist to a surface of an outermost layer substrate of the stacked inner layer substrates and curing the solder resist and forming an opening for component mounting on an outer layer substrate having a copper foil formed on the insulator, A step of laminating an outer layer substrate on the outermost layer of the inner layer substrate; a step of adhering a dry film to the surface of the outer layer substrate; a step of exposing and developing the dry film; Comprising the steps of: forming circuit and component connection pads on a substrate; Removing the solder resist to form a component connection pad, removing the copper foil of the outer layer board from the edge of the component mounting opening on the surface of the outer layer board to a predetermined range to form the outer layer board The insulator being exposed to the outside.

Preferably, the copper foil of the outer layer substrate is removed from a surface of the outer layer substrate to a range of 900 mu m from the edge of the component mounting opening to expose the insulator constituting the outer layer substrate to the outside.

Preferably, the component connection pad is not formed within a range of 600 占 퐉 from the edge of the groove on the surface of the inner layer substrate on which the component mounting opening is disposed.

Here, the insulators constituting the inner layer substrate and the outer layer substrate include different components.

Preferably, the outer layer substrate is configured to cure faster under the same conditions as the inner layer substrate.

On the other hand, the multilayer printed circuit board including the component mounting grooves according to the present invention is a multilayer printed circuit board including a plurality of inner layer substrates including a circuit formed of copper foil and an outer layer substrate disposed on the outer layer of the inner layer substrate, Wherein a solder resist is formed on a surface of the innerlayer substrate on which the component mounting opening is disposed, and a solder resist is formed on the surface of the innerlayer substrate at a portion where the component mounting opening is disposed, The copper foil of the outer layer substrate is removed from the edge of the component mounting opening on the surface of the outer layer substrate to a predetermined range so that the insulator constituting the outer layer substrate is exposed to the outside And is exposed.

Preferably, the copper foil of the outer layer substrate is removed from the surface of the outer layer substrate to the range of 900 mu m from the edge of the component mounting opening, so that the insulator constituting the outer layer substrate is exposed to the outside.

Preferably, the component connecting pad is formed on the surface of the inner layer substrate on which the component mounting grooves are disposed, by a distance of 600 mu m or more from the edge of the opening.

Here, the insulators constituting the inner layer substrate and the outer layer substrate include different components.

Preferably, the outer layer substrate is configured to cure faster under the same conditions as the inner layer substrate.

According to the present invention, when a semiconductor component is mounted on a multilayer printed circuit board, it is possible to minimize an increase in thickness of the entire circuit board.

In addition, it is possible to reduce the percentage of defects generated in manufacturing a multilayer printed circuit board for component mounting.

BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
1 is a cross-sectional view of a state in which a solder resist is applied to the surface of an innerlayer substrate disposed at the outermost position in a state in which a plurality of innerlayer substrates are laminated,
2 is a cross-sectional view showing a state in which an outer layer substrate on which the component mounting openings are formed is superimposed on the outermost layer of the innerlayer substrate,
3 is a cross-sectional view of a state where the copper foil of the outer layer substrate is etched to form circuit and component connection pads,
4 is a cross-sectional view showing a state where the solder resist is removed from the surface of the innerlayer substrate,
5 is a cross-sectional view of a semiconductor device mounted on a pad of the innerlayer substrate.

Hereinafter, the configuration of the present invention will be described in detail with reference to the accompanying drawings.

Prior to this, the terms used in the specification and claims should not be construed in a dictionary sense, and the inventor may, on the principle that the concept of a term can be properly defined in order to explain its invention in the best way And should be construed in light of the meanings and concepts consistent with the technical idea of the present invention.

Therefore, the embodiments shown in the present specification and the drawings are only exemplary embodiments of the present invention, and not all of the technical ideas of the present invention are presented. Therefore, various equivalents It should be understood that water and variations may exist.

FIG. 1 is a cross-sectional view of a state in which a solder resist is applied to the surface of an innerlayer substrate disposed at the outermost position in a state where a plurality of innerlayer substrates are laminated, FIG. 2 is a cross- 3 is a cross-sectional view of a state in which the copper foil of the outer layer substrate is etched to form a circuit and a component connection pad. Fig. 4 is a cross-sectional view of the solder resist on the surface of the inner layer substrate And FIG. 5 is a cross-sectional view of the semiconductor device mounted on the pad of the innerlayer substrate.

1 to 5, a method of manufacturing a multilayer printed circuit board including a component mounting groove according to the present invention includes the steps of: forming a plurality of inner layer substrates 100 including a circuit formed of a copper foil; A step of laminating a plurality of inner layer substrates 100 and a step of applying a solder resist 20 to the surface of the inner layer substrate 10 disposed outermost among the laminated inner layer substrates 100 and curing the same, A step of forming a component mounting opening 220 in an outer layer substrate 200 on which a copper foil 210 is formed on the surface of an insulator 205 and a step of stacking the outer layer substrate 200 on the outermost layer of the innerlayer substrate 100 A step of exposing a surface of the outer layer substrate 200 to a dry film, exposing and developing the dry film, and etching the copper foil 210 of the outer layer substrate 200, Forming a circuit and a component connection pad 210 in the step And removing the solder resist (20) from the surface of the inner layer substrate at the portion where the component mounting groove (220) is disposed to form the component connection pad (12), wherein the surface of the outer layer substrate The copper foil 210 of the outer layer substrate is removed from the edge E of the component mounting groove 220 to expose the insulator 205 constituting the outer layer board 200 to the outside .

The laminate composed of the inner-layer substrates 100 is a laminate composed of the individual layers including a circuit formed by adhering a dry film to the surface of the copper foil in a state where a copper foil is disposed on the surface of the prepreg, A plurality of inner layer substrates are laminated and heat and pressure are applied.

The outer layer substrate, which is laminated on the outer surface of the inner layer substrate 10 disposed at the outermost of the inner layer substrates 100, is also formed by disposing a copper foil on the surface of a prepreg which is an insulator.

The prepreg is formed by impregnating a reinforcing base material such as glass fiber with a polymer resin. As the reinforcing base material, a glass fiber fabric, a glass fiber nonwoven fabric, a carbon fiber fabric, or an organic polymer fiber fabric is used.

The polymer resin for forming the prepreg is mixed with an additive such as a hardening agent for adjusting the dielectric constant, thermal expansion rate, and time required for curing.

As the additives to be mixed into the polymer resin for the above-mentioned property control, inorganic fillers such as silica, aluminum hydroxide, calcium carbonate, and organic fillers such as cured epoxy and crosslinked acryl are available.

Resin content (expressed as WT%) and resin flow (resin flow included in the prepreg, expressed as a percentage of the flow of the resin when the prepreg is melted) are used to define characteristics of the prepreg. The gel time, the time required for the polymer resin contained in the prepreg to change from a solid to a liquid, and a liquid to a solid again).

A circuit is formed through exposure, development and etching processes using a dry film on the surface of the innerlayer substrate 10 disposed on the outermost one of the innerlayer substrates, A connection pad and a ball grid array (BGA) for mounting the semiconductor chip.

In the state where the circuit 12 is formed on the surface of the outermost inner layer substrate 10 as described above, the circuit 12 is coated and hardened so as to cover the solder resist 20.

The solder resist is a photosensitive resin for preventing solder from adhering to circuit parts where the parts are not bonded by separating the parts to be joined with the parts to be bonded with the parts, that is, the circuit parts where the solder should not be attached.

Normally, the solder resist is a coating agent applied to a circuit portion of the outermost layer on which the component is mounted, but in the present invention, it is applied to the outermost surface of the inner layer substrate 10 and cured.

Thus, it is configured such that the coated cured solder resist prevents the outermost inner layer substrate 10 circuit portion 12 from being etched during an etching process for forming a circuit in the outer layer substrate 200. [

The component mounting openings 220 are formed in the outer layer substrate 200 on which the copper foil 210 is placed on the insulator 205 and are placed on the outermost inner layer substrate 10 and laminated by application of heat and pressure.

The circuit and component connection pads 210 are formed on the surface of the outer layer substrate 200 by exposing, developing and etching the dry film to the copper foil 210 disposed on the surface of the outer layer substrate 200 do.

Thereafter, the cured solder resist 20 is removed from the surface of the inner layer substrate 10 where the component mounting openings 220 are disposed, so that the component connecting pads, i.e., the via holes 12 are exposed to the outside do.

As a method for removing the cured solder resist 20, a laser drilling method may be used.

In the present invention, the copper foil 210 on the surface of the outer layer substrate 200 is removed from the edge E of the component mounting opening 220 to the outer surface of the outer layer substrate 200 Is exposed to the outside.

A solder resist is applied by screen printing or the like in order to bond the components to the component connection pad 210 formed on the surface of the outer layer substrate 200. At this time, A phenomenon of solder resist aggregation occurred in an area up to a distance of 800 μm.

When the solder resists are formed in the region, this causes a failure of the circuit board. Therefore, the solder resist existing in the region in the exposure and development process of the solder resist is removed.

In the case where the solder paste formed as described above is removed by the developing process, if the circuit portion is disposed in the region, the solder adheres to the circuit portion to cause a short failure.

Accordingly, the area should be designed so that no circuit is initially arranged in the area. Therefore, the copper foil in the area in the etching process for the copper foil 210 on the surface of the outer layer substrate 200 is etched away, The solder resist accumulated in the region is removed in the developing process of the region, so that the insulator 205 of the region is exposed to the outside.

The ball grid 12 is not formed within the range of 500 μm from the edge E of the groove 220 on the surface of the inner layer substrate 10 where the component mounting opening 220 is disposed.

That is, the ball grid 12 is designed to be formed at a distance of 500 μm from the edge E in the region of the inner layer substrate 10 where the opening 220 is disposed.

In the step of laminating the outer layer substrate 200 on the inner layer substrate 10, heat is applied together with the pressure, and in the heating and pressing process, the polymer resin contained in the insulator 205 of the outer layer substrate 200 is melted It comes out.

The polymer resin flowing out as described above flows from the edge A of the groove 220 to the range of about 500 μm and hardens so that the ball grid 12 is formed in an area exceeding 500 μm, So that the resin does not affect the ball grid 12 portion.

Here, the insulator constituting the inner layer substrates 100 and the insulator 205 constituting the outer layer substrate 200 are composed of different components.

That is, in order to prevent the polymer resin from being melted and flowed in the process of stacking the outer layer substrate 200 on the inner layer substrate 10, the resin constituting the insulator 205 of the outer layer substrate may include, A larger amount of the curing agent is added to the resin constituting the insulator of the semiconductor chip 100. [

Thus, when the outer layer substrate 200 is placed under the same temperature and pressure conditions, the outer layer substrate 200 is cured earlier than the inner layer substrates 100, or the fluidity of the polymer resin contained in the outer layer substrate 200 is lowered to the inner layer substrates 100 Is smaller than the fluidity of the contained polymer resin.

For example, a general prepreg is used as an insulator constituting the inner-layer substrates 100, and a non-flow prepreg (i.e., a resin included in the prepreg) is melted A prepreg having low flow is used to prevent the polymer resin from being melted and flowed in the lamination step of the outer layer substrate 200 as much as possible.

Typically, a general prepreg has a more uniform characteristic in terms of interlayer insulation characteristics than a no-flow prepreg. The outer layer substrate 200 is formed by a no-flow prepreg, and the inner layer substrates are formed by a general prepreg, And is configured to prevent a defect due to the flow of the polymer resin together with a uniform interlayer insulating property.

As described above, the component mounting openings 220 formed on the outer layer substrate 200 are stacked on the surface of the inner layer substrate 10 to form the grooves 220, and the ball grid 120 in the grooves 220, A substantial part of the height of the semiconductor chip can be disposed in the groove 220 by solder ball mounting so that the thickness of the entire circuit board on which the chip is mounted can be minimized.

While the present invention has been described with reference to the exemplary embodiments and the drawings, it is to be understood that the technical scope of the present invention is not limited to these embodiments and that various changes and modifications will be apparent to those skilled in the art. Various modifications and variations may be made without departing from the scope of the appended claims.

10: Inner layer substrate
12:
100: Inner layer substrate laminate
200: outer layer substrate
210:
220: Component mounting opening
300: chip

Claims (10)

A method of manufacturing a multilayer printed circuit board,
Forming a plurality of innerlayer substrates including a circuit formed of a copper foil;
Stacking the plurality of inner layer substrates;
Applying a solder resist to the surface of the inner layer substrate disposed outermost among the stacked inner layer substrates and curing the same;
Forming an opening for component mounting on an outer layer substrate on which a copper foil is formed on an insulator;
Stacking the outer layer substrate on a surface of the outermost layer of the inner layer substrate;
Adhering a dry film to the surface of the outer layer substrate;
Exposing and developing the dry film;
Forming a circuit and a component connection pad on the outer layer substrate by etching the copper foil of the outer layer substrate;
And removing the solder resist from the surface of the inner layer substrate at the portion where the component mounting opening is disposed to form the component connection pad,
Wherein the copper foil on the outer layer substrate is removed from the edge of the component mounting opening on the surface of the outer layer substrate to expose the insulator constituting the outer layer board to the outside, A method of manufacturing a printed circuit board. The method according to claim 1,
And removing the copper foil of the outer layer substrate from the edge of the component mounting opening on the surface of the outer layer substrate to expose the insulator constituting the outer layer board to the outside, A method of manufacturing a printed circuit board. The method according to claim 1,
Wherein a part connecting pad is not formed within a range of 600 占 퐉 from the edge of the opening on the surface of the inner layer substrate on which the component mounting opening is disposed. . The method according to claim 1,
Wherein the insulator constituting the inner layer substrate and the outer layer substrate comprise different components. 5. The method of claim 4,
Wherein the outer layer substrate is configured to be cured faster under the same conditions as those of the inner layer substrate. A plurality of inner layer substrates including a circuit formed of a copper foil;
And an outer layer substrate disposed on an outer layer of the inner layer substrate,
Wherein the outer layer substrate is provided with a component mounting opening,
A solder resist is formed on a surface of the innerlayer substrate on which the component mounting opening is disposed,
The solder resist is removed from a portion of the surface of the inner layer substrate where the component mounting opening is disposed, where the component connection pad is formed,
Wherein the copper foil of the outer layer substrate is removed from the edge of the component mounting opening on the surface of the outer layer substrate to expose the insulator constituting the outer layer substrate to the outside, Printed circuit board. The method according to claim 6,
Wherein the copper foil of the outer layer substrate is removed from the edge of the component mounting opening on the surface of the outer layer substrate to expose the insulator constituting the outer layer substrate to the outside, Printed circuit board. The method according to claim 6,
And a component mounting pad is formed on the surface of the inner layer substrate on which the component mounting opening is disposed, the component connection pad being spaced from the edge of the opening by a distance of 600 mu m or more. The method according to claim 6,
Wherein the insulator constituting the inner layer substrate and the outer layer substrate comprises different components. 10. The method of claim 9,
Wherein the outer layer substrate is configured to be cured faster under the same conditions as the inner layer substrate.
KR1020150126462A 2015-09-07 2015-09-07 Multilayer pcb comprising recessed portion for component installation and method for manufactuting the same KR20170029297A (en)

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KR1020150126462A KR20170029297A (en) 2015-09-07 2015-09-07 Multilayer pcb comprising recessed portion for component installation and method for manufactuting the same

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Application Number Priority Date Filing Date Title
KR1020150126462A KR20170029297A (en) 2015-09-07 2015-09-07 Multilayer pcb comprising recessed portion for component installation and method for manufactuting the same

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112312671A (en) * 2019-07-30 2021-02-02 宏恒胜电子科技（淮安）有限公司 Circuit board and preparation method thereof
CN114190010A (en) * 2021-11-04 2022-03-15 江苏普诺威电子股份有限公司 PAD (PAD-powered device) substrate processing technology at bottom of blind groove
KR102626084B1 (en) * 2023-05-11 2024-01-17 주식회사 웰라인시스템 Mounting structure of printed circuit boards for surface mount part

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112312671A (en) * 2019-07-30 2021-02-02 宏恒胜电子科技（淮安）有限公司 Circuit board and preparation method thereof
CN112312671B (en) * 2019-07-30 2024-03-12 宏恒胜电子科技（淮安）有限公司 Circuit board and preparation method thereof
CN114190010A (en) * 2021-11-04 2022-03-15 江苏普诺威电子股份有限公司 PAD (PAD-powered device) substrate processing technology at bottom of blind groove
CN114190010B (en) * 2021-11-04 2023-08-22 江苏普诺威电子股份有限公司 Processing technology of carrier plate with PAD at bottom of blind groove
KR102626084B1 (en) * 2023-05-11 2024-01-17 주식회사 웰라인시스템 Mounting structure of printed circuit boards for surface mount part

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