JP2007221117A - Substrate incorporated with components, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate incorporated with components inexpensively with high reliability, which obtains high-density packaging with high substrate dimension accuracy, and to provide its manufacturing method. <P>SOLUTION: The substrate incorporated with components is characterized by comprising: a first electrically insulating substrate 1; a plurality of circuit boards 4 comprising a wiring pattern 2 formed on both sides of the first electrically insulating substrate 1 and arranged on the same plane; a circuit component 6 mounted on the circuit board 4; a correcting material 8 with a thermal expansion coefficient lower than that of the circuit board 4; and a second electrically insulating substrate 7 having the circuit component 6 embedded to bond a plurality of circuit boards 4 that are arranged on the same plane with the correcting material 8. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a component-embedded substrate applied to a semiconductor chip mounting substrate, a mother board, a probe card substrate, and the like, and a manufacturing method thereof.

  In recent years, there has been an increasing demand for high performance and miniaturization of electronic devices, and high-density mounting of electronic components incorporated in these electronic devices is rapidly progressing. As a high-density mounting technique, flip-chip mounting is performed in which a semiconductor element such as an LSI is surface-mounted on a circuit board in a bare chip state.

  Conventionally, as a circuit board for mounting a semiconductor element, a multilayer wiring board having a high wiring accommodation property (for example, see Patent Document 1) is used in order to cope with the increase in the number of pins of the semiconductor element. The thermal expansion coefficient in the in-plane direction of a semiconductor element made of a typical semiconductor material is about 3.5 ppm / ° C., whereas the heat in the in-plane direction of a commonly used glass epoxy-based multilayer wiring board is used. The expansion coefficient is 12 to 20 ppm / ° C., and the difference between the two is large. Thus, if the thermal expansion coefficient of the multilayer wiring board is large, when heated during semiconductor mounting, the multilayer wiring board expands and contracts, resulting in poor board dimensional accuracy, and the alignment between the bumps of the semiconductor element and the electrode pads of the multilayer wiring board is poor. This is a cause of mounting failure.

  On the other hand, it is conceivable to employ a wiring board having a small thermal expansion coefficient as one of the methods for eliminating or reducing the above-described problems caused by the difference in thermal expansion coefficient between the wiring board and the semiconductor chip. As a technique for reducing the thermal expansion coefficient of this wiring board, a technique using a carbon fiber material is known.

  The thermal expansion coefficient of the carbon fiber is generally about -5 to 3 ppm / ° C (25 ° C). For example, a wiring board having a multilayer wiring structure in which an insulating layer made of a prepreg containing glass fibers and a copper wiring are laminated on both surfaces of a core base material containing a carbon fiber sheet as a base material is disclosed (Patent Document). 2).

  Moreover, the multilayer wiring board which has the laminated structure of the insulating layer and copper wiring by the prepreg which does not contain glass fiber on both surfaces of the core base material containing a carbon fiber sheet is disclosed (refer patent document 3).

  Since these all have a low coefficient of thermal expansion of carbon fiber, the thermal expansion coefficient in the in-plane direction of the insulating layer or wiring board containing the carbon fiber sheet as the base material is reduced, and as a result, these are included. Even in the multilayer wiring board, the thermal expansion coefficient in the in-plane direction can be reduced.

  Further, as a further miniaturization technique, the appearance of a component-embedded substrate in a three-dimensional mounting form in which components are embedded in a multilayer wiring substrate is expected. By incorporating components such as LCR on the component-embedded substrate, noise countermeasures associated with increasing the clock frequency of the CPU or increasing the communication frequency can be performed without increasing the mounting area.

  The above-described wiring board or multilayer wiring board having a small thermal expansion coefficient is also useful as a probe card board for semiconductor inspection. The probe card substrate is a circuit substrate that inspects the electrical characteristics of the circuit state at a time by bringing a probe into contact with each electrode of the semiconductor elements arranged on the semiconductor wafer.

  Usually, semiconductor inspection is broadly divided into product inspection (electrical characteristic test) and burn-in test, which is a reliability test performed thereafter. The burn-in test is one of screening tests performed to remove a semiconductor element having an inherent defect or a semiconductor element that causes a failure depending on time and stress from manufacturing variations. While the inspection by the probe card is an electrical characteristic test of the manufactured semiconductor element, the burn-in test can be said to be a thermal acceleration test.

  Usually, these tests are performed after the semiconductor is packaged. However, in recent years, a wafer batch contact for performing a burn-in test of a large number of semiconductor elements formed on a semiconductor wafer at once before dicing the semiconductor. Development and practical application of a board (burn-in board) is underway (see Patent Document 4). According to this, when a plurality or all of the semiconductor chips are operated by simultaneously applying a power supply voltage or a signal to the electrodes of each semiconductor element on the semiconductor wafer in the burn-in test, the probe is applied to a large number of pad electrodes on the semiconductor wafer. There have been proposed contactors (contact jigs) capable of collectively contacting electrodes. According to this technique, a large number of bumps are formed on the contactor, and these bumps are used as contact electrodes.

In the burn-in inspection using the wafer batch burn-in apparatus, it is necessary to simultaneously operate a plurality of semiconductor chips, and it is necessary to supply a large amount of current to the wafer instantaneously at the beginning of the chip operation. When such a large amount of current is supplied to the wafer, the power supply voltage may drop significantly due to the contact resistance of the contactor, or the voltage supplied to adjacent semiconductor chips may drop sequentially. In order to solve such a problem, a capacitor is disposed between a power supply and a ground wiring shared by the multilayer wiring board. In this capacitor arrangement, it has been proposed to form a capacitor for each chip (see Patent Document 5). According to this method, in the step of forming the wiring pattern of the wiring board, a capacitor configured using a dielectric is formed. This capacitor operates as a bypass capacitor between the power source and the ground, and an error caused by noise generated when the semiconductor element is switched can be removed for each chip or the influence of noise can be reduced.
Japanese Patent Laid-Open No. 06-268345 Japanese Patent Laid-Open No. 11-40902 JP 2001-332828 A Japanese Patent Application Laid-Open No. 07-231019 JP 2002-174667 A

  However, in the conventional technology adopting the carbon fiber sheet for reducing the thermal expansion coefficient of the wiring board, the difference in the thermal expansion coefficient between the carbon fiber sheet and the resin enclosing it is excessive, and the thickness direction The thermal expansion coefficient tends to be larger than that when no carbon fiber sheet is contained. The resin that encloses the carbon fiber sheet originally has a relatively large thermal expansion coefficient, but the thermal expansion in the in-plane direction is severely suppressed by the carbon fiber sheet having an extremely small thermal expansion coefficient. Therefore, during thermal expansion, stress exceeding the allowable upper limit is generated in the wiring board due to an excessive difference in thermal expansion coefficient between the resin and the carbon fiber sheet. In order to release the stress, the resin further expands in the thickness direction of the wiring board. In particular, in a multilayer wiring board using a core layer containing a carbon fiber sheet with a high content to suppress the thermal expansion coefficient in the in-plane direction to the vicinity of the thermal expansion coefficient of the semiconductor, the thermal expansion coefficient in the thickness direction is The increase is significant.

  When the thermal expansion coefficient in the thickness direction of the wiring board is large, a large stress acts in the thickness direction on the through hole formed in the wiring board or the inner via formed in the multilayer wiring board. As a result, the connection of the through hole or the inner via becomes unstable. In addition, since carbon fiber material has electrical conductivity, it is necessary to insulate the inner wall surface of the through-hole in order to connect through-holes. It is necessary to form holes. For this reason, the through-hole diameter becomes large and it is difficult to cope with the finer.

  As described above, in a conventional wiring board or multilayer wiring board that uses a carbon fiber material as a base material, it is possible to appropriately reduce the thermal expansion while ensuring sufficient connection of through holes or inner vias, and high dimensional accuracy. It was difficult to realize a wiring board.

  When a multilayer wiring board is used as a probe card with a built-in capacitor, it is difficult to control the thickness of the dielectric forming the capacitor when forming a capacitor with a large area as a method of forming the capacitor. In addition, the dielectric thickness may be insufficient and dielectric breakdown may occur if the dielectric is too thin.On the other hand, if the thickness is too thick, the etching processability may be deteriorated and precise patterning may be difficult. is there. In addition, there is a problem that by introducing a process that is completely different from the process of a normal multilayer wiring board, the cost increases and the yield cannot be lowered.

  The present invention has been conceived under such a problem, and an object of the present invention is to provide a component-embedded substrate capable of high-density mounting, high thermal expansion, and high dimensional accuracy, and a method for manufacturing the same.

  In order to achieve the above object, the present invention comprises a first electrically insulating substrate and a wiring pattern formed on both surfaces of the first electrically insulating substrate, which are arranged on the same plane. A circuit board mounted on the circuit board, a correction material having a lower coefficient of thermal expansion than the circuit board, a plurality of circuit boards arranged on the same plane, and the correction material. And a second electrically insulating base material that is joined so as to incorporate therein.

  As described above, the component-embedded substrate and the manufacturing method thereof according to the present invention realizes high-density mounting by incorporating components with low cost and high reliability using existing circuit components and circuit substrates, and a plurality of circuits. By bonding the substrate to an orthodontic material that can select an appropriate thermal expansion coefficient, the thermal expansion coefficient can be appropriately controlled, and a component-embedded substrate with high substrate dimensional accuracy and a manufacturing method thereof can be realized.

(Embodiment 1)
Hereinafter, the component-embedded substrate according to the first embodiment of the present invention will be described with reference to the drawings.

  FIG. 1A is a top view of a component built-in board according to the first embodiment, FIG. 1B is a partial cross-sectional view of the component built-in board, and FIG. 2 is a top view of another example of the component built-in board. FIG. 1A and 1B, a circuit board 4 includes a first electrically insulating substrate 1, a wiring pattern 2 formed on both surfaces of the first electrically insulating substrate 1, and both surfaces. The through-hole 3 is used to electrically connect the wiring patterns 2. Moreover, as shown to Fig.1 (a), the circuit board 4 arrange | positions several circuit boards 4a-4d on the same plane. The circuit component 6 is a chip component mounted on the circuit board 4 with the solder 5, and the second electrically insulating base 7 contains the circuit component 6 and the correction material 8 having a low thermal expansion coefficient and the circuit board 4. Are joined.

  In the present invention, the circuit board 4 is a substrate in which a glass fabric is impregnated with an epoxy resin (glass-epoxy substrate), a substrate in which an aramid fiber nonwoven fabric is impregnated with an epoxy resin (aramid-epoxy substrate), and paper is impregnated with a phenol resin. From any substrate, such as a flexible substrate using a film substrate (paper-phenol substrate), a film substrate in which a porous film substrate is impregnated with an uncured epoxy resin so that pores remain, and a ceramic substrate It can be selected and used accordingly.

  Further, a plurality of circuit boards 4 having the same shape such as a plurality of circuit boards 4a to 4d can be arranged on the same plane. Furthermore, as shown in FIG. 2, the circuit board 4 includes a plurality of circuit boards 4a to 4d, and the circuit boards 4a to 4d connected by jumper resistors or the like can be used. This jumper resistor is mounted on the same surface as the circuit component 6 and built in. By connecting using this jumper resistor, a plurality of circuit boards 4a to 4d can be used as a single circuit board 4, which is useful as an application for a large inspection probe.

  As the second electrically insulating substrate 7, for example, an insulating resin and a mixture of a filler and an insulating resin can be used, including a resin and a filler, and the filler content is 50% by mass to 95% by mass. Preferably there is. Furthermore, there may be a reinforcing material such as a glass cloth. Further, as the insulating resin, a thermosetting resin, a thermoplastic resin, a photocurable resin, or the like can be used. Further, by using an epoxy resin, a phenol resin, or an isocyanate resin having high heat resistance, the second electric The heat resistance of the insulating substrate 7 can be increased.

  In addition, a fluororesin having a low dielectric loss tangent, such as polytetrafluoroethylene (PTFE resin), PPO (polyphenylene oxide) resin (also referred to as PPE (polyphenylene ether) resin), a resin containing a liquid crystal polymer, or a resin obtained by modifying these resins is used. By using it, the high frequency characteristics are improved.

  Here, in the case where a mixture of filler and insulating resin is used as the second electrically insulating substrate 7, the linear expansion coefficient of the second electrically insulating substrate 7 is selected by selecting the filler and the insulating resin. The thermal conductivity, dielectric constant, etc. can be easily controlled. For example, alumina, magnesia, boron nitride, aluminum nitride, silicon nitride, polytetrafluoroethylene, silica, or the like can be used as the filler.

  In particular, by using alumina, boron nitride, or aluminum nitride, a substrate having higher thermal conductivity than that of a conventional glass-epoxy substrate can be manufactured, and the heat generated from the built-in circuit component 6 can be effectively radiated. Alumina also has the advantage of low cost. When silica is used, the second electrically insulating substrate 7 having a low dielectric constant can be obtained and the specific gravity is light.

  Furthermore, an electrical insulating layer having a low dielectric constant can be formed using silicon nitride or polytetrafluoroethylene such as “Teflon (registered trademark)”. Moreover, the linear expansion coefficient can be reduced by using boron nitride. Furthermore, a dispersant, a colorant, a coupling agent, or a release agent may be included.

  Further, the filler in the insulating resin can be dispersed with good uniformity by the dispersant. Furthermore, since the electrical insulating layer can be colored with the colorant, the automatic recognition device can be easily used. Moreover, since the adhesive strength between the insulating resin and the filler can be increased by the coupling agent, the insulating property of the second electrically insulating substrate 7 can be improved.

  The wiring pattern 2 is made of a material having electrical conductivity. For example, a metal such as gold, silver, copper, or aluminum, a conductive resin composition, or a lead frame obtained by processing a metal plate can be used. By using a metal foil or a lead frame, it becomes easy to create a fine wiring pattern 2 by etching or the like. In the metal foil, the wiring pattern 2 can be formed by transfer using a release film. In particular, copper foil is preferable because it is inexpensive and has high electrical conductivity.

  Moreover, handling becomes easy by forming the wiring pattern 2 on a release film, and formation of the wiring pattern 2 by screen printing etc. becomes possible by using a conductive resin composition. In addition, the use of the lead frame makes it possible to form the wiring pattern 2 having a low electrical resistance. Further, a simple manufacturing method such as fine patterning of the wiring pattern 2 by etching or punching can be used.

  Moreover, these wiring patterns 2 can improve corrosion resistance and electrical conductivity by plating the surface. Furthermore, the adhesiveness with the 2nd electrical insulation base material 7 can be improved by roughening the contact surface with the 2nd electrical insulation base material 7 of the wiring pattern 2. FIG.

  The through-hole 3 has a function of connecting the wiring patterns 2 on both sides, and can be formed by plating after forming the via hole. For the plating, gold, silver, copper, nickel, or the like can be used. The via hole is formed by, for example, punching, drilling, or laser processing. A carbon dioxide laser, YAG laser, or excimer laser is used as a light source for laser processing. In laser processing, a small-diameter through hole can be formed in a short time, and processing with excellent productivity can be realized. In the case of drilling or punching, via holes can be formed with existing versatile equipment. In the present embodiment, the through-through hole 3 is taken as an example, but interlayer connection may be performed by an inner via. For example, an inner via made of a thermosetting conductive material may be used.

  As the thermosetting conductive material, for example, a conductive resin composition in which metal particles and a thermosetting resin are mixed can be used. As the metal particles, gold, silver, copper, nickel, or the like can be used. Gold, silver, copper, or nickel is preferable because of its high conductivity, and copper is particularly preferable because of its high conductivity and low migration. Even if metal particles in which copper is coated with silver are used, the characteristics of both low migration and high conductivity can be satisfied. As the thermosetting resin, for example, an epoxy resin, a phenol resin, or an isocyanate resin can be used. Epoxy resins are particularly preferred because of their high heat resistance.

  When the interlayer connection is performed by the inner via, the circuit board 4 may be a multilayer wiring board having an all-layer IVH (Interstitial Via Hole) structure. As the wiring substrate having an all-layer IVH structure, an ALIVH substrate or a build-up substrate can be used. As a result, it is possible to obtain a component-embedded substrate having a short wiring length and high wiring capacity.

  The circuit component 6 is preferably a discrete component. This eliminates the need to newly develop a built-in component and improves the development speed. In addition, the reliability and accuracy of existing discrete components can be used, and the characteristics are improved. In the above, the discrete component refers to a general-purpose chip component such as a coil, a capacitor, a resistor, and a cutoff element. Further, a printing resistor, a thin film capacitor, an inductor, or the like may be formed. The capacitor can be used as a bypass capacitor or a decoupling capacitor. The resistor can be used for current limiting. The interrupting element detects an overcurrent caused by an overload or a short circuit of the power supply line, and performs an interrupt with current control.

  When using a component-embedded substrate as a probe card, capacitors must be formed so as to correspond to each semiconductor element on the semiconductor wafer, but a large number of capacitors can be easily mounted by using existing discrete components. Thus, errors caused by noise generated during switching of each semiconductor element can be completely removed, or the influence of the noise can be reduced, so that sufficient characteristics of the substrate can be extracted.

  The solder 5 is used for mounting the circuit component 6 on the wiring pattern 2. When high temperature solder is used, remelting of the solder 5 when the module is mounted by reflow can be prevented. Moreover, the load on the environment can be reduced by using lead-free solder. In this embodiment, the solder 5 is used, but a conductive adhesive or the like may be used.

The straightening material 8 should be the same as or smaller than the thermal expansion coefficient of silicon. For example, low thermal expansion glass or quartz whose thermal expansion coefficient is close to that of silicon, mullite ceramics (ceramics mainly composed of alumina Al ₂ O ₃ and silicon oxide SiO ₂ ), silicon, glass ceramics, aluminum nitride, alumina, Invar alloy, etc. Can be used. A material having a desired thermal expansion can be selected from any material, and the thickness, size, and shape can be selected and used.

  With this configuration, by joining to the correction material 8 having a low thermal expansion coefficient, the component built-in board can be appropriately reduced in thermal expansion, and the circuit board 4 is arranged as a plurality of circuit boards 4a to 4d. By doing so, the expansion and contraction of the substrate due to thermal expansion is reduced, and as a result, the effect of improving the dimensional accuracy of the substrate is obtained. Although the circuit board 4 is divided into four equal parts as an example, a predetermined number of divisions can be appropriately selected and employed.

  Further, by embedding the circuit component 6 in a state where it is bonded to the circuit boards 4a to 4d with the second electrically insulating base material, the bonding strength between the circuit component 6 and the circuit board 4 can be increased. As a result, it is possible to provide a component-embedded substrate that can be mounted at high density and has low thermal expansion and good dimensional accuracy.

(Embodiment 2)
Hereinafter, a component built-in substrate according to Embodiment 2 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 3 is a cross-sectional view of a part of the component-embedded substrate according to the second embodiment. In FIG. 3, the circuit board 4 is electrically connected between the first electrically insulating substrate 1, the wiring pattern 2 formed on both surfaces of the first electrically insulating substrate 1, and the wiring patterns 2 on both surfaces. It consists of a through hole 3 to be connected. The third electrically insulating substrate 10 includes inner vias 11 that electrically connect opposing wiring patterns 2 between layers of the circuit board 4 arranged in the thickness direction.

  The circuit component 6 is a chip component mounted on the circuit board 4 with the solder 5, and the second electrically insulating base 7 contains the circuit component 6 and corrects the circuit board 4 with a low thermal expansion coefficient. The material 8 is joined.

  In the present invention, the third electrically insulating substrate 10 can be the same as the second electrically insulating substrate 7. Moreover, the thing similar to the 1st electrically insulating base material 1 used for the circuit board 4 can also be used. Thereby, manufacturing cost can be held down.

  For the inner via 11, a conductive resin composition in which metal particles and a thermosetting resin are mixed can be used. As the metal particles, gold, silver, copper, nickel, or the like can be used. Gold, silver, copper, or nickel is preferable because of its high conductivity, and copper is particularly preferable because of its high conductivity and low migration. Even when metal particles in which copper is coated with silver are used, the characteristics of both low migration and high conductivity can be satisfied. As the thermosetting resin, for example, an epoxy resin, a phenol resin, or an isocyanate resin can be used. This epoxy resin is particularly preferable because of its high heat resistance.

  With this configuration, the circuit board 4 can be easily multi-layered, and a component-embedded board excellent in wiring accommodation can be provided.

(Embodiment 3)
Hereinafter, a component-embedded substrate according to Embodiment 3 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 4 is a cross-sectional view of the component built-in substrate according to the third embodiment. In FIG. 4, a circuit board 4 includes a first electrical insulating base material 1, a first wiring pattern 2 formed on both surfaces of the first electrical insulating base material 1, and a wiring pattern 2 between both surfaces. It consists of a through hole 3 that is electrically connected. The circuit component 6 is a chip component mounted on the circuit board 4 with the solder 5, and the second electrically insulating base 7 contains the circuit component 6 and the correction material 8 having a low thermal expansion coefficient and the circuit board 4. Are joined.

  The fourth electrically insulating substrate 15 is laminated on the outermost surface of the circuit board 4, and the second wiring pattern 12 is formed on the second electrically insulating substrate 7. The fourth electrically insulating substrate 15 is formed with vias 13 that electrically connect the first wiring pattern 2 and the second wiring pattern 12.

  In the present invention, the fourth electrically insulating substrate 15 can be the same as the second electrically insulating substrate 7. Moreover, the thing similar to the 1st electrically insulating base material 1 used for the circuit board 4 can also be used. Thereby, manufacturing cost can be held down. Further, the metal used for the second wiring pattern 12 formed on the fourth electrically insulating substrate 15 and the via 13 is not particularly limited, but gold, silver, copper, nickel, aluminum, palladium, What formed zinc, chromium, etc. by electroless plating, electrolytic plating, and sputtering can be used.

  With this configuration, the circuit board 4 can be easily multi-layered, and a component-embedded board excellent in wiring accommodation and board dimensional accuracy can be provided.

(Embodiment 4)
Hereinafter, a method for manufacturing a component-embedded substrate according to Embodiment 4 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 5A to FIG. 5D are cross-sectional views showing manufacturing steps of the component built-in substrate according to the fourth embodiment. FIG. 5A shows a state in which the circuit board 4 is mounted, and FIG.

  Next, as shown in FIG.5 (c), the 2nd electrical insulation base material 7 is piled up on the some circuit board 4 which mounted the circuit component 6, and board | substrate adhesion | attachment and component incorporation are performed. The second electrically insulating substrate 7 is a mixture containing an inorganic filler and a thermosetting resin. When incorporating, heat is applied from both sides of the circuit board 4 and the second electrically insulating base material 7 to harden the resin slightly, but it is preferable that the resin is not completely cured.

  The second electrically insulating base material 7 is prepared as a single sheet material that is not divided, and the second electrically insulating base material 7 is laminated and cured at predetermined positions on the plurality of circuit boards 4. It is preferable from the viewpoint of flatness and dimensional accuracy.

  Next, as shown in FIG.5 (d), the correction | amendment material 8 with a small thermal expansion coefficient is laminated | stacked on the 2nd electrical insulation base material 7, and heat is applied from the outside, and it joins. At this time, the second electrically insulating base material 7 may be melted and cured using a vacuum heat press, a vacuum laminator, or an oven to perform bonding.

  The straightening material 8 is prepared as a single plate that is not divided, and the second electrically insulating base material 7 to which the plurality of circuit boards 4 are bonded is laminated on the straightening material 8 in a predetermined arrangement. It is preferable to join them from the viewpoint of flatness, dimensional accuracy, and the like.

  In the configuration as described above, the bonding strength between the circuit component 6 and the substrate can be increased by embedding the circuit component 6 in a state of being bonded to the circuit substrate 4 by the second electrically insulating base material 7 as described above. it can. Further, as shown in FIG. 1A and FIG. 4, a plurality of circuit boards 4a to 4h are arranged on the same surface and joined to the correction material 8 having a low coefficient of thermal expansion, so that the component built-in board is appropriately low in thermal expansion. And a method for manufacturing a component-embedded substrate with high dimensional accuracy can be provided.

(Embodiment 5)
Hereinafter, a method for manufacturing a component-embedded substrate according to Embodiment 5 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 6A to FIG. 6E are cross-sectional views showing the manufacturing process of the component-embedded substrate in the fifth embodiment. 6A shows a circuit board 4 having a wiring pattern 2 formed on one side, and FIG. 6B shows a state in which the circuit component 6 is mounted on the surface of the circuit board 4 on which the wiring pattern 2 is formed with solder 5. Is shown.

  Next, as shown in FIG. 6C, the second electrically insulating base material 7 is stacked on the circuit board 4 on which the circuit component 6 is mounted, and the board is bonded and the components are built therein. The second electrically insulating substrate 7 is a mixture containing an inorganic filler and a thermosetting resin. When incorporating, heat is applied from both sides of the circuit board 4 and the second electrically insulating base material 7 to harden the resin slightly, but it is preferable that the resin is not completely cured.

  Next, as shown in FIG. 6 (d), a correction material 8 having a small thermal expansion coefficient is laminated on the second electrically insulating substrate 7, and heat is applied from outside to join. At this time, the second electrically insulating base material 7 may be melted and cured using a vacuum heat press, a vacuum laminator, or an oven to perform bonding.

  Next, as shown in FIG. 6E, the wiring pattern 2 is formed on the upper surface of the circuit board 4. The wiring pattern 2 can be formed by etching.

  In the configuration as described above, the bonding strength between the circuit component 6 and the substrate can be increased by embedding the circuit component 6 in a state of being bonded to the circuit substrate 4 by the second electrically insulating base material 7 as described above. it can. Further, a plurality of circuit boards 4a to 4h are arranged on the same surface, joined to the correction material 8 having a low coefficient of thermal expansion, and the wiring pattern 2 of the outermost layer is formed last, thereby shifting the design value from the surface layer pattern. Therefore, it is possible to provide a method for manufacturing a component-embedded substrate with less substrate accuracy.

(Embodiment 6)
Hereinafter, a method for manufacturing a component-embedded substrate according to Embodiment 6 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 7A to FIG. 7F are cross-sectional views showing manufacturing steps of the component built-in substrate in the sixth embodiment. 7A shows a circuit board 4 having a wiring pattern 2 formed on one side, and FIG. 7B shows a state in which a circuit component 6 is mounted on the surface of the circuit board 4 on which the wiring pattern 2 is formed with solder 5. Is shown.

  Next, as shown in FIG. 7C, the second electrically insulating base material 7 is stacked on the circuit board 4 on which the circuit components 6 are mounted, and the substrates are bonded and the components are embedded. The second electrically insulating substrate 7 is a mixture containing an inorganic filler and a thermosetting resin. When incorporating, it is desirable to apply heat from both sides of the circuit board 4 and the second electrically insulating base 7 to completely cure. At this time, the second electrically insulating substrate 7 may be melted and cured using a vacuum heat press, a vacuum laminator, or an oven.

  Next, as shown in FIG. 7D, the wiring pattern 2 is formed on the upper surface of the circuit board 4. The wiring pattern 2 can be formed by etching.

  Next, as shown in FIG. 7E, an adhesive 9 made of a thermosetting or photo-curable resin is formed on the correction material 8 having a small thermal expansion coefficient. The adhesive 9 may be formed by applying a sheet or paste. At this time, the adhesive 9 is preferably uncured.

  Next, as shown in FIG. 7F, the straightening material 8 on which the adhesive material 9 is formed and the second electrically insulating base material 7 are aligned and laminated. At this time, the bonding material 9 may be melted and cured using a vacuum heat press, a vacuum laminator, or an oven to perform bonding. The adhesive 9 may be cured by applying visible light or ultraviolet light.

  In the present invention, the adhesive 9 is made of a thermosetting resin and a photocurable resin, and examples thereof include polyimide resin, fluorine resin, and heat resistant epoxy resin. The adhesive 9 may be a sheet-like material or a paste-like material. The glass transition temperature of the resin is preferably 120 ° C. or higher, which is the burn-in temperature of the probe card. Moreover, it is preferable that the curing temperature of the resin is a low temperature, which allows low warpage and can be joined to the second electrically insulating substrate 7 without impairing the function of the straightening material 8 that controls thermal expansion. .

  Although the correction | amendment material 8 can use the same thing as Embodiment 1, the correction | amendment material 8 which lets visible light and ultraviolet light pass is more preferable. By using the straightening material 8 that transmits visible light and ultraviolet light, adhesion can be easily performed by the adhesive material 9 made of a photocurable resin.

  In the present embodiment, the circuit board 4 has the wiring pattern 2 formed on one side, but may be formed on both sides in advance.

  With this configuration, the second electrically insulating substrate 7 can form the wiring pattern 2 on the upper surface with the circuit component 6 built-in and completely cured, and the correction material 8 having a low thermal expansion coefficient can be formed. It can be bonded with the adhesive 9. Therefore, the warp generated in the straightening material 8 can be suppressed without impairing the substrate dimensional accuracy. In addition, since the adhesive 9 is thin, it can be bonded without impairing the thermal expansion control force of the straightening material 8, and it is possible to provide a component-embedded substrate that can be mounted at high density, has good dimensional accuracy, low thermal expansion, and low warpage. Is obtained.

(Embodiment 7)
Hereinafter, a method for manufacturing a component-embedded substrate according to Embodiment 7 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 8A to FIG. 8F are cross-sectional views illustrating manufacturing steps of the component built-in substrate in the seventh embodiment. FIG. 8A shows the circuit board 4 and FIG. 8B shows a state in which the circuit component 6 is mounted with the solder 5.

  Next, as shown in FIG. 8C, the second electrically insulating base material 7 is stacked on the circuit board 4 on which the circuit component 6 is mounted, and the component is built therein. The second electrically insulating substrate 7 is a mixture containing an inorganic filler and a thermosetting resin. When incorporating, heat is applied from both sides of the circuit board 4 and the second electrically insulating base material 7 to harden the resin slightly, but it is preferable that the resin is not completely cured.

  Next, as shown in FIG. 8D, the correction material 8 having a small thermal expansion coefficient is laminated on the second electrically insulating substrate 7, and heat is applied from outside to join. At this time, the second electrically insulating base material 7 may be melted and cured using a vacuum heat press, a vacuum laminator, or an oven to perform bonding.

  Next, as shown in FIG. 8E, a third electrically insulating base material 10 having an inner via 11 is laminated on the outermost surface of the circuit board 4.

  Next, as shown in FIG. 8 (f), the circuit board 4 is laminated on the third electrically insulating substrate 10 having the inner via 11, and the third electrically insulating substrate is heated by applying heat from the outside. 10 is fully cured.

  In the seventh embodiment, the circuit board 4 has the wiring pattern 2 formed on one surface, but may be formed only on the surface on which the circuit component 6 is formed.

  With this configuration, the circuit board 4 can be easily multi-layered, and a component-embedded board excellent in wiring accommodation can be provided. For example, according to this configuration, since the circuit board 4 having the probe contact surface configured by a fine pattern can be configured by a two-layer plate, the manufacturing yield can be easily improved.

(Embodiment 8)
Hereinafter, a method for manufacturing a component-embedded substrate according to Embodiment 8 of the present invention will be described with reference to the drawings. In addition, about the structure same as Embodiment 1, the same number is provided and the description is abbreviate | omitted.

  FIG. 9A to FIG. 9G are cross-sectional views showing manufacturing steps of the component built-in substrate in the eighth embodiment. 9A shows a state in which the circuit board 4 is mounted, and FIG. 9B shows a state in which the circuit component 6 is mounted on the circuit board 4 with the solder 5.

  Next, as shown in FIG. 9C, the second electrically insulating base material 7 is stacked on the circuit board 4 on which the circuit component 6 is mounted, and the component is built therein. The second electrically insulating substrate 7 is a mixture containing an inorganic filler and a thermosetting resin. When incorporating, heat is applied from both sides of the circuit board 4 and the second electrically insulating base material 7 to harden the resin slightly, but it is preferable that the resin is not completely cured.

  Next, as shown in FIG. 9 (d), the correction material 8 having a small coefficient of thermal expansion is aligned and laminated on the second electrically insulating substrate 7, and heat is applied from outside to join. At this time, the second electrically insulating base material 7 may be melted and cured using a vacuum heat press, a vacuum laminator, or an oven to perform bonding.

  Next, as shown in FIG. 9E, the fourth electrically insulating base material 15 is laminated on the outermost surface of the circuit board 4, and the via hole 14 penetrating the fourth electrically insulating base material 15 is formed. As the fourth electrically insulating substrate 15, the same materials as those of the first and second electrically insulating substrates 1 and 7 can be used. Thereby, manufacturing cost can be held down.

  In addition, an epoxy-based or polyimide-based photosensitive resin or thermosetting resin substrate may be used. A method of forming a flexible film-like insulating resin by lamination, or coating with a liquid insulating resin. There is a way. As a method of laminating a film-like insulating resin having flexibility, a method of completely curing after laminating a resin made into a film by semi-curing, and a flexible film by completely curing, There is a method of attaching via an adhesive. Examples of a method for coating a liquid resin include a method of applying and drying with a spinner, a roll coater, a die coater, or the like.

  The via hole 14 is formed by laser processing. A carbon dioxide laser, YAG laser, or excimer laser is used as a light source for laser processing. In laser processing, a small-diameter through hole can be formed in a short time, and processing with excellent productivity can be realized. When the fourth insulating base material 15 is formed of a photosensitive resin, it can be formed by performing an exposure development process or the like by a photolithography technique.

  Next, as shown in FIG. 9F, a metal layer 16 is formed on the fourth electrically insulating substrate 15 so as to be electrically connected to the first wiring pattern 2 in the via hole 14. The metal layer 16 is preferably formed by electroless plating or electroplating.

  Next, as shown in FIG. 9G, the second wiring pattern 12 is formed by patterning the metal layer 16 by etching or the like. The second wiring pattern 12 can use a semi-additive method, a full additive method, or a subtractive method. Although the metal used for the 2nd wiring pattern 12 is not specifically limited, Gold, silver, copper, nickel, aluminum, palladium, zinc, chromium etc. are mentioned, However, Copper which is cheap and excellent in electrical conductivity is desirable.

  As a result, the outermost wiring pattern 12 can be formed without being affected by the curing shrinkage of the substrate, and the deviation from the design value is reduced. Furthermore, since the wiring pattern 12 using the semi-additive method or the full additive method is suitable for finer processing, it is preferable when the pad pitch of the design value is a narrow pitch of 120 μm or less.

  In the eighth embodiment, the circuit board 4 has the wiring pattern formed on both surfaces, but may be formed only on the surface on which the circuit component 6 is formed.

  With this configuration, the circuit board 4 can be easily multi-layered, and a method for manufacturing a component-embedded board excellent in wiring accommodation and board dimensional accuracy can be provided.

  The component-embedded substrate and the manufacturing method thereof according to the present invention realizes high-density mounting by incorporating components with low cost and high reliability using existing circuit components and circuit boards, and appropriately controlling the thermal expansion coefficient. It is useful as a component-embedded substrate with good substrate dimensional accuracy and a method for manufacturing the same.

The top view of the component built-in board in Embodiment 1 of this invention, and sectional drawing of a part of component built-in board Top view of another component built-in board Sectional drawing of a part of component built-in substrate in Embodiment 2 of this invention Sectional drawing of a part of component built-in substrate in Embodiment 3 of the present invention Process sectional drawing which shows the manufacturing method of the component built-in substrate in Embodiment 4 of this invention Process sectional drawing which shows the manufacturing method of the component built-in substrate in Embodiment 5 of this invention Process sectional drawing which shows the manufacturing method of the component built-in substrate in Embodiment 6 of this invention Process sectional drawing which shows the manufacturing method of the component built-in substrate in Embodiment 7 of this invention Process sectional drawing which shows the manufacturing method of the component built-in substrate in Embodiment 8 of this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st electric insulation base material 2, 12 Wiring pattern 3 Through-through hole 4, 4a, 4b, 4c, 4d Circuit board 5 Solder 6 Circuit component 7 2nd electric insulation base material 8 Correction material 9 Adhesive material 10 Third electrically insulating substrate 11 Inner via 13 Via 14 Via hole 15 Fourth electrically insulating substrate 16 Metal layer

Claims (12)

A plurality of circuit boards arranged on the same plane, comprising a first electrically insulating substrate and a wiring pattern formed on both surfaces of the first electrically insulating substrate;
Circuit components mounted on the circuit board;
Correction material having a lower coefficient of thermal expansion than the circuit board,
A second electrically insulating substrate that joins the plurality of circuit boards arranged on the same plane and the correction material so as to incorporate the circuit components;
Component built-in board consisting of The first electrically insulating substrate and the wiring pattern formed on both surfaces of the first electrically insulating substrate, and a plurality of circuit boards arranged on the same plane are arranged in the thickness direction, A third electrical insulation is provided between the plurality of circuit boards arranged in the thickness direction to provide inner vias for electrically connecting the opposing patterns and to join the circuit boards arranged in the thickness direction. A multilayer circuit board comprising a conductive substrate;
Circuit components mounted on the circuit board on the surface layer of the circuit board arranged in the thickness direction, and
Correction material having a lower coefficient of thermal expansion than the circuit board,
A second electrically insulating base material for joining the multilayer circuit board and the correction material arranged on the same plane so as to contain the circuit component;
Component built-in board consisting of A fourth electrically insulating substrate is laminated on the outermost surface of the circuit board, and an electrical connection is established between the second wiring pattern and the first wiring pattern formed on the surface of the fourth electrically insulating substrate. The component built-in board according to claim 1, further comprising a via connected to the component. 3. The component built-in board according to claim 1, wherein the plurality of circuit boards arranged on the same plane have the same shape. 3. The component built-in board according to claim 1, wherein a plurality of circuit boards arranged on the same plane are connected by a circuit component. The component-embedded substrate according to claim 1, wherein the second electrically insulating substrate is a mixture containing an inorganic filler and a thermosetting resin. 3. The component-embedded substrate according to claim 1, wherein the glass transition temperature of the second electrically insulating substrate is 120 ° C. or higher. Mounting circuit components on a plurality of circuit boards composed of a first electrically insulating substrate and a wiring pattern formed on the first electrically insulating substrate;
Arranging the plurality of circuit boards on the same plane, laminating a second electrically insulating substrate on the plurality of circuit boards, and incorporating the circuit component;
Laminating the second electrically insulating base material on a correction material having a lower coefficient of thermal expansion than the circuit board;
And a step of curing the second electrically insulating substrate. Mounting circuit components on a circuit board comprising a first electrically insulating substrate and a wiring pattern formed on at least one side of the first electrically insulating substrate;
Laminating a second electrically insulating substrate on the circuit board and incorporating the circuit component;
Laminating a correction material having a lower coefficient of thermal expansion than the circuit board on the second electrically insulating substrate;
Curing the second electrically insulating substrate;
And a step of forming a wiring pattern on the upper surface of the circuit board after the step of curing the second electrically insulating substrate. Mounting circuit components on a circuit board comprising a first electrically insulating substrate and a wiring pattern formed on at least one side of the first electrically insulating substrate;
Laminating a second electrically insulating substrate on the circuit board and incorporating the circuit component;
Curing the second electrically insulating substrate;
After the step of curing the second electrically insulating substrate, the step of forming a wiring pattern on the upper surface of the circuit board, the correction material, and the second electrically insulating substrate through an adhesive layer Laminating steps;
Curing the adhesive layer;
A method for manufacturing a component-embedded substrate comprising: Mounting a circuit component on a circuit board comprising a first electrically insulating substrate and a wiring pattern formed on both surfaces of the first electrically insulating substrate;
Laminating a second electrically insulating substrate on the circuit board and incorporating the circuit component;
Laminating a correction material having a lower coefficient of thermal expansion than the circuit board on the second electrically insulating substrate;
Curing the second electrically insulating substrate;
Laminating a third electrically insulating substrate having an inner via on the outermost surface of the circuit board; and laminating the circuit substrate on a third electrically insulating substrate having the inner via; ,
Curing the third electrically insulating substrate;
A method for manufacturing a component-embedded substrate comprising: Mounting circuit components on a circuit board composed of a first wiring pattern formed on both surfaces of the first electrically insulating substrate and the first electrically insulating substrate;
Laminating a second electrically insulating substrate on the circuit board and incorporating the circuit component;
Laminating a correction material having a lower coefficient of thermal expansion than the circuit board on the second electrically insulating substrate;
Curing the second electrically insulating substrate;
Laminating a fourth electrically insulating substrate on the outermost surface of the circuit board;
Curing the fourth electrically insulating substrate;
Forming a via hole penetrating the fourth electrically insulating substrate;
Forming a wiring layer on a fourth electrically insulating substrate so as to be electrically connected to the first wiring pattern in the via hole;
Forming a second wiring pattern on the wiring layer.

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