KR20170023250A - Liquid Crystal Display Device - Google Patents

Liquid Crystal Display Device Download PDF

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Publication number
KR20170023250A
KR20170023250A KR1020150116734A KR20150116734A KR20170023250A KR 20170023250 A KR20170023250 A KR 20170023250A KR 1020150116734 A KR1020150116734 A KR 1020150116734A KR 20150116734 A KR20150116734 A KR 20150116734A KR 20170023250 A KR20170023250 A KR 20170023250A
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South Korea
Prior art keywords
subpixel
liquid crystal
data
horizontal line
line
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KR1020150116734A
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Korean (ko)
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장훈
강규태
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엘지디스플레이 주식회사
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Priority to KR1020150116734A priority Critical patent/KR20170023250A/en
Publication of KR20170023250A publication Critical patent/KR20170023250A/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3688Details of drivers for data electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0439Pixel structures
    • G09G2300/0452Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04Display protection
    • G09G2330/045Protection against panel overheating

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The present invention can reduce heat generation and power consumption of a data driver and prevent and disperse a specific polarity on a liquid crystal panel when a large or high resolution liquid crystal display device is implemented. To this end, the data lines have at least two data lines arranged at different intervals, and the switching transistors of the subpixels arranged in the vertical diagonal direction on one data line are connected in common.

Description

[0001] The present invention relates to a liquid crystal display device,

The present invention relates to a liquid crystal display device.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, a flat panel display (FPD) such as a liquid crystal display (LCD), an organic light emitting diode (OLED) display and a plasma liquid crystal display (PDP) ) Have been increasing. Among them, liquid crystal display devices capable of realizing high resolution and capable of not only miniaturization but also enlargement are widely used.

The liquid crystal display device includes a liquid crystal panel, a backlight unit, a driver, and a timing controller. The liquid crystal panel includes a transistor substrate on which a thin film transistor, a storage capacitor, a pixel electrode, and the like are formed, and a liquid crystal layer disposed between the color filter substrate and the color filter substrate on which the color filter and the black matrix are formed.

The liquid crystal panel operates based on the gate signal supplied from the gate driver and the data voltage supplied from the data driver. The backlight unit uses a light source such as a light emitting diode (LED) to provide light to the liquid crystal panel.

Liquid crystal display devices have been increasing in resolution to QUHD beyond UHD as the demand for high resolution, which started from a small size, has been shifted to a large size, and accordingly, the size of a screen is gradually increasing.

Meanwhile, a large-sized or high-resolution liquid crystal display device drives a liquid crystal panel in a 4-dot inversion mode in order to eliminate image quality issues. When the liquid crystal panel is driven by the 4-dot inversion method, the polarity switching of the data voltage occurs every 4 horizontal times (4h time).

However, in the conventional liquid crystal display device, there is a problem that the consumption power is increased and the problem of generation of heat of the data driver occurs even if the version is driven by 4 dots due to the increase of the size and the load of the liquid crystal panel. In addition, the conventional liquid crystal display device has a problem that the polarity of the liquid crystal panel is unevenly distributed (polarity is clustered), and the display quality is lowered.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the background art, and it is an object of the present invention to provide a liquid crystal display device capable of reducing the heat generation and power consumption of a data driver and realizing a specific polarity cluster ) Is prevented and dispersed, thereby improving the problem of poor image quality (also referred to as poor quality).

According to an aspect of the present invention, there is provided a liquid crystal display including a liquid crystal panel having gate lines and data lines. The gate lines are arranged in a pair of two gate lines. The data lines have at least two data lines arranged at different intervals. In one data line, the switching transistors of the sub pixels arranged in the up and down diagonal directions are connected in common.

The data lines may be arranged so as to have a portion spaced apart so that three subpixels are included between the two data lines and a portion spaced apart so that one subpixel is included between the two data lines.

The switching transistor of the subpixels may have a first electrode connected to a data line adjacent thereto or a first electrode connected to a data line located one subpixel away from the first electrode.

In the liquid crystal panel, subpixels are arranged in order of a white subpixel, a red subpixel, a green subpixel, and a blue subpixel in the Nth horizontal line, and a green subpixel, a blue subpixel, The (N + 1) th horizontal line is arranged in the subpixel in the order of the subpixel and the red subpixel, the (N + 2) th horizontal line has the same color arrangement structure as the And may have the same color arrangement structure as the line.

In the liquid crystal panel, subpixels are arranged in order of a white subpixel, a red subpixel, a green subpixel, and a blue subpixel in the Nth horizontal line, and a green subpixel, a blue subpixel, And the (N + 3) -th horizontal line is arranged in the subpixel in the order of the (N + 1) -th sub-pixel and the And may have the same color arrangement structure as the line.

The liquid crystal panel is divided into a first subgroup in which switching transistors of subpixels arranged in the upper and lower diagonal directions are connected to one data line and a second subgroup in which switching transistors of the subpixels arranged in the up- Pixel sub-pixel group.

The first subgroup and the second subgroup may be alternately arranged based on a pair of gate lines.

The first subgroup may alternate between a portion forming a vertical diagonal line from the left to the right and a portion forming a vertical diagonal line from the right to the left.

The present invention can reduce heat generation and power consumption of a data driving unit and prevent and disperse a specific polarity of a lump (charging deviation - weak charging area occurrence) on a liquid crystal panel when a large or high resolution liquid crystal display device is implemented Therefore, there is an effect of improving the image quality deficiency (also referred to as defective dorydor).

1 is a block diagram schematically showing a liquid crystal display device.
Fig. 2 is a circuit diagram schematically showing the subpixel shown in Fig. 1. Fig.
3 is a diagram for explaining a driving method of a conventional liquid crystal display device.
4 is a view showing a problem of a conventional liquid crystal display device.
5 is a schematic view showing a part of a liquid crystal panel according to a first embodiment of the present invention.
6 is a view showing a part of the liquid crystal panel shown in Fig. 5 in detail;
7 is a diagram for explaining the simulation result of the first embodiment of the present invention.
8 is a schematic view of a part of a liquid crystal panel according to a second embodiment of the present invention.
9 is a diagram specifically showing a part of the liquid crystal panel shown in Fig.
10 is a schematic view showing a part of a liquid crystal panel according to a third embodiment of the present invention.
11 is a diagram specifically showing a part of the liquid crystal panel shown in Fig.
FIG. 12 is a diagram for explaining an arrangement structure of subpixels shown in FIG. 10; FIG.
Fig. 13 is a view showing a charging aspect of the liquid crystal panel shown in Fig. 10; Fig.
14 is a view showing an improvement of a liquid crystal display device according to a third embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The liquid crystal display device described below may be applied to a liquid crystal display device such as a TN (Twisted Nematic) mode, VA (Vertical Alignment) mode, IPS (In Plane Switching) mode, FFS And is implemented in an ECB (Electrically Controlled Birefringence) mode.

FIG. 1 is a block diagram schematically showing a liquid crystal display device, and FIG. 2 is a circuit diagram schematically showing a subpixel shown in FIG.

1 and 2, the liquid crystal display device includes a timing controller 130, gate drivers 140 and 145, a data driver 150, a liquid crystal panel 160, and backlight units 170 and 180 do.

The timing controller 130 receives a data signal in addition to a driving signal including a data enable signal, a vertical synchronizing signal, a horizontal synchronizing signal, and a clock signal from an external device. The timing control unit 130 generates a clock signal CLK for controlling the operation timing of the gate drivers 140 and 145 along with a data timing control signal DDC for controlling the operation timing of the data driver 150 based on the driving signal. And so on.

The gate drivers 140 and 145 output a gate signal while shifting the level of the gate voltage in response to the clock signal CLK supplied from the timing controller 130. The gate drivers 140 and 145 are divided into a level shifter 145 and a shift register 140. The shift register unit 140 is formed in the bezel region of the gate-in-panel type liquid crystal panel 160.

The level shifter 145 receives a clock signal CLK such as a start signal, a reset signal and a gate clock signal as well as a gate high signal VGH and a gate low signal VGL in response to a signal supplied from the timing controller 130. [ Lt; / RTI > The shift register unit 140 shifts the gate high signal VGH and the gate low signal VGL in response to a signal supplied from the level shifter 145 and outputs the gate signal as a gate signal. The shift register unit 140 supplies a gate signal to the sub-pixels SP included in the liquid crystal panel 160 through the gate lines GL. The gate drivers 140 and 145 may be formed in the form of an IC (Integrated Circuit).

The data driver 150 samples and latches the data signal DATA in response to the data timing control signal DDC supplied from the timing controller 130, and converts the sampled data signal into a gamma reference voltage. The data driver 150 may invert the polarity of the data voltage at a specific frame period. The data driver 150 may invert the polarity of the data voltage in a frame inversion, a column inversion, a dot inversion, a Z inversion, or the like.

The data driver 150 supplies a data voltage (or a data signal) to the sub-pixels SP included in the liquid crystal panel 160 through the data lines DL. The data driver 150 is formed in the form of an IC (Integrated Circuit).

The liquid crystal panel 160 displays an image corresponding to the gate signal supplied from the gate drivers 140 and 145 and the data voltage supplied from the data driver 150. The liquid crystal panel 160 includes subpixels SP for controlling light provided through the backlight unit 170. [ The subpixels SP are located between the thin film transistor substrate and the color filter substrate.

One sub-pixel includes a switching transistor TFT, a storage capacitor Cst, and a liquid crystal layer Clc. The gate electrode of the switching transistor TFT is connected to the gate line GL1 and the source electrode thereof is connected to the data line DL1. One end of the storage capacitor Cst is connected to the drain electrode of the switching transistor TFT and the other end is connected to the common voltage line Vcom. The liquid crystal layer Clc is formed between the pixel electrode 1 connected to the drain electrode of the switching transistor TFT and the common electrode 2 connected to the common voltage line Vcom.

The liquid crystal panel 160 may be a twisted nematic (TN) mode, a VA (Vertical Alignment) mode, an IPS (In Plane Switching) mode, a FFS (Fringe Field Switching) mode Or ECB (Electrically Controlled Birefringence) mode. The liquid crystal panel 160 is implemented with white subpixels in addition to red, green, and blue subpixels.

The backlight units 170 and 180 provide light to the liquid crystal panel 160 using a light source or the like that emits light. The backlight units 170 and 180 are divided into a light source unit 170 and a light source driver 180. The light source driving unit 180 drives the light source unit 170 in response to the dimming signal DIM output from the timing control unit 130.

The light source unit 170 is provided with a light source (e.g., LED), a light guide plate for converting the light emitted from the light source into a planar light source, a reflector for reflecting light at the lower portion of the light guide plate, optical sheets for condensing and diffusing light emitted from the light guide plate, . The light source driving unit 180 includes a power source circuit unit for generating a power source to be supplied to the light source, a driving circuit unit for driving the light source, and a control circuit unit for controlling the driving circuit unit.

Liquid crystal display devices have been increasing in resolution to QUHD beyond UHD as the demand for high resolution, which started from a small size, has been shifted to a large size, and accordingly, the size of a screen is gradually increasing.

However, in the conventional liquid crystal display device, power consumption is increased due to an increase in the size and load of the liquid crystal panel, a heating problem of the data driver is generated, and a polarity of the polarity of the liquid crystal panel is unevenly distributed There is a problem that it is deteriorated and its improvement is required.

Hereinafter, embodiments of the present invention will be described in addition to reviewing and solving the problems of the conventional liquid crystal display device.

BACKGROUND ART [0002]

FIG. 3 is a view for explaining a driving method of a conventional liquid crystal display device, and FIG. 4 is a view showing a problem of a conventional liquid crystal display device.

As shown in FIG. 3, the liquid crystal panel 160 is driven by a 4 dot inversion method in order to eliminate image quality issues that occur in a large or high resolution liquid crystal display device.

Conventionally, in order to drive the liquid crystal panel 160 in a 4-dot version mode, the data lines are arranged so that the left and right adjacent subpixels are connected to one channel. For example, the first channel CH1 provides a data voltage to the subpixels connected to the first data line DL1.

In addition, in the related art, gate lines are arranged such that two gate lines are paired and the upper and lower sub-pixels are alternately connected to each other. For example, the second and third gate lines GL2 and GL3 are arranged in pairs on the second scan line and provide gate signals to the upper and lower sub-pixels.

With respect to the above structure, when the liquid crystal panel 160 is driven by a 4-dot version system, a data voltage is supplied in a version form of Z on the liquid crystal panel 160. The subpixels are characterized by alternating positive and negative data voltages in the order of R + -> G + -> B + -> W + -> R- -> G- -> B- -> W- I repeat. In such a case, the polarity switching of the data voltage occurs every 4 horizontal times (4h time).

However, in the conventional liquid crystal display device, power consumption is increased and the problem of generation of heat of the data driver occurs even if the version is driven by 4 dots due to the increase of the size and the load of the liquid crystal panel 160. In addition, the conventional liquid crystal display device has a problem in that the reliability of the apparatus is deteriorated due to the driving failure caused by the heat of the data driver. In addition, in the conventional liquid crystal display device, due to the polarity accumulation (charging deviation-about charge area occurrence), the problem of image quality (also referred to as dribble defect) in which vertical stripes appear continuously on the liquid crystal panel 160 .

[Invention-First embodiment-]

FIG. 5 is a view schematically showing a part of a liquid crystal panel according to the first embodiment of the present invention, FIG. 6 is a view showing a part of the liquid crystal panel shown in FIG. 5, Fig. 8 is a diagram for explaining simulation results of the embodiment. Fig. Hereinafter, the horizontal line refers to the x direction and the vertical line refers to the y direction.

As shown in FIGS. 5 and 6, in order to solve the problems of the related art in the first embodiment, a switching transistor (TFT) of subpixels arranged in a diagonal direction (channel region asymmetry) The liquid crystal panel is constituted by the commonly connected subpixel groups PG. For example, the switching transistor (TFT) of the upper left (or upper right) subpixel and the switching transistor (TFT) of the lower right (or lower left) subpixel are connected to one data line.

The conditions for forming the subpixel group PG in the same manner as in the first embodiment and implementing the liquid crystal panel on the basis of the same will now be described.

The subpixel group PG includes a white subpixel W, a red subpixel R, a green subpixel G and a blue subpixel B arranged in two horizontal lines and four vertical lines, .

Specifically, subpixels are arranged in the order of a white subpixel W, a red subpixel R, a green subpixel G and a blue subpixel B in the Nth horizontal line. On the other hand, green subpixels G, blue subpixels B, white subpixels W, and red subpixels R are arranged in subpixels in the (N + 1) th horizontal line. However, the white subpixel W and the green subpixel G located on the left side of the first data line DL1 correspond to the dummy subpixel DSP. These are examples which may or may not have a switching transistor corresponding to a dummy sub-pixel (DSP). Accordingly, these connection relations refer to the white subpixel W and the green subpixel G arranged adjacent to the second data line DL2.

A white subpixel W, a red subpixel R, a green subpixel G, and a blue subpixel G are arranged in the same manner as the above-described subpixel group PG over two lines horizontally and vertically, The blue subpixel B is arranged. In other words, the (N + 2) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line and the (N + 3) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line.

The data lines have regions where the arrangement intervals of at least two (two regions) data lines are regularly different. The data lines have a portion spaced apart so that three subpixels are included between the two data lines and a portion spaced apart so that one subpixel is included between the two data lines.

Specifically, three subpixels are included between the first data line DL1 and the second data line DL2. On the other hand, one subpixel is included between the second data line DL2 and the third data line DL3. The reason why the disposition intervals of the data lines are different is to disperse the polarity of the data voltage up / down / left / right instead of being focused on a specific area. That is, if the arrangement interval is different, the polarity of the data voltage can be physically and structurally dispersed.

On the other hand, the switching transistor TFT of each subpixel is connected to the data line located on the left or right side through the first electrode (drain electrode). Therefore, the switching transistor (TFT) of each sub-pixel has a structure in which a first electrode is connected to a data line adjacent to itself, or a first electrode is connected to a data line located at a sub- .

The gate lines are arranged such that two gate lines are paired and connected alternately to the upper sub-pixel and the lower sub-pixel.

Specifically, the second and third gate lines GL2 and GL3 are arranged in pairs on the second horizontal line (the second and third scanning lines). The second gate line GL2 provides a gate signal to the upper sub-pixel G and the third gate line GL3 alternates up and down to provide a gate signal to the lower sub- And is connected to the gate electrode. However, in the first embodiment, the illustration of the dummy gate line is omitted. Thus, it should be understood that not only the first gate line GL1 but also the dummy gate line may be located in the first horizontal line.

In the liquid crystal panel implemented according to the first embodiment, the same polarity is applied twice consecutively and then the polarity is applied once (+, -, + +, - or -, +, - ), It is possible to solve the problem of the increase of the power consumption and the problem of the heating issue of the data driving part to some extent.

This is because the data lines are arranged in three lines and one line along the vertical direction, the gate lines are arranged in pairs in the horizontal direction, and the switching transistors (TFT) of the sub pixels are arranged in the vertical diagonal direction. In addition, the data voltage is supplied in a column-type version mode, but the polarity is charged in a dot-inversion form on the liquid crystal panel through the above structure.

However, in the first embodiment, as shown in FIG. 9, there is a possibility that a horizontal line defect may occur in a mixed color representation because polarity lumps (see yellow, cyan, and magenta square portions) exist in a specific region.

[Present invention-Second Embodiment]

FIG. 8 is a schematic view showing a part of a liquid crystal panel according to a second embodiment of the present invention, and FIG. 9 is a view showing a part of a liquid crystal panel shown in FIG. Hereinafter, the horizontal line refers to the x direction and the vertical line refers to the y direction.

As shown in FIGS. 8 and 9, in order to solve the problem of the conventional technique in the second embodiment, a switching transistor TFT of subpixels arranged in a diagonal direction (channel region asymmetry) The liquid crystal panel is constituted by the commonly connected subpixel groups PG. For example, the switching transistor (TFT) of the upper left (or upper right) subpixel and the switching transistor (TFT) of the lower right (or lower left) subpixel are connected to one data line.

The conditions for forming a subpixel group (PG) in the same manner as in the second embodiment and implementing the liquid crystal panel on the basis of the same will now be described.

The subpixel group PG includes a white subpixel W, a red subpixel R, a green subpixel G and a blue subpixel B arranged in two horizontal lines and four vertical lines, .

Specifically, subpixels are arranged in the order of a white subpixel W, a red subpixel R, a green subpixel G and a blue subpixel B in the Nth horizontal line. On the other hand, green subpixels G, blue subpixels B, white subpixels W, and red subpixels R are arranged in subpixels in the (N + 1) th horizontal line. However, the white subpixel W and the green subpixel G located on the left side of the first data line DL1 correspond to the dummy subpixel DSP. These are examples which may or may not have a switching transistor corresponding to a dummy sub-pixel (DSP). Accordingly, these connection relations refer to the white subpixel W and the green subpixel G arranged adjacent to the second data line DL2.

(W), a red subpixel (R), a green subpixel (G), and a blue subpixel (G) in two horizontal lines and four vertical lines in the same manner as the above- The pixel B is arranged. However, subpixel groups are arranged in such a manner that the above structure is inverted over two lines in the next horizontal direction and four lines in the vertical direction.

For example, if the above-described subpixel group PG is a first subpixel group, then the second subpixel group is inverted as follows.

Specifically, green subpixels G, blue subpixels B, white subpixels W, and red subpixels R are arranged in subpixels in the (N + 2) th horizontal line. On the other hand, subpixels are arranged in order of the white subpixel W, the red subpixel R, the green subpixel G, and the blue subpixel B in the (N + 3) th horizontal line.

In other words, the (N + 2) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line and the (N + 3) th horizontal line has the same color arrangement structure as the Nth horizontal line. That is, unlike the first embodiment, the liquid crystal panel according to the second embodiment is implemented as a first subpixel group and a second subpixel group.

The data lines have regions where the arrangement intervals of at least three data lines are regularly different. The data lines have a portion spaced apart so that three subpixels are included between the two data lines and a portion spaced apart so that one subpixel is included between the two data lines.

Specifically, three subpixels are included between the first data line DL1 and the second data line DL2. On the other hand, one subpixel is included between the second data line DL2 and the third data line DL3. The reason why the disposition intervals of the data lines are different is to disperse the polarity of the data voltage up / down / left / right instead of being focused on a specific area. That is, if the arrangement interval is different, the polarity of the data voltage can be physically and structurally dispersed.

On the other hand, the switching transistor TFT of each subpixel is connected to the data line located on the left or right side through the first electrode (drain electrode). Therefore, the switching transistor (TFT) of each sub-pixel has a structure in which a first electrode is connected to a data line adjacent to itself, or a first electrode is connected to a data line located at a sub- .

The gate lines are arranged such that two gate lines are paired and connected alternately to the upper sub-pixel and the lower sub-pixel.

Specifically, the second and third gate lines GL2 and GL3 are arranged in pairs on the second horizontal line (the second and third scanning lines). The second gate line GL2 provides a gate signal to the upper sub-pixel G and the third gate line GL3 alternates up and down to provide a gate signal to the lower sub- And is connected to the gate electrode. However, in the second embodiment, the illustration of the dummy gate line is omitted. Thus, it should be understood that not only the first gate line GL1 but also the dummy gate line may be located in the first horizontal line.

(+ +, -, + +, - or -, +, -, +) in which the same polarity is applied twice consecutively and then the other polarity is once applied to the liquid crystal panel implemented according to the second embodiment, ), It is possible to solve the problem of the increase of the power consumption and the problem of the heating issue of the data driving part to some extent.

This is because the data lines are arranged in three lines and one line along the vertical direction, the gate lines are arranged in pairs in the horizontal direction, and the switching transistors (TFT) of the sub pixels are arranged in the vertical diagonal direction. In addition, the data voltage is supplied in a column-type version mode, but the polarity is charged in a dot-inversion form on the liquid crystal panel through the above structure.

However, in the second embodiment, subpixels (refer to the upper and lower subpixel portions of the fourth and fifth gate lines) representing the same color exist in the upper and lower portions, and the resolution is likely to decrease.

[Invention-Third Embodiment]

FIG. 10 is a view schematically showing a part of a liquid crystal panel according to a third embodiment of the present invention, FIG. 11 is a view showing a part of the liquid crystal panel shown in FIG. 10, and FIG. 12 is a cross- FIG. 13 is a view showing a charging state of the liquid crystal panel shown in FIG. 10, FIG. 14 is a view showing an improvement of the liquid crystal display device according to the third embodiment of the present invention, and FIG. to be. Hereinafter, the horizontal line refers to the x direction and the vertical line refers to the y direction.

As shown in FIGS. 10 to 12, in order to solve the problem of the related art in the third embodiment, a switching transistor (TFT) of subpixels arranged in a diagonal direction (channel region asymmetry) The sub-pixels of the first sub-group LRC connected in common and the sub-pixels arranged in the up-and-down direction (channel region asymmetry) in one data line are divided into sub- A liquid crystal panel is constituted by a pixel group (PG). For example, the switching transistor (TFT) of the upper left (or upper right) subpixel of the first subgroup and the switching transistor (TFT) of the lower right (or lower left) subpixel are connected to one data line. And the switching transistor (TFT) of the upper left (or upper right) sub pixel and the switching transistor (TFT) of the lower left (or lower right) sub pixel of the second sub group are connected to one data line.

The conditions for forming a subpixel group (PG) in the same manner as in the third embodiment and implementing a liquid crystal panel based on the same will now be described.

The subpixel group PG includes a white subpixel W, a red subpixel R, a green subpixel G and a blue subpixel B arranged in four horizontal lines and four vertical lines. do.

Specifically, subpixels are arranged in the order of a white subpixel W, a red subpixel R, a green subpixel G and a blue subpixel B in the Nth horizontal line. On the other hand, green subpixels G, blue subpixels B, white subpixels W, and red subpixels R are arranged in subpixels in the (N + 1) th horizontal line. However, the white subpixel W and the green subpixel G located on the left side of the first data line DL1 correspond to the dummy subpixel DSP. These are examples which may or may not have a switching transistor corresponding to a dummy sub-pixel (DSP). Accordingly, these connection relations refer to the white subpixel W and the green subpixel G arranged adjacent to the second data line DL2.

(W), a red subpixel (R), a green subpixel (G), and a blue subpixel (G) over four lines in the horizontal direction and four lines in the vertical direction in the same manner as the above- The subpixel B is arranged.

Specifically, in the (N + 2) th horizontal line, the white subpixel W, the red subpixel R, the green subpixel G, and the blue subpixel B are serially Pixels are arranged. In the (N + 3) th horizontal line, a green subpixel G, a blue subpixel B, a white subpixel W and a red subpixel R are provided in the same order as the (N + Pixel. In other words, the (N + 2) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line and the (N + 3) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line.

According to the above structure, the subpixels positioned on the liquid crystal panel have a form in which the first subgroup LRC and the second subgroup ULC alternate with respect to a pair of gate lines. In the first subgroup LRC, the portions forming the up-and-down diagonal direction from the left to the right and the portions forming the up-and-down diagonal direction from the right to the left are alternated.

The data lines have regions where the arrangement intervals of at least three data lines are regularly different. The data lines have a portion spaced apart so that three subpixels are included between the two data lines and a portion spaced apart so that one subpixel is included between the two data lines.

Specifically, three subpixels are included between the first data line DL1 and the second data line DL2. On the other hand, one subpixel is included between the second data line DL2 and the third data line DL3. The reason why the disposition intervals of the data lines are different is to disperse the polarity of the data voltage up / down / left / right instead of being focused on a specific area. That is, if the arrangement interval is different, the polarity of the data voltage can be physically and structurally dispersed.

On the other hand, the switching transistor TFT of each subpixel is connected to the data line located on the left or right side through the first electrode (drain electrode). Therefore, the switching transistor (TFT) of each subpixel has a first electrode connected to a data line adjacent to itself, or a first electrode connected to a data line located at a sub-pixel away from the first electrode, As shown in FIG.

The gate lines are arranged such that two gate lines are paired and connected alternately to the upper sub-pixel and the lower sub-pixel.

Specifically, the second and third gate lines GL2 and GL3 are arranged in pairs on the second horizontal line (the second and third scanning lines). The second gate line GL2 provides a gate signal to the upper sub-pixel G and the third gate line GL3 alternates up and down to provide a gate signal to the lower sub- And is connected to the gate electrode. However, in the second embodiment, the illustration of the dummy gate line is omitted. Thus, it should be understood that not only the first gate line GL1 but also the dummy gate line may be located in the first horizontal line.

(+ +, -, + +, - or -, +, -, +) in which the same polarity is applied twice consecutively and then the other polarity is once applied to the liquid crystal panel implemented according to the third embodiment, ), It is possible to solve the problem of the increase of the power consumption and the problem of the heating issue of the data driving part to some extent.

The reason is that the data lines are arranged in three lines and one line along the vertical direction, the gate lines are arranged in pairs in the horizontal direction, and the switching transistors (TFT) of the sub pixels are arranged in the vertical diagonal direction and the vertical direction Because.

In addition, the data voltage is supplied in a column-type version mode, but the polarity is charged in a dot-inversion form on the liquid crystal panel through the above structure. FIG. 13 is a view showing a filling pattern except a portion corresponding to the dummy sub-pixel (DSP) of FIG. In FIG. 13, the actual drawing drawn in the liquid crystal panel 160 shows the order in which the charging is performed as the negative data voltage (-) is supplied. Referring to this charging sequence and the structure described above, the charging sequence of the positive polarity data voltage (+) will also be known.

On the other hand, in the third embodiment, the switching transistors (TFTs) of the subpixels are arranged in the up and down diagonal direction and the up and down direction, and the colors of the subpixels are arranged so as not to represent the same color. As a result, the third embodiment is able to eliminate (prevent) polarity clustering as in the first embodiment and the possibility of resolution degradation as in the second embodiment. That is, the third embodiment can be defined as an optimized structure so as to solve the problems that may occur in the first and second embodiments.

In addition, as can be seen from a comparison between the screen of FIG. 4 and the screen of FIG. 14, the third embodiment widens the interval at which the vertical stripes continuously appear on the liquid crystal panel 160, It can be said that the problem can be further alleviated (improved).

As described above, the present invention can reduce heat generation and power consumption of a data driving unit and prevent and disperse a specific polarity of a lump (charging deviation - about a charging area) on the liquid crystal panel when a large or high resolution liquid crystal display device is implemented It is possible to improve the picture quality deficiency (also referred to as defective doridor).

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

130: a timing controller 140, 145: a gate driver
150: data driver 160: liquid crystal panel
170, 180: Backlight unit TFT: Switching transistor
SPw: white subpixel SPr: red subpixel
SPg: green subpixel SPb: blue subpixel

Claims (8)

A pair of gate lines arranged in a pair,
And a liquid crystal panel having data lines with different arrangement intervals of at least two data lines,
And the switching transistors of the subpixels arranged in the upper and lower diagonal directions are commonly connected to one data line.
The method according to claim 1,
The data lines
The liquid crystal display device is arranged so as to have a portion spaced apart so that three subpixels are included between two data lines and a portion spaced apart so as to include one subpixel between two data lines.
3. The method of claim 2,
The switching transistors of the sub-
Wherein a first electrode is connected to a data line adjacent to the first data line, or a first electrode is connected to a data line located a sub-pixel away from the first data line.
The method according to claim 1,
The liquid crystal panel
Subpixels are arranged in order of a white subpixel, a red subpixel, a green subpixel, and a blue subpixel in the Nth horizontal line,
The green subpixel, the blue subpixel, the white subpixel, and the red subpixel in the (N + 1) th horizontal line in the subpixel,
The (N + 2) th horizontal line has the same color arrangement structure as the Nth horizontal line, and the (N + 3) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line.
The method according to claim 1,
The liquid crystal panel
Subpixels are arranged in order of a white subpixel, a red subpixel, a green subpixel, and a blue subpixel in the Nth horizontal line,
The green subpixel, the blue subpixel, the white subpixel, and the red subpixel in the (N + 1) th horizontal line in the subpixel,
The (N + 2) th horizontal line has the same color arrangement structure as the (N + 1) th horizontal line, and the (N + 3) th horizontal line has the same color arrangement structure as the Nth horizontal line.
The method according to claim 1,
The liquid crystal panel
A first sub group in which the switching transistors of the sub pixels arranged in the upper and lower diagonal directions are connected to the one data line and a second sub group in which the switching transistors of the sub pixels arranged in the up and down direction are connected to the one data line Pixel sub-pixel group.
The method according to claim 6,
The first and second subgroups
A liquid crystal display device arranged alternately with respect to a pair of gate lines.
8. The method of claim 7,
The first sub-
Wherein a portion forming a vertical diagonal direction from the left to right and a portion forming a vertical diagonal direction from the right to the left are alternated.
KR1020150116734A 2015-08-19 2015-08-19 Liquid Crystal Display Device KR20170023250A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190012510A (en) * 2017-07-27 2019-02-11 엘지디스플레이 주식회사 Display Device and Driving Method thereof
KR20190063232A (en) * 2017-11-29 2019-06-07 엘지디스플레이 주식회사 Head mount display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190012510A (en) * 2017-07-27 2019-02-11 엘지디스플레이 주식회사 Display Device and Driving Method thereof
KR20190063232A (en) * 2017-11-29 2019-06-07 엘지디스플레이 주식회사 Head mount display device

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