KR20160149067A - Solar cell module - Google Patents

Abstract

The present invention relates to a solar cell module. According to an embodiment of the present invention, the solar cell module includes: a plurality of solar cells including a semiconductor substrate, an emitter part placed on the front side of the semiconductor substrate and forming p-n junction with the semiconductor substrate, a first electrode connected with the emitter part, and a second electrode connected with the rear surface of the semiconductor substrate; a plurality of interconnectors connected to the first or second electrode to electrically connect the solar cells with each other; and a conductive pad placed in a part, in which the first or second electrode is intersected with the interconnectors, and connected with the interconnectors. The first electrode includes: a first electrode layer placed on the semiconductor substrate; and a second electrode placed on the first electrode layer, and formed with a different material from the first electrode layer. Therefore, the present invention is capable of reducing manufacturing costs.

Description

Solar cell module {SOLAR CELL MODULE}

The present invention relates to a solar cell module.

A typical solar cell has a substrate made of different conductivity type semiconductors, such as p-type and n-type, an emitter, and an electrode connected to the substrate and the emitter, respectively. At this time, a p-n junction is formed at the interface between the substrate and the emitter.

The solar cell using the semiconductor substrate can be divided into various types such as a conventional type and a rear type depending on the structure.

In the conventional type, the emitter portion is located on the front surface of the substrate, the electrode connected to the emitter portion is disposed on the front surface of the substrate, the electrode connected to the substrate is positioned on the rear surface of the substrate, And all of the electrodes are located on the rear surface of the substrate.

Since the electrodes of the rear contact type solar cell are all formed on the rear surface of the substrate, the electrodes formed on the rear surface of the substrate are connected in series to the electrodes of the adjacent solar cells via the interconnector or another conductive metal to form the solar cell module .

SUMMARY OF THE INVENTION It is an object of the present invention to provide a solar cell module with improved photoelectric conversion efficiency.

A solar cell module according to an exemplary embodiment of the present invention includes a semiconductor substrate, a first electrode connected to the emitter portion and a second electrode connected to the rear surface of the semiconductor substrate, the emitter portion forming a pn junction with the semiconductor substrate, A plurality of solar cells; A plurality of interconnectors connected to the first electrode or the second electrode to electrically connect the plurality of solar cells to each other in series; And a conductive pad partially located at a portion where the first electrode or the second electrode and the plurality of inter-connectors intersect with and connected to the plurality of inter-connectors.

At this time, the first electrode may include a first electrode layer located on the semiconductor substrate and containing silver (Ag), and a second electrode layer located on the first electrode layer and containing copper (Cu).

The ratio of the content of the first electrode layer containing silver (Ag) to the content of the second electrode layer containing copper (Cu) is preferably 1: 4.

According to this aspect, in the multi-wire bus bar (MWB) structure, the first electrode or the second electrode provided in one solar cell is formed into a double electrode structure having a ratio of 1: 4 (Ag: Cu) The manufacturing cost can be further reduced without decreasing the adhesion force in the solar cell module.

1 is a view for explaining an example of a solar cell module according to the present invention.
FIG. 2A is a cross-sectional view taken along the line A1-A1 in FIG. 1. FIG.
2B is a cross-sectional view taken along line A2-A2 in FIG.
3A is a partial perspective view for explaining an example of a solar cell applied to the solar cell module shown in FIG.
FIG. 3B is a cross-sectional view taken along the line A3-A3 in FIG. 3A.
FIGS. 4A and 4B sequentially illustrate the method of manufacturing the solar cell shown in FIG. 1. FIG.
FIGS. 5A and 5B sequentially illustrate a manufacturing method for explaining another example of the solar cell shown in FIG. 1. FIG.
FIG. 6A is a view for explaining an example of a solar cell applied to the solar cell module shown in FIG. 1; FIG.
6B is a cross-sectional view taken along line B1-B1 in FIG. 6A.
7A to 7C are views for explaining an example of a solar cell applied to the solar cell module shown in FIG.
8 is a graph showing the resistance of the interconnector and the output value of the solar cell module according to the number of the interconnectors shown in FIG.
9 is a graph comparing the FF of the solar cell module with the comparative example according to the resistance of the interconnector (IC) shown in FIG.
10 is a graph showing the content of a material of the double electrode structure with respect to the FF reduction limit resistance of the solar cell module shown in FIG.
FIGS. 11 and 12 are views for explaining another example of a solar cell applicable to the solar cell module according to the present invention shown in FIG.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. When a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case directly above another portion but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle. Further, when a certain portion is formed entirely on the other portion, it means that it is formed not only on the entire surface of the other portion but also on the edge portion.

Hereinafter, the front surface may be one surface of the semiconductor substrate to which the direct light is incident, and the rear surface may be the opposite surface of the semiconductor substrate in which direct light is not incident, or reflected light other than direct light may be incident.

In the following description, the meaning of two different components having the same length or width means that they are equal to each other within an error range of 10%.

Hereinafter, a solar cell module according to an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a view for explaining an example of a solar cell module according to the present invention. FIG. 2 (a) is a sectional view taken along the line A1-A1 in FIG. 1, Fig. 3A is a partial perspective view for explaining an example of a solar cell applied to the solar cell module shown in FIG. 1, and FIG. 3B is a cross-sectional view taken along the line A3-A3 in FIG. 3A.

1 to 2B, the solar cell module according to the present invention includes a plurality of solar cells C1 and C2 and a plurality of interconnectors (IC) connected to the respective solar cells C1 and C2 can do. That is, a plurality of interconnectors (IC) can connect solar cells C1 and C2 adjacent to each other in series.

3A and 3B, an example of a solar cell applied to the solar cell module according to the present invention includes a semiconductor substrate 110, an emitter section 120, an antireflection film 130, a plurality of first Electrode 140a, a back surface field (BSF) 172, a second electrode 150, and a plurality of conductive pads 160.

Here, although the rear electric section 172 may be omitted, since the efficiency of the solar cell is further improved when the rear electric section 172 is provided, the following description will be made with reference to an example in which the rear electric section 172 is included.

The semiconductor substrate 110 may have a first conductivity type, for example, a p-type conductivity type. The semiconductor substrate 110 may be formed of any one of single crystal silicon, polycrystalline silicon, and amorphous silicon. In one example, the semiconductor substrate 110 may be formed of a crystalline silicon wafer.

When the semiconductor substrate 110 has a p-type conductivity type, impurity of a trivalent element such as boron (B), gallium, indium, or the like is doped in the semiconductor substrate 110. Alternatively, however, the semiconductor substrate 110 may be of the n-type conductivity type. Impurities of pentavalent elements such as phosphorus (P), arsenic (As), and antimony (Sb) may be doped into the semiconductor substrate 110 when the semiconductor substrate 110 has an n-type conductivity type.

The front surface of the semiconductor substrate 110 has a plurality of uneven surfaces. 3A and 3B, only the edge portion of the semiconductor substrate 110 is shown as an uneven surface, and the emitter portion 120 located thereon also shows only the edge portion thereof as an uneven surface. However, the entire front surface of the semiconductor substrate 110 substantially has an irregular surface, and thus the emitter section 120 located on the front surface of the semiconductor substrate 110 also has an uneven surface.

The light incident on the front surface of the semiconductor substrate 110 having a plurality of projections and depressions is reflected by the semiconductor substrate 110 while a plurality of reflection operations occur by the plurality of projections and depressions formed on the surface of the emitter section 120 and the semiconductor substrate 110, . As a result, the amount of light reflected from the front surface of the semiconductor substrate 110 decreases, and the amount of light incident into the semiconductor substrate 110 increases. In addition, due to the uneven surface, the surface area of the semiconductor substrate 110 and the emitter section 120 on which light is incident increases, and the amount of light incident on the semiconductor substrate 110 also increases.

As shown in FIGS. 3A and 3B, the emitter section 120 is formed on the entire surface of the semiconductor substrate 110 of the first conductivity type, which is the incident surface, and is of a second conductivity type opposite to the first conductivity type, an n-type conductive type impurity is doped in the semiconductor substrate 110 and may be located on the surface where the light is incident, that is, inside the front surface of the semiconductor substrate 110. Thus, the emitter portion 120 of the second conductivity type forms a p-n junction with the first conductive type portion of the semiconductor substrate 110.

Light incident on the semiconductor substrate 110 is separated into electrons and holes, so that the electrons move toward the n-type and the holes move toward the p-type. Therefore, when the semiconductor substrate 110 is p-type and the emitter section 120 is n-type, the separated holes move toward the back surface of the semiconductor substrate 110, and the separated electrons can move toward the emitter section 120.

Since the emitter 120 forms a pn junction with the first conductive portion of the semiconductor substrate 110, that is, the first conductive portion of the semiconductor substrate 110, unlike the present embodiment, the semiconductor substrate 110 has the n- The emitter section 120 may have a p-type conductivity type. In this case, the separated electrons may move toward the back surface of the semiconductor substrate 110, and the separated holes may move toward the emitter section 120.

When the emitter section 120 has an n-type conductivity type, the emitter section 120 may be formed by doping an impurity of a pentavalent element into the semiconductor substrate 110. Conversely, when the emitter section 120 has a p-type conductivity type, And may be formed by doping an impurity of a trivalent element into the semiconductor substrate 110.

3A and 3B, when the emitter layer 120 is located on the incident surface of the semiconductor substrate 110, the antireflection layer 130 is disposed on the incident surface of the semiconductor substrate 110, The barrier layer 130 may be located on the emitter layer 120.

The antireflection film 130 may include a hydrogenated silicon nitride film (SiNx: H), a hydrogenated silicon oxide film (SiOx: H), a hydrogenated silicon nitride oxide film (SiNxOy: H), and a hydrogenated amorphous silicon ). ≪ / RTI >

The antireflection film 130 may have a defect such as a dangling bond mainly present on the surface and the vicinity of the semiconductor substrate 110 due to the hydrogen H contained in the antireflection film 130. [ To pass through a passivation function that reduces the disappearance of the charges moving toward the surface of the semiconductor substrate 110 due to the defects. Therefore, the amount of charges lost at or near the surface of the semiconductor substrate 110 due to a defect is reduced.

When the semiconductor substrate 110 has the irregular surface, the antireflection film 130 has the irregular surface having a plurality of irregularities similar to the semiconductor substrate 110.

Since the defects are mainly present on or near the surface of the semiconductor substrate 110 in general, the passivation function is further improved if the antireflection film 130 is in direct contact with the surface of the semiconductor substrate 110 as in the case of the embodiment.

The antireflection film 130 may be formed of a hydrogenated silicon nitride film (SiNx: H), a hydrogenated silicon oxide film (SiOx: H), a hydrogenated silicon nitride oxide film (SiNxOy: H), a hydrogenated silicon oxynitride film : H), and hydrogenated amorphous silicon (a-Si: H) may be formed of a plurality of layers.

For example, the antireflection film 130 may be formed of a hydrogenated silicon nitride film (SiNx: H) in two layers.

By doing so, the passivation function of the antireflection film 130 can be further enhanced, and the photoelectric efficiency of the solar cell can be further improved.

3A and 3B, the plurality of first electrodes 140a are disposed on the front surface of the semiconductor substrate 110 and are spaced apart from each other on the front surface of the semiconductor substrate 110, x). < / RTI >

As described above, the electrode spaced apart from the front surface of the semiconductor substrate 110 and extending in the first direction (x) may be referred to as a front finger.

At this time, the plurality of first electrodes 140a may be connected to the emitter part 120 through the anti-reflection film 130. [

Accordingly, the plurality of first electrodes 140a may be formed of at least one conductive material, such as silver (Ag), to collect electrons, for example electrons, moving toward the emitter section 120. [

The first electrode 140a has a double electrode structure and includes a first electrode layer 142a extending in the first direction x and a second electrode layer 144a located on the first electrode layer 142a can do.

The first electrode layer 142a may be made of at least one conductive material such as silver (Ag).

The second electrode layer 144a may be formed of at least one conductive material selected from the group consisting of copper (Cu), aluminum (Al), and combinations thereof.

As the thickness of the first electrode layer 142a containing silver (Ag) is thinner than the thickness of the second electrode layer 144a containing copper (Cu), the material cost is reduced and the efficiency of the solar cell can be increased.

However, when the content of silver (Ag) contained in the first electrode layer 142a and the content of copper (Cu) contained in the second electrode layer 144a exceed 1: 4 ratio, FF (Fill Factor) The efficiency of the solar cell module can be reduced.

Therefore, it is preferable that the content of silver (Ag) contained in the first electrode layer 142a and the content of copper (Cu) contained in the second electrode layer 144a are maximum 1: 4. Accordingly, the thickness T1 of the first electrode layer 142a may be about 1-5 占 퐉, and the thickness T2 of the second electrode layer 144a may be about 5-20 占 퐉.

 In the present embodiment, when the content of silver (Ag) contained in the first electrode layer 142a and the content of copper (Cu) contained in the second electrode layer 144a are 1: 4, the thickness of the first electrode layer 142a It is preferable that the thickness T1 of the second electrode layer 144a is 5 占 퐉 and the thickness T2 of the second electrode layer 144a is 20 占 퐉.

As described above, when the content of silver (Ag) contained in the first electrode layer 142a and the content of copper (Cu) contained in the second electrode layer 144a are 1: 4, And the emitter portion 121 can be maintained. Accordingly, the manufacturing cost of the plurality of solar cells C1 and C2 can be reduced, thereby improving the efficiency of the solar cell module.

Meanwhile, the solar cell according to the present invention may not include a bus bar electrode formed to be long in a second direction (y) intersecting the first direction (x) so that the first electrodes 140a are connected in common.

In general, a bus bar electrode is connected to an interconnector (IC) which connects a plurality of solar cells (C1, C2) to each other. In a solar cell according to the present invention, May be directly connected to each of the first electrodes 140a described above.

The first electrode 140a may be formed by a screen printing method, and the thickness T3 may be about 20-30 mu m. The number of the first electrodes 140a may be equal to the number of the interconnection ICs, that is, 12 or more.

3A and 3B, the rear electric section 172 may be positioned on the rear surface opposite to the front surface of the semiconductor substrate 110, and impurities of the same conductivity type as that of the semiconductor substrate 110 may be formed on the semiconductor substrate 110), for example, a P + region.

A potential barrier is formed due to a difference in impurity concentration between the first conductive region and the rear conductive portion 172 of the semiconductor substrate 110, thereby preventing electron migration toward the rear electric field 172, On the other hand, hole transport to the rear electric field 172 is facilitated. Therefore, it is possible to reduce the amount of charge lost due to the recombination of electrons and holes at the back surface and the vicinity of the semiconductor substrate 110 and to accelerate the movement of a desired charge (e.g., a hole) .

As shown in FIGS. 3A and 3B, the second electrode 150 may include a rear electrode layer 151 and a plurality of rear bus bars 152. The rear electrode layer 151 is in contact with the rear electric field portion 172 located on the rear surface of the semiconductor substrate 110 and substantially in contact with the rear surface electrode portion 151 except for the rear edge of the semiconductor substrate 110 and the portion where the rear bus bar 152 is located And may be located on the entire rear surface of the semiconductor substrate 110.

The rear electrode layer 151 contains a conductive material such as aluminum (Al).

This rear electrode layer 151 collects charge, for example, holes, moving from the rear electric field 172 side.

The rear electrode layer 151 and the rear electrode layer 151 are in contact with the rear electric field portion 172 which maintains the impurity concentration higher than that of the semiconductor substrate 110. In this case, The charge transfer efficiency from the semiconductor substrate 110 to the rear electrode layer 151 is improved.

The plurality of rear bus bars 152 are located on the rear surface of the semiconductor substrate 110 where the rear electrode layer 151 is not located and are connected to the adjacent rear electrode layer 151.

The plurality of rear bus bars 152 may collect the electric charges transferred from the rear electrode layer 151.

The plurality of rear bus bars 152 are connected to an interconnection IC so that the charges collected by the plurality of rear bus bars 152 are transmitted to other adjacent solar cells via the interconnector IC .

These plurality of rear bus bars 152 may be made of a material having a better conductivity than the back electrode layer 151 and may contain at least one conductive material such as, for example, silver (Ag).

Each of the plurality of rear bus bars 152 may be connected to each of the interconnectors (IC).

3A and 3B, the plurality of conductive pads 160 may be located on the front surface of the semiconductor substrate 110 and may be located at a portion where the first electrode 140a and the inter connector IC intersect with each other have.

As described above, the plurality of conductive pads 160 extend in the first direction x and have a rectangular shape, but are not limited thereto, and may have an elliptical shape, a circular shape, or a polygonal shape.

At this time, the number and size of the plurality of conductive pads 160 may vary depending on the shapes of the plurality of first electrodes 140a and the plurality of interconnectors (IC). For example, the plurality of conductive pads 160 may be formed to extend in the longitudinal direction of the interconnector IC, that is, in the second direction y, and wider than the width of the first electrode 140a. However, the plurality of conductive pads 160 may be formed to be equal to or smaller than the width of the front electrode 141.

The width of the plurality of conductive pads 160 in the first direction x may be equal to or greater than the sum of the widths of the first electrode 140a and the interconnector IC.

In this embodiment, the plurality of conductive pads 160 are formed by screen printing, and the thickness T1 may be formed to be equal to the thickness T1 of the first electrode layer 142a of the first electrode 140a . However, the present invention is not limited thereto, and the plurality of conductive pads 160 may be thicker than the first electrode layer 142a.

The plurality of conductive pads 160 may be formed of the same material as the first electrode layer 142a of the first electrode 140a and may contain at least one conductive material such as silver have.

However, the present invention is not limited thereto. The plurality of conductive pads 160 may be formed of the same material as the second electrode layer 144a of the first electrode 140a. For example, at least one And may contain a conductive material.

When the plurality of conductive pads 160 are made of copper (Cu), the material cost can be further reduced. Therefore, by reducing the material cost without reducing the adhesion with the semiconductor substrate 110, the efficiency of the solar cell can be further increased.

The operation of the solar cell according to this embodiment having such a structure is as follows.

When light is irradiated by a solar cell and enters the emitter section 120, which is a semiconductor part, through the emitter section 120 and the semiconductor substrate 110, electron-hole pairs are generated in the semiconductor section due to light energy. At this time, the reflection loss of light incident on the semiconductor substrate 110 is reduced by the concave-convex surface of the semiconductor substrate 110 and the emitter portion 120, so that the amount of light incident on the semiconductor substrate 110 increases.

These electron-hole pairs are separated from each other by the pn junction of the semiconductor substrate 110 and the emitter section 120, and the electrons and the holes are separated from each other by, for example, the emitter section 120 having the n-type conductivity type and the p- To the semiconductor substrate 110 having the conductive type. Electrons migrated toward the emitter section 120 are collected by the plurality of first electrodes 140 and transferred to the interconnection IC and the holes migrated toward the semiconductor substrate 110 pass through the adjacent rear electrode layer 151 Are collected by a plurality of rear bus bars 152 and transferred to the interconnector (IC). The first electrode 140 may have a double electrode structure including a first electrode layer 142a containing silver and a second electrode layer 144a containing copper. The manufacturing cost can be reduced without decreasing the adhesive force with the adhesive.

FIGS. 4A and 4B sequentially illustrate the manufacturing method of the solar cell shown in FIG. 1, and FIGS. 5A and 5B sequentially illustrate a manufacturing method for explaining another example of the solar cell shown in FIG. It is a degree.

The manufacturing method of the solar cell shown in Figs. 3A and 3B will be described with reference to Figs. 4A and 4B.

First, a material containing an impurity of a pentavalent element such as phosphorus (P), arsenic (As), antimony (Sb) or the like, for example, POCl ₃ or H ₃ PO _{4 is added} to the p- Impurities of the pentavalent element are diffused into the semiconductor substrate 110 to form the n-type emitter section 120 on the entire surface of the semiconductor substrate 110, that is, the front surface, the rear surface, and the side surface.

When the conductive type of the semiconductor substrate 110 is n-type, unlike the present embodiment, a material including an impurity of a trivalent element, for example, B ₂ H ₆ , is heat-treated at a high temperature, a p-type emitter portion can be formed. Then, a phosphorus silicate glass (PSG) or a boron silicate glass (BSG) containing phosphorus, which is generated as the n-type impurity or the p-type impurity diffuses into the semiconductor substrate 110, Process.

At this time, the front surface and the rear surface of the semiconductor substrate 110 are formed with a textured surface on both surfaces of the semiconductor substrate 110 using a wet etching process or a dry etching process using plasma. Accordingly, the emitter section 120 is affected by the textured surface shape of the semiconductor substrate 110 and has an uneven surface.

Next, an antireflection film 130 made of a silicon nitride film (SiNx) is formed on the entire surface of the semiconductor substrate 110 by using various film forming methods such as a plasma enhanced chemical vapor deposition (PECVD) method.

The refractive index of the antireflection film 130 may have a refractive index between the refractive index of air and the refractive index (e.g., about 3.5) of the semiconductor substrate 110 containing silicon, for example, a refractive index of about 1.9 to 2.3. Accordingly, since the refractive index changes from the air to the semiconductor substrate 110 sequentially, the anti-reflection effect of the anti-reflection film 130 is improved.

Next, as shown in FIG. 4A, a paste containing silver (Ag) is printed on the entire surface of the semiconductor substrate 110 by a first screen printing method, To 200? To form the first electrode layer pattern 42a and the conductive pad pattern 60 at the same time. Accordingly, the first electrode layer 142a and the conductive pad 160 are formed on the entire surface of the semiconductor substrate 110 at the same time.

At this time, the first electrode layer pattern 42a has a shape extending in the first direction (x), and is formed in a plurality of spaced apart from each other. For example, the thickness T1 of the first electrode layer pattern 42a may be about 1-5 mu m. In this embodiment, the thickness T1 of the first electrode layer pattern 42a may be 5 占 퐉.

The conductive pad pattern 60 has a rectangular shape extending in the first direction x and is partially formed at a portion where the first electrode layer pattern 42a and the interconnector IC cross each other.

The number and size of the conductive pad patterns 60 may vary depending on the size and shape of the first electrode layer pattern 42a and the interconnector IC. For example, the conductive pad pattern 60 may be formed to extend in the longitudinal direction of the interconnection IC, that is, in the second direction y and wider than the width of the first electrode layer pattern 42a, Or may be smaller than the width of the first electrode layer pattern 42a. For example, the thickness T1 of the conductive pad pattern 60 may be 1-10 占 퐉. In this embodiment, the thickness T1 of the conductive pad pattern 60 may be 5 占 퐉.

When the first electrode layer pattern 42a and the conductive pad pattern 60 are formed of silver (Ag) paste using a screen printing method, the contact resistance with the semiconductor substrate 110 is reduced to improve the photoelectric conversion characteristics .

Next, as shown in FIG. 4B, a paste containing copper (Cu) is printed on the entire surface of the semiconductor substrate 110 by a second screen printing method, and then dried at about 120 ° C. to 200 ° C. to form a second electrode layer pattern (44a). Accordingly, the second electrode layer 144a is formed on the entire surface of the semiconductor substrate 110. [

At this time, the second electrode layer pattern 44a has a shape extending in a first direction (x), and a second electrode layer pattern 44a is formed on the first electrode layer pattern 42a formed through the first screen printing method . The second electrode layer pattern 44a may be formed in the same manner as the first electrode layer pattern 42a. For example, the thickness T2 of the second electrode layer pattern 44a may be about 5-25 占 퐉. In this embodiment, the thickness T2 of the second electrode layer pattern 44a may be 20 占 퐉.

As described above, when the second electrode layer pattern 44a is formed of a paste containing copper (Cu) by a screen printing method, it is confirmed that the material cost is reduced as compared with the first electrode formed only of paste containing silver (Ag) .

Thus, the manufacturing cost for the plurality of solar cells C1 and C2 can be reduced without decreasing the adhesive force with the semiconductor substrate 110. [

Next, the rear electrode part 172 and the second electrode 150 are formed on the rear surface of the semiconductor substrate 110 to complete the solar cell (see FIG. 3A).

At this time, the second electrode 150 may be formed by applying a paste for the rear electrode to the rear surface of the semiconductor substrate 110 by using a screen printing method and then sintering. Otherwise, the second electrode 150 may be formed by physical plating such as plating, sputtering, (PVD), chemical vapor deposition (CVD), or the like.

Alternatively, as shown in FIG. 5A, a paste containing silver (Ag) is printed on the entire surface of the semiconductor substrate 110 by a first screen printing method, To 200? To form the first electrode layer pattern 42a. Accordingly, the first electrode layer 142a is formed on the entire surface of the semiconductor substrate 110.

At this time, the first electrode layer pattern 42a has a shape extending in the first direction (x), and is formed in a plurality of spaced apart from each other. For example, the thickness T1 of the first electrode layer pattern 42a may be about 1-5 mu m. In this embodiment, the thickness T1 of the first electrode layer pattern 42a may be 5 占 퐉.

When the first electrode layer pattern 42a is formed of silver (Ag) paste by screen printing, the contact resistance with the semiconductor substrate 110 is reduced and the photoelectric conversion characteristics can be improved.

5B, a paste containing copper (Cu) is printed on the entire surface of the semiconductor substrate 110 by a second screen printing method, and then dried at about 120 DEG C to 200 DEG C to form a second electrode layer pattern (44a) and the conductive pad pattern (60) are simultaneously formed. Accordingly, the second electrode layer 144a and the conductive pad 160 are formed on the entire surface of the semiconductor substrate 110 at the same time.

At this time, the second electrode layer pattern 44a has a shape extending in a first direction (x), and a second electrode layer pattern 44a is formed on the first electrode layer pattern 42a formed through the first screen printing method . The second electrode layer pattern 44a may be formed in the same manner as the first electrode layer pattern 42a. For example, the thickness T2 of the second electrode layer pattern 44a may be about 5-25 占 퐉. In this embodiment, the thickness T2 of the second electrode layer pattern 44a may be 20 占 퐉.

The conductive pad pattern 60 has a rectangular shape extending in the first direction x and is partially formed at a portion where the first electrode layer pattern 42a and the interconnector IC cross each other. For example, the thickness T1 of the conductive pad pattern 60 may be about 1-10 占 퐉. In this embodiment, the thickness T1 of the conductive pad pattern 60 may be 5 占 퐉.

The number and size of the conductive pad patterns 60 may vary depending on the size and shape of the first electrode layer pattern 42a and the interconnector IC. For example, the conductive pad pattern 60 may be formed to extend in the longitudinal direction of the interconnection IC, that is, in the second direction y and wider than the width of the first electrode layer pattern 42a, Or may be smaller than the width of the first electrode layer pattern 42a.

The width of the conductive pad pattern 60 may be equal to or greater than the sum of the widths of the guide support pattern 80 and the interconnector IC.

When the second electrode layer pattern 44a and the conductive pad pattern 60 are formed into a paste containing copper (Cu) by the screen printing method as described above, the material cost is higher than when using the paste containing silver (Ag) It can be confirmed that further reduction is achieved.

Thus, the manufacturing cost for the plurality of solar cells C1 and C2 can be reduced without decreasing the adhesive force with the semiconductor substrate 110. [

On the other hand, as shown in Fig. 1, the solar cell module includes an interconnector (not shown) for connecting a plurality of solar cells including the first solar cell C1 and the second solar cell C2 and a plurality of solar cells in series IC). Here, each of the plurality of solar cells includes the above-described solar cells C1 and C2.

The interconnection IC includes a plurality of solar cells including the first and second solar cells C1 and C2 electrically connected in series and the first electrode 140 or the second electrode 150 of each solar cell, The cell electrodes 140 and 150 may be connected to each other.

In more detail, in the solar cell module according to the present invention, a plurality of interconnectors (IC) are arranged on the conductive pad 160 in the second direction y to form the first electrode 140 and the second electrode 140 of the first solar cell, The second electrodes 150 of the solar cell can be connected to each other in series.

At this time, the plurality of interconnectors (IC) according to the present invention may have a wire form. 2A and 2B, each of the plurality of interconnectors (IC) has a circular cross section. However, the cross-section of each of the plurality of interconnectors (IC) may include any one of an ellipse, a semicircle, a rectangle, or a trapezoid can do.

Accordingly, the light incident from the outside is reflected by the inclined surface of the interconnection IC and is incident on the semiconductor substrate 110, is reflected again on the transparent substrate located on the front surfaces of the plurality of solar cells C1 and C2, (110), thereby maximizing the amount of light incident on the solar cell.

In such a plurality of interconnectors (ICs), a solder paste or conductive metal particles containing a metal material such as tin (Sn) is contained in the insulating resin to the first electrode 140 or the second electrode 150 of the solar cell A conductive material such as a conductive paste or a conductive adhesive film or the like may be used.

Meanwhile, in the solar cell module of the present invention, the number of the plurality of interconnectors (IC) may be about 10 to 12.

That is, considering the resistance of a plurality of interconnectors (IC), the shading area covered by a plurality of interconnectors (IC), the FF of the solar cell module, and the output of the solar cell, In each of the plurality of solar cells C1 and C2, the number of the plurality of interconnectors (IC) connected to the first electrode 140 or the second electrode 150 provided in one solar cell is 10 to 12 Lt; / RTI >

On the other hand, the output values shown in the graphs of FIGS. 8 to 10 are illustrative and not absolute values, and are assumed to vary depending on the configuration of each solar cell, the number of solar cells applied to the module, and other conditions.

8 is a graph showing the resistance of the interconnector (IC) and the output value of the solar cell module according to the number of the interconnectors (IC) shown in FIG.

Referring to FIG. 8, it can be seen that as the number of interconnectors (ICs) increases, the resistance of the interconnector (IC) decreases and the output of the solar cell module increases.

Specifically, when the number of inter-connectors (ICs) increases, the resistance by the inter-connector (IC) decreases but the shading area blocked by the inter-connector (IC) increases to affect the output of the solar cell . That is, when the number of interconnectors (ICs) increases by 12 or more, it is confirmed that the resistance of the interconnector (IC) decreases and the output value of the solar cell module decreases.

This is because the resistance decreases as the number of interconnectors (ICs) increases, and when the output of the solar cell module decreases to a certain level or less, the output of the solar cell module reaches the maximum value of the output possible by each solar cell Can be interpreted.

In addition, when the number of the interconnection ICs decreases, it is confirmed that the resistance of the interconnector IC increases but the shading area is relatively decreased, which affects the output of the solar cell.

Accordingly, it can be seen that when the number of interconnectors (IC) is 10 to 12, the solar cell module has an optimum efficiency interval (AA).

9 is a graph comparing the FF of the solar cell module with the comparative example according to the resistance of the interconnector (IC) shown in FIG.

Here, the number of the interconnectors (IC) according to the present invention is 12, and the case where the number of the interconnectors (IC) according to the comparative example is four is set as an example.

9, when the resistance Rs of the interconnector IC is 0.95 ohm / cm, the FF is reduced by 0.1%, and the resistance Rs of the interconnector IC ) Is 2.0 ohm / cm, the FF is decreased by 0.4%.

That is, the FF of the comparative example continues to decrease as the resistance Rs increases, but the FF of the present invention decreases by 0.1% when the resistance Rs of the interconnector (IC) is 0.95 ohm / cm .

Accordingly, when the number of the interconnection ICs is 12, the resistance Rs of the interconnection IC decreases by 0.95 ohm / cm. Therefore, when the number of the interconnection ICs is 12, It is preferable that the resistance Rs does not exceed 0.95 ohm / cm so that the solar cell efficiency does not decrease.

10 is a graph showing the content of a material of the double electrode structure with respect to the FF reduction limit resistance of the solar cell module shown in FIG. 9, when the resistance Rs of the interconnector IC is 0.95 ohm / cm, the FF reduction limit resistance value Rs is 0.1% reduced when the number of the interconnection ICs is 12. In this case, Therefore, it is preferable that the maximum value is 0.95 ohm / cm so as not to decrease the FF.

The material cost is reduced as the thickness of the first electrode layer 142a containing silver (Ag) is thinner than the thickness of the second electrode layer 144a containing copper (Cu) Can be increased.

10, when the number of interconnection ICs is 12, when the resistance Rs of the interconnector IC does not exceed 0.95 ohm / cm, silver (Ag) contained in the first electrode layer 142a, And the content of copper (Cu) contained in the second electrode layer 144a have a maximum ratio of 1: 4. That is, the content of silver (Ag) and the content of copper (Cu) may be in the range of 1: 0.25 to 4. In the present embodiment, the content of silver (Ag) and the content of copper (Cu) are preferably 1: 4.

Accordingly, the material cost of the first electrode 140a can be reduced without decreasing the FF of the solar cell module.

6A to 7C, another example of the double electrode structure applicable to the solar cell module according to the present invention shown in FIG. 1 will be described.

In the following Figs. 6A to 7C, the detailed description of the contents overlapping with those described in Figs. 1 and 2 will be omitted, and different points will be mainly described.

Therefore, the components that perform the same function as the solar cell shown in FIG. 6A are denoted by the same reference numerals as those in FIG. 3A, and a detailed description thereof will be omitted.

As shown in FIG. 6A, the first electrode 140b has a double electrode structure. The first electrode layer 140b has a plurality of first electrode layers 142b spaced apart in a first direction (x) And a plurality of second electrode layers 144b extending in a first direction (x).

The plurality of first electrode layers 142b are partially spaced apart in the first direction x and the plurality of second electrode layers 144b are positioned between the adjacent conductive pads 160 in the first direction x can do. That is, the first electrode layer 142b may be partially located below the second electrode layer 144b.

The first electrode layer 142b may contain silver (Ag), and the second electrode layer 144b may contain copper (Cu).

As described above, since the first electrode layer 142b containing silver (Ag) is partially and apart from the first electrode layer 142b, it can be confirmed that the material ratio is reduced compared to the first electrode formed only of the paste containing silver (Ag).

Therefore, the manufacturing cost for the plurality of solar cells C1 and C2 can be reduced without decreasing the adhesive force with the semiconductor substrate 110. [

7A, the first electrode 140c has a double electrode structure and includes a plurality of first electrode layers 142c located only in a region where the second electrode layer 144c and the interconnector IC cross each other, and a plurality of second electrode layers 144c extending in a longitudinal direction (x).

The plurality of second electrode layers 144c includes a plurality of first portions 144c1 extending in a first direction x and a plurality of second portions 144c1 extending in a second direction y And a plurality of third portions 144c2 extending in a first direction x between the second portion 144c2 and a neighboring pair of first portions 144c1.

The plurality of first portions 144c1 may be located between neighboring conductive pads 160 in a first direction x. At this time, the plurality of first portions 144c1 are not located in the formation region of the conductive pad 160 and the interconnector (IC).

The plurality of second portions 144c2 may be located between adjacent conductive pads 160 in a second direction y. At this time, the plurality of second portions 144c2 are not located in the regions where the conductive pads 160 and the interconnectors IC are formed.

The first electrode layer 142c may be located in a region where the second portion 144c2 and the third portion 144c3 intersect.

As described above, since the first electrode layer 142c containing silver (Ag) is partially and apart from the first electrode layer 142c, it can be confirmed that the material ratio is reduced as compared with the first electrode formed only with the paste containing silver (Ag).

Therefore, the manufacturing cost for the plurality of solar cells C1 and C2 can be reduced without decreasing the adhesive force with the semiconductor substrate 110. [

As shown in FIG. 7B, the first electrode 140d has a double electrode structure and may include a plurality of first electrode layers 142d and a plurality of second electrode layers 144d.

The plurality of second electrode layers 144d includes a plurality of first portions 144d1 extending in a first direction x and a plurality of first portions 144d1 extending in a second direction y, And a second portion 144d2.

The plurality of first portions 144d1 may be located between adjacent conductive pads 160 in the first direction x. At this time, the plurality of first portions 144d1 are not located in the regions where the conductive pads 160 and the interconnectors IC are formed.

The plurality of second portions 144d2 may be located between the pair of first portions 144d1 neighboring in the second direction y. The plurality of second portions 144d2 may be positioned parallel to the interconnectors IC.

The plurality of first electrode layers 142d may be located in a region where the first portion 144d1 and the second portion 144d2 intersect. That is, the first electrode layer 142d may be positioned at both ends of the second portion 144d2.

As such, since the first electrode layer 142d containing silver (Ag) is partially and apart from the first electrode layer 142d, it can be confirmed that the material ratio is reduced as compared with the first electrode formed only with the paste containing silver (Ag).

Therefore, the manufacturing cost for the plurality of solar cells C1 and C2 can be reduced without decreasing the adhesive force with the semiconductor substrate 110. [

Further, the second portion 144d2 of the second electrode layer 144d is connected between the first portion 144d1 and the second portion 144d2 of the second electrode layer 144d because of a defect in the contact between the interconnection IC and the conductive pad 160, ) And the conductive pad 160 can be prevented.

As shown in FIG. 7C, the first electrode 140e has a double electrode structure and may include a plurality of first electrode layers 142e and a plurality of second electrode layers 144e.

The plurality of second electrode layers 144e includes a plurality of first portions 144e1 extending in a first direction x and a plurality of first portions 144e1 extending in a second direction y, A plurality of third portions 144e2 extending in a first direction x between the second portion 144e2 and a pair of neighboring first portions 144e1.

The plurality of first portions 144e1 may be located between adjacent conductive pads 160 in the first direction x. At this time, the plurality of first portions 144c1 are not located in the formation region of the conductive pad 160 and the interconnector (IC).

The plurality of second portions 144e2 may be positioned between the first portion 144c1 and the third portion 144e2 in the second direction y. At this time, the plurality of second portions 144e2 are not located in the formation region of the conductive pad 160 and the inter-connector (IC).

The plurality of first electrode layers 142e may be located in a region where the second portion 144e2 and the third portion 144e3 are connected.

As described above, since the first electrode layer 142e containing silver (Ag) is partially and apart from the first electrode layer 142e, it can be confirmed that the material ratio is reduced as compared with the first electrode formed only with the paste containing silver (Ag).

Therefore, the manufacturing cost for the plurality of solar cells C1 and C2 can be reduced without decreasing the adhesive force with the semiconductor substrate 110. [

11 and 12, another example of the solar cell applicable to the solar cell module according to the present invention shown in Fig. 1 will be described.

As shown in FIG. 11, in another example of the solar cell that can be applied to the solar cell module according to the present invention shown in FIG. 1, the first electrode 140 is arranged in the first direction x, As well as a front bus bar 1420 that extends lengthwise in a second direction y that is a direction that intersects the longitudinal direction of the front fingers 1410. In addition,

In such a case, the above-described interconnector (IC) can be connected to the front bus bar 1420.

At this time, the number of the front bus bars 1420 is the same as the number of the interconnection ICs, and the width of the front bus bar 1420 may be equal to or smaller than the width of the inter connector IC.

In this manner, when the front bus bar 1420 is formed, the connection area between the interconnector IC and the first electrode 140 is increased, thereby further improving the contact resistance and contact force.

In addition, the number of rear bus bars 152 may be the same, and the width of the rear bus bars 152 may be equal to or less than the width of the interconnectors ICs.

On the other hand, the bus bar electrode may not include a bus bar electrode formed to be long in the second direction (y) intersecting the first direction (x) so that the plurality of first electrodes 140 are connected in common.

12, the pattern of the second electrode 150 may be formed in the same direction as that of the front finger 1410 on the rear surface of the semiconductor substrate 110 instead of the rear electrode layer 151, The rear bus bar 152 may be provided with the rear fingers positioned thereon.

In this case, when the solar cell has a bi-facial structure, light can be received even on the rear surface of the semiconductor substrate 110, and the efficiency of the solar cell can be further improved.

A solar cell having a structure in which the first electrode 140 and the second electrode 150 are disposed on the rear surface of the semiconductor substrate 110 is also applicable.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

110: semiconductor substrate 120: emitter section
130: antireflection film 140: first electrode
142: first electrode layer 144: second electrode layer
150: second electrode 151: rear electrode layer
152: rear bus bar 160: conductive pad
172: rear face fascia

Claims (22)

A semiconductor device comprising: a semiconductor substrate; a plurality of solar cells arranged on a front surface of the semiconductor substrate and including an emitter portion forming a pn junction with the semiconductor substrate; a first electrode connected to the emitter portion; and a second electrode connected to a rear surface of the semiconductor substrate battery;
A plurality of interconnectors connected to the first electrode or the second electrode to electrically connect the plurality of solar cells to each other in series; And
And a conductive pad partially located at a portion where the first electrode or the second electrode and the plurality of interconnectors cross each other and connected to the plurality of interconnectors,
Wherein the first electrode includes a first electrode layer located on a front surface of the semiconductor substrate,
And a second electrode layer disposed on the first electrode layer and made of a material different from that of the first electrode layer. The method according to claim 1,
Wherein the first electrode layer is made of silver (Ag), and the second electrode layer is made of copper (Cu). 3. The method of claim 2,
Wherein a ratio of a material content of the first electrode layer to a material content of the second electrode layer is 1: 4. The method according to claim 1,
Wherein the thickness of the first electrode is at least 25 占 퐉. 5. The method of claim 4,
Wherein the thickness of the first electrode layer is thinner than the thickness of the second electrode layer. 6. The method of claim 5,
Wherein the thickness of the conductive pad is equal to or greater than the thickness of the first electrode layer. The method according to claim 6,
Wherein the conductive pad is made of the same material as the material of the first electrode layer. The method according to claim 6,
And the conductive pad is made of the same material as the material of the second electrode layer. The method according to claim 1,
Wherein the number of the plurality of interconnectors connected to the first electrode or the second electrode included in one solar cell in each of the plurality of solar cells is 10 to 12 or more. The method according to claim 1,
Wherein the conductive pad is located at a portion where the plurality of first electrodes and the plurality of interconnectors intersect. The method according to claim 1,
And the plurality of first electrodes extend in a first direction orthogonal to the plurality of interconnectors. 12. The method of claim 11,
Wherein the second electrode layer is positioned between the conductive pads neighboring in the first direction and the first electrode layer is partially located below the second electrode layer in the first direction. 12. The method of claim 11,
Wherein the second electrode layer includes a first portion extending in the first direction and a second portion extending in a second direction which is the same direction as the plurality of interconnectors. 14. The method of claim 13,
Wherein the first portion is located between the conductive pads neighboring in the first direction and the second portion is located between the conductive pads neighboring in the second direction. 15. The method of claim 14,
And a plurality of third portions extending in a first direction between the neighboring first portions. 16. The method of claim 15,
Wherein the first electrode layer is located in a region where the second portion and the third portion intersect. 14. The method of claim 13,
Wherein the first portion is located between the conductive pads neighboring in the first direction and the second portion is located between a pair of the first portions in the second direction. 18. The method of claim 17,
And the second portion is located parallel to the interconnector. 18. The method of claim 17,
And the second electrode layer is located in a region where the first portion and the second portion are connected. 20. The method of claim 19,
And the second electrode layer is located at both ends of the second portion. 16. The method of claim 15,
Wherein the first portion is located between the conductive pads neighboring in the first direction and the second portion is located between the third portion where the conductive pad is not located in the second direction. 22. The method of claim 21,
Wherein the first electrode layer is located in a region where the second portion and the third portion are connected.

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