KR20160143202A - Semiconductor package alignment method - Google Patents
Semiconductor package alignment method Download PDFInfo
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- KR20160143202A KR20160143202A KR1020150079479A KR20150079479A KR20160143202A KR 20160143202 A KR20160143202 A KR 20160143202A KR 1020150079479 A KR1020150079479 A KR 1020150079479A KR 20150079479 A KR20150079479 A KR 20150079479A KR 20160143202 A KR20160143202 A KR 20160143202A
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- carrier
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- pockets
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67715—Changing the direction of the conveying path
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
Abstract
Description
The present invention relates to a semiconductor material alignment method for aligning individualized semiconductor materials to precise locations of carriers for subsequent processing. More particularly, the present invention relates to a method of manufacturing a semiconductor material, such as an individualized BGA (Ball Grid Array) type semiconductor material, for subsequent processing, in which a plurality of pockets are arranged in a lattice- Lt; / RTI >
The present invention relates to a semiconductor material alignment method for aligning individualized semiconductor materials to precise locations of carriers for subsequent processing.
The semiconductor package may be individualized in the wafer state, followed by a subsequent process, or the like. In recent years, electronic products have been downsized and the degree of integration between components has been increased, so that individual semiconductor materials can be subjected to sputtering for electromagnetic shielding (EMI shielding) in order to prevent noise interference caused by electromagnetic waves between components mounted on the substrate have.
However, when a ball electrode of a ball grid array (BGA) type semiconductor material serving as an electrode of a semiconductor operation in a sputtering operation for electromagnetic shielding (EMI shielding) is contaminated in a sputtering process for electromagnetic shielding (EMI shielding) It may cause defective semiconductor materials.
Therefore, in the case of a BGA (Ball Grid Array) type semiconductor material for sputtering for electromagnetic shielding (EMI shielding), a pocket in which a ball electrode in a lower region of a semiconductor material can be accommodated is formed in a grid- The ball electrode region is seated to be accommodated in the pocket of the carrier, and then a sputtering operation for electromagnetic shielding (EMI shielding) is performed.
In this case, if the carrier on which the semiconductor material or the semiconductor material is placed deviates even slightly from the intended position, the ball electrode of the lower portion of the semiconductor material can not be correctly received in the pocket of the carrier and the semiconductor chip is lifted or tilted, Shielding, the exposed ball electrodes may be sputtered together to cause defects in the semiconductor material.
Therefore, it is desirable that the alignment operation of the semiconductor chip which is mounted on the carrier or the carrier in the sputtering operation for electromagnetic shielding (EMI shielding) is minimized in offset.
The present invention provides a semiconductor material sorting method for aligning and aligning an offset BGA (Ball Grid Array) type semiconductor material or the like to each alignment position of a carrier having a plurality of pockets in a grid shape for subsequent processing To solve the problem.
According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a carrier supplying step of placing a circular carrier supplied in a laminated state in a carrier magazine on a turntable capable of being transported in the Y axis direction; A step of inspecting and correcting the offset of each reference point by capturing a plurality of reference points provided on the carrier surface by a first vision unit capable of being moved in the X axis direction based on the position of the notch, Imaging the plurality of pockets formed in the carrier on which the first alignment step is completed with a second vision unit capable of being transported in the X axis direction to check an offset of the positions of the plurality of pockets; 2 aligning step and a step of aligning the semiconductor material to the carrier according to the inspection result of the second vision unit with the transfer picker It is possible to provide a semiconductor material arranged comprises a semiconductor material comprising: loading materials.
In the first aligning step, one of the pockets formed in the carrier supplied in the carrier supplying step is imaged by the first vision unit capable of being transported in the X-axis direction, and the turntable is rotated to correct the deformation of the picked- And sequentially rotating the turntable at a predetermined angle to determine the position of the notch.
In addition, the plurality of reference points may be a pair of reference points provided at the widthwise edge of the carrier surface with the notch interposed therebetween, and the step of checking the offset of each reference point of the first alignment step may include: Axis direction, and sequentially imaging the pair of reference points in the X-axis direction.
The plurality of pockets whose offsets are checked in the second aligning step may be first to fourth pockets provided at positions spaced apart from each other by an interval of 90 degrees from the outermost pockets of the carriers.
Further, the first pocket and the second pocket are pockets arranged on a straight line parallel to the X axis or the Y axis, and the third pocket and the fourth pocket are pockets arranged on a straight line parallel to the Y axis or the X axis , The pockets arranged on the axis parallel to the X axis are sequentially picked up by the second vision unit, and the pockets arranged on the axis parallel to the Y axis can be sequentially picked up by transferring the turntable.
In addition, the second vision unit may be provided in a transporting picker capable of transporting the semiconductor material in the X-axis direction.
In addition, the transfer picker may include a plurality of pickup units, and the semiconductor material loading step may independently drive a plurality of the pick-up units according to a result of the second aligning step.
The present invention can minimize offset when loading individualized BGA (Ball Grid Array) type semiconductor materials or the like for subsequent processing, in a plurality of pockets arranged at each alignment position of a carrier provided in a lattice pattern.
In addition, according to the semiconductor material alignment method of the present invention, since the offset in the process of stacking the semiconductor material for the subsequent process is minimized, the defect rate of the product can be minimized.
In addition, according to the semiconductor material alignment method of the present invention, it is possible to provide a stepwise alignment method for minimizing the alignment offset of the semiconductor material.
In addition, the present invention can improve the accuracy of the equipment by checking the accuracy in the equipment before confirming the offset, or correcting the offset, before actually operating the equipment.
1 shows a top view of a pick and place system for transferring semiconductor material to a carrier for sputtering for electromagnetic shielding (EMI shielding).
FIG. 2 shows several embodiments of a carrier on which a BGA (Ball Grid Array) type semiconductor material is seated to perform a sputtering operation for electromagnetic shielding (EMI shielding).
Figs. 3 and 4 illustrate the alignment process of the carrier by the first vision unit.
Figures 5 and 6 illustrate the offset detection process of the pocket of the carrier by the second vision unit.
FIG. 7 is a plan view of a verification jig mounted on a turntable of the pick and place system shown in FIG. 1 to verify the alignment state of the positional relationship between the transfer picker and the turntable.
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms. Rather, the embodiments disclosed herein are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. Like reference numerals designate like elements throughout the specification.
1 shows a top view of a pick and
When a ball grid array (BGA) type semiconductor material is used for sputtering for electromagnetic shielding (EMI shielding), a pocket in which a ball electrode formed at the bottom of the individualized semiconductor material can be received is arranged in a grid- A sputtering operation for electromagnetic shielding (EMI shielding) can be performed.
Such a carrier may be generally formed in a circular shape such as a wafer, and may be supplied and taken out in a stacked state on the
As shown in FIG. 1, the carriers are taken out from the
The process of pulling out the
The process of pulling out the
The
The
The semiconductor material is moved in the Y axis direction by the
On the other hand, the
That is, in the case of the BGA (Ball Grid Array) type semiconductor material, the
As a precondition, the carrier supplied from the
With respect to the semiconductor material alignment method according to the present invention, the carrier supplied in the carrier supply step is provided with at least one groove-shaped notch (n) on the side surface, and the X- And a first aligning step of inspecting a plurality of reference points provided on the carrier surface by the
That is, each of the
The direction of the carrier may be distorted and the offset may be increased in the process of being taken out and transferred in a state where the carrier to which the semiconductor material is to be stacked is stacked on the
The turntable transferring line for transferring the respective turntables is also provided in parallel in the Y-axis direction so that the turntable transferring line is reciprocated to perform the first aligning step The
The first alignment step can be used to determine the directionality of the carrier about the notch n and to primarily align the carrier deflection. A detailed description of the first alignment step will be described later with reference to FIGS. 3 and 4. FIG.
In the first alignment step, the offsets of the carriers placed on the
The turntable can be rotated in the Z-axis direction and moved in the Y-axis direction, so that any degree of deviation or offset in the Y-axis direction can be corrected, but offset in all directions can not be completely eliminated.
Accordingly, the method of aligning a semiconductor material according to the present invention is characterized in that a plurality of pockets formed on a carrier in which the first alignment step is completed are imaged by a
The
A detailed description of the second alignment step through the
The second aligning step may be performed through a
Each of the
The material tray (t) is stacked on the tray supply unit (600), and the tray on which all the semiconductor material is picked up is taken out and a new tray is supplied again.
Since the pair of tray transfer lines are also provided, the
Therefore, the
An
Further, the
The present invention can use a jig for verification in order to check the accuracy of the equipment before loading and sorting the semiconductor material with the ball on the carrier on the turntable.
The verification jig can be regarded as a test carrier detachably mounted in place of the carrier for verifying whether the picker of the present invention is moved to a properly set position. In the case of a verification jig, it is necessary to check the accuracy of the equipment and to perform repeated use of the semiconductor device in the case of the jig for verification. It is possible to fix the semiconductor material firmly by vacuum suction instead of the adhesive.
In this case, a specimen for verification, for example, BMC, may be used in place of the semiconductor material having the balls formed thereon.
The BMC is preferably made of glass so as to be minimized from the effects of thermal deformation.
The accuracy of the equipment can be measured by confirming that the picker moves to the desired position and places the BMC on the verification jig. In this case, when the offset is within the initially set error range, it is determined that the offset is normal and the actual equipment can be driven.
On the other hand, when the offset exceeds the error range, the offset can be corrected to come within the normal range.
That is, the verification jig of the present invention can be used to check whether the equipment is in operation by checking the accuracy in the equipment, or to correct the generated offset.
For reference, the
FIG. 2 shows several embodiments of a carrier on which a BGA (Ball Grid Array) type semiconductor material is seated to perform a sputtering operation for electromagnetic shielding (EMI shielding).
In order to prevent the ball electrode of the BGA (Ball Grid Array) type semiconductor material from being contaminated during the sputtering process for electromagnetic shielding (EMI shielding), a plurality of
Since the
Each carrier may be provided with at least one notch (n) or the like which can be a physical reference of the carrier directionality on the rim periphery, and the direction must be determined with respect to the notch (n).
By detecting the notches, the directions of the carriers on the turntable can be matched uniformly with reference to the notches.
The notch formed on the carrier is detected by rotating the turntable by 90 degrees. If the notch is formed beforehand, the process of detecting the notch may be omitted.
As shown in Fig. 2 (a), the carrier on which the semiconductor material is mounted has a finely small notch n on the outer peripheral surface, and reference points are marked on the left and right surfaces around the notch n. Since two reference points are marked on the left and right sides of the notch n on the carrier shown in Fig. 2 (a), it is determined that the carrier is deflected based on the two
The carrier shown in Fig. 2 (b) differs from the carrier shown in Fig. 2 (a) in that the special mark fm is marked around the pocket of the carrier.
The special mark fm may be added to determine whether the loaded semiconductor material is loaded at the correct position.
That is, when a BGA (Ball Grid Array) type semiconductor material is seated in the pocket of the carrier shown in the enlarged view of FIG. 2 (b), when the semiconductor material is slightly out of position, It can be judged that the load of the semiconductor material is bad. This facial mark may be etched, printed or attached on the carrier as an identification target for easy detection, and may be displayed in various patterns such as a cross mark, a circle, and a dot.
In addition, the operator can form parallel lines spaced apart from the imaginary lines extending vertically in the vertical direction along the contour of the pocket so that the operator can visually confirm the arrangement of the semiconductor materials.
For reference, a special mark can be used to check the alignment of the semiconductor material loaded on the carrier. For example, after a special mark is formed on the upper and lower sides with respect to the center of the pocket, and a virtual line is drawn straightly on the partial marks formed on the upper and lower sides, the center of the virtual line is aligned with the center of the semiconductor material Correction can be performed. In addition, semiconductor materials can be aligned through various operations using the facial mark.
Figs. 3 and 4 illustrate the alignment process of the carrier by the
As described above, according to the semiconductor material alignment method of the present invention, a plurality of reference points provided on the carrier surface by the
Since the carrier supplied from the
Here, the first aligning step determines the directionality with reference to the notch n formed on the outer circumferential surface of the carrier, and therefore, the position of the notch n must be grasped first.
The notches n formed on the carrier are formed on the upper or lower outer peripheral surface of the carrier and the reference point is formed in the shape of the pockets formed in the carrier in a state where the shape of the pockets formed in the carrier is rectangular , The deformation of each side of one of the
Further, since it is necessary to first specify the position of the notch n in the first aligning step, if the turntable is finely rotated so that the respective sides of any one of the
That is, as shown in FIG. 3 (a), the inclination (angle of inclination) of the specific pocket with respect to the X-axis and Y-axis directions is corrected, , The lower end, the right end, and the left end of the notch n are sequentially picked up to judge the presence or absence of the notch n. Specifically, the state shown in Fig. 3 (b) shows a state in which the position of the notch n is confirmed by imaging the lower end of the carrier after imaging the left end of the carrier.
FIG. 4 is a diagram showing an example in which a plurality of reference points provided on the carrier surface are imaged by a
Specifically, since each reference point is provided at a position which is 90 degrees in the left and right directions of the notch n as described above, the
In this case, it is possible to determine the offsets of the left and right reference points with respect to the notch (n), and the turntable can perform the rotation function around the Z axis and the Y axis direction transfer, The offset of the reference points around the Z axis or the offset in the Y axis direction can be corrected to some extent.
Then, the data is converted into data usable in the transfer picker by using the position value of the carrier obtained based on the notch and the reference point formed on the turntable and the position value of the pre-input carrier.
FIGS. 5 and 6 illustrate a process of detecting the offset of a pocket of a carrier by the
The first alignment step as described with reference to Figs. 3 and 4 can be modified to some extent while checking the offsets of the notches n or reference points.
Therefore, when carrying out the loading operation of the semiconductor material in a state in which the offset determined as a result of inspection by the
Thus, in a state where the turntable on which the carrier is mounted is transferred to the loading position of the semiconductor material, the offset of the pockets is again inspected through the
Accordingly, the method of aligning a semiconductor material according to the present invention is characterized in that a plurality of pockets formed on a carrier in which the first alignment step is completed are imaged by a
The plurality of pockets whose offsets are checked in the second aligning step may be first to fourth pockets provided at positions spaced apart by 90 degrees from the outermost pockets of the carriers.
As shown in Fig. 5, the first pocket and the second pocket are pockets arranged on a straight line parallel to the X axis, and the third pocket and the fourth pocket are parallel to the Y axis The pockets arranged on the axis parallel to the X axis are pockets arranged on the axis parallel to the Y axis, the pockets arranged on the axis parallel to the X axis are images of the
Here, the first to fourth pockets are pockets located at the outermost positions at intervals of 90 degrees, and the pockets located at the centers of the upper row, the lower row, the left side heat insulation and the rear side insulation in the rows and columns of the pockets, The reason for selecting the object is to accurately grasp the offset trend of the pockets between the pocket having the maximum offset and the pocket having the minimum offset through the offset inspection of the pockets as far as possible.
The second semiconductor material alignment method is performed by detecting the positions of the first through fourth pockets arranged at intervals of 90 degrees. However, it is also possible to form a target (special mark) around the pocket instead of the pocket, It is possible to perform the second semiconductor material sorting method in the same manner. The target formed around the pocket may be one or more than two, but the method of detecting the target or the detection purpose is performed in the same manner as the pocket.
The target (the special mark) formed around the pocket may be formed in the periphery of the outermost four pockets to be the detection reference, but may be provided in each of the entire pockets in which the respective semiconductor materials are to be seated.
On the other hand, after the aligning operation between the turntable and the transporting picker is performed, the transporting picker is picked up and loaded in the pocket on the carrier. The semiconductor material can be loaded on the carrier in a state that the semiconductor material is corrected within an error range through the semiconductor material alignment method according to the present invention.
In this case, the offset can be corrected by the relative movement between the transfer picker and the turntable.
The turntable that can be traversed and rotated in the Y axis can correct the Y axis error value and the deviation θ value. The transporting picker transportably provided on the X-axis can correct the X-axis error value. The correction is to compare the initially set reference position value with the measured position value and to correct it so that it falls within the reference position value.
In the present invention, after each semiconductor material is aligned and loaded on the carrier, the turntable is moved down the first vision unit along the Y-axis transfer rail to check whether the semiconductor material is well loaded. The first vision unit can perform a full inspection of each semiconductor material.
In this case, each semiconductor material is placed on a pocket, which makes it difficult to inspect it because it hides the pocket.
So that it is possible to inspect the entire semiconductor material through the target placed around the pocket to see if the semiconductor material is well loaded on the carrier.
FIG. 7 is a plan view of a verification jig mounted on a turntable of the pick and place system shown in FIG. 1 to verify the alignment state of the positional relationship between the transfer picker and the turntable.
The
The image pick-up inspection of the offset of the special mark fm or the like is carried out by the second pick-up
Specifically, in the
Although the shape of the carrier is the same in the verification jig shown in Fig. 7, when the size of the semiconductor material becomes smaller, the vacuum pressure may decrease as the number of the vacuum holes increases. Only a small number of vacuum holes may be formed.
Since the purpose of the verification jig is to check the accuracy of the equipment or check it after checking it, it is OK to test only some semiconductor materials.
While the present invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims. . It is therefore to be understood that the modified embodiments are included in the technical scope of the present invention if they basically include elements of the claims of the present invention.
1000: Pick and place system
10: Carrier
100:
110: Carrier Magazine
250: Carrier picker
210: X-axis feed unit
510: Transferring picker transfer line
310: turntable transfer line
t: Material Tray
510: Tray transfer line
600:
630: Tray picker
20: Base plate
30: Verification jig
Claims (7)
Wherein the carrier supplied in the carrier supply step is provided with at least one groove-shaped notch on a side surface thereof, and a plurality of reference points provided on the carrier surface with a first vision unit capable of being transported in the X- And inspecting and correcting an offset of each reference point;
Capturing a plurality of pockets formed in a carrier on which the first alignment step is completed with a second vision unit capable of being transported in the X axis direction, and checking an offset of a position of the plurality of pockets; And
And a semiconductor material stacking step of stacking the semiconductor material on the carrier according to the inspection result of the second vision unit with the transfer picker.
Wherein the first aligning step captures an image of a pocket formed in a carrier supplied in the carrier supplying step with a first vision unit capable of being transported in the X axis direction, corrects the deformation of the picked up pocket by rotating the turntable, And determining the position of the notch by sequentially rotating the turntable at a predetermined angle.
Wherein the plurality of reference points are a pair of reference points provided at the widthwise edge of the carrier surface with the notch interposed therebetween, and the step of checking the offset of each reference point of the first alignment step includes: And sequentially picking up a pair of reference points, respectively.
Wherein the plurality of pockets whose offsets are checked in the second aligning step are first to fourth pockets provided at positions spaced apart from each other by an interval of 90 degrees from the outermost pockets of the carrier.
The first pocket and the second pocket are pockets arranged on a straight line parallel to the X axis or the Y axis and the third pocket and the fourth pocket are pockets arranged on a straight line parallel to the Y axis or the X axis, And the pockets arranged on the axis parallel to the Y axis are sequentially picked up by transferring the turntable, characterized in that the pockets arranged on the axis parallel to the Y axis are sequentially picked up by the second vision unit, How to sort.
Wherein the second vision unit is provided on a transporting picker capable of transporting the semiconductor material in the X-axis direction.
Wherein the transfer picker includes a plurality of pick-up units, and the semiconductor material loading step independently drives the plurality of pick-up units according to a result of the second aligning step.
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KR1020150079479A KR20160143202A (en) | 2015-06-04 | 2015-06-04 | Semiconductor package alignment method |
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Cited By (1)
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KR20200000253A (en) * | 2018-06-22 | 2020-01-02 | (주)제이티 | Device handler |
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KR20200000253A (en) * | 2018-06-22 | 2020-01-02 | (주)제이티 | Device handler |
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