KR20160134435A - Electronic component package and package on package structure - Google Patents

Abstract

The present invention relates to an electronic component package and a package on package structure. The electronic component package includes: a frame including a metal or ceramic-based material and having a through hole; an electronic component disposed inside the through hole; an insulating part covering at least upper portions of the frame and the electronic component; a connection part at least partially disposed between the frame and the insulating part; and a rewiring part disposed on one sides of the frame and the electronic component.

Description

[0001] ELECTRONIC COMPONENT PACKAGE AND PACKAGE ON PACKAGE STRUCTURE [0002]

This disclosure relates to electronic component packages and package-on-package structures.

The electronic component package refers to a package technology for electrically connecting an electronic component to a printed circuit board (PCB), for example, a main board of an electronic device and protecting the electronic component from an external impact, And is distinguished from an embedded technology for embedding electronic components in a substrate, for example, an interposer substrate. On the other hand, one of the major trends in the development of technology related to electronic components in recent years is to reduce the size of components. Accordingly, in the package field, it is required to implement a large number of pins .

[0004] One of the package technologies proposed in accordance with the above technical requirements is a wafer level package (WLP) using rewiring of electrode pads of electronic components formed on a wafer. The wafer-level package includes a fan-in WLP and a fan-out WLP. In particular, in a fan-out wafer level package, Which is currently being actively developed.

On the other hand, as the performance of electronic components has improved, the heat dissipation structure capable of effectively treating heat generated in electronic components has become more important. In addition, it is necessary to minimize the problem of warping due to the difference in thermal expansion coefficient between the components constituting the electronic component package.

One of the objects of the present disclosure is to provide an electronic component package having improved heat dissipation and warping characteristics and a package-on-package structure including the same.

One of the various solutions proposed through the present disclosure is to improve the rigidity of the package by using a material having excellent heat dissipation characteristics and being suitable for improving the bending property, for example, an Fe-Ni alloy or a ceramic-based material Frame.

It is possible to provide an electronic component package having improved heat dissipation and warping characteristics as one of the effects of the present disclosure and a package-on-package structure including the same.

1 is a block diagram schematically showing an example of an electronic equipment system.
Fig. 2 schematically shows an example of an electronic component package applied to an electronic device.
3 is a cross-sectional view schematically showing an example of an electronic component package.
Fig. 4 is a schematic II 'side cut-away plan view of the electronic component package of Fig. 3;
Fig. 5 shows an example of a schematic manufacturing process of the electronic component package of Fig.
Figure 6 shows several cross-sections of the frame of the electronic component package of Figure 3;
7 is a cross-sectional view schematically showing another example of the electronic component package.
8 is a schematic elevational view II-II 'side cut-away plan view of the electronic component package of FIG.
Fig. 9 shows an example of a schematic manufacturing process of the electronic component package of Fig.
10 is a cross-sectional view schematically showing another example of the electronic component package.
11 is a schematic III-III 'cut-away plan view of the electronic component package of Fig.
Fig. 12 shows an example of a schematic manufacturing process of the electronic component package of Fig.
13 is a cross-sectional view schematically showing another example of the electronic component package.
Fig. 14 is a schematic sectional elevation IV-IV 'of the electronic component package of Fig. 13; Fig.
Fig. 15 shows an example of a schematic manufacturing process of the electronic component package of Fig.
Fig. 16 shows various cross-sectional views of the through wiring of the electronic component package of Fig.
17 is a cross-sectional view schematically showing another example of the electronic component package.
FIG. 18 is a schematic VV 'surface cutting plan view of the electronic component package of FIG. 17; FIG.
Fig. 19 shows an example of a schematic manufacturing process of the electronic component package of Fig.
20 is a cross-sectional view schematically showing another example of the electronic component package.
Fig. 21 is a schematic sectional view of the electronic component package of Fig. 20 taken along the line VI-VI '; Fig.
22 is a cross-sectional view schematically showing another example of the electronic component package.
FIG. 23 is a schematic top view of the electronic component package of FIG. 22 taken along the line VII-VII '; FIG.
24 is a cross-sectional view schematically showing another example of the electronic component package.
25 is a schematic top view of the electronic component package of Fig. 24 taken along line VIII-VIII '; Fig.
26 is a cross-sectional view schematically showing another example of the electronic component package.
27 is a cross-sectional view schematically showing another example of the electronic component package.
28 is a cross-sectional view schematically showing an example of a package-on package.
29 is a cross-sectional view schematically showing another example of the package-on package.

Hereinafter, the present disclosure will be described with reference to the accompanying drawings. The shape and size of elements in the drawings may be exaggerated or reduced for clarity.

Electronics

1 is a block diagram schematically showing an example of an electronic equipment system. Referring to the drawings, an electronic device 1000 accommodates a main board 1010. The main board 1010 is physically and / or electrically connected to the chip-related components 1020, the network-related components 1030, and other components 1040. They are also combined with other components to be described later to form various signal lines 1090.

Chip related components 1020 include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, etc.; An application processor chip such as a central processor (e.g., a CPU), a graphics processor (e.g., a GPU), a digital signal processor, a cryptographic processor, a microprocessor, Analog-to-digital converters, and logic chips such as application-specific integrated circuits (ICs), and the like, but it is needless to say that other types of chip-related components may be included. It goes without saying that these components 1020 can be combined with each other.

IEEE 802.11 family, etc.), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA +, HSDPA +, HSUPA +, EDGE, GSM , And any other wireless and wired protocols designated as GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G and later, as well as any other wireless or wired It goes without saying that any of the standards or protocols may be included. It goes without saying that these parts 1030 can be combined with each other with the chip related part 1020 described above.

Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low temperature co-firing ceramics (LTCC), EMI (Electro Magnetic Interference) filters, and MLCC (Multi-Layer Ceramic Condenser) , But it is needless to say that the present invention may include other passive components used for various other purposes. It goes without saying that these components 1040 may be combined with each other with the chip related component 1020 and / or the network related component 1030 described above.

Depending on the type of electronic device 1000, the electronic device 1000 may include other components that may or may not be physically and / or electrically connected to the mainboard 1010. These other components include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, an audio codec (not shown), a video codec (not shown), a power amplifier (Not shown), a CD (compact disk) (not shown), a magnetic disk (not shown), a magnetic disk (not shown) And a digital versatile disk (DVD) (not shown), but the present invention is not limited thereto, and other components used for various purposes may be included depending on the type of the electronic device 1000.

The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, and the like. However, it is needless to say that the present invention is not limited thereto and may be any other electronic device that processes data.

Fig. 2 schematically shows an example of an electronic component package applied to an electronic device. The electronic component package is applied to various electronic apparatuses 1000 as described above for various purposes. For example, a main board 1110 is accommodated in the body 1101 of the smartphone 1100, and various electronic components 1120 are physically and / or electrically connected to the main board 1110. In addition, other components, such as the camera 1130, that are physically and / or electrically connected to the main board 1010 or not may be contained within the body 1101. At this time, some of the electronic components 1120 may be chip related components as described above, and the electronic component package 100 may be, for example, an application processor, but the present invention is not limited thereto.

Electronic component package

3 is a cross-sectional view schematically showing an example of an electronic component package. Fig. 4 is a schematic II 'side cut plan view of the electronic component package of Fig. 3; Referring to the drawings, an electronic component package 100A according to an example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, a frame 110, An insulating part 150 at least covering the upper part of the component 120, a bonding part 111 at least partly disposed between the frame 110 and the insulating part 150, (130, 140) disposed at the lower portion of the main body.

The frame 110 has a structure for supporting the package 100A, and it is possible to maintain rigidity and ensure thickness uniformity through the structure. The frame 110 has an upper surface 110A and a lower surface 110B facing the upper surface 110A and the through hole 110X may be formed to penetrate between the upper surface 110A and the lower surface 110B. have. The electronic component 120 is disposed in the through hole 110X.

Since the frame 110 includes a metal or ceramic material, the thermal expansion coefficient difference of the electronic component 120A can be minimized, so that the warpage of the package 100A can be reduced. In addition, in the case of a metal or ceramic material, heat radiation properties can also be improved because it is superior in thermal conductivity than ordinary molding resin or prepreg. In addition, since the process of forming the through hole 110X can be performed by an etching process, not a laser drilling process, foreign matter can be fundamentally removed. As the metal or ceramic-based material, an alloy having excellent rigidity and thermal conductivity may be used. As the alloy, at least iron may be used. For example, Fe-Ni alloy (Invar) may be used. It is not. Also, when ceramic materials such as zirconia (ZrO ₂ ), alumina (Al ₂ O ₃ ), silicon carbide (SiC), silicon nitride (Si ₃ N ₄ ) The same effect can be obtained.

The material of the frame 110 may have a thermal conductivity of 1 W / mK or more, for example, 10 W / mK to 15 W / mK. Typical molding resins and prepregs have a thermal conductivity of less than 1 W / mk and are very susceptible to heat emission. However, when they contain metal or ceramic materials having excellent thermal conductivity, the thermal conductivity is as high as 1 W / mK or more, The heat releasing property is improved. Thermal conductivity can be measured using well known thermal conductivity measurement equipment well known in the art.

The material of the frame 110 may have a coefficient of thermal expansion (CTE) of 10 ppm / 占 폚 or less, for example, 1 ppm / 占 폚 to 8 ppm / 占 폚. The coefficient of thermal expansion of electronic components such as an integrated circuit is about 2 ppm / ° C to 3 ppm / ° C, and the coefficient of thermal expansion of ordinary molding resin or prepreg is as high as 12 ppm / ° C to 50 ppm / The difference is so large that warpage easily occurs. On the other hand, when a metal or ceramic material is included, the coefficient of thermal expansion can be lowered to 10 ppm / ° C or lower, and as a result, the difference in thermal expansion coefficient with the electronic component can be minimized and the warping of the process and the warping of the finished product can be improved . The coefficient of thermal expansion (CTE) can be measured using a thermomechanical analyzer (TMA) at a temperature range of, for example, 100 ° C to 400 ° C.

The material of the frame 110 may have an elastic modulus of 100 GPa or more, for example, about 130 GPa to 160 GPa. Conventional molding resins, prepregs, and the like have a tensile GPa of an elastic modulus, which makes it difficult to maintain rigidity. On the other hand, when modulus of 100 GPa or more is modulus, it is possible to secure additional rigidity, which improves the fairness and warpage of finished packages. Elastic modulus means the ratio of stress to strain and can be measured by tensile test as specified in KS M 3001, KS M 527-3, ASTM D882.

The thickness of the cross section of the frame 110 is not particularly limited and can be designed to match the thickness of the cross section of the electronic component 120. [ For example, depending on the type of the electronic component 120, it may be, for example, about 100 μm to 500 μm.

The joining portion 111 facilitates joining of the frame 110 and the insulating portion 150. The bonding portion 111 is disposed at least between the frame 110 and the insulating portion 150 and may be formed on the upper surface 110A and / or the lower surface 110B of the frame 110, for example. In addition, it can also be formed on the inner wall of the through hole 110X. The bonding portion 111 may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pd) Alloy, etc., so that the heat radiation characteristics of the package 100A can be improved through the bonding portion 111 formed on the inner wall 110X of the through hole.

The bonding portion 111 may be connected to a rewiring pattern serving as a ground (GND) pattern of the conductive pattern 132 of the re-wiring layer 130. The heat emitted from the electronic component 120 may be conducted to the ground (GND) pattern of the conductive pattern 132 through the bonding portion 111 and dispersed to the lower portion of the package 110A. The ground (GND) pattern also performs the electromagnetic wave shielding function. However, the present invention is not limited thereto, and even when the bonding portion 111 is not connected to the redistribution pattern of the redistribution layer 130, heat can be dispersed downward by radiation, convection, or the like.

The electronic component 120 may be various active components (e.g., diodes, vacuum tubes, transistors, etc.) or passive components (e.g., inductors, capacitors, resistors, etc.). Or hundreds to millions of devices may be integrated circuit (IC) chips integrated into one chip. If desired, the integrated circuit may be an electronic component packaged in a flip chip form. The integrated circuit may, for example, be but is not limited to an application processor chip such as a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, a cryptographic processor, a microprocessor, .

The electronic component 120 includes an electrode pad 120P electrically connected to the redistribution parts 130 and 140. The electrode pad 120P is configured to electrically connect the electronic component 120 to the outside. As the forming material, a conductive material may be used without any particular limitation. As the conductive material, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pd) , But is not limited thereto. The electrode pads 120P are rewired by the rewiring parts 130 and 140. [ The electrode pad 120P may be in a buried form or in a protruding form.

When the electronic component 120 is an integrated circuit, it may have a body (not shown), a passivation layer (not shown), and an electrode pad 120P. The body may be formed based on, for example, an active wafer. In this case, silicon (Si), germanium (Ge), gallium arsenide (GaAs) or the like may be used as the base material. The passivation layer functions to protect the body from the outside, and may be formed of, for example, an oxide film or a nitride film, or may be formed of a double layer of an oxide film and a nitride film. The electrode pad 120P may be formed of copper, aluminum, silver, tin, gold, nickel, lead, or an alloy thereof Of a conductive material can be used. The surface on which the electrode pad 120P is formed becomes an active layer.

The thickness of the cross section of the electronic component 120 is not particularly limited and may vary depending on the type of the electronic component 120. [ For example, when the electronic component is an integrated circuit, it may be about 100 mu m to 480 mu m, but is not limited thereto.

The redistribution line units 130 and 140 are for rewiring the electrode pads 120P of the electronic component 120. [ Several hundreds of electrode pads 120P having various functions can be re-routed through the re-routing parts 130 and 140 and can be physically and / or electrically connected to the outside through the first external connection terminal 165, And can be electrically connected.

The redistribution line portions 130 and 140 are formed of insulating layers 131 and 141, conductive patterns 132 and 142 disposed on the insulating layers 131 and 141 and conductive vias 132 and 142 penetrating the insulating layers 131 and 141, And rewiring layers 130 and 140 including a plurality of wiring layers 133 and 143, respectively. In the electronic component package 100A according to the exemplary embodiment, the redistribution parts 130 and 140 are formed of a plurality of redistribution layers 130 and 140, but the present invention is not limited thereto. It is possible. It may also be constituted by a plurality of rewiring layers having more layers according to design specifications.

As the material of the insulating layers 131 and 141, an insulating material may be used. As the insulating material, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a reinforcing material such as a glass fiber or an inorganic filler, For example, prepreg, ABF (Ajinomoto Build-up Film), FR-4, BT (bismaleimide triazine) resin and the like can be used. In the case of using a photosensitive insulating material such as PID resin, the insulating layers 131 and 141 can be formed to be thinner, and a fine pitch can be easily realized. The materials of the insulating layers 131 and 141 may be the same as each other, and may be different from each other if necessary. The thicknesses of the insulating layers 141 and 511 are also not particularly limited and the thicknesses of the insulating patterns 141 and 511 may be 5 μm to 20 μm excluding the conductive patterns 132 and 142, 15 mu m to 70 mu m.

The conductive patterns 132 and 142 serve as a rewiring pattern and / or a pad pattern and may be formed of copper (Cu), aluminum (Al), silver (Ag), tin (Sn) , Nickel (Ni), lead (Pd), and alloys thereof. The conductive patterns 132 and 142 may perform various functions according to the design design of the layer. For example, the rewiring pattern can serve as a ground (GND) pattern, a power (PoWeR: PWR) pattern, a signal (S: S) pattern, Here, the signal S pattern includes various signals except for a ground (GND) pattern, a power (PWR) pattern, and the like, for example, a data signal. In addition, the pad pattern can serve as a via pad, an external connection terminal pad, or the like. The thicknesses of the conductive patterns 132 and 142 are also not particularly limited and may be, for example, about 10 μm to 50 μm, respectively.

In the conductive pattern 142 exposed in the conductive pattern 142, a surface treatment layer may be further formed if necessary. The surface treatment layer is not particularly limited as long as it is known in the art, and examples thereof include electrolytic gold plating, electroless gold plating, OSP or electroless tin plating, electroless silver plating, electroless nickel plating / , HASL, and the like.

The conductive vias 133 and 143 electrically connect the conductive patterns 132 and 142 formed on different layers and the electrode pads 120P and so on to form an electrical path in the package 100A. The conductive vias 133 and 143 may also be formed of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pd) A conductive material such as an alloy may be used. The conductive vias 133 and 143 may also be completely filled with a conductive material, or a conductive material may be formed along the wall of the via. Further, any shape known to those skilled in the art can be applied, such as a taper shape in which the diameter becomes smaller toward the lower surface, a reverse taper shape in which the diameter becomes larger toward the lower surface, and a cylindrical shape.

The insulating part 150 basically has a structure for protecting the electronic part 120. The insulating portion 150 covers the electronic component 120 for this purpose. The form of covering is not particularly limited and may be any shape that covers at least the upper portion of the electronic component 120. In the electronic component package 100A according to the example, the insulating portion 150 covers the frame 110 as well. Here, the concept of covering is not limited to the case where the object component is directly covered by the insulating portion 150, but also the case where the object component is separated from the insulating portion 150, Is covered. That is, at least the top of the target component may be protected. For example, as shown in the drawing, even when the joint portion 111 or the like is formed on the upper surface 110A of the frame 110 and / or the inner wall of the through hole 110X, the insulating portion 150 covers the frame 110 Interpret. The insulating part 150 may fill the remaining space in the through hole 110x of the frame 110. In this case, the insulating part 150 acts as an adhesive agent in accordance with a specific material and reduces the buckling of the electronic part 120 Can also be performed.

The insulating portion 150 may be formed of a plurality of layers made of a plurality of materials. For example, a space in the through hole 110X may be filled with a first insulating portion, and then the frame 110 and the electronic component 120 may be covered with a second insulating portion. Alternatively, the first insulating portion may be used to fill the space in the through hole 110X to cover the frame 110 and the electronic component 120 to a predetermined thickness, and then the second insulating portion may be formed on the first insulating portion, It can be used in a form of covering with a thickness again. In addition, it can be applied in various forms.

The specific material of the insulating portion 150 is not particularly limited. For example, an insulating material may be used as the material. The insulating material may be a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, a resin impregnated with a reinforcing material such as a glass fiber or an inorganic filler, For example, prepreg, ABF, FR-4, BT, PID resin and the like can be used. It is needless to say that known molding materials such as EMC can be used.

The insulation 150 may have a lower elastic modulus than the material of the frame 110. For example, the elastic modulus of the insulating portion 150 may be about 15 GPa or less, for example, about 50 MPa to 15 GPa. The warpage of the package 100A can be reduced through the buckling effect and the stress dispersion effect on the electronic component 120 as the elastic modulus of the insulating portion 150 is relatively small. Specifically, the insulating portion 150 may have a buckling effect on the bar 120, filling the through-hole 110X space, and may have a buckling effect on the bar 120X, which encapsulates the electronic component 120 It is possible to disperse and alleviate stress. However, if the elastic modulus is too small, the deformation is too severe to perform the basic role of the insulation part.

The insulating portion 150 may include conductive particles as needed for shielding electromagnetic waves. The conductive particles may be any of those capable of interrupting the electromagnetic wave, and examples of the conductive particles include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au) (Pd), a solder, or the like, but this is merely an example, and the present invention is not limited thereto.

The space in the through hole 110X filled with the insulating portion 150 is not particularly limited, and can be optimized by a person skilled in the art. For example, it may be about 10 mu m to 150 mu m, but is not limited thereto.

The electronic component package 100A according to an example may further include an outer layer 160 disposed under the redistribution portions 130 and 140. [ The outer layer 160 protects the re-wiring portions 130 and 140 from external physical and chemical damage. The outer layer 160 has a first opening 161 for exposing at least a part of the conductive pattern 142 of the redistribution layer 140 of the redistribution portions 130 and 140. The first opening 161 exposes the upper surface of a part of the conductive pattern 142, but the side surface may also be exposed at times.

The material of the outer layer 160 is not particularly limited, and for example, a solder resist can be used. In addition, the same material as the insulating layers 131 and 141 of the re-routing portions 130 and 140 may be used, for example, the same PID resin. The outer layer 160 is generally single-layered, but may be multi-layered as required.

The electronic component package 100A according to an exemplary embodiment may further include a first external connection terminal 165 exposed to the outside through a surface opposite to a surface of the external layer 160 connected to the redistribution layer 140. The first external connection terminal 165 is a structure for physically and / or electrically connecting the electronic component package 100A to the outside. For example, the electronic component package 100A is mounted on the main board of the electronic device through the first external connection terminal 165. [ The first external connection terminal 165 is disposed in the first opening 161 and is connected to the conductive pattern 142 exposed through the first opening 161. And is also electrically connected to the electronic component 120 through this.

The first external connection terminal 165 may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni) , Solder, or the like, but this is merely an example and the material is not particularly limited thereto. The first external connection terminal 165 may be a land, a ball, a pin, or the like. The first external connection terminal 165 may be formed as a multilayer or a single layer. In the case of a multi-layered structure, it may include a copper pillar and a solder. In the case of a single layer, tin-silver may include solder or copper. However, the present invention is not limited thereto. .

Some of the first external connection terminals 165 are disposed in a fan-out region. The fan-out region means an area outside the area where the electronic component is disposed. That is, the electronic component package 100A according to the example is a fan-out package. The fan-out package is more reliable than the fan-in package, allows multiple I / O terminals, and facilitates 3D interconnection. In addition, compared with BGA (Ball Grid Array) package and LGA (Land Grid Array) package, it is possible to manufacture a thin bar package that can be mounted on electronic devices without a separate substrate, and is excellent in price competitiveness.

The number, spacing, arrangement type, etc. of the first external connection terminals 165 are not particularly limited and can be sufficiently modified according to the design specifications of the ordinary artisan. For example, the number of the first external connection terminals 165 may be several tens to several thousand, depending on the number of the electrode pads 120P of the electronic component 120, and is not limited to this, .

Fig. 5 shows an example of a schematic manufacturing process of the electronic component package 100A according to the example. In the description of the manufacturing example of the electronic component package 100A, the description that is the same as the above description will be omitted and the difference will be mainly described.

Referring to FIG. 5A, a frame 110 is prepared. Here, A represents a plan view of the frame 110, and B represents a cross-section of a region that can be utilized as a unit package in A. The size of the frame 110 can be manufactured and utilized in various sizes to facilitate mass production. That is, a plurality of electronic component packages 100 may be manufactured by preparing a large-sized frame 110 and then singulated into individual packages through a sawing process. The frame 110 may have a fiducial mark for excellent P & P, and the mounting position of the electronic component 120 can be clarified through the fiducial mark. .

Referring to FIG. 5B, a through hole 110X penetrating through the frame 110 is formed. Here, A represents a plan view of the frame 110 in which the through hole 110X is formed, and B represents a cross section of a partial region which can be utilized as a unit package in A. The method for forming the through hole 110X is not particularly limited and may be selected from, for example, a mechanical drill and / or a laser drill, a sand blast method using abrasive particles, a dry etching method using plasma, a wet etching method using an etchant, . In the case of forming by etching, foreign matter can be originally removed. When the through hole 110X is formed by using a mechanical drill and / or a laser drill, a desmear treatment such as a permanganate method is performed to remove the resin smear in the through hole 110X. The sizes and shapes of the through holes 110X are designed to match the size, shape, and number of the electronic components 120 to be mounted.

5C, a bonding portion 111 is formed on the upper surface 110A and the lower surface 110B of the frame 110 and the inner wall of the through hole 110X. Here, A represents a plan view of the frame 110 in which the joints 111 are formed, and B represents a cross-section of a partial region which can be utilized as a unit package in A. The bonding portion 111 can be formed by a known method, for example, by electrolytic copper plating or electroless copper plating. More specifically, it is possible to use a chemical vapor deposition (PVD), a physical vapor deposition (PVD), a sputtering, a subtractive, an additive, a semi-additive process, An additive process), but the present invention is not limited thereto.

Referring to FIG. 5D, the electronic component 120 is disposed in the through hole 110X. The electronic component 120 is disposed face-down such that the electrode pad 120P faces downward, but is not limited thereto and may be a face-up type . Thereafter, the electronic part 120 is encapsulated by using the insulating part 150. The insulating portion 150 covers at least the upper portion of the frame 110 and the electronic component 120, and fills the space in the through hole 110X. The insulating portion 150 may be formed by a known method. For example, the insulating portion 150 may be formed by laminating and then curing the precursor. Alternatively, the insulating part 150 may be applied and cured so that the electronic part 120 can be encapsulated in a state that the lower part is closed using a tape (not shown) or the like. The electronic component 120 is fixed by the curing. As the lamination method, for example, a hot pressing method in which the resin is pressed at a high temperature for a certain period of time and then reduced in pressure to room temperature, and then cooled in a cold press to separate the working tool can be used. As the application method, for example, a screen printing method in which ink is applied by squeezing, a spray printing method in which ink is fogged and applied, and the like can be used.

Referring to FIG. 5E, re-wiring portions 130 and 140 are formed under the frame 110 and the electronic component 120. FIG. Specifically, the insulating layer 131 is formed under the frame 110 and the electronic component 120, and then the conductive pattern 132 and the conductive vias 133 are formed to form the re-wiring part 130. Next, an insulating layer 141 is formed under the insulating layer 131, and then a conductive pattern 142 and a conductive via 143 are formed to form a redistributing portion 140.

The insulating layers 131 and 141 may be formed by a known method. For example, the insulating layers 131 and 141 may be formed by lamination, curing, coating, or curing. However, the present invention is not limited thereto. As the lamination method, for example, a hot pressing method in which the resin is pressed at a high temperature for a certain period of time and then reduced in pressure to room temperature, and then cooled in a cold press to separate the working tool can be used. As the application method, for example, a screen printing method in which ink is applied by squeezing, a spray printing method in which ink is fogged and applied, and the like can be used. The curing may be drying so as not to be completely cured in order to use a photolithography process or the like as a post-process.

The conductive patterns 132 and 142 and the conductive vias 133 and 143 may be formed by a known method. First, a via hole (not shown) can be formed by using the above-described mechanical drill and / or laser drill. When the lead layer 131 includes a PID resin or the like, the via hole is also formed by a photolithography method can do. The conductive patterns 132 and 142 and the conductive vias 133 and 143 can be formed by electrolytic copper plating or electroless copper plating using a dry film pattern.

After the re-wiring portions 130 and 140 are formed, an outer layer 160 is formed under the re-wiring portions 130 and 140. The outer layer 160 may be formed by laminating and hardening the outer layer 160 precursor, or by applying the outer layer 160 forming material and curing the outer layer 160. Thereafter, the first opening 161 is formed in the outer layer 160 such that at least a part of the conductive pattern 142 is exposed. The first opening 161 may be formed by using a mechanical drill and / or a laser drill, or may be formed by a photolithography method.

The first opening 161 is formed in the outer layer 160 and then the first external connection terminal 165 disposed in the first opening 161 is formed. The method of forming the first external connection terminal 165 is not particularly limited and may be formed by a known method well known in the art depending on its structure and form. The first external connection terminal 165 may be fixed by reflow and a part of the first external connection terminal 165 may be buried in the outer layer 160 and the remaining portion may be connected to the outside The reliability can be improved. In some cases, only the first opening 161 may be formed, and the first external connection terminal 165 may be formed as needed in a separate process at the customer 100A of the package 100A.

6 shows various cross-sectional shapes of the frame 110 in the electronic component package 100A according to an example. When a CNC drill or a punching method is used to form the through hole 110X, the cross-sectional shape of the frame 110 can be vertical as in A, and when using a single-sided laser drill or etching, When a double-sided laser drill or etching is used, a double slope may be formed, but the present invention is not limited thereto.

7 is a cross-sectional view schematically showing another example of the electronic component package. FIG. 8 is a schematic top view of the electronic component package of FIG. 7 taken along line II-II '; FIG. Referring to the drawings, an electronic component package 100B according to another example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, An insulating part 150 at least covering an upper part of the electronic part 120; a joining part 111 at least partly disposed between the frame 110 and the insulating part 150; The joining portion 111 is formed only on the upper surface 110A and the lower surface 110B of the frame 110. The joining portion 111 is formed on the upper surface 110A and the lower surface 110B of the frame 110, That is, the joining portion 111 may not be extended to the inner wall of the through hole 110X. The description of each configuration included in the electronic component package 100B according to another example is omitted because it is the same as that described above.

Fig. 9 shows an example of a schematic manufacturing process of the electronic component package 100B according to another example. In the description of the manufacturing example of the electronic component package 100B, the description overlapping with the above description will be omitted and the difference will be mainly described.

Referring to FIG. 9A, a frame 110 having a joining portion 111 formed on an upper surface 110A and a lower surface 110B is prepared. Here, A represents a plan view of the frame 110 in which the joints 111 are formed, and B represents a cross-section of a partial region which can be utilized as a unit package in A. The joining portion 111 can be formed on the entire upper surface 110A and the lower surface 110B of the frame 110. [ Similarly, the size of the frame 110 can be manufactured and utilized in various sizes to facilitate mass production.

Referring to FIG. 9B, a through hole 110X is formed through the bonding portion 111 and the frame 110. As shown in FIG. Here, A represents a plan view of the frame 110 in which the through hole 110X is formed, and B represents a cross section of a partial region which can be utilized as a unit package in A. Similarly, the through hole 110X can be performed by, for example, a mechanical drill and / or a laser drill, a sand blast method using abrasive particles, a dry etching method using plasma, a wet etching method using an etching solution, and the like. The sizes and shapes of the through holes 110X are designed to match the size, shape, and number of the electronic components 120 to be mounted.

Referring to FIG. 9C, the electronic component 120 is disposed in the through hole 110X. Thereafter, the electronic part 120 is encapsulated by using the insulating part 150. The insulating portion 150 covers at least the upper portion of the frame 110 and the electronic component 120, and fills the space in the through hole 110X. The insulating portion 150 may be formed by, for example, laminating and curing the insulating layer 150 precursor. Alternatively, the insulating part 150 may be applied and cured so that the electronic part 120 can be encapsulated in a state that the lower part is closed using a tape (not shown) or the like.

Referring to FIG. 9D, re-wiring portions 130 and 140 are formed under the frame 110 and the electronic component 120. FIG. Specifically, the insulating layer 131 is formed under the frame 110 and the electronic component 120, and then the conductive pattern 132 and the conductive vias 133 are formed to form the re-wiring part 130. Next, an insulating layer 141 is formed under the insulating layer 131, and then a conductive pattern 142 and a conductive via 143 are formed to form a redistributing portion 140. After the re-wiring portions 130 and 140 are formed, an outer layer 160 is formed under the re-wiring portions 130 and 140. Thereafter, the first opening 161 is formed in the outer layer 160 such that at least a part of the conductive pattern 142 is exposed. The first opening 161 is formed in the outer layer 160 and then the first external connection terminal 165 disposed in the first opening 161 is formed. In some cases, only the first opening 161 may be formed, and the first external connection terminal 165 may be formed as needed in a separate process at the customer of the package 100B.

10 is a cross-sectional view schematically showing another example of the electronic component package. 11 is a schematic III-III 'cut-away plan view of the electronic component package of Fig. Referring to the drawings, an electronic component package 100C according to another example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, a frame 110, An insulating part 150 at least covering an upper part of the electronic part 120, bonding parts 111A and 111B at least partly disposed between the frame 110 and the insulating part 150, Wherein the joining portions 111A and 111B have a first joining portion 111A and a second joining portion 111B and the first joining portion 111A and the joining portions 111A and 111B, Is disposed on the upper surface 110A and the lower surface 110B of the frame 110 and the second bonding portion 111B is disposed on the first bonding portion 111A and extends to the inner wall of the through hole 110X . The description of each configuration included in the electronic component package 100C according to another example is omitted because it is the same as that described above.

Fig. 12 shows an example of a schematic manufacturing process of the electronic component package 100C according to another example. In the description of the manufacturing example of the electronic component package 100C, the description overlapping with the above description will be omitted and the differences will be mainly described.

Referring to FIG. 12A, a frame 110 having a first bonding portion 111A formed on an upper surface 110A and a lower surface 110B is prepared. Here, A represents a plan view of the frame 110 in which the first joints 111A are formed, and B represents a cross-section of a partial region that can be utilized as a unit package in A. The first bonding portion 111A can be formed on the entire upper surface 110A and the lower surface 110B of the frame 110. [ Similarly, the size of the frame 110 can be manufactured and utilized in various sizes to facilitate mass production.

Referring to FIG. 12B, a first bonding portion 111A and a through hole 110X penetrating the frame 110 are formed. Here, A represents a plan view of the frame 110 in which the through hole 110X is formed, and B represents a cross section of a partial region which can be utilized as a unit package in A. Similarly, the through hole 110X can be performed by, for example, a mechanical drill and / or a laser drill, a sand blast method using abrasive particles, a dry etching method using plasma, a wet etching method using an etching solution, and the like. The sizes and shapes of the through holes 110X are designed to match the size, shape, and number of the electronic components 120 to be mounted.

Referring to FIG. 12C, a second bonding portion 111B is formed on the first bonding portion 111A and the inner wall of the through hole 110X. As a result, two layers of bonding portions 111A and 111B are formed on the upper surface 110A and the lower surface 110B of the frame 110 and a single layer bonding portion 111B is disposed on the inner wall of the through hole 110X. Here, A is a plan view of the frame 110 in which the second bonding portion 111B is formed, and B is a cross-sectional view of a partial region that can be utilized as a unit package in A. The second bonding portion 111B can be formed by a known method, for example, by electrolytic copper plating or electroless copper plating.

12D, the electronic component 120 is disposed in the through hole 110X. Thereafter, the electronic part 120 is encapsulated by using the insulating part 150. The insulating portion 150 covers at least the upper portion of the frame 110 and the electronic component 120, and fills the space in the through hole 110X. The insulating portion 150 may be formed by, for example, laminating and curing the insulating layer 150 precursor. Alternatively, the insulating part 150 may be applied and cured so that the electronic part 120 can be encapsulated in a state that the lower part is closed using a tape (not shown) or the like.

Referring to FIG. 12E, re-wiring portions 130 and 140 are formed under the frame 110 and the electronic component 120. FIG. Specifically, the insulating layer 131 is formed under the frame 110 and the electronic component 120, and then the conductive pattern 132 and the conductive vias 133 are formed to form the re-wiring part 130. Next, an insulating layer 141 is formed under the insulating layer 131, and then a conductive pattern 142 and a conductive via 143 are formed to form a redistributing portion 140. After the re-wiring portions 130 and 140 are formed, an outer layer 160 is formed under the re-wiring portions 130 and 140. Thereafter, the first opening 161 is formed in the outer layer 160 such that at least a part of the conductive pattern 142 is exposed. The first opening 161 is formed in the outer layer 160 and then the first external connection terminal 165 disposed in the first opening 161 is formed. In some cases, only the first opening 161 may be formed, and the first external connection terminal 165 may be formed as needed in a separate process at the customer 100C.

13 is a cross-sectional view schematically showing another example of the electronic component package. Fig. 14 is a schematic sectional elevation view of the electronic component package of Fig. 13 taken along line IV-IV '; Referring to the drawings, an electronic component package 100D according to another example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, a frame 110, An insulating part 150 at least covering an upper portion of the electronic part 120; a bonding part 111 at least partially disposed between the frame 110 and the insulating part 150; (110) and / or between the bonding portion (111) and the through wiring (113), and a re - wiring portion (130, 140) disposed under the frame (110) and the electronic component An insulating material is disposed.

The through wires 113 penetrating through the upper surface 110A and the lower surface 110B of the frame 110 electrically connect the conductive patterns disposed in different layers and may be formed of copper, A conductive material such as aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pd) or an alloy thereof may be used. The number, spacing, arrangement type, etc. of the through wirings 113 are not particularly limited and can be sufficiently modified according to the design specifications of the ordinary artisan. The through wiring 113 is provided with an insulating material therebetween for electrical insulation with the frame 110 and / or the bonding portion 111. The insulating material may be the same material as the insulating portion 150, Or alternatively may be a different insulating material disposed further.

The electronic component package 100D according to another example may further include an outer conductive pattern 152 disposed on the insulating portion 150. [ The outer conductive pattern 152 disposed on the insulating layer 150 serves as a rewiring pattern and / or a pad pattern, and may be formed of copper (Cu), aluminum (Al), silver (Ag) (Sn), gold (Au), nickel (Ni), lead (Pd), or an alloy thereof. Specific examples are as described above. The outer conductive pattern 152 may perform various functions according to the design of the layer. For example, the rewiring pattern can serve as a ground (GND) pattern, a power (PWR) pattern, a signal (S) pattern, and the like. Here, the signal S pattern includes various signals except for a ground (GND) pattern, a power (PWR) pattern, and the like, for example, a data signal. In addition, the pad pattern can serve as a via pad, an external connection terminal pad, or the like. The outer conductive pattern 152 may be disposed on the entire surface of the insulating portion 150 and the second external connection terminal 175 may be disposed on the front surface of the cover layer 170 to be described later. Is possible. The thickness of the outer conductive pattern 152 is also not particularly limited, and may be, for example, about 10 탆 to 50 탆 each. A surface treatment layer may be further formed on the exposed outer conductive pattern 152 of the outer conductive pattern 152 as necessary. The surface treatment layer may be formed by, for example, electrolytic gold plating, electroless gold plating, OSP or electroless tin plating, electroless silver plating, electroless nickel plating / replacement gold plating, DIG plating, HASL and the like.

The electronic component package 100D according to another example includes a cover layer 170 disposed on the insulating portion 150; As shown in FIG. The cover layer 170 is configured to protect the insulating portion 150, the outer conductive pattern 152, and the like from external physical and chemical damage. The cover layer 170 has a second opening 171 exposing at least a part of the outer conductive patterns 152 disposed on the insulating portion 150. The second opening 171 exposes the upper surface of a part of the outer conductive pattern 152, but the side surface may also be exposed at times. The material of the cover layer 170 is not particularly limited, and for example, a solder resist can be used. In addition, various PID resins can be used. The cover layer 170 may be composed of multiple layers as required.

The electronic component package 100D according to another example includes a second external connection terminal 175 disposed in the second opening portion 171 of the cover layer 170; As shown in FIG. The second external connection terminal 175 is disposed in the second opening 171 and is connected to the exposed conductive pattern 152 exposed through the second opening 171. The second external connection terminal 175 may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni) , Solder, or the like, but this is merely an example and the material is not particularly limited thereto. The second external connection terminal 175 may be a land, a ball, a pin, or the like. The second external connection terminal 175 may be formed as a multilayer or a single layer. In the case of a multi-layered structure, it may include a copper pillar and a solder. In the case of a single layer, tin-silver may include solder or copper. However, the present invention is not limited thereto. . The description of each other constitution included in the electronic component package 100D according to another example is omitted because it is the same as that described above.

Fig. 15 shows an example of a schematic manufacturing process of an electronic component package 100D according to an example. In the description of the manufacturing example of the electronic component package 100D, the description overlapping with the above description will be omitted and the differences will be mainly described.

Referring to FIG. 15A, a frame 110 is prepared. Here, A represents a plan view of the frame 110, and B represents a cross-section of a region that can be utilized as a unit package in A. Similarly, the size of the frame 110 can be manufactured and utilized in various sizes to facilitate mass production. In addition, the frame 110 may have a fiducial mark for excellent P & P.

Referring to FIG. 15B, a through hole 110X and a through hole 110Y penetrating through the frame 110 are formed. Here, A is a plan view of a frame 110 in which a through hole 110X and a through hole 110Y are formed, and B is a cross-section of a partial region which can be utilized as a unit package in A. The method for forming the through hole 110X and the through hole 110Y is not particularly limited and may be selected from the group consisting of a mechanical drill and / or a laser drill, a sand blast method using abrasive particles, a dry etching method using plasma, A wet etching method using a wet etching method or the like. In the case where the through hole 110X and / or the through hole 110Y is formed by using a mechanical drill and / or a laser drill, a through-hole 110X and / or a through hole 110Y are removed. The sizes and shapes of the through holes 110X are designed to match the size, shape, and number of the electronic components 120 to be mounted. The sizes and shapes of the through holes 110Y are designed to match the size, shape, and number of the through wirings 113 to be formed.

15C, a bonding portion 111 is formed on the upper surface 110A and the lower surface 110B of the frame 110, and the inner wall of the through hole 110X and the through hole 110Y. Here, A represents a plan view of the frame 110 in which the joints 111 are formed, and B represents a cross-section of a partial region that can be utilized as a unit package in A. Similarly, the bonding portion 111 can be formed by a known method, and can be formed by, for example, electrolytic copper plating or electroless copper plating.

15D, the electronic component 120 is disposed in the through hole 110X. Thereafter, the electronic part 120 is encapsulated by using the insulating part 150. The insulating portion 150 covers at least the upper portion of the frame 110 and the electronic component 120 and fills the space in the through hole 110X and the through hole 110Y. The insulating portion 150 may be formed by a known method. For example, the insulating portion 150 may be formed by laminating and then curing the precursor. Alternatively, the insulating part 150 may be applied and cured so that the electronic part 120 can be encapsulated in a state that the lower part is closed using a tape (not shown) or the like.

Referring to FIG. 15E, a through wiring 113 is formed in the through hole 110Y. Specifically, a through-hole (not shown) having a smaller diameter is formed in the through-hole 110 Y, and then a conductive material is filled to form a through-hole 113. The through wiring 113 can be formed by a known method, for example, by electrolytic copper plating or electroless copper plating. More specifically, it may be formed by a method such as CVD, PVD, sputtering, subtractive, additive, SAP or MSAP, but is not limited thereto.

Referring to FIG. 15F, re-wiring portions 130 and 140 are formed under the frame 110 and the electronic component 120. FIG. Concretely, the insulating layer 131 is formed under the frame 110 and the electronic component 120, and then the conductive pattern 132 and the conductive via 133 are formed to form the re-wiring part 130. Next, an insulating layer 141 is formed under the insulating layer 131, and then a conductive pattern 142 and a conductive via 143 are formed to form a redistributing portion 140. After the re-wiring portions 130 and 140 are formed, an outer layer 160 is formed under the re-wiring portions 130 and 140. Thereafter, the first opening 161 is formed in the outer layer 160 such that at least a part of the conductive pattern 142 is exposed. The first opening 161 is formed in the outer layer 160 and then the first external connection terminal 165 disposed in the first opening 161 is formed. Further, the outer conductive pattern 152 is formed on the insulating portion 150. Then, a cover layer 170 is formed on the insulating portion 150. Thereafter, the second opening portion 171 is formed in the cover layer 170 so that at least a part of the conductive pattern 142 is exposed. After forming the second opening portion 171 of the cover layer 170, a second external connection terminal 175 disposed in the second opening portion 171 is formed. The method for forming the outer conductive pattern 152, the cover layer 170, the second opening 171 and the second external connection terminal 175 includes the steps of forming the conductive patterns 132 and 142, the outer layer 160, 161 and the first external connection terminal 165 are duplicated. Only the second external connection terminal 175 disposed in the second opening portion 181 of the cover layer 170 may be formed and only the first opening portion 161 is formed in the external layer 160, The first external connection terminal 165 disposed in the first opening 161 may be formed by a separate process in the customer 100 of the package 100D as required.

Referring to the manufacturing method of the package 100B according to another example different from the above example, the frame 110 having the joining portion 111 formed on the upper surface 110A and the lower surface 110B is prepared first and then the through hole 110X And the through hole 110Y may be formed. In this case, the package to be manufactured may have a shape in which the bonding portion 111 is not disposed on the inner wall of the through hole 110X and the through hole 110Y.

Referring to the manufacturing method of the package 100C according to another example different from the above example, the frame 110 having the first bonding portion 111A formed on the upper surface 110A and the lower surface 110B is prepared, And the through holes 110Y and the through holes 110Y are formed and then the second joints 111B are plated again on the upper surface 110A and the lower surface 110B of the frame 110, 111B may be formed on the inner wall of the through hole 110Y and a single-layer bonding portion 111B may be formed on the inner wall of the through hole 110X.

16 shows various cross-sectional shapes of the through wiring 113 in the electronic component package 100D according to the example. When the CNC drill or punching method is used to form the small through hole 110Y in the through hole 110Y, the sectional shape of the through wire 113 can be vertical as in A, It is possible to form a slope as in B, and when using a double-sided laser drill or etching, it is possible to form a double slope, but the present invention is not limited thereto.

17 is a cross-sectional view schematically showing another example of the electronic component package. FIG. 18 is a schematic VV 'surface cutting plan view of the electronic component package of FIG. 17; FIG. Referring to the drawings, an electronic component package 100E according to another example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, a frame 110, An insulating part 150 at least covering an upper part of the electronic part 120; a joining part 111 at least partly disposed between the frame 110 and the insulating part 150; And the rewiring portions 130 and 140 disposed at the lower portion of the frame 110. The insulation portion 150 further surrounds the frame 110 on the outer side. When the frame 110 is enclosed by the insulating part 150, the frame 110 is not exposed to the outside, and reliability such as oxidation prevention can be improved. The description of each configuration included in the electronic component package 100E according to another example is omitted because it is the same as that described above.

Fig. 19 shows an example of a schematic manufacturing process of an electronic component package 100E according to an example. In the description of the manufacturing example of the electronic component package 100E, the description overlapping with the above description will be omitted and the difference will be mainly described.

Referring to FIG. 19A, a frame 110 having a joining portion 111 formed on an upper surface 110A and a lower surface 110B is prepared. Then, the adhesive polymer layer 190 is attached to the bonding portion 111 disposed on the lower surface 110B of the frame 110. The joining portion 111 can be formed on the entire upper surface 110A and the lower surface 110B of the frame 110. Similarly, the size of the frame 110 can be manufactured and utilized in various sizes to facilitate mass production.

Referring to FIG. 19B, a through hole 110X and a dummy hole 110Z are formed through the bonding portion 111 and the frame 110, respectively. The dummy hole 110Z is formed so as to surround the frame 100 having the through hole 110X. The method of forming the through hole 110X and the dummy hole 110Z is not particularly limited, and examples thereof include a mechanical drill and / or a laser drill, a sand blast method using abrasive particles, a dry etching method using plasma, And wet etching method using the same. The size and shape of the through hole 110X and the dummy hole 110Z are designed in accordance with the size, shape and number of the electronic component 120 to be mounted.

Referring to FIG. 19C, the electronic component 120 is disposed in the through hole 110X. Thereafter, the electronic part 120 is encapsulated by using the insulating part 150. The adhesive polymer layer 190 is peeled off. The insulating portion 150 covers at least the upper portion of the frame 110 and the electronic component 120, and fills the space in the through hole 110X. In addition, the outer side of the frame 110 is enclosed so that the frame 110 is not exposed to the outside. The insulating portion 150 may be formed by, for example, laminating and curing the insulating layer 150 precursor. Alternatively, the insulating part 150 may be coated and cured to encapsulate the electronic part 120.

Referring to FIG. 19D, the re-wiring portions 130 and 140 are formed under the frame 110 and the electronic component 120. FIG. Specifically, the insulating layer 131 is formed under the frame 110 and the electronic component 120, and then the conductive pattern 132 and the conductive vias 133 are formed to form the re-wiring part 130. Next, an insulating layer 141 is formed under the insulating layer 131, and then a conductive pattern 142 and a conductive via 143 are formed to form a redistributing portion 140. After the re-wiring portions 130 and 140 are formed, an outer layer 160 is formed under the re-wiring portions 130 and 140. Thereafter, the first opening 161 is formed in the outer layer 160 such that at least a part of the conductive pattern 142 is exposed. The first opening 161 is formed in the outer layer 160 and then the first external connection terminal 165 disposed in the first opening 161 is formed. In some cases, only the first opening 161 may be formed, and the first external connection terminal 165 may be formed as needed in a separate process at the customer of the package 100E.

The method of manufacturing the package 100A according to an exemplary embodiment of the present invention will now be described with reference to a method of manufacturing a package 100A. First, a through hole 110X and a dummy hole 110Z are formed in a frame 110, In the case of forming the insulating portion 150, the package to be manufactured may have a shape in which the bonding portion 111 is extended to the inner wall of the through hole 110X and the dummy hole 110Z.

Referring to the manufacturing method of the package 100C according to another example different from the above example, the frame 110 having the first bonding portion 111A formed on the upper surface 110A and the lower surface 110B has through holes 110X and The through hole 110X and the through hole 110Y are formed after the dummy hole 110Z is formed and then the second joint portion 111B is plated again so that the package to be manufactured is mounted on the upper surface 110A of the frame 110, And the lower surface 110B may be formed with two bonding portions 111A and 111B and the inner surface of the through hole 110X and the dummy hole 110Y may be formed with a single bonding portion 111B.

20 is a cross-sectional view schematically showing another example of the electronic component package. FIG. 21 is a schematic sectional view taken along the line VI-VI 'of FIG. 20; FIG. Referring to the drawings, an electronic component package 100F according to another example includes a frame 110 having a through hole 110X, electronic components 120 and 122 disposed in the through hole 110X, And an insulating part 150 covering at least an upper part of the electronic parts 120 and 122. A bonding part 111 at least partly disposed between the frame 110 and the insulating part 150, And a redistribution unit 130 and 140 disposed under the electronic components 120 and 122. The plurality of electronic components 120 and 122 include a plurality of electronic components 120 and 122,

The plurality of electronic components 120 and 122 may be the same or different from each other. The plurality of electronic components 120 and 122 have electrode pads 120P and 122P electrically connected to the re-wiring parts 130 and 140, respectively. The electrode pads 120P and 122P are rewired by the rewiring parts 130 and 140, respectively. The number, spacing, arrangement type, etc. of the plurality of electronic components 120 and 122 are not particularly limited and can be sufficiently modified according to the design specifications of the ordinary artisan. For example, the number of the plurality of electronic components 120 and 122 may be two as shown in the drawing, but it is not limited thereto, and it is needless to say that three or four or more electronic components 120 and 122 may be further disposed. The description of each configuration included in the electronic component package 100F according to another example is omitted because it is the same as that described above. The manufacturing method of the electronic component package 100F according to another example is the same as the manufacturing method of the electronic component package 100A to 100E except that the plurality of electronic components 120 and 122 are arranged in the manufacturing method of the electronic component packages 100A to 100E The same is omitted. In the meantime, it is needless to say that, in the case of the electronic component package 100F according to another example as well, the characteristic shapes of the electronic component packages 100B to 100E may be applied.

22 is a cross-sectional view schematically showing another example of the electronic component package. 23 is a schematic plan view of the electronic component package of Fig. 22 taken along line VII-VII '; Referring to the drawings, an electronic component package 100G according to another example includes a frame 110 having through holes 110X1 and 110X2, electronic components 120 and 122 disposed in the through holes 110X1 and 110X2, An insulating part 150 covering at least an upper part of the frame 110 and the electronic parts 120 and 122; a joint part 111 at least partly disposed between the frame 110 and the insulating part 150; A plurality of through holes 110X1 and 110X2 and a plurality of through holes 110X1 and 110X2 disposed in a lower portion of the frame 110 and the electronic components 120 and 122, The electronic components 120 and 122 are disposed.

The areas and shapes of the plurality of through holes 110X1 and 110X2 may be the same or different from each other and the electronic components 120 and 122 disposed in the through holes 110X1 and 110X2 may be the same or different from each other . The number, spacing, arrangement form, etc. of the plurality of through holes 110X1 and 110X2 and the electronic components 120 and 122 disposed in the through holes 110X1 and 110X2 are not particularly limited and can be sufficiently modified according to the design specifications of the ordinary artisan. For example, the number of the plurality of through holes 110X1 and 110X2 may be two as shown in the drawing, but it is not limited to three, four or more. The electronic components 120 and 122 disposed in the respective through holes 110X1 and 110X2 may be one, but not limited to, two, three, etc. . The description of each configuration included in the electronic component package 100G according to another example is omitted because it is the same as that described above. The manufacturing method of the electronic component package 100G according to another example is the same as the manufacturing method of the electronic component package 100A to 100E except that after the plurality of through holes 110X1 and 110X2 are formed, And 110X2 of the electronic components 120 and 122 are omitted. On the other hand, it is needless to say that, in the case of the electronic component package 100G according to another example as well, the characteristic forms of the electronic component packages 100B to 100F may be applied.

24 is a cross-sectional view schematically showing another example of the electronic component package. 25 is a schematic top view of the electronic component package of Fig. 24 taken along line VIII-VIII '. Referring to the drawings, an electronic component package 100H according to another example includes a frame 110 having a through hole 110X, electronic components 120 and 124 disposed in the through hole 110X, An insulating part 150 covering at least an upper part of the electronic parts 120 and 124, a joint part 111 at least partly disposed between the frame 110 and the insulating part 150, At least one of the electronic components 120 and 124 is an integrated circuit 120 and at least one of the electronic components 120 and 124 is a passive component 124 )to be.

The integrated circuit 120 refers to a chip integrated in a single chip, where a number of hundreds to millions of devices are integrated into one chip. The integrated circuit 120 may be a central processor (e.g., CPU), a graphics processor (e.g., a GPU) , A microprocessor, a microcontroller, and the like, but is not limited thereto. The passive component 124 may be, for example, an inductor, a capacitor, a resistor, or the like, but is not limited thereto. The integrated circuit 120 is electrically connected to the reordering parts 130 and 140 through the electrode pad 120P. The passive component 124 is electrically connected to the reordering portions 130 and 140 through an electrode pad (not shown), for example, an external electrode. The number, spacing, arrangement type, etc. of the integrated circuit 120 and the passive components 124 are not particularly limited and can be sufficiently modified according to the design specifications of the ordinary artisan. For example, the integrated circuit 120 may be disposed near the center of the through hole 110X, and the passive component 124 may be disposed near the inner wall of the through hole 110X, but is not limited thereto. In addition, only one integrated circuit 120 may be disposed, and a plurality of passive components 124 may be disposed, but the present invention is not limited thereto. Alternatively, only one of the passive components 124 may be disposed. . The description of each configuration included in the electronic component package 100H according to another example is omitted because it is the same as that described above. The manufacturing method of the electronic component package 100H according to another example is similar to the manufacturing method of the electronic component package 100A to 100E except that the plurality of electronic components 120 and 124 are arranged in the above- The same is omitted. In the meantime, it is needless to say that, in the case of the electronic component package 100H according to another example as well, as shown in the drawings, the characteristic shapes of the electronic component packages 100B to 100G may be applied.

26 is a cross-sectional view schematically showing another example of the electronic component package. Referring to the drawings, an electronic component package 100I according to another example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, a frame 110, An insulating part 150 at least covering an upper part of the electronic part 120; a joining part 111 at least partly disposed between the frame 110 and the insulating part 150; Wherein the frame includes a heat dissipation layer disposed inside the frame and the heat dissipation layer is disposed between the frame and the heat dissipation layer, ) Are divided into a plurality of layers 115A and 115B.

The heat dissipation layer 116 is formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni) And the heat dissipation characteristics can be further improved when the heat dissipation layer 116 is provided. The description of each configuration included in the electronic component package 100I according to another example is omitted because it is the same as that described above. The manufacturing method of the electronic component package 100I according to another example is the same as the manufacturing method of the electronic component package 100A to 100E except that the heat dissipation layer 116 is disposed inside the package 110 The same shall apply hereafter. On the other hand, it is needless to say that, in the case of the electronic component package 100I according to another example as well, as shown in the drawings, the characteristic forms of the electronic component packages 100B to 100H may be applied.

27 is a cross-sectional view schematically showing another example of the electronic component package. Referring to the drawings, an electronic component package 100J according to another example includes a frame 110 having a through hole 110X, an electronic component 120 disposed in the through hole 110X, An insulating part 150 at least covering an upper part of the electronic part 120; a joining part 111 at least partly disposed between the frame 110 and the insulating part 150; The frame 110 includes a plurality of heat dissipation layers 116A and 116B disposed therein and the plurality of heat dissipation layers 116A and 116B disposed inside the frame 110, The metal or ceramic material constituting the frame 110 is divided into a plurality of layers 115A, 115B, and 115C.

Each of the heat dissipation layers 116A and 116B may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni) ), An alloy thereof, or the like. Therefore, when these heat dissipation layers 116A and 116B are provided, the heat dissipation characteristics can be further improved. It goes without saying that the heat-radiating layers 116A and 116B may be larger than those shown in the drawings. The description of each configuration included in the electronic component package 100J according to another example is omitted because it is the same as that described above. The method for manufacturing the electronic component package 100J according to another example includes arranging a plurality of the heat dissipation layers 116A and 116B in the package 110 in the manufacturing method of the electronic component packages 100A to 100E The same as described above will be omitted. It is needless to say that, in the case of the electronic component package 100J according to another example as well, as shown in the drawings, the characteristic shapes of the electronic component packages 100B to 100H may be applied.

Package-on-package structure

28 is a cross-sectional view schematically showing an example of a package-on-package structure. The electronic component packages 100A to 100H according to the various examples described above can be applied in various forms to the package-on-package structure. For example, referring to the drawings, a package-on-package structure according to an example is a form in which another electronic component package 200 is disposed on the electronic component package 100D.

The first electronic component package 100D includes the frame 110 having the through hole 110X, the electronic component 120 disposed in the through hole 110X, the frame 110, An insulating part 150 at least covering an upper portion of the frame 120, a bonding part 111 at least partly disposed between the frame 110 and the insulating part 150, A rewiring part 130 and 140 disposed under the frame 110 and the electronic part 120, a first external connection terminal 165 disposed under the rewiring parts 130 and 140, And a second external connection terminal 175 disposed on the upper portion of the first external connection terminal 150. The details of each configuration are the same as those described above.

The second electronic component package 200 is disposed on the first electronic component package 100D and is connected to the first electronic component package 100D through the second external connection terminal 175. [ The second electronic component package 200 may be a known electronic component package, and its structure or form is not particularly limited. As an example, the second electronic component package 200 may be a memory chip package in which a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM) But is not limited thereto.

29 is a cross-sectional view schematically showing another example of the package-on-package structure. Referring to the drawings, a package-on-package structure according to another example is a package in which other electronic component packages 200 and 300 are disposed above and below the electronic component package 100D.

The first electronic component package 100D includes the frame 110 having the through hole 110X, the electronic component 120 disposed in the through hole 110X, the frame 110, An insulating part 150 at least covering an upper portion of the frame 120, a bonding part 111 at least partly disposed between the frame 110 and the insulating part 150, A rewiring part 130 and 140 disposed under the frame 110 and the electronic part 120, a first external connection terminal 165 disposed under the rewiring parts 130 and 140, And a second external connection terminal 175 disposed on the upper portion of the first external connection terminal 150. The details of each configuration are the same as those described above.

The second electronic component package 100 is disposed on the first electronic component package 100D and is connected to the first electronic component package 100D through the second external connection terminal 175, . The second electronic component package 200 may be a known electronic component package, and its structure or form is not particularly limited. As an example, the second electronic component package 200 may be a memory chip package with a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM) no. Alternatively, the second electronic component package 200 may have any one of the above-described electronic component packages 100A to 100H.

The third electronic component package 300 is disposed below the first electronic component package 100D and is connected to the first electronic component package 100D through the first external connection terminal 165. [ The third electronic component package 300 may also be a known electronic component package, and its structure or form is not particularly limited. As an example, the third electronic component package 300 may also be a memory chip package with a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM) no. Alternatively, the third electronic component package 300 may have any one of the above-described electronic component packages 100A to 100H.

Although not shown in the drawings, various separate passive components (not shown), such as surface mount (SMT) components, may be disposed on the surface of the first electronic component package 100D. In addition, it goes without saying that various types of electronic component packages 100A to 100H or various other types of electronic component packages not shown in the drawings may be disposed together with the passive components in the upper package. A passive component (not shown) is also disposed within the second opening 181 and may be physically and / or electrically connected to the exposed conductive patterns.

Meanwhile, in the present disclosure, the lower part means the mounting direction of the package to the electronic device, the upper part means the opposite direction to the lower part, and the side part means the direction substantially perpendicular to the upper part and the lower part. Here, being located at the upper, lower, or side includes not only the direct contact of the target component with the reference component but also the case where it is located in the corresponding direction, but does not directly contact, i.e., indirectly touches.

In the following description, the first and second expressions are used to distinguish one component from another, and do not limit the order and / or importance of the components. In some cases, without departing from the scope of the right, the first component may be referred to as a second component, and similarly, the second component may be referred to as a first component.

The term " exemplary " used in this disclosure does not mean the same embodiment, but is provided to emphasize different characteristic features. However, the above-mentioned examples do not exclude that they are implemented in combination with the features of other examples. For example, although the description in the specific example is not described in another example, it can be understood as an explanation related to another example, unless otherwise described or contradicted by the other example.

In the meantime, the terms used in the present disclosure are used only to illustrate an example and are not intended to limit the present disclosure. Wherein the singular expressions include plural expressions unless the context clearly dictates otherwise.

1000: electronic device 1010: main board
1020: Chip related parts 1030: Network related parts
1040: Other parts 1050: Camera
1060: antenna 1070: display
1080: Battery 1090: Signal line
1100: Smartphone 1101: Smartphone body
1110: Smartphone main board 1120: Smart phone built-in electronic parts
1130: Smartphone camera 100, 200, 300: Electronic component package
100A to 100Q: electronic component package 110: frame
110A: upper surface 110B: lower surface
110Y: Through hole 133Y: Via hole
111, 111A, 111B: junction 113: through wiring
120, 122, 124: electronic parts 120P, 122P: electrode pad
110X, 110X1, 110X2: through holes 130, 140:
131, 141: insulating layer 132, 142, 152: conductive pattern
133, 143: conductive via 150: insulating portion
161, 171: opening 165, 175: external connection terminal
160: outer layer 170: cover layer
190: Adhesive polymer layer

Claims (15)

A frame comprising a metal or ceramic based material and having a through hole;
An electronic component disposed in the through hole;
An insulating portion at least covering an upper portion of the frame and the electronic component;
A bonding portion at least partially disposed between the frame and the insulating portion; And
A re-wiring portion disposed at a lower portion of the frame and the electronic component;
≪ / RTI >
The method according to claim 1,
Wherein the metal-based material is an Fe-Ni-based alloy (Invar).
The method according to claim 1,
Wherein the ceramic material is at least one selected from the group consisting of zirconia (ZrO ₂ ), alumina (Al ₂ O ₃ ), silicon carbide (SiC), and silicon nitride (Si ₃ N ₄ ) Parts package.
The method according to claim 1,
Wherein the metal or ceramic based material has a thermal conductivity of 1 W / mk or more, a thermal expansion coefficient of 10 ppm / 占 폚 or less, and an elastic modulus of 100 GPa or more.
The method according to claim 1,
And the junction is disposed on at least one side of the frame.
6. The method of claim 5,
And the junction is extended to an inner wall of the through hole.
The method according to claim 1,
Wherein the abutment comprises a first abutment and a second abutment,
Wherein the first joint is disposed on opposite sides of the frame,
And the second junction is disposed on the first junction and extends to an inner wall of the through hole.
The method according to claim 1,
Wherein the junction comprises a conductive material.
The method according to claim 1,
A through wire penetrating the frame; Further comprising:
Wherein an insulating material is disposed between the frame and the through wiring, or between the connecting portion and the through wiring.
The method according to claim 1,
Wherein the insulating portion surrounds an outer side portion of the frame,
Wherein the frame is not exposed to the outside.
The method according to claim 1,
The frame including at least one heat dissipation layer disposed therein,
Wherein the metal or ceramic-based material is divided into a plurality of layers by the heat dissipation layer.
The method according to claim 1,
An outer layer disposed under the re-routing portion and having a first opening; And
A first external connection terminal disposed in the first opening; Further comprising:
Wherein at least one of the first external connection terminals is disposed in a fan-out area,
Electronic component package.
The method according to claim 1,
A cover layer disposed on the insulating portion and having a second opening; And
A second external connection terminal disposed in the second opening; Further comprising:
And the second external connection terminal is electrically connected to the electronic component,
Electronic component package.
A frame having a through hole, an electronic part disposed in the through hole, an insulating part covering at least an upper portion of the frame and the electronic part, at least a part disposed between the frame and the insulating part A first external connection terminal disposed below the re-wiring section, and a second external connection terminal disposed on an upper portion of the insulation section, A first electronic component package including a terminal; And
A second electronic component package disposed on the first electronic component package and connected to the first electronic component package through the second external connection terminal;
Package-on-package structure.
15. The method of claim 14,
A third electronic component package disposed below the first electronic component package and connected to the first electronic component package through the first external connection terminal;
Package structure. ≪ / RTI >

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