KR20160091008A - Teraherta detection device using FET - Google Patents

Abstract

The purpose of the present invention is to provide a terahertz detector using a field-effect transistor capable of implementing high sensitivity by exhibiting an asymmetric characteristic only with a form of a source/drain and a gate. To achieve the purpose, the present invention relates to the terahertz detector using a field-effect transistor comprising: a source formed by being doped on a portion of a silicon base; a channel formed to surround the source on a plane; a drain formed outside the channel; a dielectric layer formed at an upper end of the source, the channel and the drain; and a gate located at an upper end of the dielectric layer, wherein when terahertz electromagnetic waves are applied through the gate, the intensity of the electromagnetic waves is detected by using a current/voltage outputted from the source and the drain.

Description

[0001] Terahertz detection device using FET [0002] FIELD OF THE INVENTION [0003]

Field of the Invention [0002] The present invention relates to a terahertz detector using an FET, and more particularly, to a terahertz detector that detects an electromagnetic wave of terahertz using an asymmetric FET.

In order to increase the sensitivity in the terahertz detector, the charge of the channel has to be gathered in the two-dimensional form due to the gate field effect. The compound semiconductor has been mainly used because it has higher efficiency of forming the two-dimensional channel charge than silicon. However, It is difficult to make various asymmetric structures because it is manufactured by a process which is higher in price than silicon and an etching process for forming a shape is difficult. In addition, when using a compound semiconductor, it is difficult to integrate an antenna and an amplifier, .

Therefore, in recent years, it has been reported that the performance of the silicon-FET-based detector is improved due to the improvement of the performance of the antenna and the amplifier in silicon. However, due to the characteristics of the silicon FET with low output power, improvement of the performance of the peripheral components merely improves the response of the terahertz detector There is a limit.

Generally, in the case of a field-effect transistor (THz) detector based on a field-effect transistor (FET), an alternating current signal THz (THz) is applied between two terminals G and S of three external connection terminals (gate G, source S and drain D) It is possible to concentrate the wave signal to induce the asymmetry of the amount of charge in the lower semiconductor channel region between the source and the drain and to detect the photoresponse with the DC voltage of the output terminal (drain D) by this asymmetric charge distribution Thereby detecting a signal.

As described above, in order to secure the charge asymmetry required for improving the response of the FET-based THz detector, there is a method of increasing the efficiency of the antenna for the incident THz wave and increasing the gain of the amplifier for amplifying the voltage of the output terminal D , The output voltage of a symmetrical FET is limited to a noise level so that the degree of improvement in response is very small.

Even when such an FET is fabricated as a self-aligned gate structure which is an advantage of the silicon process, it is necessary to make the source / drain region asymmetric after the gate is already formed, Not only a complex additional mask process is required, such as an ion implantation process for overlapping purposes of ultrafine high-performance devices, in order to change only one of them, and due to the isotropic diffusion of implanted ions for such asymmetry, THz The source / drain asymmetry ratio of the gate, which is a terminal to which the wave is incident, is reduced, so that the charge asymmetry effect is not large.

In addition, although the gate sidewall process (gate overlapped with the lower channel) for underlap for high voltage power device purposes can effectively control the asymmetry effect by adjusting the sidewall thickness, in the case of the underlap structure, The asymmetry effect of the gate after the gate is small, and there is a problem that the resistance of the device is increased and the noise equivalent power is increased.

Thus, even if an asymmetric source / drain region can be formed using a self-aligned gate structure, which is the main method of the conventional silicon technology based FET process, the result is that the source / Drain Asymmetric region has no change or its influence is extremely small, and the charge asymmetry effect between source and drain is greatly reduced. Therefore, in order to effectively structure the source / drain region of the silicon-based FET asymmetrically as well as the source / drain regions seen by the gate simultaneously, an additional method different from the existing self-alignment method is required, A configuration of a terahertz detector capable of maximizing the effect of the asymmetry effect is disclosed in Laid-Open Patent Application No. 2013-0133368.

The above-mentioned patent shows excellent characteristics in that the source / drain regions are formed asymmetrically to increase the sensitivity of the detector, but a separate process is required for the source / drain and gate shapes to exhibit asymmetric characteristics based on a quadrangle There are disadvantages.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a terahertz detector employing a field effect transistor capable of realizing high sensitivity by exhibiting an asymmetric characteristic by only the shape of a source / drain and a gate itself, The purpose.

According to an aspect of the present invention, there is provided a terahertz detector using a field effect transistor, the field effect transistor comprising: a source formed by doping a part of a silicon base; A channel formed in a planar shape to surround the source; A drain formed outside the channel; A dielectric layer formed on top of the source, channel and drain; And a gate positioned at an upper end of the dielectric layer. When the terahertz electromagnetic wave is applied through the gate, the degree of the electromagnetic wave is detected by the current / voltage output from the source and the drain.

Preferably, the channel is formed with a constant width.

Preferably, the gate is formed in the same size and shape as the channel.

Preferably, the gate has the same shape as the channel, and is partially overlapped with the source.

Preferably, the gate has the same shape as the channel, and is partially overlapped with the drain.

Preferably, the gate has the same shape as the channel, and is partially overlapped with the source and the drain.

Preferably, the planar shape of the source is circular or polygonal.

The terahertz detector using the field-effect transistor according to the present invention may have asymmetric characteristics due to a geometrical shape by forming the source to surround the channel, and additionally adding asymmetry by adjusting the degree of overlap between the gate and the channel. , And the parameters defining the shape can freely be set, thereby providing the effect of manufacturing a terahertz detector with high sensitivity.

1 is a cross-sectional view of a terahertz detector according to the present invention,
Fig. 2 is a plan view of Fig. 1,
Figure 3 is another embodiment of Figure 2,
Fig. 4 is an explanatory diagram for defining the size of Fig. 2. Fig.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

The terahertz detector 100 using the field effect transistor according to the present invention is implemented through the unit FET 10 formed on the silicon base 1 as shown in FIGS.

The cross section of the FET 10 is composed of a source 11, a drain 12, a channel 13, a dielectric layer 14 and a gate 15 as shown in Fig.

The source 11 and the drain 12 may be doped with impurities and the materials of the dielectric layer 14 and the gate 13 may be used as those applied to conventional FETs. 13, at which time the characteristic of the terahertz electromagnetic wave applied by the voltage generated between the source 11 and the drain 12 is sensed.

On the other hand, the source 11 is formed at the center as shown in FIG. 2 on the upper surface, and the channel 13 surrounds the source 11.

The source 11 may be isolated from the source 11 and the electrode may be connected to the source 11 through the upper surface of the source 11. If necessary, So that the electrodes can be connected through the lower end.

At this time, the shape of the source 11 may be circular, elliptical, triangular, square, or the like, and may be a polygonal shape having a pentagon or more, as shown in FIG.

Further, the inside of the source 11 and the inside of the drain 12 may have different shapes. For example, the source 11 may have a circular shape and the inside of the drain 12 may have a rectangular shape. The thickness of the channel 13 may be different.

Also, if necessary, the source 11 and the drain 12 may have the same shape, but the origin may be formed at different positions, and the thickness of the channel 12 may be different.

If the channel 13 is formed to have a constant width and the source 11 is wrapped around the channel 11, the channel 11 is formed in the same shape as the source 11, do.

Since the drain 12 is formed by excluding the source 11 and the channel 13, when the source 11 is isolated as described above, it is advantageous to provide geometrical asymmetry.

The gate 15 is located at the upper end of the dielectric layer 14 and has the same shape as the channel 13. However, the gate 15 is configured such that a certain area overlaps the source 11 and the drain 12. Such an overlap has the advantage of further increasing the asymmetry.

On the other hand, when the source 11 has a circular shape, the gate 15 is formed in an annular shape. At this time, the diameter of the source 11 is d1, The asymmetry of the FET 10 when the diameter is d2 and the size of the portion where the gate 15 and the slave 11 overlap each other is e1 and the size of the portion where the gate 15 and the drain 12 overlap each other is e2 It is represented by the following equation.

In this case, when the length of the source 11 corresponding to the end of the channel 13 is Ws and the length of the drain 12 corresponding to the other end of the channel 13 is Wd, the width asymmetry is defined as the ratio of the length can do.

Width Asymmetry = Wd / Ws

        =? d2 /? d1

        = d2 / d1

.

Also, the gate 15 has area asymmetry due to the overlap. The asymmetry by the gate 15 is defined as the ratio of the area where the gate 15 overlaps with the drain 12 and the area where the gate 15 overlaps with the source 11.

Therefore, the area asymmetry is calculated as follows.

Area asymmetry = area where the drain 12 and gate 15 are oblivated / area where the source 15 and the source 15 are oblivated

The area where the source 11 and the gate 15 are oblivated = π (d1 / 2) ² -π (d1 / 2-e1) ²

The area where the drain 12 and the gate 15 are oblivated =? (D2 / 2 + e2) ² -? (D2 / 2) ²

Therefore, area asymmetry = (d2e2 + e2 ² ) / (d1e1-e1 ² )

(D2 + e) / (d1-e), where e1 = e2 = e, that is, when overlapping portions are constructed identically.

As described above, the terahertz detector 100 using the field effect transistor according to the present invention exhibits asymmetry in the plane shape itself of the FET, so that sufficient sensitivity can be maintained without any additional setting for asymmetry.

If the difference between d1 and d2 is increased, the width asymmetry is increased. If the overlap value e is increased, the area asymmetry is also increased, and the values of d1, d2, e1 and e2 are adjusted The terahertz detector 100 having various characteristics can be manufactured.

As described above, the terahertz detector 100 of the present invention can be made of a silicon process technology. The terahertz wave detector 100 receives the terahertz wave signal from the outside and enters between the gate 15 electrode and the source 11 electrode The integration with the surrounding components of the detector 100 for further performance improvement, such as an antenna for detecting the output voltage / current between the source 11 electrode and the metal electrode of the drain 12, It can be implemented with low-cost silicon process technology, and high-sensitivity silicon-based large-area multi-pixel array type detector integration can be realized at low cost by the above-described low-cost silicon process technology.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, And all of the various forms of embodiments that can be practiced without departing from the technical spirit.

1: Silicon base 10: FET
11: source 12: drain
13: channel 14: dielectric layer
15: gate 100: detector

Claims (7)

In a terahertz detector using a field effect transistor,
Wherein the field effect transistor comprises:
A source formed by doping a portion of the silicon base;
A channel formed in a planar shape to surround the source;
A drain formed outside the channel;
A dielectric layer formed on top of the source, channel and drain; And
And a gate positioned on top of the dielectric layer,
And the degree of the electromagnetic wave is detected by the current / voltage output from the source and the drain when the terahertz electromagnetic wave is applied through the gate.
The terahertz detector of claim 1, wherein the channel is formed with a constant width.
3. The terahertz detector as claimed in claim 2, wherein the gate is formed in the same size and shape as the channel.
3. The terahertz detector of claim 2, wherein the gate has the same shape as the channel and partially overlaps with the source.
3. The terahertz detector of claim 2, wherein the gate has the same shape as the channel and partially overlaps the drain.
3. The terahertz detector of claim 2, wherein the gate has the same shape as the channel and partially overlaps the source and drain.
The terahertz detector according to any one of claims 2 to 6, wherein the planar shape of the source is circular or polygonal.

Images