KR20160084914A - Heat releasing semiconductor package and method for manufacturing the same - Google Patents

Abstract

The present invention relates to a heat releasing semiconductor package and a method for manufacturing the same. The heat releasing semiconductor package includes a base part which includes a film, an electrode pattern formed on both upper parts of the film, and solder resist surrounding the electrode pattern in the upper part of the electrode pattern, and a heat releasing semiconductor part which includes a heat releasing tape which surrounds a semiconductor device, bumps formed in the lower part of the semiconductor device, and at least part of bumps and the lower part of the semiconductor device. Therefore, the heat releasing semiconductor package according to the present invention can maximize a heat releasing effect by using a heat releasing tape to surround part of the semiconductor device, and can secure the stability of a circuit.

Description

TECHNICAL FIELD [0001] The present invention relates to a heat dissipation semiconductor device package and a manufacturing method thereof. BACKGROUND OF THE INVENTION [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat dissipation semiconductor device packaging technique, and more particularly, to a semiconductor device package and a manufacturing method thereof that can be manufactured through a simple manufacturing process and an inexpensive manufacturing cost.

2. Description of the Related Art Generally, a device including a liquid crystal display device such as a notebook computer or a TV uses a highly integrated transistor for realizing a high resolution display. Such a highly integrated transistor generates a high temperature during driving and therefore requires application of a technique for reducing heat generated.

Korean Patent Laid-Open Publication No. 10-2000-0056801 relates to a heat dissipation structure of a semiconductor package, in which a heat dissipation element is installed inside a package to discharge internal heat to the outside.

Korean Patent No. 10-1214292 relates to a heat dissipation semiconductor device package, a manufacturing method thereof, and a display device including the heat dissipation semiconductor device package, and the heat dissipation effect can be improved by adding a heat dissipation means.

Such conventional technology has a disadvantage in that the heat dissipation means in which the adhesive and the heat dissipation paint are mixed to reduce the heat generation of the drive IC is used, and additional processing and subsidiary material costs are added.

Korean Patent Publication No. 10-2000-0056801 Korean Patent No. 10-1214292

One embodiment of the present invention seeks to provide a semiconductor device package and a method of manufacturing the same that can be manufactured through a simple manufacturing process and an inexpensive manufacturing cost.

An embodiment of the present invention is to provide a heat dissipation semiconductor device package and a method of manufacturing the same that can increase a heat dissipation effect by using a heat dissipation tape to cover a part of a semiconductor device.

An embodiment of the present invention is to provide a heat dissipation semiconductor device package and a method of manufacturing the same that can ensure the stability of a circuit by using a heat dissipation tape to enclose a part of a semiconductor device.

The heat dissipation semiconductor device package includes a base portion and a semiconductor element including a film, an electrode pattern formed on upper portions of the film, and a solder resist formed on the electrode pattern so as to surround the electrode pattern, And a heat dissipation semiconductor portion including a plurality of bumps formed at a lower portion, a lower portion of the semiconductor element, and a heat radiation tape formed to enclose at least a part of the plurality of bumps.

In one embodiment, the heat-dissipating semiconductor device package may further include a semiconductor containing region on which the heat-dissipating semiconductor portion can be received.

The heat dissipation tape may be formed by punching so as to surround at least a part of the plurality of bumps. In addition, the heat radiation tape may directly contact the electrode pattern to electrically isolate the electrode pattern.

In one embodiment, the heat dissipation semiconductor device package may further include the heat dissipation semiconductor portion on the heat dissipation semiconductor portion and a heat dissipation resin surrounding at least a part of the base portion.

The heat dissipation resin may include alumina and at least one of silicon, epoxy, and urethane series. The ratio of at least one of silicon, epoxy and urethane series may be between 15% and 35%, and the ratio of alumina may be between 65% and 85%. In one embodiment, the heat dissipation resin may be applied by dispensing or squeegee printing.

Among the embodiments, a method of manufacturing a heat dissipation semiconductor device package includes the steps of forming a plurality of bumps under a semiconductor element, bonding the coupled semiconductor device and the plurality of bumps to a heat dissipation tape to form a heat dissipation semiconductor portion, And forming a base portion including the pattern and the solder resist and adhering the base portion to the lower portion of the heat dissipation semiconductor portion.

In one embodiment, the method of manufacturing a heat-dissipating semiconductor device package may further include filling the heat-dissipating semiconductor portion with the heat-dissipating resin to cover at least a part of the semiconductor element and the base portion.

In one embodiment, the method of manufacturing a heat dissipation semiconductor device package may further include the step of curing the heat dissipation resin. The curing may be performed at a temperature range of 125 ° C to 170 ° C.

Among the embodiments, a method of manufacturing a heat dissipation semiconductor package includes the steps of forming a plurality of bumps under a semiconductor element, forming a base portion including a film, an electrode pattern, and a solder resist, And bonding the plurality of bumps coupled with the bottom of the semiconductor element.

The disclosed technique may have the following effects. It is to be understood, however, that the scope of the disclosed technology is not to be construed as limited thereby, as it is not meant to imply that a particular embodiment should include all of the following effects or only the following effects.

The heat dissipation effect of the heat dissipation semiconductor device package and the method of manufacturing the same according to an embodiment of the present invention can be maximized by using a heat dissipation tape that partially surrounds the semiconductor device.

The heat dissipation semiconductor device package and the manufacturing method thereof according to the embodiment of the present invention can reduce the manufacturing cost by using the heat dissipation tape that partially surrounds the semiconductor device.

The heat dissipation semiconductor device package and the method of manufacturing the same according to an embodiment of the present invention can ensure the stability of the circuit by using the heat dissipation tape that partially surrounds the semiconductor device.

1 is a side view illustrating a heat-dissipating semiconductor device package according to an embodiment of the present invention.
2 is a side view illustrating a heat dissipation semiconductor device package according to another embodiment of the present invention.
FIG. 3 is a view illustrating a process of manufacturing the heat dissipation semiconductor device package shown in FIG.
FIG. 4 is another embodiment for explaining the process of manufacturing the heat dissipation semiconductor device package shown in FIG.
5 is a flow chart for explaining the process of manufacturing the heat dissipation semiconductor device package shown in Fig.

The description of the present invention is merely an example for structural or functional explanation, and the scope of the present invention should not be construed as being limited by the embodiments described in the text. That is, the embodiments are to be construed as being variously embodied and having various forms, so that the scope of the present invention should be understood to include equivalents capable of realizing technical ideas. Also, the purpose or effect of the present invention should not be construed as limiting the scope of the present invention, since it does not mean that a specific embodiment should include all or only such effect.

Meanwhile, the meaning of the terms described in the present application should be understood as follows.

The terms "first "," second ", and the like are intended to distinguish one element from another, and the scope of the right should not be limited by these terms. For example, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

It should be understood that the term " and / or " includes all possible combinations from one or more related items. For example, the meaning of " first item, second item and / or third item " may be presented from two or more of the first, second or third items as well as the first, second or third item It means a combination of all the items that can be.

It is to be understood that when an element is referred to as being "connected" to another element, it may be directly connected to the other element, but there may be other elements in between. On the other hand, when an element is referred to as being "directly connected" to another element, it should be understood that there are no other elements in between. On the other hand, other expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well.

It should be understood that the singular " include "or" have "are to be construed as including a stated feature, number, step, operation, component, It is to be understood that the combination is intended to specify that it does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

All terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs, unless otherwise defined. Commonly used predefined terms should be interpreted to be consistent with the meanings in the context of the related art and can not be interpreted as having ideal or overly formal meaning unless explicitly defined in the present application.

1 is a side view illustrating a heat-dissipating semiconductor device package according to an embodiment of the present invention.

Referring to FIG. 1, a heat dissipation semiconductor device package 100 includes a base 110 and a heat dissipation semiconductor part 120. The base unit 110 includes a film 111, an electrode pattern 112 and a solder resist 113. The heat dissipation semiconductor unit 120 includes a heat dissipation tape 121, a plurality of bumps 122 And a semiconductor element 123, as shown in FIG.

The film 111 may correspond to a base for integrating a semiconductor and may be a package film used for a chip on flexible printed circuit (COF), a tape carrier package (TCP), or a chip on board (COB), for example. can do. One side of the film 111 is connected to a panel ACF (Anisotropic Conductive Film) terminal (not shown), and the other side is connected to a video device board (not shown). That is, the semiconductor device 123, the panel ACF (Anisotropic Conductive Film) terminal (not shown), and the imaging device board (not shown) may be electrically connected through the electrode pattern 112 on the film 111.

The electrode pattern 112 may be formed by depositing a conductive material on the film 111 corresponding to the signal line of the semiconductor element 123. The electrode pattern 112 formed of a conductive material is electrically connected to the semiconductor element 123 through the plurality of bumps 122 to support the transmission of the signal by the semiconductor element 123. [ In one embodiment, the electrode pattern 112 may comprise a dummy pattern. Here, the dummy pattern corresponds to a pattern in which the electric signal line is not connected, and this can be connected to the electric signal line as required.

The solder resist 113 is patterned on the electrode pattern 112 around the semiconductor element accommodating region generated by removing a part of the deposited electrode patterns 112. That is, the solder resist 113 is patterned on the electrode pattern 112 to protect the electrode pattern 112 formed of a conductive material, and electrically isolate the semiconductor element 123 from other parts. Here, the removal of the electrode pattern 112 may be performed through an etching process using a photo.

In one embodiment, the solder resist 113 may be partially removed by an etching process to expose a portion of the electrode pattern 112. The exposed electrode pattern 112 may be in direct contact with the heat radiation tape 121 to increase the heat radiation effect and the electrode pattern 112 may have the effect of being electrically insulated by the heat radiation tape 121. [

The heat dissipation tape 121 is attached on the film 111 so as to surround the solder resist 113. The heat radiation tape 121 can maximize the heat dissipation effect by using a material having high thermal conductivity. The thickness of the heat radiation tape 121 may be formed differently depending on the semiconductor process.

The heat dissipation tape 121 includes an insulating material and can be electrically insulated from the electrode pattern 112 by directly contacting the exposed electrode pattern 112 on the electrode pattern 112.

The heat dissipation tape 121 may include a hole (not shown) that reflects the position of a plurality of bumps 122 previously set so as not to insulate the plurality of bumps 122 from the semiconductor device 123 have.

The plurality of bumps 122 may be directly connected to the semiconductor device 123 to electrically connect the electrode patterns 112.

The upper side of the plurality of bumps 122 is connected to the semiconductor element 123 and the lower side of the solder resist 113 is removed to expose the electrode patterns 112 and bond them to the exposed electrode patterns 112 have.

The plurality of bumps 122 may be formed for each electrode pattern 112 deposited on the film 111 and may be electrically connected to the electrode pattern 112 without loss of signals from the semiconductor device 123. The plurality of bumps 122 may also be formed on the dummy pattern and electrically connected to the semiconductor device 123 if necessary.

The semiconductor device 123 may be coupled with the plurality of bumps 122 to be electrically connected to the electrode pattern 112 through the plurality of bumps 122. The semiconductor device 123 may correspond to a gate driver (i.e., a data source) used in a display device, but is not limited thereto.

2 is a side view illustrating a heat dissipation semiconductor device package according to another embodiment of the present invention.

The heat dissipation semiconductor package 100 further includes a heat dissipation resin 210.

The heat dissipation resin 210 may fill the heat dissipation semiconductor part 120 and the heat dissipation resin 210 to cover at least a part of the base part 110 on the heat dissipation semiconductor part 120. That is, it is filled to cover the upper surface of the heat dissipation tape 121 and the semiconductor device 123, thereby increasing the heat radiation effect. In one embodiment, the heat dissipation resin 210 may include at least one of silicon, epoxy, and urethane series and alumina. Here, alumina can be used as a filler for increasing the insulating property. Also, alumina can be used by replacing one of Aluminum Nitride, Boron Nitride, Carbon Nitride Silicon Carbide, Magnesium Oxide and Graphene. have. In one embodiment, the proportion of at least one of the silicon, epoxy, and urethane series corresponds to 15% to 35%, and the ratio of alumina may correspond to 65% to 85% have. The heat dissipation resin 210 is applied by dispensing or squeegee printing. The dispensing method is a method of spraying the heat dissipation resin 210 using a nozzle on the lower side of the semiconductor element 160 of the heat dissipation resin 210. The squeegee printing method is a method of spraying the heat dissipation resin 210 210 to the bottom of the semiconductor device 123 by using a plunger or the like.

The heat dissipation resin 210 having a predetermined viscosity can be used to form the semiconductor device package. That is, the heat dissipation resin 210 may flow to the lower portion of the semiconductor element 123 and fill at least a part of the semiconductor element 123. In one embodiment, the heat dissipation resin 210 may be sprayed after the plurality of bumps 122 and the semiconductor element 123 are coupled to cover the entire semiconductor element 123. In this case, the heat dissipation resin 210 can rapidly remove the heat generated from the entire semiconductor device 123, thereby increasing the heat dissipation effect.

The heat dissipation resin 210 is cured after being applied. Here, the curing may correspond to the step of curing the liquid heat-dissipating resin. Curing can be divided into Pre-cure and Post-cure.

The pre-cure is a step for supporting the curing of the applied heat dissipation resin 210, and is a process for maintaining the adhesive force of the heat dissipation resin 210. In addition, the post-cure is a step in which the applied heat dissipation resin 210 is hardened to be suitable for packaging. The pre-cure and post-cure processes of the heat dissipation resin 210 can be performed at room temperature, oven or ultraviolet curing.

In one embodiment, the temperature of the pre-cure and the post-cure is most preferably 125 ° C to 170 ° C based on the viscosity of the heat radiation resin 210, and the pre-cure time is 5 minutes to 20 minutes. 1 hour to 2 hours and 30 minutes is the best.

FIG. 3 is a view illustrating a process of manufacturing the heat dissipation semiconductor device package shown in FIG.

3 (a), an electrode pattern 112 and a solder resist 113 are sequentially formed on a film 111 to form a base portion 110. The semiconductor containing region 310 is formed by successively forming a solder resist (Not shown). In one embodiment, the solder resist 113 may be partially removed and the electrode pattern 112 exposed. The exposed electrode pattern 112 is a portion for contacting the plurality of bumps 122 of the semiconductor unit 120 in a subsequent process. In one embodiment, the heat radiation tape 121 may be formed in a size that can cover both the solder resist 113 and the partially exposed electrode patterns 112.

3 (b), the semiconductor element 123 connects a plurality of bumps 122 to the lower portion thereof. The positions where the plurality of bumps 122 are formed are formed to coincide with the input and output portions of the signals of the semiconductor element 123 to electrically connect the semiconductor element 12 and the plurality of bumps 122 to each other Can be connected.

The heat dissipation tape 121 may be formed such that the semiconductor device 123 and the plurality of bumps 122 are brought into contact with each other by punching. In one embodiment, the heat radiation tape 121 is formed by punching the positions of a plurality of bumps 122 previously set so as not to insulate the plurality of bumps 122 from the semiconductor element 123 and the position of the semiconductor element 123 (Not shown) may be formed.

The semiconductor element 123 and the plurality of bumps 122 are bonded to the punched heat dissipation tape 121 to form the heat dissipation semiconductor part 120. [

In FIG. 3 (c), the base 110 and the heat dissipation semiconductor part 120 are combined to form the heat dissipation semiconductor device package 100. That is, the electrode patterns 112 exposed at the base 110 and the plurality of bumps 122 of the heat-dissipating semiconductor part 120 are bonded to each other by the heat of the bonding equipment.

FIG. 4 is another embodiment for explaining the process of manufacturing the heat dissipation semiconductor device package shown in FIG.

4 (a), an electrode pattern 112 and a solder resist 113 are sequentially formed on a film 111 to form a base portion 110. Here, the semiconductor containing region 310 may be formed by removing a part of the solder resist 113 sequentially formed. In one embodiment, the solder resist 113 may be partially removed and the electrode pattern 112 exposed. The exposed electrode pattern 112 is a portion for contacting the plurality of bumps 122 of the semiconductor portion 120 in a subsequent process. In one embodiment, the heat radiation tape 121 is a solder resist 113, And may be formed in a size that can cover all of the exposed electrode patterns 112.

The heat dissipation tape 121 may be formed to contact the upper portion of the bay portion 110. In one embodiment, the heat dissipation tape 121 has holes (not shown) reflecting the positions of a plurality of predetermined bumps 122 so as not to insulate the plurality of bumps 122 and the semiconductor devices 123 by punching .

4 (b), the semiconductor element 123 connects the plurality of bumps 122 to the lower portion thereof. The positions where the plurality of bumps 122 are formed are formed to coincide with the input and output portions of the signals of the semiconductor element 123 to electrically connect the semiconductor element 12 and the plurality of bumps 122 to each other Can be connected.

4 (c), a semiconductor element 123 having a plurality of bumps 122 coupled to a base portion 110 and a heat dissipation tape 121 formed in advance is coupled to form a heat dissipation semiconductor device package 100 . That is, the electrode patterns 112 exposed at the base 110 and the plurality of bumps 122 of the heat-dissipating semiconductor part 120 are bonded to each other by the heat of the bonding equipment.

5 is a flowchart illustrating a process of manufacturing the heat dissipation semiconductor device package shown in FIG.

Referring to FIG. 5, a plurality of bumps 122 are connected to a lower portion of the semiconductor device 123 (step S501).

The semiconductor device 123 and the plurality of bumps 122 are adhered to the heat dissipation tape 121 to form the heat dissipation semiconductor part 120 (step S502). The heat dissipation tape 121 is made of a material having high thermal conductivity and can remove heat generated from the semiconductor device 123. The heat dissipation tape 121 includes an insulating material, The electrode pattern 112 can be electrically isolated from the electrode pattern 112 directly.

An electrode pattern 112 is formed on both sides of the film 110 and a base 110 including a solder resist 113 is formed to cover the electrode pattern 112 on the electrode pattern 112 Step S503). Here, the removal of the electrode pattern 120 may be performed through an etching process using a photo. Photo Etching process refers to a process of applying a photosensitive resin to the entire surface of a flat-type copper foil or oxide film and then irradiating ultraviolet rays through a negative-shaped mask to remove the resin of the uninspected portion with a chemical . Here, the background of the perforated portion can be selectively removed by dissolving away with other chemicals.

The solder resist 113 may be patterned on the electrode pattern 112 around the semiconductor element accommodating region 310 generated by removing a part of the deposited electrode patterns 112. That is, the solder resist 113 is patterned on the electrode pattern 112 to protect the electrode pattern 112 formed of the conductive material and electrically isolate the semiconductor element 123 from other parts.

The base 110 and the bottom of the heat-dissipating semiconductor part 120 are bonded together (step S504). Here, the upper portion of the exposed electrode pattern 112 of the base portion 110 and the plurality of bumpers 122 of the heat dissipation semiconductor portion 120 are coupled to each other by the heat of the bonding equipment.

The heat dissipation semiconductor part 120 may be further filled with a heat dissipation resin to cover at least a part of the semiconductor element and the base part 110 (step S505). The heat dissipation resin 210 may include at least one of silicon, epoxy and urethane and alumina. The heat dissipation resin 210 may include silicon, epoxy, and urethane At least one of them corresponds to 15% to 35%, and the ratio of the alumina may correspond to 65% to 85%.

The heat dissipation resin 210 cures the heat dissipation resin by the curing step (step S506). In one embodiment, the curing may be performed at a temperature range of 125 캜 to 170 캜.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit and scope of the present invention as defined by the following claims It can be understood that

100: heat dissipation semiconductor device package
110: Base portion
111: Film 112: Electrode pattern
113: solder resist
120: heat dissipation semiconductor part
121: heat-radiating tape
122: a plurality of bumps 123: a semiconductor element
210: heat dissipation resin
310: Semiconductor receiving area

Claims (13)

A base, a film, an electrode pattern formed on upper portions of the film, and a solder resist formed on the electrode pattern to surround the electrode pattern. And
And a heat dissipation semiconductor portion including a semiconductor element, a plurality of bumps formed at a lower portion of the semiconductor element, a lower portion of the semiconductor element, and a heat radiation tape formed to surround at least a part of the plurality of bumps.
The heat-dissipating semiconductor device package according to claim 1, further comprising a semiconductor accommodating region on which the heat-dissipating semiconductor portion can be housed.
The heat sink according to claim 1, wherein the heat radiating tape
And a hole is formed by punching so as to surround at least a part of the plurality of bumps.
The heat sink according to claim 1, wherein the heat radiating tape
Wherein the electrode pattern is in direct contact with the electrode pattern to electrically insulate the electrode pattern.
The method according to claim 1,
And a heat dissipation resin surrounding the heat dissipation semiconductor part and a part of the base part.
The heat sink according to claim 5, wherein the heat dissipation resin
Wherein at least one of silicon, epoxy, and urethane series and alumina is contained.
The method of claim 6, wherein the ratio of at least one of the silicon, epoxy, and urethane series is
Wherein the amount of the alumina corresponds to 15% to 35%, and the ratio of the alumina corresponds to 65% to 85%.
The heat sink according to claim 7, wherein the heat dissipation resin
Wherein the heat dissipation layer is applied by dispensing or squeegee printing.
Forming a plurality of bumps under the semiconductor device;
Bonding the coupled semiconductor device and the plurality of bumps to the heat dissipation tape to form a heat dissipation semiconductor portion; And
Forming a base portion including a film, an electrode pattern, and a solder resist, and adhering the base portion to a lower portion of the heat dissipation semiconductor portion.
10. The method of claim 9,
Further comprising the step of filling the heat dissipation semiconductor part with a heat dissipation resin so as to surround at least a part of the semiconductor element and the base part.
11. The method of claim 10,
Further comprising the step of curing the heat-dissipating resin.
12. The method of claim 11, wherein the curing comprises:
Lt; RTI ID = 0.0 > 125 C < / RTI > to < RTI ID = 0.0 > 170 C. < / RTI >
Forming a plurality of bumps under the semiconductor device;
Forming a base portion including a film, an electrode pattern, and a solder resist;
Bonding a heat radiation tape to an upper portion of the base portion; And
And bonding the plurality of bumps coupled to the lower portion of the semiconductor element to the upper portion of the base portion and the heat radiation tape.

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