KR20160056396A - Organic light emitting device - Google Patents

Abstract

According an embodiment of the present invention, an organic light emitting device includes a substrate, a first capacitor, a first organic insulating film, a second capacitor, a second organic insulating film, a pixel electrode, an organic film layer, and a counter electrode. The first capacitor is placed on the substrate, and includes a gate insulating film interposed between lower and upper electrodes of the first capacitor. The first organic insulating film is placed on the first capacitor, and flattens a lower step. The second capacitor is placed on the first organic insulating film, and includes a passivation film interposed between lower and upper electrodes of the second capacitor. The second organic insulating film is placed on the second capacitor. The pixel electrode is placed on the organic insulating film. The organic film layer is placed on the pixel electrode, and at least includes a light emitting layer. The counter electrode is placed on the organic film layer. Therefore, the organic light emitting device can improve the capacity of a capacitor.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0002] The present invention relates to an organic light emitting diode display, and more particularly, to a high-resolution organic light emitting diode display capable of improving a capacitor capacity.

2. Description of the Related Art In recent years, various flat panel display devices capable of reducing weight and volume, which are disadvantages of CRT (Cathode Ray Tube), have been developed. Examples of such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting display (OLED) : Organic Light Emitting Display). Among them, the organic light emitting display (OLED) is a self-emission type display device which excites an organic compound to emit light, and it does not require a backlight used in an LCD, have. In addition, it can be manufactured at low temperature, has a response speed of 1ms or less, has a high response speed, exhibits characteristics such as low power consumption, wide viewing angle, and high contrast.

The organic electroluminescent display device includes a light emitting layer made of an organic material between a first electrode, which is an anode, and a second electrode, which is a cathode, and holes injected from the first electrode and electrons received from the second electrode are combined in the light emitting layer, And the exciton emits light by energy generated when the exciton returns to the ground state. The organic electroluminescent display device can be divided into a backlight type and a front emission type according to the direction in which light is emitted. In the bottom emission type, light is emitted in the lower direction of the substrate, that is, in the direction from the light emitting layer toward the first electrode, and in the top emission type, light is emitted from the upper direction of the substrate, that is, from the light emitting layer toward the second electrode.

In recent years, a display device is increasingly required to have a higher resolution, and a smaller pixel size is required. One pixel is divided by the intersection of a gate line, a data line and a common power supply line, and a switching thin film transistor, a driving thin film transistor, a capacitor, and an organic light emitting diode are formed in this pixel. As the pixel size becomes smaller, the thin film transistors and the above-described lines are integrated and arranged very closely. Accordingly, the area of the capacitor included in the pixel is also reduced, thereby reducing the capacitance of the capacitor.

The present invention provides a high-resolution organic light emitting display capable of improving capacitor capacity.

According to an aspect of the present invention, there is provided an organic light emitting display including a substrate, a first capacitor, a first organic insulating layer, a second capacitor, a second organic insulating layer, a pixel electrode, an organic layer, . The first capacitor is disposed on the substrate and includes a gate insulating film interposed between the first capacitor lower electrode and the first capacitor upper electrode. The first organic insulating film is located on the first capacitor, and flattenes the lower step. The second capacitor is disposed on the first organic insulating film and includes a passivation film interposed between the second capacitor lower electrode and the second capacitor upper electrode. The second organic insulating film is located on the second capacitor. The pixel electrode is located on the organic insulating film. The organic film layer is located on the pixel electrode, and includes at least a light emitting layer. The counter electrode is located on the organic film layer.

The first organic insulating film and the second organic insulating film are formed of any one selected from the group consisting of benzocyclobutene (BCB) based resin, acrylate based resin, and polyimide resin.

The thickness of the first organic insulating film is 1 to 5 mu m.

In addition, the OLED display according to an exemplary embodiment of the present invention includes a substrate, a switching thin film transistor, a driving thin film transistor, a first capacitor, a second capacitor, and an organic insulating layer. The first and second gate lines arranged in one direction on the substrate, the data lines perpendicular to the first and second gate lines and the common power supply line and the reference voltage line parallel to the data lines are located. The switching thin film transistor is located in the intersection region of the first gate line and the data line. The driving thin film transistor is located in the intersection region of the second gate line and the data line. The first capacitor is connected to the switching thin film transistor and the common power supply line, and the first capacitor lower electrode and the first capacitor upper electrode form a capacitance with the gate insulating film interposed therebetween. The second capacitor is connected to the driving thin film transistor and the reference voltage line, and the second capacitor lower electrode and the second capacitor upper electrode form a capacitance with the first passivation film interposed therebetween. And an organic film layer interposed between the pixel electrode connected to the driving thin film transistor and the counter electrode. The organic insulating film is located between the first capacitor and the second capacitor.

The second capacitor lower electrode and the second capacitor upper electrode have no bent portions in the region adjacent to the contact holes.

The first organic insulating film and the second organic insulating film are formed of any one selected from the group consisting of benzocyclobutene (BCB) based resin, acrylate based resin, and polyimide resin.

The thickness of the first organic insulating film is 1 to 5 mu m.

The organic light emitting display according to an embodiment of the present invention includes an organic insulating film between the first capacitor and the second capacitor so that the shape and size of the second capacitor can be easily designed to secure the capacitance of the capacitor in the high resolution panel There is an advantage to be able to do.

1 is a block diagram schematically showing an organic light emitting diode display.
Fig. 2 is a schematic view showing the subpixel shown in Fig. 1. Fig.
3 is a plan view of a subpixel of an OLED display according to an embodiment of the present invention.
4 is a cross-sectional view taken along line I-I 'of FIG. 3;
5 is a plan view of a second capacitor of a conventional organic light emitting diode display and a second capacitor of the organic light emitting display of the present invention.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, well-known functions or constructions are not described in detail to avoid unnecessarily obscuring the subject matter of the present invention.

FIG. 1 is a block diagram schematically showing an organic light emitting display device, and FIG. 2 is a schematic diagram showing a subpixel shown in FIG.

Referring to FIG. 1, an OLED display includes an image supply unit 11, a timing controller 12, a scan driver 13, a data driver 14, and a display panel 15. do.

The image supply unit 11 processes the data signal and outputs it together with a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, a clock signal, and the like. The image supply unit 11 supplies a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, a clock signal, and a data signal to the timing control unit 12.

The timing control unit 12 receives a data signal and the like from the image supply unit 11 and controls the operation timing of the data driving unit 14 and the gate timing control signal GDC for controlling the operation timing of the scan driving unit 13 And outputs a data timing control signal DDC. The timing controller 12 supplies the data driver 14 with the data signal DATA along with the data timing control signal DDC.

The scan driver 13 outputs a scan signal while shifting the level of the gate voltage in response to the gate timing control signal GDC supplied from the timing controller 12. [ The scan driver 13 includes a level shifter and a shift register. The scan driver 13 supplies the scan signals to the sub-pixels SP included in the display panel 15 through the scan lines GL1 to GLm. The scan driver 13 is formed on the display panel 15 in a gate in panel manner. The portion formed by the gate-in-panel method in the scan driver 13 is a shift register.

The data driver 14 samples and latches the data signal DATA in response to the data timing control signal DDC supplied from the timing controller 12 and converts the analog signal into a digital signal corresponding to the gamma reference voltage and outputs the digital signal . The data driver 14 supplies the data signal DATA to the sub-pixels SP included in the display panel 15 through the data lines DL1 to DLn. The data driver 14 is formed in the form of an integrated circuit (IC).

The display panel 15 displays an image corresponding to the scan signal supplied from the scan driver 13 and the data signal DATA supplied from the data driver 14. [ The display panel 15 is implemented by a top emission method, a bottom emission method, or a dual emission method. The display panel 15 includes sub-pixels SP that emit light to display an image.

As shown in FIG. 2, one subpixel is supplied through a switching thin film transistor SW and a switching thin film transistor SW connected to (or formed at) the scan line GL1 and the data line DL1 And a pixel circuit PC that operates in response to the data signal DATA. The pixel circuit PC includes a circuit such as a driving transistor, a capacitor, and an organic light emitting diode.

Hereinafter, a structure of an OLED display device according to an embodiment of the present invention will be described with reference to FIGS. 3 and 4. FIG. Hereinafter, one subpixel will be described as an example to describe the organic light emitting display device.

FIG. 3 is a plan view of a subpixel of an organic light emitting display according to an exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along line I-I 'of FIG.

3, an OLED display 100 according to an exemplary embodiment of the present invention includes a substrate 105 on which a first gate line 120a and a second gate line 120c are arranged in parallel do. The reference voltage line 130c, the data line 130d and the common power line 130e are vertically arranged to be perpendicular to the first gate line 120a and the second gate line 120c and are arranged in parallel with each other. The intersection of the first gate line 120a, the second gate line 120c, the reference voltage line 130c, the data line 130d, and the common power supply line 130e delimits the subpixel region.

The first active layer 110a disposed adjacent to the first gate line 120a, the drain electrode 130a and the data line 130d constitutes a switching TFT (S_TFT). One side of the first active layer 110a contacts the data line 130d via the sixth contact hole 127e and the other side contacts the drain electrode 130a through the first contact hole 127a. The second active layer 110c disposed adjacent to the second gate line 120c and the reference voltage line 130c constitutes a driving TFT (D_TFT). A first capacitor lower electrode 110b receiving a voltage from the common power supply line 130e and a first capacitor upper electrode 120b receiving a voltage from the switching thin film transistor are connected between the switching thin film transistor and the driving thin film transistor through a first capacitor Cst1). The second capacitor lower electrode 140 receiving the voltage from the common power line 130e and the second capacitor upper electrode 150a receiving the voltage from the switching thin film transistor constitute the second capacitor Cst2.

The connection pattern 130b is connected to the drain electrode 150b of the driving thin film transistor through the first capacitor lower electrode 110b and the connection pattern 130b is connected to the common power line 130e. The pixel electrode 165 is connected to the drain electrode 150b. In the pixel electrode 165, an organic layer and an opposite electrode are formed to constitute an organic light emitting diode.

The structure of the subpixel of the organic light emitting display shown in FIG. 3 will be described in detail with reference to FIG.

4, an OLED display 100 according to an exemplary embodiment of the present invention includes a substrate 105, a first active layer 110a, a first capacitor lower electrode 110b, and a second active layer Not shown). The first active layer 110a, the first capacitor lower electrode 110b, and the second active layer (not shown) may be formed by implanting impurity ions into amorphous silicon (a-Si) to be conductive. Further, a buffer layer made of silicon oxide or silicon nitride (not shown) between the substrate 105 and the first active layer 110a, the first capacitor lower electrode 110b and the second active layer have.

A gate insulating film 115 for insulating them from the first active layer 110a, the first capacitor lower electrode 110b and the second active layer (not shown) is located. The gate insulating film 115 may be composed of silicon nitride (SiNx), silicon oxide (SiOx), or multiple layers thereof. The first gate electrode 120a, the first capacitor upper electrode 120b and the second gate electrode 120c are located on the gate insulating film 115. [ The first gate electrode 120a, the first capacitor upper electrode 120b and the second gate electrode 120c may be formed of a metal such as aluminum (Al), molybdenum (Mo), titanium (Ti), gold (Au) Tungsten (W), or an alloy thereof, or a multilayer thereof.

An interlayer insulating film 125 for insulating them is located on the first gate electrode 120a, the first capacitor upper electrode 120b, and the second gate electrode 120c. The interlayer insulating film 125 may be formed of silicon nitride (SiNx), silicon oxide (SiOx), or a multilayer thereof. The drain electrode 130a of the switching thin film transistor and the connection pattern 130b are located on the interlayer insulating film 125. [ The drain electrode 130a of the switching thin film transistor is connected to the first capacitor upper electrode 120b through the second contact hole 127b passing through the interlayer insulating film 125. [ The connection pattern 130b connects the first capacitor lower electrode 110b and the drain electrode 150b of the driving thin film transistor. The drain electrode 130a and the connection pattern 130b are formed of a low resistance material in order to lower wiring resistance and may be formed of a metal such as molybdenum (Mo), titanium (Ti), aluminum (Al), gold (Au) Tungsten (W), or an alloy thereof, or a multilayer thereof. The drain electrode 130a is connected to the first active layer 110a through the gate insulating film 115 and the first contact hole 127a formed in the interlayer insulating film 125 and the connection pattern 130b is connected to the gate insulating film 115, And the third contact hole 127c formed in the interlayer insulating film 125. The first capacitor lower electrode 110b and the first capacitor lower electrode 110b are connected to each other. The first capacitor lower electrode 110b is connected to the common power line 130e through the seventh contact hole 127d. The first capacitor lower electrode 110b and the first capacitor upper electrode 120b form a first capacitor Cst1 with a gate insulating film 115 interposed therebetween.

On the other hand, the first organic insulating layer 135 is formed on the drain electrode 130a and the connection pattern 130b. The first organic insulating film 135 is a planarizing film for planarizing the lower step, and is formed of an acrylate resin such as a photo acryl, a benzocyclobutene (BCB) resin, a photo acryl, and a polyimide resin. A first contact hole 127a and a drain electrode 130a and a first capacitor upper electrode 120b that connect the other side of the first active layer 110a and the drain electrode 130a are formed under the first organic insulating film 135. [ A third contact hole 127c connecting the connection pattern 130b and the first capacitor lower electrode 110b and a second contact hole 127b connecting one side of the first active layer 110a and the data line 130d And a seventh contact hole 127d connecting the first capacitor lower electrode 110b and the common power line 130e. The first, second, third, sixth, and seventh contact holes 127a, 127b, 127c, 127e, and 127d form a deep hole. Therefore, when an inorganic film is formed on the contact holes, the film can not be formed as a uniform film. Therefore, the size and shape of the film should be designed by avoiding the holes. Accordingly, in the present invention, the first organic insulating layer 135 is formed on the first capacitor Cst1 to planarize all the steps of the contact holes to uniformize the thickness of the subsequent layers, for example, the second capacitor Cst2 And the size and shape are not limited. For this, the first organic insulating film 135 is formed to a thickness of 1 to 5 탆. If the thickness of the first organic insulating film 135 is less than 1 탆, the steps of the contact holes are not filled and the subsequent layers can not be uniformly formed. If the thickness of the first organic insulating film 135 is more than 5 탆, The thickness becomes thick.

On the other hand, the second capacitor lower electrode 140 is located on the first organic insulating film 135. The second capacitor lower electrode 140 is located in a region corresponding to the first capacitor Cst1 described above. The second capacitor lower electrode 140 is formed of a conductive material to form an electrostatic capacity and may be formed of a metal such as molybdenum (Mo), titanium (Ti), aluminum (Al), gold (Au), silver (Ag), tungsten W) or an alloy thereof, or a multilayer thereof.

A passivation film 145 is located on the second capacitor lower electrode 140. The passivation film 145 may be composed of silicon nitride (SiNx), silicon oxide (SiOx), or multiple layers thereof. The second capacitor upper electrode 150a and the drain electrode 150b of the driving thin film transistor are located on the passivation film 145. [ The second capacitor upper electrode 150a is positioned to correspond to the second capacitor lower electrode 140 described above. The second capacitor upper electrode 150a and the drain electrode 150b of the driving thin film transistor are formed of a conductive material in order to form an electrostatic capacity and may be formed of a metal such as molybdenum (Mo), titanium (Ti), aluminum (Al) Au, silver (Ag), tungsten (W), or an alloy thereof, or a multilayer thereof.

The second capacitor upper electrode 150a is connected to the drain electrode 130a of the switching thin film transistor through the fourth contact hole 137a formed in the first organic insulating film 135 and the passivation film 145. [ The second capacitor lower electrode 140 is connected to the connection pattern 130b through the first organic insulating layer 135 and the fifth contact hole 137b formed in the passivation layer 145. [ Accordingly, the second capacitor upper electrode 150a and the second capacitor lower electrode 140 form a second capacitor Cst2 with the passivation film 145 interposed therebetween.

On the other hand, the second organic insulating layer 160 is formed on the first capacitor Cst1 and the second capacitor Cst2 formed on the substrate 105. The second organic insulating film 160 is a planarizing film for planarizing the lower step, and is formed of an acrylate resin such as benzocyclobutene (BCB) resin, photo acryl, or a polyimide resin Of organic materials. The pixel electrode 165 is located on the second organic insulating layer 160. The pixel electrode 165 may be formed of a transparent material having a high work function such as indium tin oxide (ITO), indium zinc oxide (IZO), indium cerium oxide (ICO), or zinc oxide (ZnO) Here, if the pixel electrode 165 is a reflective electrode, the reflective layer may include a reflective layer at the bottom. For example, the pixel electrode 165 may have a stacked structure of APC / ITO and ITO / APC / ITO.

A bank layer 170 is formed on the second organic insulating layer 160 including the pixel electrode 165. The bank layer 170 serves to define a light emitting region by exposing a part of the pixel electrode 165 and is formed of an organic material such as a polyimide resin, a benzocyclobutene resin, an acrylate resin, or the like Lt; / RTI > In the bank layer 170, an opening 172 for exposing the pixel electrode 165 is formed. An organic film layer 175 is disposed on the bank layer 170 and the pixel electrode 165. The organic layer 175 may include at least one or more of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. The counter electrode 180 is positioned on the substrate 105 including the organic film layer 175. The counter electrode 175 is a transparent electrode that transmits light emitted from the light emitting layer and may be made of magnesium (Mg), silver (Ag), calcium (Ca), aluminum (Al), or an alloy thereof having a low work function. Thus, an organic light emitting diode including the pixel electrode 165, the organic film layer 175, and the counter electrode 180 is formed.

Meanwhile, the organic light emitting diode display according to an embodiment of the present invention can improve the area of the second capacitor Cst2 by placing the second capacitor Cst2 on the first organic insulating layer 135. FIG.

5 is a plan view of a second capacitor of the OLED display and a second capacitor of the OLED display of the present invention.

Referring to FIG. 5, in the conventional OLED display device, since an inorganic film of silicon nitride (SiNx) or silicon oxide (Si0x) is formed under the second capacitor, the thickness of the thin film transistor and the first capacitor The inorganic film is formed as it is. When the second capacitor is formed on the inorganic film having such a step, the shape of the second capacitor is affected by the step of the lower layers. Here, the influence thereof refers to a short or a short-circuit phenomenon due to the step difference of the lower layers. Therefore, when designing the lower electrode and the upper electrode of the second capacitor, the upper part of the contact holes CNT is designed to be designed. In order to avoid the upper portion of the contact holes CNT, the lower electrode and the upper electrode of the second capacitor must form a bent portion in a region adjacent to the contact holes CNTs. Therefore, in order to secure the desired capacitance, the second capacitor, which is designed by avoiding the contact holes (CNTs), is limited in the shape and size of the pattern, and it is difficult to secure the capacitance of the capacitor in the high- Occurs.

Accordingly, in the organic light emitting diode display of the present invention, a first organic insulating layer capable of flattening the lower step is formed on the lower portion of the second capacitor, that is, on the first capacitor, and the lower step is planarized. That is, by flattening the step of the contact holes CNTs by the first organic insulating film, the lower electrode and the upper electrode of the second capacitor can be formed on the contact holes CNTs. As shown in FIG. 5, the second capacitor is formed in a shape close to a rectangle, without having to avoid the contact holes (CNTs) at the top of the contact holes (CNTs). That is, the side surfaces of the upper electrode and the lower electrode of the second capacitor adjacent to the contact holes (CNTs) are formed as straight lines without bends. As a result, the shape and size of the second capacitor are alleviated, unlike the case where the shape and size of the conventional capacitor are limited, so that the shape and size of the second capacitor can be easily designed. 5, the area of the second capacitor is conventionally about 201 micro-meters (mu m < 2 >), but the area of the second capacitor of the present invention is about 24% increased by about 248 micro- .

As described above, the organic light emitting diode display according to an embodiment of the present invention includes the organic insulating layer between the first capacitor and the second capacitor, so that the shape and size of the second capacitor can be easily designed, It is possible to secure the electrostatic capacity of the capacitor.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the present invention should not be limited to the details described in the detailed description, but should be defined by the claims.

100: organic light emitting diode display 105: substrate
110b: first capacitor lower electrode 115: buffer layer
120b: first capacitor upper electrode 125: gate insulating film
135: first organic insulating film 140: second capacitor lower electrode
145: passivation film 150a: second capacitor upper electrode
160: second organic insulating film 165: pixel electrode
170: bank layer 175: organic film layer
180: opposing electrode

Claims (7)

Board;
A first capacitor disposed on the substrate, the first capacitor including a gate insulating film interposed between the first capacitor lower electrode and the first capacitor upper electrode;
A first organic insulating layer located on the first capacitor and planarizing a lower step;
A second capacitor located on the first organic insulating film and including a passivation film interposed between the second capacitor lower electrode and the second capacitor upper electrode;
A second organic insulating film located on the second capacitor;
A pixel electrode located on the organic insulating film;
An organic layer disposed on the pixel electrode and including at least a light emitting layer; And
And an opposing electrode located on the organic film layer.
The method according to claim 1,
Wherein the first organic insulating film and the second organic insulating film are formed of any one selected from the group consisting of benzocyclobutene (BCB) based resin, acrylate based resin, and polyimide resin. Emitting display device.
The method according to claim 1,
And the thickness of the first organic insulating layer is 1 to 5 占 퐉.
Board;
First and second gate lines arranged in one direction on the substrate, a data line perpendicular to the first and second gate lines, and a common power line and a reference voltage line parallel to the data line;
A switching thin film transistor located at a crossing region of the first gate line and the data line;
A driving thin film transistor located at a crossing region of the second gate line and the data line;
A first capacitor connected to the switching thin film transistor and the common power line, the first capacitor lower electrode and the first capacitor upper electrode forming a capacitance with a gate insulating film interposed therebetween;
A second capacitor connected between the driving thin film transistor and the reference voltage line, the second capacitor lower electrode and the second capacitor upper electrode forming a capacitance across the first passivation film; And
And an organic layer interposed between the pixel electrode and the counter electrode connected to the driving thin film transistor,
And an organic insulating layer between the first capacitor and the second capacitor.
5. The method of claim 4,
Wherein the second capacitor lower electrode and the second capacitor upper electrode have no bent portion in a region adjacent to the contact holes.
5. The method of claim 4,
Wherein the first organic insulating film and the second organic insulating film are formed of any one selected from the group consisting of benzocyclobutene (BCB) based resin, acrylate based resin, and polyimide resin. Emitting display device. 5. The method of claim 4,
And the thickness of the first organic insulating layer is 1 to 5 占 퐉.

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