KR20150067214A - 외부 메모리 튜닝 시퀀스의 최적의 사용을 위한 알고리즘 - Google Patents

외부 메모리 튜닝 시퀀스의 최적의 사용을 위한 알고리즘 Download PDF

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Publication number
KR20150067214A
KR20150067214A KR1020157010469A KR20157010469A KR20150067214A KR 20150067214 A KR20150067214 A KR 20150067214A KR 1020157010469 A KR1020157010469 A KR 1020157010469A KR 20157010469 A KR20157010469 A KR 20157010469A KR 20150067214 A KR20150067214 A KR 20150067214A
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KR
South Korea
Prior art keywords
memory card
tuning
host device
command
tuning command
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Ceased
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KR1020157010469A
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English (en)
Korean (ko)
Inventor
니르 스트라우스
라첼리 앙겔 마노르
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퀄컴 인코포레이티드
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Publication of KR20150067214A publication Critical patent/KR20150067214A/ko
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1689—Synchronisation and timing concerns

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)
  • Circuits Of Receivers In General (AREA)
KR1020157010469A 2012-10-05 2013-10-03 외부 메모리 튜닝 시퀀스의 최적의 사용을 위한 알고리즘 Ceased KR20150067214A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261710639P 2012-10-05 2012-10-05
US61/710,639 2012-10-05
US13/672,693 2012-11-08
US13/672,693 US8972818B2 (en) 2012-10-05 2012-11-08 Algorithm for optimal usage of external memory tuning sequence
PCT/US2013/063319 WO2014055794A1 (en) 2012-10-05 2013-10-03 Algorithm for optimal usage of external memory tuning sequence

Publications (1)

Publication Number Publication Date
KR20150067214A true KR20150067214A (ko) 2015-06-17

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KR1020157010469A Ceased KR20150067214A (ko) 2012-10-05 2013-10-03 외부 메모리 튜닝 시퀀스의 최적의 사용을 위한 알고리즘

Country Status (6)

Country Link
US (1) US8972818B2 (enrdf_load_stackoverflow)
EP (1) EP2904502A1 (enrdf_load_stackoverflow)
JP (2) JP2015532488A (enrdf_load_stackoverflow)
KR (1) KR20150067214A (enrdf_load_stackoverflow)
CN (1) CN104704477B (enrdf_load_stackoverflow)
WO (1) WO2014055794A1 (enrdf_load_stackoverflow)

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EP3460666B1 (en) * 2017-09-20 2021-03-10 Shanghai Xiaoyi Technology Co., Ltd. Method, apparatus, and storage medium for optimizing memory card performance
US11520514B2 (en) 2018-09-06 2022-12-06 Pure Storage, Inc. Optimized relocation of data based on data characteristics
US12032848B2 (en) 2021-06-21 2024-07-09 Pure Storage, Inc. Intelligent block allocation in a heterogeneous storage system
US10860475B1 (en) 2017-11-17 2020-12-08 Pure Storage, Inc. Hybrid flash translation layer
US12175124B2 (en) 2018-04-25 2024-12-24 Pure Storage, Inc. Enhanced data access using composite data views
US12001688B2 (en) 2019-04-29 2024-06-04 Pure Storage, Inc. Utilizing data views to optimize secure data access in a storage system
US11500570B2 (en) 2018-09-06 2022-11-15 Pure Storage, Inc. Efficient relocation of data utilizing different programming modes
CN109766133A (zh) * 2018-12-29 2019-05-17 合肥杰发科技有限公司 一种内置嵌入式单元的系统及其初始化方法
US11714572B2 (en) 2019-06-19 2023-08-01 Pure Storage, Inc. Optimized data resiliency in a modular storage system
US12001684B2 (en) 2019-12-12 2024-06-04 Pure Storage, Inc. Optimizing dynamic power loss protection adjustment in a storage system
US11507297B2 (en) 2020-04-15 2022-11-22 Pure Storage, Inc. Efficient management of optimal read levels for flash storage systems
US11416338B2 (en) 2020-04-24 2022-08-16 Pure Storage, Inc. Resiliency scheme to enhance storage performance
US11474986B2 (en) 2020-04-24 2022-10-18 Pure Storage, Inc. Utilizing machine learning to streamline telemetry processing of storage media
US11768763B2 (en) 2020-07-08 2023-09-26 Pure Storage, Inc. Flash secure erase
US11681448B2 (en) 2020-09-08 2023-06-20 Pure Storage, Inc. Multiple device IDs in a multi-fabric module storage system
US11513974B2 (en) 2020-09-08 2022-11-29 Pure Storage, Inc. Using nonce to control erasure of data blocks of a multi-controller storage system
US12153818B2 (en) 2020-09-24 2024-11-26 Pure Storage, Inc. Bucket versioning snapshots
US12387133B2 (en) * 2020-10-29 2025-08-12 Qualcomm Incorporated Reinforcement learning based scheme for tuning memory interfaces
US11487455B2 (en) 2020-12-17 2022-11-01 Pure Storage, Inc. Dynamic block allocation to optimize storage system performance
US11630593B2 (en) 2021-03-12 2023-04-18 Pure Storage, Inc. Inline flash memory qualification in a storage system
US12099742B2 (en) 2021-03-15 2024-09-24 Pure Storage, Inc. Utilizing programming page size granularity to optimize data segment storage in a storage system
US11832410B2 (en) 2021-09-14 2023-11-28 Pure Storage, Inc. Mechanical energy absorbing bracket apparatus
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US8972818B2 (en) * 2012-10-05 2015-03-03 Qualcomm Incorporated Algorithm for optimal usage of external memory tuning sequence

Also Published As

Publication number Publication date
CN104704477B (zh) 2018-09-14
JP2015532488A (ja) 2015-11-09
US20140101511A1 (en) 2014-04-10
CN104704477A (zh) 2015-06-10
US8972818B2 (en) 2015-03-03
JP2018125040A (ja) 2018-08-09
EP2904502A1 (en) 2015-08-12
WO2014055794A1 (en) 2014-04-10

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