KR20150000138A - A light emitting device - Google Patents

Abstract

The present invention provides a light emitting device for improving luminous efficiency. The light emitting device according to the present invention includes a first semiconductor layer, an active layer which is arranged on the first semiconductor layer and includes a well layer and a barrier layer, a first electron blocking layer which is arranged on the active layer, a mask layer which is arranged on the first electron blocking layer, a second electron blocking layer which is arranged on a first region of the first electron blocking layer which is exposed by the mask layer and includes a top side which is located on the first region and a lateral side which is located between the top side and the mask layer, and a second semiconductor layer which is arranged between the mask layer and the second electron blocking layer. The lateral side of the second electron blocking layer is a semi-polar surface.

Description

A LIGHT EMITTING DEVICE

An embodiment relates to a light emitting element.

III-V nitride semiconductors such as GaN are attracting attention as core materials for semiconductor optical devices such as light emitting diodes (LEDs), laser diodes (LDs), and solar cells due to their excellent physical and chemical properties.

The group III-V nitride semiconductors are made of a semiconductor material having a composition formula of AlxInyGa1-x-yN (0? X? 1, 0? Y? 1, 0? X + y? Such nitride semiconductor optical devices are used as light sources for various products such as a backlight of a cellular phone, a keypad, a display board, and a lighting device. In particular, as digital products evolve, there is a growing demand for nitride semiconductor optical devices with greater luminance and higher reliability.

In general, a light emitting diode may have a structure including a light emitting structure grown on a sapphire substrate. Here, the light emitting structure may include an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The active layer may have a multiple quantum well structure that can generally confine electrons.

light may be generated by recombination of electrons and holes injected from the n-type semiconductor layer and the p-type semiconductor layer into the active layer.

The current blocking layer may be formed between the active layer and the p-type semiconductor layer to prevent leakage of electrons injected from the n-type semiconductor layer into the active layer to the p-type semiconductor layer.

The embodiment is to provide a light emitting device capable of improving current flow to a semiconductor layer and capable of improving light efficiency.

A light emitting device according to an embodiment includes a first semiconductor layer; An active layer disposed on the first semiconductor layer, the active layer including a well layer and a barrier layer; A first electron blocking layer disposed on the active layer; A mask layer disposed on the first electron blocking layer; And a second electron blocking layer disposed on the first region of the first electron blocking layer exposed by the mask layer and including an upper surface located on the first region and a side located between the upper surface and the mask layer, layer; And a second semiconductor layer disposed on the mask layer and the second electron blocking layer, and the side surface of the second electron blocking layer is semipolar.

The surface index of the upper surface of the second electron blocking layer is [0001], the side surface of the second electron blocking layer is a first surface having a surface index of [1-101], or a surface index of [11-22] And a second surface having a second surface.

Each of the first electron blocking layer and the second electron blocking layer may be a nitride semiconductor layer containing aluminum

The aluminum content of the side surface of the second electron blocking layer may be less than the aluminum content of the upper surface of the second electron blocking layer.

The aluminum content of the first interface between the side surface of the second electron blocking layer and the second semiconductor layer may be less than the aluminum content of the second interface between the upper surface of the second electron blocking layer and the second semiconductor layer have.

Wherein the second semiconductor layer is a nitride semiconductor layer containing aluminum and the second semiconductor layer is a first concentration region located below the upper surface of the second electron blocking layer and located between the side surfaces of the second electron blocking layer, And a second concentration region located between an upper surface of the second electron blocking layer and an upper surface of the second semiconductor layer, wherein the aluminum content in the first concentration region may be less than the aluminum content in the second concentration region .

The second electron blocking layer may be disposed on the edge and the side surface of the upper surface of the mask layer.

The mask layer may be a silicon nitride film or a silicon oxide film.

The light emitting device comprising: a substrate disposed below the first semiconductor layer; A first electrode disposed on the first semiconductor layer; And a second electrode disposed on the second semiconductor layer.

Or the light emitting element includes a first electrode disposed below the first semiconductor layer; And a second electrode disposed on the second semiconductor layer, and the second electrode may include a reflective layer.

The embodiment can improve the current flow to the semiconductor layer, improve the light efficiency, reduce the threading potential, and reduce the leakage current.

1 is a cross-sectional view of a light emitting device according to an embodiment.
2 to 6 show a method of manufacturing the light emitting device according to the embodiment.
FIG. 7 shows an enlarged view according to an embodiment of the second electron blocking layer shown in FIG.
8A and 8B show a process of forming the second electron blocking layer.
9A and 9B show a process of forming the second semiconductor layer.
10 shows the current flow of the embodiment shown in FIG.
11 is a cross-sectional view of a light emitting device according to another embodiment.
12 to 13 show a method of manufacturing a light emitting device according to another embodiment.
14 shows a light emitting device package according to an embodiment.
15 shows a lighting device including a light emitting device according to an embodiment.
16 shows a display device including the light emitting device package according to the embodiment.
17 shows a head lamp including the light emitting device package according to the embodiment.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the description of the embodiments, it is to be understood that each layer (film), region, pattern or structure may be referred to as being "on" or "under" a substrate, each layer It is to be understood that the terms " on "and " under" include both " directly "or" indirectly " do. In addition, the criteria for the top / bottom or bottom / bottom of each layer are described with reference to the drawings.

In the drawings, dimensions are exaggerated, omitted, or schematically illustrated for convenience and clarity of illustration. Also, the size of each component does not entirely reflect the actual size. The same reference numerals denote the same elements throughout the description of the drawings. Hereinafter, a light emitting device and a method of manufacturing a light emitting device according to embodiments will be described with reference to the accompanying drawings.

1 is a cross-sectional view of a light emitting device 100 according to an embodiment.

The light emitting device 100 includes a substrate 110, a first semiconductor layer 120, a superlattice layer 130, an active layer 140, a first electron blocking layer 150, a mask layer 160, A second electron blocking layer 170, a second semiconductor layer 180, a first electrode 192, and a second electrode 194.

The substrate 110 is a substrate suitable for growing a nitride semiconductor single crystal, and may be any one of a sapphire substrate, a silicon (Si) substrate, a zinc oxide (ZnO) substrate and a nitride semiconductor substrate, or a substrate made of GaN, InGaN, AlGaN, AlInGaN At least one of which may be a laminated template substrate.

The first semiconductor layer 120 is disposed on the substrate 110, and may be a compound semiconductor such as a Group III-V, a Group II-VI, or the like, and may be doped with a first conductivity type dopant.

The first semiconductor layer 120 may be a semiconductor having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + y? For example, the first semiconductor layer 120 may include any one of InAlGaN, GaN, AlGaN, InGaN, AlN and InN, and may be doped with an n-type dopant such as Si, Ge, Se, .

Although not shown in FIG. 1, a buffer layer may be formed between the first semiconductor layer 120 and the substrate 110 to mitigate lattice mismatch due to a difference in lattice constant between the substrate 110 and the first semiconductor layer 120 .

The buffer layer may be a nitride semiconductor including Group 3 elements and Group 5 elements. For example, the buffer layer may include at least one of InAlGaN, GaN, AlN, AlGaN, and InGaN. The buffer layer may be a single layer or a multi-layer structure, and a Group 2 element or a Group 4 element may be doped with an impurity.

The superlattice layer 130 is disposed on the first semiconductor layer 120 and may be composed of a GaN layer / InGaN layer, a GaN / AlGaN layer, or a GaN layer / InAlGaN layer. The super lattice layer 130 is located between the first semiconductor layer 120 and the active layer 140 and can improve the crystallinity of the active layer 140. Since the superlattice layer 130 is selectively applicable for improving crystallinity, the superlattice layer 130 may be omitted in other embodiments.

The active layer 140 may be disposed on the superlattice layer 130. If the superlattice layer 130 is omitted, the active layer 140 may be disposed on the first semiconductor layer 120.

The active layer 140 can generate light by energy generated in the recombination process of electrons and holes provided from the first semiconductor layer 120 and the second semiconductor layer 180 .

The active layer 140 may be a compound semiconductor such as a group III-V, a group II-VI, or a group III-V compound semiconductor, for example, a single well structure, a multi- A quantum dot structure, a quantum dot structure, a quantum dot structure, or a quantum disk structure.

The active layer 140 may have a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + y? In the case where the active layer 140 is a quantum well structure, the active layer 140 is formed of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + And a barrier layer (not shown) having a composition formula of In _a Al _b Ga _{1 -a- b} N (0? A? 1, 0? _B ? 1, 0? A + ).

For example, the active layer 140 may include a well layer having a composition formula of InGaN, and a barrier layer having a composition formula of AlGaN.

The energy band gap of the well layer may be lower than the energy band gap of the barrier layer. The well layer and the barrier layer may be alternately laminated at least once.

The energy band gap of the well layer and the barrier layer may be constant in each section, but is not limited thereto. For example, the composition of indium (In) and / or aluminum (Al) in the well layer may be constant and the composition of indium (In) and / or aluminum (Al) in the barrier layer may be constant.

Or the energy bandgap of the well layer may include an increasing or decreasing period, and the energy bandgap of the barrier layer may include an increasing or decreasing period. For example, the composition of indium (In) and / or aluminum (Al) in the well layer may gradually increase or decrease. In addition, the composition of indium (In) and / or aluminum (Al) in the barrier layer may gradually increase or decrease.

The first electron blocking layer 150 is disposed on the active layer 140 and prevents electrons injected from the first semiconductor layer 120 to the active layer 140 from overflowing to the second semiconductor layer 180. [ Thereby preventing leakage current.

The energy band gap of the first electron blocking layer 150 may be greater than the energy band gap of the barrier layer of the active layer 140. For example, the thickness of the first electron blocking layer 150 may be between 15 nm and 25 nm.

The first electron blocking layer 150 may be a nitride semiconductor layer containing aluminum (Al) or a nitride semiconductor layer containing aluminum (Al) and indium (In), for example, InAlGaN. The first electron blocking layer 150 may be doped with a second conductive dopant (for example, Mg, Zn, Ca, Sr, or Ba) for smooth movement of the hole.

The content of aluminum (Al) in the first electron blocking layer 150 may be larger than the content of aluminum (Al) in the barrier layer. The aluminum (Al) content of the first electron blocking layer 150 may be constant in a section, but is not limited thereto. In other embodiments, the aluminum (Al) content of the first electron blocking layer 150 may increase or decrease within the section.

A mask layer 160 is disposed on the first electron blocking layer 150 and may expose a region S1 of the first electron blocking layer 150 (see FIG. 3). The mask layer 160 is formed for selective growth of the second electron blocking layer 170 and on the other region S2 of the first electron blocking layer 150 covered with the mask layer 160 The growth of the second electron blocking layer 170 can be blocked.

Mask layer 160 may be a regular or irregular patterned shape.

For example, the mask layer 160 may include at least one of a pin hole, or an island. Where the pinhole may mean a hole surrounded by the surrounding formations, and the islands may mean each of the formations separated and spaced from each other. One region S1 of the first electron blocking layer 150 may be exposed by the space between the pinholes or the islands. For example, the thickness of the mask layer 160 may be 5 nm to 15 nm.

When the thickness of the mask layer 160 is less than 5 nm, the coverage of the mask layer 160 may be insufficient and growth blocking may be difficult. If the thickness exceeds 15 nm, the second electron blocking layer 170 may not grow have.

The second electron blocking layer 170 is disposed on one region S1 (see FIG. 3) of the first electron blocking layer 150 exposed by the mask layer 160. The second electron blocking layer 170 may have a structure including a plurality of islands 170-1 to 170-n, where n > 1 is a natural number, spaced apart from each other by the mask layer 160. [

The energy band gap of the second electron blocking layer 170 may be greater than the energy band gap of the barrier layer of the active layer 140.

The second electron blocking layer 170 may be a nitride semiconductor layer containing aluminum (AlGaN), or a nitride semiconductor layer containing aluminum (Al) and indium (In) (e.g., InAlGaN). The second electron blocking layer 170 may be doped with a second conductive dopant (for example, Mg, Zn, Ca, Sr, or Ba) to smoothly move the hole.

The content of aluminum (Al) in the second electron blocking layer 170 may be greater than the content of aluminum (Al) in the barrier layer. The aluminum (Al) content of the second electron blocking layer 170 may be constant within the section, but is not limited thereto. In another embodiment, the aluminum (Al) content of the second electron blocking layer 170 may increase or decrease within the interval.

FIG. 7 shows an enlarged view according to one embodiment of the second electron blocking layer 170 shown in FIG.

Referring to FIG. 7, the lower surface 102 of the second electron blocking layer 170 may be in contact with the first electron blocking layer 150 exposed by the mask layer 160.

The lower end of the second electron blocking layer 170 may be in contact with the edge portions of the side surface and the upper surface of the mask layer 160.

The second electron blocking layer 170 may include a top surface 101, a bottom surface 102 and side surfaces 103 located between the top surface 101 and the bottom surface 102. The side surface 103 of the second electron blocking layer 170 may include a first surface 103-1, a second surface 103-2, and a third surface 103-3.

The first surface 103-1 is adjacent to the top surface 101 and is located above the mask layer 160. [

The second surface 103-2 may be adjacent to the lower surface 102 and may have a step T with the first surface 103-1 and be in contact with the side surface of the mask layer 160. [

The third surface 103-3 is located between the first surface 103-1 and the second surface 103-2 and is in contact with the upper surface edge of the mask layer 160. [

The distance d1 from the upper surface of the mask layer 160 to the upper surface of the second electron blocking layer 170 may be 20 nm to 25 nm.

When d1 is less than 20 nm, the second electron blocking layer 170 can not function to block electrons. When d1 is greater than 25 nm, the first electron blocking layer 170 and the second electron blocking layer 170 are not formed. This merger may result in the elimination of the facet facet.

The first surface 103-1 of the second electron blocking layer 170 may be an inclined surface inclined from the top surface 101 of the second electron blocking layer 170. [

For example, the upper surface 101 of the second electron blocking layer 170 may be parallel to the C plane (surface index [0001]) of the substrate (e.g., sapphire substrate) The surface 103-1 may be a facet surface or a semipolar surface. Here, the surface index of the first surface 103-1 may be [1-101] or [11-22].

For example, the content of aluminum (Al) on the upper surface 101 of the second electron blocking layer 170 may be greater than the content of aluminum (Al) on the first surface 103-1 of the second electron blocking layer 170 have. This is because the content of aluminum (Al) on the growing face in the direction of the facet is smaller than that in the direction of growing in the C direction when growing AlGaN.

Or the aluminum content of the first interface between the first surface 103-1 of the second electron blocking layer 170 and the second semiconductor layer 180 is greater than the aluminum content of the upper surface 101 of the second electron blocking layer 170, The second interface between the first semiconductor layer 180 and the second semiconductor layer 180 may be less than the aluminum content at the second interface between the first semiconductor layer 180 and the second semiconductor layer 180.

The concentration of holes in the first surface 103-1 of the second electron blocking layer 170 may be higher than the concentration of holes in the top surface 101 of the second electron blocking layer 170. In contrast, This is because the activation energy of the doped second conductive type dopant (for example, Mg) on the first surface 103-1 of the second electron blocking layer 170 is higher than the activation energy of the doped second conductive type dopant 101), the hole concentration can be high.

The electrical resistance of the first surface 103-1 of the second electron blocking layer 170 may be smaller than the electrical resistance of the top surface 101 of the second electron blocking layer 170. [ This is because a hole can be concentrated on the first surface 103-1 of the second electron blocking layer 170 having a smaller aluminum content than the upper surface 101 of the second electron blocking layer 170 .

The second semiconductor layer 180 may be disposed on the mask layer 160 and the second electron blocking layer 170 and may be a semiconductor compound such as Group 3-Group 5, Group 2-Group 6, A conductive dopant may be doped.

The second semiconductor layer 180 may be a semiconductor having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + y? For example, the second semiconductor layer 180 may include any one of InAlGaN, GaN, AlGaN, InGaN, AlN and InN, and may be doped with a p-type dopant such as Mg, Zn, Ca, Sr, have.

The second electron blocking layer 170, the mask layer 160, the second electron blocking layer 150, the active layer 140, the superlattice layer 130, A part of the first semiconductor layer 120 may be removed and a part of the first semiconductor layer 120 may be exposed.

The first electrode 192 may be disposed on the exposed portion of the first semiconductor layer 120 and the second electrode 194 may be disposed on the second semiconductor layer 180.

10 shows the current flow of the embodiment shown in FIG. Referring to FIG. 10, when an operation current is applied to the light emitting device 100, the current 201 passes through the semiconductor layers 180, 170, 150, 140, 130, and 120 from the second electrode 194, 1 electrode 192 of the second electrode.

Since the electrical resistance of the first surface 103-1 of the second electron blocking layer 170 is less than the electrical resistance of the top surface 101 of the second electron blocking layer 170, Can pass through the first surface 103-1 of the second electron blocking layer 170 and not through the top surface 101 of the layer 170. This is because the electric current flows in a smaller electric resistance. Accordingly, the current can be dispersed and flow through the semiconductor layers 180, 170, 150, 140, 130, and 120, thereby improving the luminous efficiency, and the turn- on voltage or operating voltage.

2 to 6 show a manufacturing method of the light emitting device 100 according to the embodiment.

Referring to FIG. 2, a first semiconductor layer 120, a superlattice layer 130, an active layer 140, and a first electron blocking layer 150 are formed on a substrate 110.

For example, metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PCVD), molecular beam epitaxy (MBE) A superlattice layer 130, an active layer 140, and a second semiconductor layer 120 are formed on a substrate 110 through various deposition and growth methods including a vapor phase epitaxy (HVPE) And the first electron blocking layer 150 may be sequentially formed.

For example, the first semiconductor layer 120 may be a nitride semiconductor layer containing aluminum (for example, n-Al _x Ga _(1-x) N, 0 <x <1) The content of Al can be varied. That is, as the content of aluminum (Al) is increased, the wavelength of light emitted can be shortened.

For example, when the aluminum content is 7%, light having a wavelength of 365 nm can be emitted, and when the content of aluminum is 4%, light having a wavelength of 375 nm can be emitted.

For example, the barrier layer of the active layer 140 may be a nitride semiconductor layer (for example, AlGaN) including aluminum (Al), and the content of aluminum may be the same as that of the first electron blocking layer 150 and the second electron blocking layer 170 ) May be less than the content of each aluminum.

Each of the first electron blocking layer 150 and the second electron blocking layer 170 may be a nitride semiconductor layer containing aluminum (for example, AlGaN or InAlGaN), and the aluminum content (Al) may be 10% or more. For example, the aluminum content of the first electron blocking layer 150 and the second electron blocking layer 170 may be 20% to 25%, but is not limited thereto.

Referring to FIG. 3, a mask layer 160 is formed on the first electron blocking layer 150 to expose a portion of the first electron blocking layer 150. Where mask layer 160 may include a plurality of spaced apart islands 162-1 through 162-n, where n > 1, and neighboring islands 162-1 and 162-2, A portion of the first electron blocking layer 150 may be exposed. The mask layer 160 may have an irregular pattern, but it is not so limited, and in other embodiments, the mask layer 160 may be a regular pattern.

The mask layer 160 can expose a portion of the first electron blocking layer 150 (hereinafter referred to as a "first region S1") and the remaining region (hereinafter referred to as a "second region S2" ) Can be covered.

The shape of the mask layer 160 can be adjusted by adjusting the thickness of the grown film, the growth temperature, and the growth time.

For example, by the growth of the silicon nitride film (SiNx, x is a positive real number), or a silicon oxide film (SiO ₂₎ on the first electron blocking layer 150 by in-situ (In-Situ) process to a thickness of 5nm ~ 15nm A mask layer 160 exposing the first region S1 of the first electron blocking layer 150 may be formed.

Referring to FIG. 4, a second electron blocking layer 170 is formed on the first region S1 of the first electron blocking layer 150 exposed by the mask layer 160. Referring to FIG. For example, the second electron blocking layer 170 may be formed by a three-dimensional growth method.

The growth of the second electron blocking layer 170 is blocked in the second region S2 by the mask layer 160 and only the first region S1 exposed by the mask layer 160 is exposed to the third dimensional growth method The second electron blocking layer 170 can be grown.

FIGS. 8A and 8B show a process of forming the second electron blocking layer 170. FIG.

Referring to FIG. 8A, a second electron blocking layer 170-1 may be grown over the first exposed area S1. Wherein the second electron blocking layer 170-1 can be grown to include at least one of a first side having a surface index of [1-101], or a second side having a surface index of [11-22] .

For example, when the mask layer 160 is SiO ₂ , the second electron blocking layer 170-1 can be grown to have a side surface having a surface index of either [1-101] or [11-22] .

If the mask layer 160 is made of SiNx, since the first electron blocking layer 150 is randomly masked, the first electron blocking layer 150 is randomly formed so as to randomly have [1-101] and [11-22] The layer 170-1 can be grown. However, it is not limited to this, and in other embodiments it can be grown to have a second side with a surface index of [11-22], by adjusting the pressure and temperature.

8B, by continuing the three-dimensional growth of the second electron blocking layer 170-1 to at least one of [1-101] and [11-22], the surface index [1-101] , Or at least one of the second side having a surface index of [11-22] may be formed to have the second electron blocking layer 170.

By the three-dimensional growth, the second electron blocking layer 170 can be grown to have an upper surface 101 with a surface index of [0001], and grown to extend to the upper surface edge of the mask layer 160 .

The aluminum (Al) content of the top surface 101 of the second electron blocking layer 170 may be greater than the aluminum (Al) content of the side surface 103 of the second electron blocking layer 170.

For example, when the second electron blocking layer 170 is grown using AlGaN having an aluminum content of 22%, the aluminum (Al) content of the upper surface 101 of the second electron blocking layer 170 is 22% 2 Aluminum (Al) content of the side surface 103 of the electron blocking layer 170 may be less than 22%.

Referring to FIG. 5, a second semiconductor layer 180 is formed on the mask layer 160 and the second electron blocking layer 170.

FIGS. 9A and 9B show a process of forming the second semiconductor layer 180. FIG.

9A, a nitride semiconductor (for example, p-AlGaN) including aluminum or aluminum is formed on the mask layer 160 and the second electron blocking layer 170 by two-dimensional growth or three- The second semiconductor layer 180-1 can be formed by growing a nitride semiconductor (for example, p-GaN). At this time, the second semiconductor layer 180-1 may be grown in the direction of the arrow shown in FIG. 9A, and a dislocation 444 may be formed at the boundary between the horizontal direction and the vertical direction of the second semiconductor layer 180-1 As shown in FIG.

That is, the potential formed below the second electron blocking layer 170 is deflected in the proceeding direction by the second electron blocking layer 170 and the second semiconductor layer 180 and is sealed in the second semiconductor layer 180, It is possible to reduce the threading dislocation, thereby reducing the leakage current due to the threading dislocation.

For example, when the second semiconductor layer 180 is formed of p-AlGaN, the aluminum content may be 5% to 10%, but is not limited thereto.

The second semiconductor layer 180-1 may be grown along the upper surface 101 and the side surface 103 of the second electron blocking layer 170. [

The aluminum content of the first interface 301 of the side surfaces 103 of the second semiconductor layer 180-1 and the second electron blocking layer 170 is less than the aluminum content of the second semiconductor layer 180-1 and the second electron blocking layer 170 may be less than the aluminum (Al) content of the second interface 302 of the upper surface 101.

The hole concentration of the first interface 301 may be higher than the hole concentration of the second interface 302 because the aluminum content of the first interface 301 is less than the aluminum content of the second interface 302, Thus, the electrical resistance of the first interface 301 may be lower than the electrical resistance of the second interface 302.

Referring to FIG. 9B, the second semiconductor layer 180 can be formed by continuously growing a nitride semiconductor on the second semiconductor layer 180-1 by two-dimensional or three-dimensional growth.

A first concentration region 401 and a second concentration region 402 may be formed in the second semiconductor layer 180 when the second semiconductor layer 180 is formed using a nitride semiconductor including aluminum . The aluminum content of the first concentration region 401 may be less than the aluminum content of the second concentration region 402.

For example, the first concentration region 401 may be a region having a small content of aluminum (Al) relative to a reference content, and the second concentration region 402 may be a region having a large content of aluminum relative to a reference content . Herein, the reference content may refer to a content of aluminum to be injected when the second semiconductor layer 180 is formed.

The first concentration region 401 may be a region located between the side surfaces 103 of the second electron blocking layer 170. The second concentration region 402 may be a region located between the upper surface 101 of the second electron blocking layer 170 and the upper surface 181 of the second semiconductor layer 180.

For example, when the second semiconductor layer 180 is formed to have a composition formula of p-Al _x Ga _(1-x) N (x = 0.07), the reference content may be 7% The aluminum content of the second concentration region 402 may be less than 7%, and the aluminum content of the second concentration region 402 may be more than 7%.

Since there is a difference in aluminum content between the first concentration region 401 and the second concentration region 402 as described above, there is a difference in hole concentration between the first concentration region 401 and the second concentration region 402 have. That is, the hole concentration of the first concentration region 401 may be higher than the hole concentration of the second concentration region 402. Therefore, the electrical resistance of the first concentration region 401 may be lower than the electrical resistance of the second concentration region 402.

The current flow 201 (see FIG. 10) from the second electrode 194 to the first electrode 192 may be as shown in FIG. 10, since the current flows into the lower electrical resistance rather than the higher electrical resistance have.

Thus, the embodiment can improve the current flow in the light emitting structure 305 through current dispersion, thereby improving the light efficiency and lowering the turn-on voltage.

Referring to FIG. 6, a second semiconductor layer 180, a second electron blocking layer 170, a mask layer 160, a first electron blocking layer 150, an active layer 140, a superlattice layer 130, And the first semiconductor layer 120, thereby exposing a part of the first semiconductor layer 120.

A first electrode 192 is formed on a part of the exposed first semiconductor layer 120 and a second electrode 194 is formed on the second semiconductor layer 180.

11 is a cross-sectional view of a light emitting device 200 according to another embodiment. The same reference numerals as in Fig. 1 denote the same components, and a description of the same components will be simplified or omitted.

11, the light emitting device 200 includes a first electrode 220, a first semiconductor layer 120, a superlattice layer 130, an active layer 140, a first electron blocking layer 150, A first passivation layer 160, a second electron blocking layer 170, a passivation layer 205, a passivation layer 210, and a second electrode 190.

The first electrode 220 may be disposed under the first semiconductor layer 120 and may supply a first power to the first semiconductor layer 120. A roughness 121 may be formed on the surface of the first semiconductor layer 120 to improve light extraction.

1, a superlattice layer 130, an active layer 140, a first electron blocking layer 150, a mask layer 160, and a second electron blocking layer 170 are formed on the first semiconductor layer 120, And the second semiconductor layer 180 may be sequentially stacked. As described above, the superlattice layer 130 may be omitted.

The second electrode 190 may be disposed on the second semiconductor layer 180 and may supply a second power to the second semiconductor layer 180.

The second electrode 190 may include a support layer 195, a bonding layer 194, a barrier layer 193, a reflector layer 192, and an ohmic region 191, . &Lt; / RTI &gt;

The ohmic region 191 may be disposed between the reflective layer 192 and the second semiconductor layer 180 and may be in ohmic contact with the second semiconductor layer 180 to form a second semiconductor 190, So that the second power source can be smoothly supplied to the layer 180.

For example, the ohmic region 191 may include at least one of In, Zn, Sn, Ni, Pt, and Ag. The ohmic region 191 can be formed by selectively using a light-transmitting conductive layer and a metal. For example, the ohmic region 191 may include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide tin oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrO _x , RuO _x , RuO _x / ITO, Ni, Ag, Ni / IrO _x / IrO _x / Au / ITO, and may be implemented as a single layer or multiple layers.

The ohmic region 191 is not necessarily formed to smooth the injection of carriers into the second semiconductor layer 180. For example, the ohmic region 191 may be omitted and the material used for the reflective layer 192 may be selected as a material that makes an ohmic contact with the second semiconductor layer 180.

The reflective layer 192 may be disposed between the ohmic region 191 and the barrier layer 193.

The reflective layer 192 may reflect light incident from the active layer 140 to improve light extraction efficiency of the light emitting device 200. For example, the reflective layer 192 may be formed of a metal containing at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au and Hf or an alloy thereof.

The reflective layer 192 may be formed of a metal or an alloy such as IZO (indium zinc oxide), IZTO (indium zinc tin oxide), IAZO (indium aluminum zinc oxide), IGZO (indium gallium zinc oxide) (aluminum zinc oxide), ATO (antimony tin oxide), or the like. For example, the reflective layer 192 may be formed of IZO / Ni, AZO / Ag, IZO / Ag / Ni, or AZO / Ag / Ni. The reflective layer 192 is for increasing the light extraction efficiency and is not necessarily formed, and may be omitted.

The support layer 195 may be disposed on the reflective layer 192 and may provide a second power to the semiconductor layers 120, 130, 140, 150, 160, 170,

For example, the support layer 195 may comprise at least one of a metallic material such as copper (Cu), tungsten (W), and molybdenum (Mo). The support layer 195 may be, for example, a carrier wafer including at least one of Si, Ge, GaAs, ZnO, and SiC.

The barrier layer 193 may be disposed between the support layer 195 and the reflective layer 192 and the ions contained in the support layer 195 may be deposited on the reflective layer 192, the ohmic region 191, and the second semiconductor layer 180, Can be prevented. For example, the barrier layer 193 may include at least one of Ni, Pt, Ti, W, V, Fe, and Mo and may be a single layer or a multilayer.

The bonding layer 194 may be disposed between the barrier layer 193 and the support layer 195 and the support layer 195 may be bonded to the barrier layer 193, the reflective layer 192, or the ohmic region 191 . For example, the bonding layer 194 may include at least one of Au, Sn, Ni, Nb, In, Cu, Ag, and Pd. Since the bonding layer 194 is formed to bond the supporting layer 195 by a bonding method, the bonding layer 194 may be omitted when the supporting layer 195 is formed by a plating or vapor deposition method.

The protective layer 205 may be disposed below the edge region of the second electrode 190.

For example, the protective layer 205 may be formed in the edge region of the ohmic region 191, the edge region of the reflective layer 192, or the edge region of the barrier layer 193, or the edge region of the junction layer 194, Or below the edge region of the support layer 195. 11, the protective layer 205 may be disposed below the edge region of the barrier layer 193 and may be in contact with the side surface of the reflective layer 192. In the embodiment shown in FIG.

The passivation layer 210 may be disposed on the side of the light emitting structure 305 to electrically protect the light emitting structure 305 comprising the semiconductor layers 120, 130, 140, 150, 160, 170, . The passivation layer 210 is an insulating material, e.g., SiO _2, SiO _x, SiO _x N _y, Si ₃ N ₄ , or Al ₂ O ₃ .

The embodiment 200 shown in Fig. 11 can improve the current dispersion and the light efficiency as described above, and can lower the turn-on voltage or the operating voltage.

12 to 13 show a manufacturing method of the light emitting device 200 according to another embodiment.

And performs the processes as described in FIGS. 2 to 5.

Next, referring to FIG. 12, a patterned protective layer 205 is formed on the second semiconductor layer 180 so that a unit chip region can be distinguished. Here, the unit chip area refers to an area that can be separated and operated on an individual chip basis. The protective layer 205 may be formed at the edge of the unit chip region using a mask pattern.

The ohmic region 191, the reflective layer 192, and the barrier layer 193 are formed on the second semiconductor layer 180 exposed by the protective layer 205.

Next, a support layer 195 is formed on the barrier layer 193. The support layer 195 may be bonded to the barrier layer 193 via a bonding layer 194. Or the support layer 195 may be formed on the barrier layer 193 by a plating or vapor deposition method.

Next, the substrate 110 is removed from the first semiconductor layer 120 using a laser lift off method or a chemical lift off method.

Referring to FIG. 13, the semiconductor layers 120, 130, 140, 150, 160, 170 and 180 are etched according to a unit chip region to form semiconductor layers 120, 130, 140, 150, 160, ) Into a unit light-emitting structure 305. This process may be referred to as isolation etching and may be performed by dry etching such as ICP (Inductively Coupled Plasma). A part of the protective layer 205 may be exposed by the isolation etching.

Next, a passivation layer 210 is formed on the side surfaces of the passivation layer 205 and the light emitting structure 305. A portion of the passivation layer 210 may also be formed on a portion of the surface of the first semiconductor layer 120 exposed by removal of the substrate 110.

The roughness 121 is formed on the surface of the first semiconductor layer 120 exposed next and the first electrode 220 is formed on the exposed surface of the first semiconductor layer 120.

14 shows a light emitting device package 500 according to an embodiment.

Referring to FIG. 14, a light emitting device package 600 includes a package body 510, a first metal layer 512, a second metal layer 514, a light emitting device 520, a reflector 530, a wire 530, And a resin layer 540.

The package body 510 may be formed of a substrate having good insulating or thermal conductivity, such as a silicon based wafer level package, a silicon substrate, silicon carbide (SiC), aluminum nitride (AlN) Or may be a structure in which a plurality of substrates are stacked. The embodiments are not limited to the material, structure, and shape of the body described above.

The package body 510 may have a cavity formed of a side surface and a bottom surface on one side of the upper surface. At this time, the side wall of the cavity may be formed to be inclined.

The first metal layer 512 and the second metal layer 514 are disposed on the surface of the package body 510 so as to be electrically separated from each other in consideration of heat discharge or mounting of the light emitting device. The light emitting device 520 is electrically connected to the first metal layer 512 and the second metal layer 514. The light emitting device 520 may be any one of the embodiments 100 and 200.

The reflection plate 530 may be disposed on the cavity side wall of the package body 510 to direct light emitted from the light emitting element 520 in a predetermined direction. The reflection plate 530 is made of a light reflection material, and may be, for example, a metal coating or a metal flake.

The resin layer 540 surrounds the light emitting element 520 located in the cavity of the package body 510 to protect the light emitting element 520 from the external environment. The resin layer 540 may be made of a colorless transparent polymer resin material such as epoxy or silicone. The resin layer 540 may include a phosphor to change the wavelength of light emitted from the light emitting device 520.

A plurality of light emitting device packages 500 according to the embodiment may be arrayed on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, and the like may be disposed on the light path of the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit.

Still another embodiment may be implemented as a display device, an indicating device, and a lighting system including the light emitting device or the light emitting device package described in the above embodiments. For example, the lighting system may include a lamp and a streetlight.

15 shows a lighting device including a light emitting device according to an embodiment.

15, the lighting apparatus may include a cover 1100, a light source module 1200, a heat discharger 1400, a power supply unit 1600, an inner case 1700, and a socket 1800. In addition, the illumination device according to the embodiment may further include at least one of the member 1300 and the holder 1500.

The light source module 1200 may include the light emitting device 100 or 200, or the light emitting device package 500 shown in FIG.

The cover 1100 may be in the form of a bulb or a hemisphere, and may be hollow in shape and partially open. The cover 1100 may be optically coupled to the light source module 1200. For example, the cover 1100 may diffuse, scatter, or excite light provided from the light source module 1200. The cover 1100 may be a kind of optical member. The cover 1100 can be coupled to the heat discharging body 1400. The cover 1100 may have an engaging portion that engages with the heat discharging body 1400.

The inner surface of the cover 1100 may be coated with a milky white paint. Milky white paints may contain a diffusing agent to diffuse light. The surface roughness of the inner surface of the cover 1100 may be formed larger than the surface roughness of the outer surface of the cover 1100. [ This is because light from the light source module 1200 is sufficiently scattered and diffused to be emitted to the outside.

The cover 1100 may be made of glass, plastic, polypropylene (PP), polyethylene (PE), polycarbonate (PC), or the like. Here, polycarbonate is excellent in light resistance, heat resistance and strength. The cover 1100 may be transparent so that the light source module 1200 is visible from the outside, but it is not limited thereto and may be opaque. The cover 1100 may be formed by blow molding.

The light source module 1200 may be disposed on one side of the heat discharger 1400 and the heat generated from the light source module 1200 may be conducted to the heat discharger 1400. The light source module 1200 may include a light source 1210, a connection plate 1230, and a connector 1250.

The member 1300 may be disposed on the upper surface of the heat discharging body 1400 and has a guide groove 1310 into which the plurality of light source portions 1210 and the connector 1250 are inserted. The guide groove 1310 may correspond to or align with the substrate and connector 1250 of the light source 1210.

The surface of the member 1300 may be coated or coated with a light reflecting material.

For example, the surface of the member 1300 may be coated or coated with a white paint. The member 1300 may be reflected by the inner surface of the cover 1100 and may reflect the light returning toward the light source module 1200 toward the cover 1100 again. Therefore, the light efficiency of the illumination device according to the embodiment can be improved.

The member 1300 may be made of an insulating material, for example. The connection plate 1230 of the light source module 1200 may include an electrically conductive material. Therefore, electrical contact can be made between the heat discharging body 1400 and the connecting plate 1230. The member 1300 may be formed of an insulating material so as to prevent an electrical short circuit between the connection plate 1230 and the heat discharger 1400. The heat dissipation member 1400 can dissipate heat by receiving heat from the light source module 1200 and heat from the power supply unit 1600.

The holder 1500 closes the receiving groove 1719 of the insulating portion 1710 of the inner case 1700. Therefore, the power supply unit 1600 housed in the insulating portion 1710 of the inner case 1700 can be hermetically sealed. The holder 1500 may have a guide protrusion 1510 and the guide protrusion 1510 may have a hole through which the protrusion 1610 of the power supply unit 1600 penetrates.

The power supply unit 1600 processes or converts electrical signals provided from the outside and provides the electrical signals to the light source module 1200. The power supply unit 1600 may be housed in the receiving groove 1719 of the inner case 1700 and may be sealed inside the inner case 1700 by the holder 1500. [ The power supply unit 1600 may include a protrusion 1610, a guide portion 1630, a base 1650, and an extension portion 1670.

The guide portion 1630 may have a shape protruding outward from one side of the base 1650. The guide portion 1630 can be inserted into the holder 1500. A plurality of components can be disposed on one side of the base 1650. The plurality of components may include, for example, a DC converter for converting an AC power supplied from an external power source into a DC power source, a driving chip for controlling driving of the light source module 1200, an ESD (ElectroStatic discharge protection device, but are not limited thereto.

The extension 1670 may have a shape protruding outward from the other side of the base 1650. The extension portion 1670 can be inserted into the connection portion 1750 of the inner case 1700 and can receive an external electrical signal. For example, the extension portion 1670 may be equal to or less than the width of the connection portion 1750 of the inner case 1700. Each of the "+ wire" and the "wire" may be electrically connected to the extension portion 1670 and the other end of the "wire" and the "wire" may be electrically connected to the socket 1800 .

The inner case 1700 may include a molding part together with the power supply part 1600 therein. The molding part is a part where the molding liquid is hardened, so that the power supply providing part 1600 can be fixed inside the inner case 1700.

16 shows a display device including the light emitting device package according to the embodiment.

16, the display device 800 includes a bottom cover 810, a reflection plate 820 disposed on the bottom cover 810, light emitting modules 830 and 835 for emitting light, a reflection plate 820 An optical sheet including a light guide plate 840 disposed in front of the light emitting modules 830 and 835 and guiding light emitted from the light emitting modules 830 and 835 toward the front of the display device and prism sheets 850 and 860 disposed in front of the light guide plate 840, An image signal output circuit 872 connected to the display panel 870 and supplying an image signal to the display panel 870; a display panel 870 disposed in front of the display panel 870; Gt; 880 &lt; / RTI &gt; Here, the bottom cover 810, the reflection plate 820, the light emitting modules 830 and 835, the light guide plate 840, and the optical sheet may form a backlight unit.

The light emitting module may include light emitting device packages 835 mounted on the substrate 830. The substrate 830 may be a PCB or the like. The light emitting device package 835 may be the embodiment 500 shown in FIG.

The bottom cover 810 can house components within the display device 800. [ Also, the reflection plate 820 may be formed as a separate component as shown in the drawing, or may be provided on the rear surface of the light guide plate 840 or on the front surface of the bottom cover 810 in a state of being coated with a highly reflective material .

Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 830 may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), or polyethylene (PE).

The first prism sheet 850 may be formed of a light-transmissive and elastic polymeric material on one side of the support film, and the polymer may have a prism layer in which a plurality of three-dimensional structures are repeatedly formed. Here, as shown in the drawings, the plurality of patterns may be provided with a floor and a valley repeatedly as stripes.

In the second prism sheet 860, the direction of the floor and the valley on one side of the supporting film may be perpendicular to the direction of the floor and the valley on one side of the supporting film in the first prism sheet 850. This is for evenly distributing the light transmitted from the light emitting module and the reflective sheet to the front surface of the display panel 1870.

Although not shown, a diffusion sheet may be disposed between the light guide plate 840 and the first prism sheet 850. The diffusion sheet may be made of polyester and polycarbonate-based materials, and the light incidence angle can be maximized by refracting and scattering light incident from the backlight unit. The diffusion sheet includes a support layer including a light diffusing agent, a first layer formed on the light exit surface (first prism sheet direction) and a light incidence surface (in the direction of the reflection sheet) . &Lt; / RTI &gt;

In an embodiment, the diffusion sheet, the first prism sheet 850, and the second prism sheet 860 make up an optical sheet, which may be made of other combinations, for example a microlens array, A combination of one prism sheet and a microlens array, or the like.

The display panel 870 may include a liquid crystal display (LCD) panel, and may include other types of display devices that require a light source in addition to the liquid crystal display panel 860.

17 shows a head lamp 900 including the light emitting device package according to the embodiment. 17, the head lamp 900 includes a light emitting module 901, a reflector 902, a shade 903, and a lens 904.

The light emitting module 901 may include a plurality of light emitting device packages (not shown) disposed on a substrate (not shown). Here, the light emitting device package may be the embodiment 100 shown in FIG.

The reflector 902 reflects the light 911 emitted from the light emitting module 901 in a predetermined direction, for example, toward the front 912.

The shade 903 is disposed between the reflector 902 and the lens 904 and reflects off or reflects a part of the light reflected by the reflector 902 toward the lens 904 to form a light distribution pattern desired by the designer. The one side portion 903-1 and the other side portion 903-2 of the shade 903 may have different heights from each other.

The light emitted from the light emitting module 901 can be reflected by the reflector 902 and the shade 903 and then transmitted through the lens 904 and directed toward the front of the vehicle body. The lens 904 can refract the light reflected by the reflector 902 forward.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment of the present invention and are not necessarily limited to one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments can be combined and modified by other persons having ordinary skill in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

110: substrate 120: first semiconductor layer
130: superlattice layer 140: active layer
150: first electron blocking layer 160: mask layer
170: second electron blocking layer 180: second semiconductor layer
192: first electrode 194: second electrode.

Claims (10)

A first semiconductor layer;
An active layer disposed on the first semiconductor layer, the active layer including a well layer and a barrier layer;
A first electron blocking layer disposed on the active layer;
A mask layer disposed on the first electron blocking layer;
And a second electron blocking layer disposed on the first region of the first electron blocking layer exposed by the mask layer and including an upper surface located on the first region and a side located between the upper surface and the mask layer, layer; And
And a second semiconductor layer disposed on the mask layer and the second electron blocking layer,
And a side surface of the second electron blocking layer is semipolar. The method according to claim 1,
The surface index of the upper surface of the second electron blocking layer is [0001], the side surface of the second electron blocking layer is a first surface having a surface index of [1-101], or a surface index of [11-22] And a second surface having a light emitting layer. The method according to claim 1,
Wherein each of the first electron blocking layer and the second electron blocking layer is a nitride semiconductor layer containing aluminum. The method of claim 3,
And the aluminum content of the side surface of the second electron blocking layer is smaller than the aluminum content of the upper surface of the second electron blocking layer. The method of claim 3,
The aluminum content of the first interface between the side surface of the second electron blocking layer and the second semiconductor layer is less than the aluminum content of the second interface between the upper surface of the second electron blocking layer and the second semiconductor layer, device. The method of claim 3,
The second semiconductor layer is a nitride semiconductor layer containing aluminum,
Wherein the second semiconductor layer comprises a first concentration region located below the upper surface of the second electron blocking layer and between the side surfaces of the second electron blocking layer and a second concentration region located between the upper surface of the second electron blocking layer and the second semiconductor layer And a second concentration region located between the upper surface of the first concentration region and the second concentration region,
Wherein an aluminum content of the first concentration region is smaller than an aluminum content of the second concentration region. The method according to claim 1,
And the second electron blocking layer is disposed on an edge of the upper surface of the mask layer and on a side surface thereof. The method according to claim 1,
Wherein the mask layer is a silicon nitride film or a silicon oxide film. The method according to claim 1,
A substrate disposed below the first semiconductor layer;
A first electrode disposed on the first semiconductor layer; And
And a second electrode disposed on the second semiconductor layer. The method according to claim 1,
A first electrode disposed under the first semiconductor layer; And
And a second electrode disposed on the second semiconductor layer,
Wherein the second electrode comprises a reflective layer.

Images