KR20140144494A - Substrate manufacture method and build-up substrate lamination structure - Google Patents

Abstract

The present invention relates to a substrate manufacturing method and a build-up substrate layered body. According to an embodiment of the present invention, the substrate manufacturing method comprising; a step of performing the build-up stacking of a photosensitive insulating layer; a step of exposing and developing the photosensitive insulating layer so that the photosensitive insulating layer is divided into a plurality of sections of a predetermined size; and a step of performing the patterning on the divided photosensitive insulating sections is suggested. According to an embodiment of the present invention, the build-up substrate layered body comprising; a core substrate body; a photosensitive insulating layer which is layered on the core substrate body and is divided into a plurality of sections of a predetermined size; and a circuit pattern layer which is pattern on the divided photosensitive insulating sections is suggested.

Description

[0001] SUBSTRATE MANUFACTURE METHOD AND BUILD-UP SUBSTRATE LAMINATION STRUCTURE [0002]

The present invention relates to a substrate manufacturing method and a build-up substrate laminate. Up substrate laminate capable of realizing large-scale curing of a substrate by preparing a photosensitive insulating layer laminated by a build-up method through exposure and development.

Generally, when a build-up is performed using ABF or PPG, warpage or twist phenomenon occurs due to curing of the insulating laminated material in the post-lamination curing process. If warpage or twist phenomenon occurs, even if scale measurement for aligning the substrate is performed, it becomes difficult to align regardless of the measurement scale.

In order to solve this problem, there is a method of minimizing the alignment tolerance caused by warpage or twist by using a method of 4-division or 6-division exposure in addition to scale change measurement after lamination Build-up is underway.

In such a case, pattern processing such as LDI (Laser Direct Imaging) which can overcome warpage or twist in addition to contact exposure due to the increase of the process cost of the build-up substrate and the limitation of the exposure process And the like.

In conventional substrate processing, the build-up process is generally followed by curing and laser drilling. As the substrate size increases during warping, warpage or twist phenomenon occurs. This problem has been a cause of inhibition of the alignment tolerance of the laser via and the refinement of the design rule in the upper pattern.

Korean Patent Publication No. 10-2003-0063066 (published on July 28, 2003)

In order to solve the above-mentioned problems, the substrate manufacturing process is carried out by applying a photosensitive insulating material in order to minimize problems occurring in the conventional ABF or PPG process. At this time, the present invention solves the problem of warpage and the like caused during the laminating process in the build-up substrate manufacturing, and proposes a build-up method for the substrate hardening.

In order to solve the above-mentioned problems, according to one aspect of the present invention, there is provided a method of manufacturing a semiconductor device, Exposing and developing the photosensitive insulating layer so as to be divided into a plurality of sections of a predetermined size, and performing patterning on the divided photosensitive insulating layer sections.

At this time, in one example, in the exposure and development step, each section may be divided into one substrate module unit size or a size including a plurality of substrate module units.

According to another example, in the step of exposure and development, a section group formed of all or a part of a plurality of sections is formed in one large-sized substrate module unit size, and between the sections belonging to all of the plurality of sections or the section group, May be partitioned between the belonging sections so that the remaining sections are left.

Further, in one example, in the step of performing patterning, a circuit pattern may be formed on the photosensitive insulating layer sections through a plating process, or a plating and etching process.

Further, according to one example, in the step of performing patterning, the circuit pattern may be divided and exposed for each of the photosensitive insulating layer sections, and developed and formed.

In yet another example, in performing the patterning, the circuit pattern may be formed by exposing and developing the entire area of the photosensitive insulating layer sections at once.

In another example, a via hole processing on each section may be performed simultaneously with dividing into a plurality of sections in the step of exposure and development.

At this time, in one example, the surface of the photosensitive insulating layer divided for each section can be roughened in the step of exposure and development.

Further, according to one example, the above-described method of manufacturing a substrate may further include a step of curing the substrate on which the patterned photosensitive insulating layer is laminated after performing the patterning.

According to another example, in the build-up lamination step, the photosensitive insulating layer may be build-up laminated on the core substrate body or on the laminated substrate laminate.

At this time, according to another example, in the build-up lamination step, the photosensitive insulating layer is built-up on both sides of the core substrate body or the substrate laminate, and in the step of exposure and development, the double- And each can be divided into a plurality of sections symmetrically with respect to each other.

Next, in order to solve the above-mentioned problems, according to another aspect of the present invention, there is provided a core substrate body; A photosensitive insulating layer laminated on the core substrate body and divided into a plurality of sections of a predetermined size; And a patterned circuit pattern layer on the divided photosensitive insulation layer sections.

At this time, in one example, at least one via hole may be formed on each section of the photosensitive insulating layer.

Further, in one example, each section of the photosensitive insulating layer is divided into one substrate module unit size or a plurality of substrate module unit sizes.

According to another example, the section group formed by all or a portion of the plurality of sections of the photosensitive insulation layer is one large substrate module unit size, and the sections of the plurality of sections, .

According to the embodiment of the present invention, it is possible to solve the problem such as warpage which occurs during the lamination process in manufacturing a build-up substrate to which a photosensitive insulating material is applied, thereby realizing the substrate thickening of the substrate.

Accordingly, the unit cost of the substrate process can be minimized and errors in the alignment process can be reduced.

In addition, through the present invention, it is easy to increase the size of the substrate, thereby minimizing the use of divided exposure and LDI.

It is apparent that various effects not directly referred to in accordance with various embodiments of the present invention can be derived by those of ordinary skill in the art from the various configurations according to the embodiments of the present invention.

FIG. 1A is a view schematically showing a state in which a photosensitive insulating layer is laminated on a core substrate body according to a method of manufacturing a substrate according to an embodiment of the present invention. FIG.
FIG. 1B is a schematic view of a photosensitive insulating layer divided into sections according to a method of manufacturing a substrate according to an embodiment of the present invention.
FIG. 1C is a schematic view showing a state in which a photoresist is laminated on the photosensitive insulating layer sections according to a substrate method according to one embodiment of the present invention. FIG.
FIG. 1D is a schematic view of a build-up substrate laminate in which a circuit pattern is patterned on the photosensitive insulating layer sections according to a method of manufacturing a substrate according to one embodiment of the present invention.
2 is a flow chart schematically illustrating a method of manufacturing a substrate according to one embodiment of the present invention.
3 is a flowchart schematically showing a method of manufacturing a substrate according to another embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the configuration of a first embodiment of the present invention; Fig. In the description, the same reference numerals denote the same components, and a detailed description may be omitted for the sake of understanding of the present invention to those skilled in the art.

As used herein, unless an element is referred to as being 'direct' in connection, combination, or placement with other elements, it is to be understood that not only are there forms of being 'directly connected, They may also be present in the form of being connected, bonded or disposed.

It should be noted that, even though a singular expression is described in this specification, it can be used as a concept representing the entire constitution unless it is contrary to, or obviously different from, or inconsistent with the concept of the invention. It is to be understood that the phrases "including", "having", "having", "comprising", etc. in this specification are intended to be additionally or interchangeable with one or more other elements or combinations thereof.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which: FIG.

A method of manufacturing a substrate according to an aspect of the present invention will be specifically described with reference to the drawings. Here, reference numerals not shown in the drawings to be referred to may be reference numerals in other drawings showing the same configuration.

FIG. 1A is a schematic view illustrating a process of laminating a photosensitive insulating layer on a core substrate according to a method of manufacturing a substrate according to an embodiment of the present invention. FIG. 1B is a cross- And FIG. 1C is a view showing a state in which a photoresist is laminated on the photosensitive insulating layer sections according to a method of manufacturing a substrate according to one embodiment of the present invention. 1D is a view schematically showing a build-up substrate laminate in which a circuit pattern is patterned on the photosensitive insulating layer sections according to a method of manufacturing a substrate according to one embodiment of the present invention, and Fig. 2 FIG. 3 is a flow chart schematically illustrating a method of manufacturing a substrate according to an embodiment of the present invention, A flow diagram schematically illustrating.

1A to 1D, 2 and 3, a method of manufacturing a substrate according to one example of the present invention includes a build-up lamination step (S100), an exposure and development step (S200), and a patterning step (S300) . Also, referring to FIG. 3, in one example, the patterning step (S300) may further include a curing step (S400).

Referring to Figs. 1A, 2 and 3, in the build-up lamination step S100, the photosensitive insulating layer 30 is build-up laminated. The photosensitive insulating layer 30 is formed using a photosensitive insulating resin. For example, the photosensitive insulating layer 30 can be built up by applying or laminating a photosensitive insulating resin in liquid or film form, for example, on the core substrate 10 or the laminated substrate stack.

For example, the method of applying the photosensitive insulating resin includes screen printing, roll coating, spray coating and the like. In addition, the photosensitive insulating layer 30 can be formed by laminating the photosensitive dry film by another method of forming the insulating layer. For example, referring to Fig. 1A, a photosensitive resin film 30 may be laminated on a core substrate body 10. Fig.

Referring now to FIG. 1A, in one example, the photosensitive insulating layer 30 may be build-up stacked on the core substrate 10 or the stacked substrate stack. In this specification, the core substrate body 10 refers to a core substrate layer before being divided or cut into the core substrate itself or each unit module substrate. For example, referring to FIG. 1A, the core substrate body 10 may include a core layer 11 and a circuit pattern layer 13 formed on both sides or one side of the core layer 11. Although not shown in the present specification, a laminated substrate laminate refers to a laminate in which an insulating layer or an insulating layer and a circuit pattern layer are laminated on both sides or one side of a core substrate.

At this time, though not shown, according to one example, in the build-up lamination step S100, the photosensitive insulating layer 30 may be build-up stacked on both sides of the core substrate body 10 or the substrate laminate.

Next, referring to FIGS. 1B, 2 and 3, in the exposure and development steps S200 and S1200, the build-up photosensitive insulating layer 30 is exposed and developed so as to be divided into a plurality of sections 31 of a predetermined size. Light, for example, ultraviolet rays can be used for exposure of the photosensitive insulating material. For example, as shown in FIG. 1A, the photosensitive insulating layer 30 laminated on the core substrate body 10 or the laminated substrate stack is exposed to light using ultraviolet rays, for example, and then developed using a developer . 1B shows a state in which the photosensitive insulating layer 30 is divided into a plurality of sections 31 by exposure and development. The photosensitive insulating layer 30 made up of the plurality of sections 31 after the exposure and development steps S200 and S1200 in this specification is formed in the same manner as the photosensitive insulating layer 30 laminated in the build- The same reference numeral " 30 " However, the photosensitive insulating layer 30 composed of the plurality of sections 31 after the exposure and development steps S200 and S1200 is an optically cured insulating layer, for example, and the photosensitive insulating layer 30 laminated in the build-up lamination step S100, Is not in the state of photocuring, it is important to note that the material specifications of both are different.

For example, the photosensitive insulating layer 30 can be exposed to light by irradiating light, for example, ultraviolet light, using a photomask (not shown), and photo-cured. At this time, a photomask (not shown) may be formed in a divided line pattern of the photosensitive insulating layer 30. [ For example, when the photosensitive insulating layer 30 is a photocurable material, if a photomask pattern is covered with a divided line pattern, or a processing area such as a divided line pattern and a via hole 31a pattern and exposed to, for example, ultraviolet light, The remaining region can be photo-cured. At this time, a processing region where the photocuring is not performed, such as a split line pattern or a split line pattern and a via hole 31a pattern, is then developed by the developer, and the core substrate body 10 is exposed through the developed processing region .

At this time, for example, an alkaline solution such as a Na ₂ CO ₃ solution may be used as a developer used for development of the photosensitive insulating layer 30.

3, in one example, the via hole 31a is formed on each section 31 at the same time as the division into the plurality of sections 31 of the photosensitive insulating layer 30 in the exposure and development step S1200 . That is, the process of forming the via hole 31a on the photosensitive insulating layer 30 divided by the division of the photosensitive insulating layer 30 and the sections 31 can be performed at the same time.

Generally, in case of build-up with a photosensitive insulating material, exposure and development are performed after lamination, and then a curing process is performed. In this case, in the case of the photosensitive insulating material, a via 31a, that is, a photoreceptor, can be formed in the developing process in the same manner as the laser via. Therefore, in order to solve the warpage problem generated in the subsequent curing process, a via hole 31a is formed on the build-up photosensitive insulating layer 30 in the exposure and development step S1200, 30 can be divided or separated for each section 31 of a predetermined size. The photosensitive insulating layer 30 made up of the plurality of sections 31 divided into the development result in the exposure and development steps S200 and S1200 is the same as the photosensitive insulating layer 30 stacked in the build- The photosensitive insulating layer 30 made of the plurality of sections 31 divided into the development result in the exposure and development steps S200 and S1200 is made of a photo-curable material, for example, in the build-up lamination step S100 ) And the material of the photosensitive insulating layer 30 laminated before the photocuring are different from those of the material.

1B, at this point, in one example, each section 31 of the photosensitive insulation layer 30 is sized to include one substrate module unit (not shown) or a plurality of substrate module units Can be divided. That is, each section 31 of the photosensitive insulating layer 30 shown in Fig. 1B may form one substrate module unit, or may form a plurality of substrate module units. At this time, each of the sections 31 of the photosensitive insulating layer 30 can be separated from each other by the divided gap 30a.

Alternatively, although not shown, in another example, in exposing and developing steps, a section group formed of all or a part of the sections 31 may be formed in one large substrate module unit size, (31) so that a connecting portion (not shown) is left between the belonging sections (31) of the section group.

According to the above-described embodiments, the photosensitive insulating layer 30 is divided into a plurality of sections 31 of an appropriate predetermined size, thereby relieving the expansion stress during curing in the subsequent curing step (see S400 in Fig. 3) Thereby minimizing the warpage of the substrate.

Although not shown, in one example, the surface of the photosensitive insulating layer 30 divided by the sections 31 in the exposure and development steps (S200, 1200) can be roughened. The roughening treatment is intended to provide, for example, metal plating on the surface of the photosensitive insulating layer 30 smoothly. The formation of the surface roughness of the photosensitive insulating layer 30 can be performed by various methods and can be performed, for example, by adjusting the exposure amount, adjusting the intensity of the developer, or plasma surface treatment.

Further, although not shown, according to one example, when the photosensitive insulating layer 30 is build-up stacked on both sides of the core substrate body 10 or the substrate stack in the build-up lamination step SlOO, In the developing step S200, the photosensitive insulating layers 30 stacked on both sides can be divided into a plurality of sections 31 symmetrically with respect to each other.

1C, 1D, 2 and 3, in the patterning step S300, patterning is performed on the photosensitive insulating layer sections 31 divided in the exposure and development step S200. At this time, the patterning is an operation of forming the circuit pattern 51 on the photosensitive insulating layer 30 made of the photosensitive insulating layer sections 31. [ The patterning process on the photosensitive insulating layer 30 made of the photosensitive insulating layer sections 31 is performed by forming the conductive layer 50 on the photosensitive insulating layer 30 through the plating method or the conductive paste applying method, ) Can be formed. The conductive paste may be applied by, for example, screen printing. Electrolytic plating, electroplating and the like can be used for plating of the conductive metal.

In FIG. 1C, reference numeral 31 denotes a divided photosensitive insulating layer section, and reference numeral 50 formed on the photosensitive insulating layer sections 31 denotes a conductor layer or a plating layer. Reference numeral 31a denoted by a dotted line indicates a state in which the conductive material is filled in the via hole 31a or the via hole formed on the photosensitive insulating layer sections 31 as a portion shielded by the conductor layer or the plating layer 50. [

For example, the circuit pattern 51 may be formed on the photosensitive insulating layer 30 by plating. At this time, the surface of the photosensitive insulating resin layer 30 may be preliminarily illuminated so that plating can be performed smoothly.

In one example, in the patterning step S300, the circuit pattern 51 may be formed on the photosensitive insulating layer sections 31 through a plating process or a plating and etching process. For example, the circuit pattern 51 may be formed by plating using an additive method such as a semi-additive method or a full-edited method, or a plating tenting method The circuit pattern 51 can be formed on the plating layer.

As the plating method, electroless plating and / or electrolytic plating may be performed. Further, a conductive metal may be used as the plating material. For example, when Cu is used as the conductive material, electroless copper plating can be performed on the photosensitive insulating layer 30 on which the surface roughness is formed. In addition, after the electroless copper plating is performed, the metal conductor layer 50 can be formed by performing electrolytic copper plating on the substrate that has been dried and dried to secure adhesion between the plating layer 50 and the photosensitive insulating layer 30 and to remove moisture have. Referring to FIG. 1C, a photoresist film is coated on a metal conductor layer 50, for example, a substrate on which a copper plating layer is formed, or a photoresist film 40 on which a circuit pattern 51 is formed. After the photoresist 40 is laminated, the circuit pattern layer 51 can be formed by forming a desired circuit pattern 51 by exposure with light, for example, ultraviolet light, and performing etching, for example, chemical etching.

According to one example, although not shown, in the patterning step S300, the circuit pattern 51 may be formed by dividing and exposing the photosensitive insulating layer sections 31 according to the respective sections. For example, the photosensitive insulation layer section 31 may be divided and exposed in accordance with the size. In addition, the entirety of the photosensitive insulation layer sections 31 after the divided exposure for each section 31 can be developed at once to form the circuit pattern 51 on each of the sections 31.

Referring to FIG. 1C, in another pattern, in the patterning step S300, the entire area of the photosensitive insulating layer sections 31 may be exposed and developed at the same time to form the circuit pattern 51. 1C, a photoresist film 40 having a predetermined circuit pattern 51 formed on the entire region of the photosensitive insulating layer sections 31 is laminated.

3, another example of the substrate manufacturing method will be described. Referring to FIG. 3, a substrate manufacturing method according to one example may further include a curing step (S400) after the patterning step (S300). At this time, in the curing step (S400), the substrate on which the patterned photosensitive insulating layer 30 is laminated is cured.

The photosensitive insulating layer 30 is divided into sections or divided into sections and exposure and development steps S200 and S1200 are performed to form a via hole 31a on the photosensitive insulating layer 30 and the photosensitive insulating layer 30 The pattern is formed in step S300 and then cured in the final curing step S400 so that stress during curing can be relieved to minimize warpage and twist. Accordingly, it is possible to minimize the process and cost problems due to the divisional exposure or the process problems due to LDI (Laser Direct Imaging) forming the circuit by compensating exposure of the substrate during pattern formation without conventional section division.

According to the embodiment of the present invention, it is possible to solve the problem such as warpage which occurs during the lamination process in the build-up substrate production, and thus the substrate hardening can be realized.

Next, a build-up substrate laminate according to another embodiment of the present invention will be described in detail with reference to the following drawings. At this time, a method of manufacturing a substrate according to the above-described embodiment and FIGS. 1A to 1C, 2 and 3 will be referred to, and redundant explanations therefor may be omitted.

Figure 1D is a schematic representation of a build-up substrate stack according to one embodiment of the present invention.

1D, a build-up substrate laminate according to one example includes a core substrate body 10, a photosensitive insulating layer 30, and a circuit pattern layer 51. The build-

First, the core substrate body 10 will be described with reference to FIGS. 1A and 1D. Referring to FIG. 1A, the core substrate 10 may include a core layer 11 and a circuit pattern layer 13 formed on both sides or one side of the core layer 11.

Next, the photosensitive insulating layer 30 will be described with reference to Figs. 1B and 1D. 1B and 1D, the photosensitive insulating layer 30 is laminated on the core substrate 10 and divided into a plurality of sections 31 of a predetermined size. Since the photosensitive insulating layer 30 composed of the plurality of sections 31 divided in FIG. 1B has already been photocured through the exposure and development processes, the photosensitive insulating layer 30 in the stacking step before exposure shown in FIG. 30) have different material properties.

1B and 1D, in one example, at least one via hole 31a or a via 51a may be formed on each section 31 of the photosensitive insulating layer 30. In this case, Normally, the via hole 31a refers to a state before the conductive material is filled, and the via 51a may mean that the via hole 31a is filled with a conductive material. However, in the present specification, the via hole 31a and the via 51a may be used in combination, but it should be interpreted according to the entire context.

1B and 1D, in one example, each section 31 of the photosensitive insulating layer 30 is divided into one substrate module unit size or a plurality of substrate module unit sizes. For example, at this time, each of the sections 31 can be separated apart by the split gap 30a.

Although not shown, in another example, the section group formed by all or a part of the plurality of sections 31 of the photosensitive insulating layer 30 may be one large substrate module unit size. At this time, the sections 31 are divided so as to leave a connecting portion (not shown) between the plural sections or the belonging sections 31 of the section group.

Next, referring to Fig. 1D, the circuit pattern layer 51 of the build-up substrate laminate is patterned on the divided photosensitive insulating layer sections 31. Fig.

The foregoing embodiments and accompanying drawings are not intended to limit the scope of the present invention but to illustrate the present invention in order to facilitate understanding of the present invention by those skilled in the art. Embodiments in accordance with various combinations of the above-described configurations can also be implemented by those skilled in the art from the foregoing detailed description. Accordingly, various embodiments of the present invention may be embodied in various forms without departing from the essential characteristics thereof, and the scope of the present invention should be construed in accordance with the invention as set forth in the appended claims. Alternatives, and equivalents by those skilled in the art.

10: core substrate body 11: core layer
13: Circuit pattern or circuit pattern layer 30: Photosensitive insulating layer
31: photosensitive insulating layer section 31a: via hole
40: photoresist 50: conductor layer
51: Circuit pattern or circuit pattern layer 51a: Via

Claims (15)

Build-up a photosensitive insulating layer;
Exposing and developing the photosensitive insulating layer to be divided into a plurality of sections of a predetermined size; and
And performing patterning on the divided portions of the photosensitive insulating layer.
The method according to claim 1,
Wherein each of the sections is divided into one substrate module unit size or a size including a plurality of substrate module units in the exposure and development step.
The method according to claim 1,
In the step of exposing and developing, a section group formed by all or a part of the plurality of sections is formed in one large-sized substrate module unit size, and the sections belonging to all or a plurality of sections Wherein the substrate is region-divided between the sections.
The method according to claim 1,
Wherein the step of performing patterning comprises forming a circuit pattern on the photosensitive insulating layer sections through a plating process or a plating process and an etching process.
The method of claim 4,
Wherein the patterning is performed by dividing and exposing the circuit pattern by the sections of the photosensitive insulation layer, and developing the circuit pattern.
The method of claim 4,
Wherein the circuit pattern is formed by exposing and developing the entire area of the sections of the photosensitive insulation layer at a time of performing the patterning.
The method according to any one of claims 1 to 6,
Wherein the via hole processing is performed on each of the sections while being divided into the plurality of sections in the exposure and development step.
The method of claim 7,
Wherein the surface of the photosensitive insulating layer divided for each section is roughened during the exposure and development.
The method according to any one of claims 1 to 6,
Further comprising the step of: after the step of performing the patterning, curing the substrate on which the patterned photosensitive insulating layer is laminated.
The method according to any one of claims 1 to 6,
Wherein the step of laminating the photosensitive insulating layer on the core substrate body or on the laminated substrate stack in the build-up lamination step comprises build-up lamination of the photosensitive insulating layer.
The method of claim 10,
Wherein the photosensitive insulating layer is built-up on both sides of the core substrate body or the substrate laminate in the build-up lamination step,
Wherein the photosensitive insulating layers stacked on both sides are divided into the plurality of sections each symmetrically with respect to each other in the exposure and development steps.
Core substrate body;
A photosensitive insulating layer laminated on the core substrate body and divided into a plurality of sections of a predetermined size; And
And a patterned circuit pattern layer on the divided portions of the photosensitive insulation layer.
The method of claim 12,
And at least one via hole is formed on each section of the photosensitive insulating layer.
14. The method according to claim 12 or 13,
Wherein each section of the photosensitive insulation layer is divided into one substrate module unit size or a plurality of substrate module unit sizes.
14. The method according to claim 12 or 13,
Wherein a section group formed by all or a portion of the plurality of sections of the photosensitive insulating layer is one large substrate module unit size and a region division is performed between the belonging sections such that a connection site remains between all the sections Up substrate laminate.

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