KR20140026154A - Method of manufacutruing semiconductor device structure - Google Patents

Method of manufacutruing semiconductor device structure Download PDF

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Publication number
KR20140026154A
KR20140026154A KR1020120093193A KR20120093193A KR20140026154A KR 20140026154 A KR20140026154 A KR 20140026154A KR 1020120093193 A KR1020120093193 A KR 1020120093193A KR 20120093193 A KR20120093193 A KR 20120093193A KR 20140026154 A KR20140026154 A KR 20140026154A
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KR
South Korea
Prior art keywords
semiconductor device
device structure
semiconductor
encapsulant
manufacturing
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Application number
KR1020120093193A
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Korean (ko)
Inventor
김창태
고재성
Original Assignee
주식회사 씨티랩
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Application filed by 주식회사 씨티랩 filed Critical 주식회사 씨티랩
Priority to KR1020120093193A priority Critical patent/KR20140026154A/en
Priority to PCT/KR2013/002883 priority patent/WO2013151391A1/en
Priority to PCT/KR2013/002879 priority patent/WO2013151387A1/en
Priority to PCT/KR2013/002882 priority patent/WO2013151390A1/en
Priority to US14/390,611 priority patent/US9773950B2/en
Publication of KR20140026154A publication Critical patent/KR20140026154A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10158—Shape being other than a cuboid at the passive surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes

Abstract

The present invention relates to a method of manufacturing a semiconductor device structure that includes a step of fixing a position to face the electrode of the semiconductor device as a step of fixing a semiconductor device on a plate; a step of covering the semiconductor device with a sealant; a step of separating the semiconductor device covered with the sealant from the plate; and a step of forming a recess part by pressing at least one side of a position where the electrode of the semiconductor device is located and the upper side of the sealant.

Description

[0001] METHOD OF MANUFACUTRUING SEMICONDUCTOR DEVICE STRUCTURE [0002]

Disclosure relates generally to a method of manufacturing a semiconductor device structure, and more particularly, to a method of manufacturing a semiconductor device structure that is simple to manufacture.

Here, the semiconductor device includes a semiconductor light emitting device (eg, a laser diode), a semiconductor light receiving device (eg, a photodiode), a pn junction diode electric device, a semiconductor transistor, and the like, and typically includes a group III nitride semiconductor light emitting device. Can be mentioned. The group III nitride semiconductor light emitting device includes a compound semiconductor layer of Al (x) Ga (y) In (1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). It means a light emitting device such as a light emitting diode, and does not exclude the inclusion of a material or a semiconductor layer of these materials with elements of other groups such as SiC, SiN, SiCN, CN.

Herein, the background art relating to the present disclosure is provided, and these are not necessarily meant to be known arts.

1 is a view illustrating a conventional semiconductor light emitting device (Lateral Chip), the semiconductor light emitting device is a substrate 100, a buffer layer 200 on the substrate 100, a first semiconductor layer having a first conductivity ( 300), an active layer 400 that generates light through recombination of electrons and holes, and a second semiconductor layer 500 having a second conductivity different from the first conductivity are sequentially deposited, and translucent thereon for current diffusion thereon. The conductive film 600 and the electrode 700 serving as the bonding pad are formed, and the electrode 800 serving as the bonding pad is formed on the etched and exposed first semiconductor layer 300. Here, when the substrate 100 side is placed in the package, it functions as a mounting surface.

FIG. 2 is a diagram illustrating another example of a conventional semiconductor light emitting device, wherein the semiconductor light emitting device includes a substrate 100 (eg, a sapphire substrate) and a first semiconductor layer having a first conductivity on the substrate 100. 300; for example, an n-type GaN layer), an active layer 400 for generating light through recombination of electrons and holes; for example, InGaN / (In) GaN MQWs), a second semiconductor layer having a second conductivity different from the first conductivity (500; e.g., p-type GaN layer) are sequentially deposited, and an electrode film 901 (e.g., Ag reflecting film) formed of three layers for reflecting light toward the substrate 100 side thereon; : An Ni diffusion barrier layer and an electrode film 903 (eg, Au bonding layer), and are formed on the first semiconductor layer 300 which is etched and exposed, and serves as a bonding pad 800 (eg, Cr / Ni / Au). Laminated metal pads) are formed. Here, when the electrode film 903 side is placed in the package, it functions as a mounting surface. In terms of heat dissipation efficiency, a flip chip or junction down type chip shown in FIG. 2 is superior in heat dissipation efficiency to the lateral chip shown in FIG. 1. While the lateral chip must emit heat to the outside through the sapphire substrate 100 having a thickness of 80 to 180 μm, the flip chip transmits heat through the metal electrodes 901, 902, 903 positioned close to the active layer 400. Because it can release.

15 is a view showing an example of a conventional semiconductor light emitting device package or semiconductor light emitting device structure, the semiconductor light emitting device package is a vertical semiconductor light emitting device (in the lead frame 110, 120, mold 130, and cavity 140) 150, a vertical type light-emitting chip is provided, and the cavity 140 is filled with an encapsulant 170 containing the phosphor 160. A lower surface of the vertical semiconductor light emitting device 150 is electrically connected to the lead frame 110, and an upper surface of the vertical semiconductor light emitting device 150 is electrically connected to the lead frame 120 by a wire 180. Part of the light emitted from the vertical semiconductor light emitting device 150 (eg, blue light) excites the phosphor 160, and the phosphor 160 generates light (eg, yellow light), and the light (blue light + yellow light) Creates white light Here, the mold 130, the encapsulant 170, or the lead frames 110, 120, the mold 130, and the encapsulant 170 carry the vertical semiconductor light emitting element, and thus, a carrier (ie, a carrier ( Carrier)

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, there is provided a method of fabricating a semiconductor device structure, the method comprising: positioning a semiconductor device on a plate such that the electrode of the semiconductor device faces the plate; Fixing the position; Covering the semiconductor element with an encapsulant; Separating the semiconductor device covered with the encapsulant from the plate; And pressing at least one of the side where the electrode of the semiconductor element is located and the upper side of the encapsulant to form the unevenness. The method of manufacturing a semiconductor device structure is provided.

This will be described later in the Specification for Implementation of the Invention.

1 is a view showing an example of a conventional semiconductor light emitting device (lateral chip)
2 is a view showing another example (Flip Chip) of a conventional semiconductor light emitting device,
3 illustrates an example of a method of manufacturing a semiconductor device structure according to the present disclosure;
4 illustrates an example of a method of manufacturing a flip chip package according to the present disclosure;
5 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
6 is a diagram illustrating an example of a semiconductor device structure according to the present disclosure;
7 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
8 illustrates another example of a semiconductor device structure according to the present disclosure;
9 illustrates an example of using a semiconductor device structure according to the present disclosure;
10 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
11 illustrates another example of a semiconductor device structure according to the present disclosure;
12 illustrates another example of a semiconductor device structure according to the present disclosure;
13 illustrates another example of a semiconductor device structure according to the present disclosure;
14 illustrates another example of a semiconductor device structure according to the present disclosure;
15 is a view showing an example of a conventional semiconductor light emitting device package or semiconductor light emitting device structure,
16 illustrates another example of a semiconductor device structure according to the present disclosure;
FIG. 17 is a diagram illustrating an example of a method of manufacturing a semiconductor device structure shown in FIG. 16;
18 illustrates another example of a method of manufacturing the semiconductor device structure illustrated in FIG. 16.
19 illustrates an example of a process of curing an encapsulant in a process of manufacturing the semiconductor device structure shown in FIG. 16.

The present disclosure will now be described in detail with reference to the accompanying drawing (s).

3 is a view illustrating an example of a method of manufacturing a semiconductor device structure according to the present disclosure. After the plate 1 is prepared, the semiconductor device 2 including the two electrodes 80 and 90 is bonded to the adhesive 3. Fix the position on the plate (1). Next, the encapsulating material (encapsulating material) 4 is used to wrap the semiconductor element 2. Next, the plate 1 and the semiconductor element 2 are separated. The material constituting the plate 1 is not particularly limited, and a material such as sapphire may be used, or a flat structure such as metal or glass may be used. The material constituting the adhesive 3 is not particularly limited, and any adhesive may be used as long as the semiconductor element 2 can be fixed to the plate 1. As the material of the encapsulant 3, a silicon epoxy conventionally used in an LED package may be used. After the sealing agent 4 is formed, separation of the semiconductor element 2 and the plate 1 can be performed by applying heat to melt the adhesive 3 or by using a solvent capable of melting the adhesive 3. It is also possible to use heat and solvent together. It is also possible to use an adhesive tape. The encapsulant 4 can be formed by a conventional method such as dispensing, screen printing, molding, spin coating, or the like, and can be formed by irradiating light after applying a photocurable resin (UV curable resin). Do. In the case where a translucent plate such as sapphire is used as the plate 1, it is also possible to irradiate light from the plate 1 side. Although one semiconductor element 2 is shown on the plate 1 for explanation, the process can be performed with the plurality of semiconductor elements 2 placed on the plate 1. Although the semiconductor element 2 has been described as having two electrodes 80 and 90, the number is not particularly limited. For example, in the case of a transistor, it may have three electrodes.

4 is a view illustrating an example of a method of manufacturing a flip chip package according to the present disclosure, wherein a junction down chip is presented as the semiconductor device 2. As the junction down type chip, a flip chip type semiconductor light emitting device as shown in FIG. 2 is exemplified. Accordingly, as shown in FIG. 2, the semiconductor light emitting device includes a substrate 100 (eg, a sapphire substrate), a first semiconductor layer 300 having a first conductivity (eg, an n-type GaN layer), electrons, and holes on the substrate 100. The active layer 400 (eg, InGaN / (In) GaN MQWs) that generates light through recombination of the second semiconductor layer 500 (eg, p-type GaN layer) having a second conductivity different from the first conductivity A three-layer electrode film 901 (e.g., Ag reflecting film), an electrode film 902 (e.g., Ni diffusion barrier film), and an electrode film 903; Au bonding layer) may be formed, and an electrode 800 (eg, Cr / Ni / Au laminated metal pad) serving as a bonding pad may be formed on the etched and exposed first semiconductor layer 300. The semiconductor device 2 has two electrodes 80 and 90, and the electrode 90 may have the same configuration as the electrodes 901, 902 and 903 of FIG. 2, and is made of a combination of a distributed bragg reflector (DBR) and a metal reflecting film. Also good. The electrode 80 and the electrode 90 are electrically insulated by an insulating film 5 such as SiO 2 . The subsequent procedure is the same, and the semiconductor element 2 is wrapped using an encapsulating material (encapsulating material 4). Next, the semiconductor element 2 is separated from the plate 1 and the adhesive agent 3.

FIG. 5 shows another example of a method for manufacturing a semiconductor device structure according to the present disclosure, in which a plurality of semiconductor devices 2, 2 are integrally covered with an encapsulant 4 on a plate 1. After removing the plate 1, it becomes easy to package one semiconductor element 2, 2 integrally. The electrical connection method of the semiconductor element 2 and the semiconductor element 2 is mentioned later. It is also possible to separate them into individual semiconductor elements 2 as in FIG. This can be achieved by separating a plurality of semiconductor elements 2, 2 from the plate 1, and then individualizing them through a process such as sawing. By using the sealing agent 4 which has softness after hardening, the bond with a flexible circuit board can be heightened further.

6 is a view illustrating an example of a semiconductor device structure according to the present disclosure, and is formed such that the side surface 4a of the encapsulant 4 is inclined. In the case where the semiconductor element 2 is a light emitting element, the encapsulant 4 has various angled outer surfaces, and the light extraction efficiency to the outside of the package is increased. When screen printing, the screen partition wall is formed to be inclined, so that the side surface 4a can be formed, and when sawing, the side surface 4a can be formed by using a pointed cutter.

FIG. 7 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. After the plate 1 is removed, an insulating film 6, such as SiO 2 , is formed on the electrode 80 and the electrode 90. It is provided in the state which exposed. Thereafter, the external electrode 81 is connected to the electrode 80, and the external electrode 91 is formed on the electrode 90 to form a structure similar to a conventional package. The external electrodes 81 and 91 may correspond to lead frames of a conventional package. In addition, the external electrodes 81 and 91 may be widely spread and deposited so as to function as reflective films. The insulating film 6 may merely serve as an insulating function, or may form an alternate stacked structure of SiO 2 / TiO 2 or form a DBR to reduce light absorption by the external electrodes 81 and 91. As shown in FIG. 4, when the semiconductor device 2 includes the insulating film 5, the insulating film 6 may be omitted. The deposition process and the photolithography process used to form the insulating film 6 and the external electrodes 81 and 91 are common in the semiconductor chip process and are very familiar to those skilled in the art. By providing the external electrodes 81 and 91, mounting to the PCB, COB, etc. can be made easier. If necessary, it is also possible to provide only the insulating film 6 without the external electrodes 81 and 91. It not only functions to protect the insulating film 6 between the semiconductor element 2 and the encapsulant 4, but also to protect the encapsulant 4 from the process of forming the external electrodes 81 and 91. In addition, the insulating film 6 can be formed of a white material so that the insulating film 6 can function as a reflective film. For example, a white PSR (Photo Sloder Regist) may be used as the insulating film 6 or coated. For example, a white PSR can be screen printed or spin coated and then patterned through a common photolithography process.

8 is a diagram illustrating another example of a semiconductor device structure according to the present disclosure, and includes a semiconductor device 2A and a semiconductor device 2B electrically connected in series. This configuration is made possible by connecting the negative electrode 80A of the semiconductor element 2A and the positive electrode 90B of the semiconductor element 2B through the external electrode 89. Reference numeral 4 is an encapsulant, 6 is an insulating film, 90A is a positive electrode of the semiconductor element 2A, and 80B is a negative electrode of the semiconductor element 2B. This configuration makes it possible to form an electrical connection between the integrated semiconductor elements 2A and 2B through the encapsulant 4 without the use of a monolithic substrate. In the case of a monolithic substrate, the structure of the semiconductor element thereon is the same, but according to the method of the present disclosure, the semiconductor element 2A and the semiconductor element 2B need not be elements having the same function. It goes without saying that the semiconductor elements 2A and 2B can be connected in parallel. In addition, the side surface 4a of the encapsulant 4 may be formed to be inclined as shown in FIG. 6, and this configuration enables a high-voltage semiconductor light emitting device package or a semiconductor light emitting device structure that could not be previously imagined. .

9 is a view illustrating an example of the use of a semiconductor device structure according to the present disclosure. In the semiconductor device 2C, a conductive line 7a of the printed circuit board 7 and electrodes 80 and 90 are directly connected to each other. The element 2D is connected through the conductive line 7b and the external electrodes 81 and 91. The printed circuit board 7 may be a flexible circuit board.

FIG. 10 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which a semiconductor device 2 as shown in FIG. 2 is provided, and the semiconductor device 2 includes a substrate 100. , On the substrate 100, a first semiconductor layer 300 having a first conductivity, an active layer 400 that generates light through recombination of electrons and holes, and a second semiconductor layer having a second conductivity different from the first conductivity. 500 is grown, and electrodes 80 and 90 are formed. The semiconductor element 2 is attached to the plate 1 with an adhesive 3, and then, prior to covering with the encapsulant 4, the substrate 100 is removed, and preferably a rough surface ( 301 is formed. The subsequent process is the same. The substrate 100 may be removed by a process such as laser lift-off, and the rough surface 301 may be through dry etching such as an inductively coupled plasma (ICP). This enables chip level laser lift off.

FIG. 11 is a view showing another example of a semiconductor device structure according to the present disclosure, in which an encapsulant 4 includes phosphors. YAG, Silicate, Nitride phosphors and the like can emit light of a desired color.

12 illustrates another example of the semiconductor device structure according to the present disclosure, in which a phosphor layer 8 is formed in the encapsulant 4 or under the encapsulant 4. This can be formed by precipitating the phosphor in the encapsulant 4, or spin coating separately, or by applying a phosphor contained in a volatile liquid, followed by volatilization, leaving only the phosphor and then covering it with the encapsulant 4. It is possible to form a plurality of phosphor layers 8 as required.

FIG. 13 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which the encapsulant 4 is provided with a rough surface or unevenness 4g for increasing light extraction efficiency. The rough surface 4g can be formed by pressing, forming a nanoimprint, or the like. In addition, after applying the bead material, it is also possible to form through etching, sandblasting and the like. The rough surface 4g may be formed before or after separation of the plate 1.

FIG. 14 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which a lens 4c is formed on the encapsulant 4. Preferably, the lens 4c is formed integrally with the sealing agent. Such an integrated lens 4c can be formed by a compression molding method or the like.

FIG. 16 is a view showing still another example of the semiconductor device structure according to the present disclosure. A rough surface or irregularities 4g is formed on the upper side of the encapsulant 4, and the lower side of the encapsulant 4 and the semiconductor element 2. The rough surface or uneven | corrugated surface 4h is formed in the sealing agent 4 also in the side where the electrode 80,90 of () is located. It goes without saying that the unevenness 4g may be formed only on either side. In the case where the semiconductor element 2 is a semiconductor light emitting element, the unevenness 4g may function as a scattering surface for scattering light. By the unevenness 4h, the area where the encapsulant 4 and the insulating film 6 and / or the external electrodes 81 and 91 face each other is enlarged, so that the bonding force between them can be improved. In addition, the movement to the side by the unevenness (4h) is suppressed can improve the bonding force.

FIG. 17 is a view illustrating an example of a method of manufacturing the semiconductor device structure illustrated in FIG. 16. In the state where the semiconductor device 2 is fixed on the plate 1, the encapsulant 4 is formed by using the pressure plate 4j. The process of forming unevenness (4g; see FIG. 16) in the process is shown.

FIG. 18 is a view showing another example of the method of manufacturing the semiconductor device structure shown in FIG. 16, wherein the insulating film 6 and the external electrodes 81 and 91 are formed on the semiconductor device 2, and then the pressure plate 4k. The process of forming unevenness | corrugation 4h (refer FIG. 16) using the following is shown. Here, the pressing plate 4j may be flat as shown in FIG. 18, and may have irregularities as shown in FIG. 17. It goes without saying that the pressing plate 4k can be placed above the sealing agent 4 and the flat or uneven pressing plate 4j can be placed below the sealing agent 4.

FIG. 19 is a diagram illustrating an example of a process of curing an encapsulant in a process of manufacturing the semiconductor device structure illustrated in FIG. 16. In the case where the encapsulant 4 is a thermosetting resin (e.g. silicone epoxy resin), it is not easy to form the unevenness (4g, 4h) when the curing is completed, so that the unevenness (4g, 4h) before the curing is completed It is preferable to form. In addition, by hardening is completed in the process of forming the uneven (4g, 4h), the uneven (4g, 4h) can follow the shape of the pressing plate (4j, 4k) as it is. For example, it is possible to form the unevenness 4g and 4h in a state in which the encapsulant 4 is placed above the glass transition temperature. When the hardening is performed at a high temperature at one time, the wave shape and bubbles are generated in the encapsulant 4, so that it cannot have a clean surface. In order to solve this, if the temperature is gradually raised step by step, the encapsulant 4 can have a clean side.

Various embodiments of the present disclosure will be described below.

(1) A semiconductor device structure in which an encapsulant serves as a carrier.

(2) A semiconductor device structure having a lower surface of the encapsulant separated from the plate.

(3) A semiconductor device structure in which the outer surfaces of the encapsulant except the surface where the electrodes of the semiconductor device are located form the outer surface of the structure or package.

(4) A semiconductor device structure in which semiconductor devices are bonded using an encapsulant.

(5) A method of fabricating a semiconductor device structure, comprising: positioning a semiconductor device on a plate, the method comprising: positioning the electrode of the semiconductor device to face the plate; Covering the semiconductor element with an encapsulant; And separating the semiconductor device covered with the encapsulant from the plate.

(6) A method of manufacturing a semiconductor device structure, comprising the steps of: positioning a semiconductor device on a plate; positioning the electrode of the semiconductor device so as to face the plate; Covering the semiconductor element with an encapsulant; Separating the semiconductor device covered with the encapsulant from the plate; And pressing at least one of the side where the electrode of the semiconductor element is located and the upper side of the encapsulant to form the unevenness.

(7) In the step of forming the unevenness, unevenness is formed as a scattering surface at least on the upper side of the encapsulant, and the semi-elementary element is a semiconductor light emitting device, characterized in that the manufacturing method of the semiconductor device structure.

(8) A method of manufacturing a semiconductor device structure, wherein in the step of forming the unevenness, curing of the encapsulant is completed.

(9) prior to forming the unevenness, forming an insulating film exposing the electrode; the method of manufacturing a semiconductor device structure, characterized in that it further comprises. Only an insulating film may be formed, and after forming the insulating film, an external electrode may be formed, or after forming the external electrode, an insulating film may be formed.

(10) prior to forming the unevenness, forming an external electrode electrically connected with the electrode; the method of manufacturing a semiconductor device structure, characterized in that it further comprises.

(11) A method of manufacturing a semiconductor device structure, characterized in that by forming the unevenness, the area facing the encapsulant and the external electrode is enlarged. The bonding area of the protons is widened, and thus the bonding force of the protons can be improved, and the bonding force of the protons can be increased by applying heat in the process of forming the unevenness.

(12) A method of manufacturing a semiconductor device structure comprising the step of forming an unevenness, the area of the encapsulant, the insulating film and the external electrode facing each other is expanded.

The method of manufacturing a semiconductor device structure according to the present disclosure makes it possible to easily manufacture a semiconductor device structure or a package.

In addition, according to the method of manufacturing another semiconductor device structure according to the present disclosure, it is possible to make a structure or package in which the encapsulant serves as a carrier.

Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, a light emitting device structure or a package in which a transparent encapsulant serves as a carrier can be manufactured.

Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, a plurality of semiconductor devices can be easily electrically connected.

In addition, according to the method of manufacturing another semiconductor device structure according to the present disclosure, semiconductor devices of different structures can be easily electrically connected.

In addition, according to the method of manufacturing another semiconductor device structure according to the present disclosure, it is possible to easily form a rough surface or irregularities in the encapsulant.

In addition, according to the method of manufacturing another semiconductor device structure according to the present disclosure, it is possible to form irregularities, thereby improving the bonding force between the sealing agent and the insulating film and / or the external electrode.

100: substrate 200: buffer layer 300, 400, 500: semiconductor layer

Claims (10)

In the method of manufacturing a semiconductor device structure,
Positioning the semiconductor element on the plate, the method comprising: positioning the electrode of the semiconductor element toward the plate;
Covering the semiconductor element with an encapsulating material;
Separating the encapsulant-covered semiconductor element from the plate; And,
And pressing at least one of the side where the electrode of the semiconductor element is located and the upper side of the encapsulant to form the unevenness. The method according to claim 1,
In the step of forming the irregularities, irregularities are formed as a scattering surface at least on the upper side of the encapsulant,
A semi-elementary device is a method of manufacturing a semiconductor device structure, characterized in that the semiconductor light emitting device. The method according to claim 1,
In the step of forming the irregularities, the method of manufacturing a semiconductor device structure, characterized in that the curing of the sealing agent is completed. The method according to claim 1,
A method of manufacturing a semiconductor device structure, further comprising: forming an insulating film exposing the electrode prior to forming the unevenness. The method according to claim 1,
Prior to forming the irregularities, forming an external electrode electrically connected to the electrode; method for manufacturing a semiconductor device structure, characterized in that it further comprises. The method according to claim 1,
Prior to forming the unevenness, forming an insulating film exposing the electrode; And forming an external electrode electrically connected to the exposed electrode through the insulating film. The method of claim 5,
A method of manufacturing a semiconductor device structure, characterized in that by forming an unevenness, the area facing the encapsulant and the external electrode is enlarged. The method of claim 6,
A method of manufacturing a semiconductor device structure comprising the step of forming an unevenness, the area facing the encapsulant, the insulating film and the external electrode is enlarged. The method according to claim 8,
In the step of forming the irregularities, irregularities are formed as a scattering surface on the upper side of the encapsulant,
A semi-elementary device is a method of manufacturing a semiconductor device structure, characterized in that the semiconductor light emitting device. The method of claim 9,
In the step of forming the irregularities, the method of manufacturing a semiconductor device structure, characterized in that the curing of the sealing agent is completed.
KR1020120093193A 2012-04-06 2012-08-24 Method of manufacutruing semiconductor device structure KR20140026154A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020120093193A KR20140026154A (en) 2012-08-24 2012-08-24 Method of manufacutruing semiconductor device structure
PCT/KR2013/002883 WO2013151391A1 (en) 2012-04-06 2013-04-05 Method for manufacturing semiconductor device structure, and semiconductor device structure using same
PCT/KR2013/002879 WO2013151387A1 (en) 2012-04-06 2013-04-05 Method for manufacturing semiconductor device structure
PCT/KR2013/002882 WO2013151390A1 (en) 2012-04-06 2013-04-05 Method for manufacturing semiconductor device structure
US14/390,611 US9773950B2 (en) 2012-04-06 2013-04-05 Semiconductor device structure

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