KR20130037490A - Driving apparatus for image display device and method for driving the same - Google Patents

Abstract

PURPOSE: A driving device of an image display device and a driving method thereof are provided to simplify the driver circuit of an image display panel by selectively driving the data lines of the image display panel. CONSTITUTION: A display panel(2) comprises multiple pixels. The display panel displays an image. A data driver(4) generates an image signal for the data lines of the display panel to be selectively altered for driving. A data switching part(10) alternatively selects data lines for electrically connecting to the image signal output channel of the data driver. A timing controller(8) arranges image data inputted from outside for supplying to the data driver. The timing controller controls a data switching part and the data driver. [Reference numerals] (10) Data switching part; (4) Data driver; (6) Gate driver; (8) Timing controller;

Description

DRIVING APPARATUS FOR IMAGE DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME}

The present invention relates to a driving apparatus of a video display device and a driving method thereof capable of improving the reliability by selectively driving the data lines of the image display panel and preventing the degradation of display image quality while simplifying the driver circuit of the image display panel. .

BACKGROUND ART [0002] Lightweight thin flat panel displays (LCDs) are mainly used as image display devices used in monitors for personal computers, portable tablet terminals, notebooks, and various information devices. Such flat panel displays include liquid crystal displays, light emitting displays, plasma display panels, field emission displays, and the like.

The flat panel display device includes a display panel in which a plurality of pixel cells are arranged and a driving circuit for driving the display panel so that an image is displayed on the display panel by the driving circuit.

Recently, a method of reducing the manufacturing cost of a video display device by simplifying the number of data driver circuits, for example, data integrated circuits (ICs), and the number of channels among driving circuits for driving a display panel has emerged. This is a method of simplifying the number of data integrated circuits or the number of channels thereof by alternately driving the image signal supply lines, that is, the data lines, of the display panel.

To this end, each data line is divided into odd and even data lines and alternately driven by odd and even data lines. However, the data line selection driving method according to the related art has a problem such that a coupling phenomenon occurs between the adjacent data lines and the image signal is distorted. In other words, circuits for selective driving in odd- and even-numbered data lines are also alternately arranged in odd- and even-line units so that signals and coupling phenomena for selecting odd- and even-numbered data lines, respectively, may occur. Will occur. In this case, dimming may occur between odd-numbered and even-numbered data lines, such that a voltage level of an image signal supplied to each data line is distorted.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and by selectively driving the data lines of the image display panel, the image display apparatus can improve the reliability by preventing the deterioration of the display image quality while simplifying the driver circuit of the image display panel. Its purpose is to provide a driving device and a driving method thereof.

According to an aspect of the present invention, there is provided a driving apparatus of an image display device including: a display panel configured to display an image having a plurality of pixels; A data driver to generate an image signal such that data lines of the display panel are alternately driven; Pixel columns of two different colors among the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel are driven in different 1/2 horizontal periods of every horizontal period or in different frame periods. A data switching unit configured to alternately select the data lines so as to be driven at each other, and to electrically connect the data lines to an image signal output channel of the data driver; And a timing controller for aligning and supplying image data input from the outside to the data driver and controlling the data switching unit and the data driver.

The timing controller arranges the image data so that the pixel columns of two different colors among the red, green, and blue pixel columns display an image in different frame periods or different 1/2 horizontal periods, thereby providing the data driver with the data driver. And supplying the first and second selection signals to the data switching unit so as to have phase differences of different logic levels alternately in units of an image display period in every frame period or every horizontal line period.

The data switching unit includes a plurality of multiplexer circuits including a plurality of switching elements, wherein the 3i-second data lines provided in the red pixel columns according to the first and second selection signals (where i is a natural number except 0) The 3i-1st data lines alternated with the 3i-1st or 3i-1st data lines so that the 3i-1st data lines of the green pixel column are driven in different 1/2 horizontal periods or different frame periods of every horizontal period. And electrically connect the video signal output channel of the data driver.

The data switching unit is provided between the 6i-4th, 6i-3rd, and 6i-1th data lines and the corresponding 3i-2nd, 3i-1rd and 3ith image signal output channels, respectively, to select the first selection. A plurality of agents electrically connecting the 6i-4th, 6i-3rd, and 6i-1th data lines to corresponding 3i-2nd, 3i-1st 3ith video signal output channels according to signals; And a second switching signal provided between the first switching element and the 6i-5th, 6i-2nd, and 6ith data lines and the corresponding 3i-2nd, 3i-1rd and 3ith video signal output channels, respectively. A plurality of second switching elements electrically connecting the 6i-5th, 6i-2nd, and 6ith data lines to the corresponding 3i-2nd, 3i-1rd and 3ith video signal output channels, respectively; Characterized in having a.

The timing controller generates only the second selection signal at a low logic level in an image display period of odd frames of every horizontal period or half horizontal period of every horizontal period, and the other half horizontal period or every frame of every horizontal period. During the video display period of even frames during the period, only the first selection signal is generated at a low logic level, such that the plurality of first switching elements are turned on during the half horizontal period of every horizontal period or the image display period of odd frames. The 6i-4th, 6i-3rd, and 6i-1th data lines are electrically connected to the corresponding 3i-2nd, 3i-1st and 3ith video signal output channels, respectively. 2 The switching elements are turned on during 1/2 horizontal period during every horizontal period or during image display period of even frames, and the 6i-5th, 6i-2nd, and 6ith data lines corresponding to the 3i-2nd, 3i -number 1 3i is characterized in that the second video signal to output channel and electrically connected to each.

In addition, a driving method of an image display apparatus according to an exemplary embodiment of the present invention for achieving the above object is to alternately drive data lines of a display panel displaying an image with a plurality of pixels using a data driver. Generating an image signal such that the image signal is generated; Pixel columns of two different colors among the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel by using the data switching unit have different half horizontal periods or different frames during each horizontal period. Alternately selecting the data lines to be driven in a period and electrically connecting the data lines to an image signal output channel of the data driver; And arranging and supplying image data input from the outside to the data driver, and controlling the data switching unit and the data driver.

The controlling of the data switching unit and the data driver may include converting the image data into two or two horizontal periods or two or more horizontal periods of each of the red, green, and blue pixel columns. Arranging to display an image in a frame period, and supplying the data driver to the data driver, and alternately having a different logical level of phases by alternating each half horizontal period or every image period during each frame period. Generating first and second selection signals and supplying the first and second selection signals to the data switching unit.

Alternately selecting the data lines and electrically connecting the data lines to an image signal output channel of the data driver may be achieved by using the data switching unit including a plurality of multiplexer circuits including a plurality of switching elements. 2 According to the selection signal, the 3i-2th data lines provided in the red pixel column (where i is a natural number except 0) and the 3i-1th data lines provided in the green pixel column are different from each other during the horizontal period. And electrically connecting the 3i-2nd or 3i-1th data lines alternately with the image signal output channel of the data driver so as to be driven in two horizontal periods or different frame periods.

The data switching unit is provided between the 6i-4th, 6i-3rd, and 6i-1th data lines and the corresponding 3i-2nd, 3i-1st and 3ith video signal output channels, respectively, to provide the first switch. A plurality of electrically connecting the 6i-4th, 6i-3rd, and 6i-1th data lines to corresponding 3i-2nd, 3i-1th 3ith video signal output channels according to a selection signal; A first switching element and a 6i-5th, 6i-2nd, 6ith data line and a corresponding 3i-2nd, 3i-1st 3ith image signal output channel, respectively; A plurality of second switching for electrically connecting the 6i-5th, 6i-2nd, and 6ith data lines to the corresponding 3i-2nd, 3i-1rd and 3ith video signal output channels according to the signals; An element is provided.

Alternately selecting the data lines and electrically connecting the data lines to an image signal output channel of the data driver may include only a second selection signal in an image display period of an odd frame during a half horizontal period or every frame period in every horizontal period. And generating the low logic level and generating only the first selection signal at a low logic level in another half horizontal period of every horizontal period or an image display period of an even frame of every frame period, whereby the plurality of first switching elements The 6i-4th, 6i-3rd, and 6i-1th data lines are turned on during the image display period of the odd frame, and the 3i-2nd, 3i-1th 3ith video signal output channels corresponding thereto; The plurality of second switching elements are turned on during the image display period of even frames, respectively, so that the 6i-5th, 6i-2nd, and 6ith data are electrically connected. Which it is characterized in that to the 3i-2 th, 3i-1-th 3i-th video signal output channel and electrically connected to each corresponding thereto.

An apparatus and a method of driving an image display apparatus according to an embodiment of the present invention having the various technical features as described above, by simplifying the driver circuit of the image display panel by selectively driving the data lines of the image display panel, each data line The voltage level of the video signal supplied to the field is not distorted. Thus, it is possible to reduce the manufacturing cost of the video display device, and to prevent the deterioration of the display quality of the video display panel, thereby improving the reliability thereof.

1 is a block diagram schematically illustrating a driving device of a liquid crystal display according to an exemplary embodiment of the present invention.
FIG. 2 is a circuit diagram illustrating the data switching unit of FIG. 1 in detail. FIG.
FIG. 3 is a diagram for describing a data switching unit and a driving method of each data line illustrated in FIGS. 1 and 2.

Hereinafter, a driving apparatus and a driving method of an image display apparatus according to an embodiment of the present invention having the above characteristics will be described in detail with reference to the accompanying drawings. Here, the image display device of the present invention may be a liquid crystal display device, a field emission display device, a plasma display panel, an organic light emitting diode display device, etc. Hereinafter, only the case where it is applied to the liquid crystal display device for convenience of description will be described as an example. do.

1 is a block diagram schematically illustrating a driving device of a liquid crystal display according to an exemplary embodiment of the present invention.

A driving device of the liquid crystal display shown in FIG. 1 includes a liquid crystal panel 2 including a plurality of pixels to display an image; A data driver 4 for generating an image signal such that the data lines DL1 to DLm of the liquid crystal panel 2 are selectively alternately driven; A gate driver 6 driving a plurality of gate lines GL1 to GLn; Pixel columns of two different colors among the red (R), green (G), and blue (B) pixel columns provided in the data line forming direction of the liquid crystal panel 2 are different in the frame period or from each other. A data switching unit 10 for alternately selecting data lines to be driven in a horizontal period and electrically connecting the image signal output channels CH1 to CHn of the data driver 4; And a timing controller 8 for aligning and supplying image data RGB inputted from the outside to the data driver 4 and controlling the data switching unit 10 and the data and gate drivers 4 and 6.

The liquid crystal panel 2 includes a thin film transistor (TFT) formed in each pixel area defined by the plurality of gate lines GL1 through GLn and the plurality of data lines DL1 through DLm, and a liquid crystal capacitor connected to the TFT. (Clc). The liquid crystal capacitor Clc is composed of a pixel electrode connected to the TFT, and a common electrode facing the pixel electrode and the liquid crystal. The TFT supplies the data signals from the respective data lines DL1 to DLm to the pixel electrodes in response to the scan pulses from the respective gate lines GL1 to GLn, that is, the gate on signal. The liquid crystal capacitor Clc charges the difference voltage between the data signal supplied to the pixel electrode and the common voltage supplied to the common electrode, and adjusts the light transmittance by varying the arrangement of liquid crystal molecules according to the difference voltage. The storage capacitor Cst is connected to the liquid crystal capacitor Clc in parallel so that the voltage charged in the liquid crystal capacitor Clc is maintained until the next data signal is supplied. The storage capacitor Cst is formed by overlapping the pixel electrode with the previous gate line and the insulating layer interposed therebetween. In contrast, the storage capacitor Cst is formed by overlapping the pixel electrode with the storage line and the insulating layer interposed therebetween.

The data driver 4 includes a data control signal DCS from the timing controller 8, for example, a source start signal SSP, a source shift clock SSC, and a source output enable signal. Generates an image signal by 1/2 horizontal line every 1/2 horizontal period so that adjacent data lines DL1 through DLm are alternately driven within at least one horizontal period using a source output enable (SOE) signal or the like. The video signals are generated and output one horizontal line so that the data lines DL1 to DLm adjacent to each other are alternately driven in different frame periods. In other words, the data driver 4 latches the digital image data inputted by 1/2 horizontal line or 1 horizontal line in accordance with the SSC, and then converts the latched image data Data into an analog image signal. In response to the SOE signal, an image signal of one horizontal line or one half horizontal line is supplied to each output channel CH1 through CHn every one horizontal period in which a scan pulse is supplied to each gate line GL1 through GLn. . At this time, the data driver 4 selects a gamma voltage having a predetermined level according to the gray value of the digital image data Data, and supplies the selected gamma voltage to each output channel CH1 to CHn as an image signal.

The gate driver 6 is a gate control signal GCS from the timing controller 8, for example, a gate start signal GSP, a gate shift clock GSC, and a gate output enable. The scan pulse or the gate low voltage is supplied to each gate line GL1 to GLn by using a (GOE; Gate Output Enable) signal.

The timing controller 8 stores image data RGB from the outside, in which pixel columns of two different colors among the red, green, and blue pixel columns of the liquid crystal panel 2 are provided. The images are arranged to display images in different frame periods and supplied to the data driver 4. The gate control signal GCS and the data control signal DCS are generated using the synchronization signals DCLK, DE, Hsync, and Vsync from the outside, and the data driver 4 and the gate driver 6 are respectively controlled. .

In addition, the timing controller 8 may alternately select the data lines DL1 to DLn to electrically connect the data switching unit 10 to the image signal output channels CH1 to CHn of the data driver 4. The first and second selection signals SC and CS are generated so as to control the data switching unit 10. Here, the timing controller 8 generates the first and second selection signals SC and CS to have different phases alternately in units of 1/2 horizontal periods or in image display periods of every frame period, and thus have different phases. To 10). For example, the first selection signal SC is generated at a high logic level while the second selection signal CS is generated at a low logic level in a 1/2 horizontal period or an image display period of odd frames during every frame period. Can be. The first selection signal SC may be generated at a low logic level while the second selection signal CS may be generated at a high logic level during another 1/2 horizontal period or an image display period of even frames during every frame period. . On the other hand, in a blank period in which an image is not displayed during every frame period, the same logical level may be generated.

The data switching unit 10 includes a plurality of multiplexer circuits including a plurality of switching elements and is provided in the red (R) pixel column according to the first and second selection signals SC and CS input from the timing controller 8. The 3i-2th data lines (where i is a natural number except 0) and the 3i-1th data lines provided in the green (G) pixel column are driven in different frame periods. The first data lines are alternately electrically connected to the video signal output channels CH1 to CHn of the data driver 4. In other words, in response to any one of the first and second selection signals SC and CS, the data switching unit 10 may include a 3i- 2nd pixel provided in the red (R) pixel column in an image display period of an odd-numbered frame period. The data lines may be electrically connected to the corresponding image signal output channels CH1 to CHn. In the video display period of the even-numbered frame period, the video signal corresponding to the 3i-1 < th > data lines included in the green (G) pixel column in response to any one of the first and second selection signals SC and CS. It may be electrically connected to the output channels CH1 to CHn. Therefore, the red pixel columns display the red image in the same frame period, but display the image in a 1/2 horizontal period or frame period different from the green pixel columns, and the green pixel columns also display the green image in the same frame period, The image is displayed in a frame period different from the columns. On the other hand, the blue pixel columns may be driven in the same frame period as the red or green pixel columns alternately with each other. In the case of the blue color, the sensitivity of the human eye is low, so even if the contrast is slightly distorted, the effect on the image quality is small.

FIG. 2 is a detailed circuit diagram illustrating the data switching unit illustrated in FIG. 1.

The data switching unit 10 shown in FIG. 2 is provided between the 6i-4th, 6i-3rd, and 6i-1th data lines and the corresponding 3i-2nd, 3i-1st and 3ith video signal output channels. A 6i-4th, 6i-3rd, 6i-1th data line corresponding to the 3i-2nd, 3i-1st 3ith video lines corresponding to the 6i-4th, 6i-3rd, and 6i-1th data lines according to the first selection signal SC; A plurality of first switching elements T1 electrically connected to each other, and 6i-5th, 6i-2nd, and 6ith data lines, and corresponding 3i-2th, 3i-1th 3ith image signals, respectively; And a 6i-5th, 6i-2nd, and 6ith data lines corresponding to the 3i-2nd, 3i-1st and 3ith video signals according to the second selection signal CS. A plurality of second switching elements T2 electrically connected to each other are provided.

The plurality of first switching elements T1 and the plurality of second switching elements T2 may be NMOS transistors or PMOS transistors, but in the exemplary embodiment of the present invention, the plurality of first and second switching elements T1 and T2 may be used. Only the case where these are formed of PMOS transistors will be described. In this case, each of the plurality of first switching elements T1 is turned on only during the period in which the first selection signal SC is supplied at the low logic level, and thus the 6i-4th, 6i-3rd, and 6i-1th The data lines are electrically connected to the 3i-2nd and 3i-1th 3ith video signal output channels corresponding thereto. Each of the plurality of second switching elements T2 is turned on only during a period in which the second selection signal CS is supplied at a low logic level, thereby providing data lines 6i-5th, 6i-2nd, and 6ith. The video signal output channels of 3i-2nd and 3i-1rd 3ith are respectively electrically connected thereto.

FIG. 3 is a diagram for describing a data switching unit and a driving method of each data line illustrated in FIGS. 1 and 2.

As described above, when the first and second switching elements T1 and T2 of the data switching unit 10 are formed of PMOS transistors, the timing controller 8 displays an image of an odd frame during every frame period. The first selection signal SC is generated at a high logic level during the period, and the second selection signal CS is generated at a low logic level. The first selection signal is displayed during the image display period of an even frame during each frame period. SC generates a low logic level while second selection signal CS generates a high logic level. In the blank period in which the image is not displayed during each frame period, the same high logic level may be generated.

In this case, each of the plurality of second switching elements T2 is turned on during an image display period of an even frame in which the second selection signal CS is supplied at a low logic level, thereby being 6i-5th and 6i-. The second and sixth data lines are electrically connected to the corresponding 3i-2nd and 3i-1th 3ith video signal output channels, respectively. Each of the plurality of first switching elements T1 is turned on during an image display period of an odd frame in which the first selection signal SC is supplied at a low logic level, thereby being 6i-4th and 6i-3. The 6 th-1 th data line is electrically connected to the corresponding 3 i-2 th and 3 i-1 th 3 i th video signal output channels, respectively.

As described above, the data switching unit 10 controls the red (R) pixel column in response to the first and second selection signals SC and CS generated to have phase differences at different logic levels in odd and even period units. Coupled according to the first and second selection signals SC and CS by driving the 3i-2 th data lines provided and the 3i-1 th data lines provided in the green (G) pixel column in different frame periods. The ring phenomenon can be prevented. That is, the 3i-1th data lines included in the green (G) pixel column supply the green image signal to each pixel column only in response to the first selection signal SC, and 3i provided in the red (R) pixel column. The second data lines supply a green image signal to each pixel column only in response to the second selection signal CS to generate a coupling phenomenon according to different first and second selection signals SC and CS. You can prevent it.

Accordingly, the driving apparatus and the driving method thereof of the image display apparatus according to an exemplary embodiment of the present invention selectively drive the data lines of the image display panel, thereby simplifying the driver circuit of the image display panel 2 and providing the respective data lines DL1 to. The voltage levels of the video signals supplied to the DLm are not distorted. Thus, it is possible to reduce the manufacturing cost of the video display device, and to prevent the deterioration of the display quality of the video display panel, thereby improving the reliability thereof.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (10)

A display panel having a plurality of pixels to display an image;
A data driver to generate an image signal such that data lines of the display panel are alternately driven;
Pixel columns of two different colors among the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel are driven in different 1/2 horizontal periods of every horizontal period or in different frame periods. A data switching unit configured to alternately select the data lines so as to be driven at each other, and to electrically connect the data lines to an image signal output channel of the data driver; And
And a timing controller for aligning and supplying image data input from the outside to the data driver and controlling the data switching unit and the data driver. The method of claim 1,
The timing controller is
Supplying the image data to the data driver by arranging the pixel columns of two different colors among the red, green, and blue pixel columns to display an image in different frame periods or different half horizontal periods,
The first and second selection signals are generated and supplied to the data switching unit so as to have phase differences of different logic levels alternately in units of image display periods in every frame period or every horizontal line period. Device. The method of claim 2,
The data switching unit
A plurality of multiplexer circuits composed of a plurality of switching elements, in accordance with the first and second selection signal, the 3i-second data lines (where i is a natural number except 0) and a green pixel provided in a red pixel column The data driver alternately drives the 3i-2 or 3i-1 th data lines such that the 3i-1 th data lines provided in a column are driven in different 1/2 horizontal periods or different frame periods of every horizontal period. And a video signal output channel of the video display device. The method of claim 3, wherein
The data switching unit
6i-4th, 6i-3rd, and 6i-1th data lines and corresponding 3i-2nd, 3i-1st and 3ith video signal output channels, respectively, according to the first selection signal. A plurality of first switching elements electrically connecting the 6i-4th, 6i-3rd, and 6i-1th data lines to the corresponding 3i-2nd, 3i-1rd and 3ith video signal output channels, respectively; And
6i-5th, 6i-2nd, and 6ith data lines and corresponding 3i-2nd, 3i-1st and 3ith video signal output channels respectively provided between the 6i- according to the second selection signal. And a plurality of second switching elements for electrically connecting the fifth, 6i-2nd, and 6ith data lines to the corresponding 3i-2nd, 3i-1st and 3ith video signal output channels, respectively. A drive of a video display device. The method of claim 4, wherein
The timing controller is
In the image display period of odd frames during 1/2 horizontal period or every frame period during every horizontal period, only the second selection signal is generated at a low logic level, and even frames during another 1/2 horizontal period or every frame period during every horizontal period By generating only the first selection signal at a low logic level in the video display period of
The plurality of first switching elements are turned on during a half horizontal period or an image display period of an odd frame during every horizontal period to correspond to the 6i-4th, 6i-3rd, and 6i-1th data lines. Electrical connection with the 3i-2nd, 3i-1th 3ith video signal output channels, respectively,
The plurality of second switching elements are turned on during a half horizontal period of every horizontal period or an image display period of even frames, and the 6i-5th, 6i-2nd, and 6ith data lines corresponding thereto are 3i-2. And an electrical connection between the third and third video signal output channels of the 3i-1 < th > Generating an image signal such that data lines of a display panel including a plurality of pixels to display an image by using a data driver are selectively alternately driven;
Pixel columns of two different colors among the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel by using the data switching unit have different half horizontal periods or different frames during each horizontal period. Alternately selecting the data lines to be driven in a period and electrically connecting the data lines to an image signal output channel of the data driver; And
And arranging and supplying image data input from an external device to the data driver, and controlling the data switching unit and the data driver. The method according to claim 6,
Controlling the data switching unit and the data driver
The image data may be arranged such that the pixel columns of two different colors among the red, green, and blue pixel columns display the image in different half horizontal periods or different frame periods of every horizontal period. Supplying, and
Generating first and second selection signals so as to have phase differences of different logic levels alternately in units of an image display period during every 1/2 horizontal period or every frame period in every horizontal period, and supplying the first and second selection signals to the data switching unit. A driving method of a video display device comprising a. The method of claim 7, wherein
Alternately selecting the data lines and electrically connecting the data lines to an image signal output channel of the data driver
By using the data switching unit having a plurality of multiplexer circuits composed of a plurality of switching elements, the 3i-second data lines provided in the red pixel columns in accordance with the first and second selection signals (where i denotes 0). 3i-1 < th > data lines provided in the green pixel column and the 3i-1 < th > or 3i-1 < th > Alternately electrically connecting them to an image signal output channel of the data driver. The method of claim 8,
The data switching unit
6i-4th, 6i-3rd, and 6i-1th data lines and corresponding 3i-2nd, 3i-1st and 3ith video signal output channels, respectively, according to the first selection signal. A plurality of first switching elements electrically connecting the 6i-4th, 6i-3rd, and 6i-1th data lines to the corresponding 3i-2nd, 3i-1rd and 3ith video signal output channels, respectively; And
6i-5th, 6i-2nd, and 6ith data lines and corresponding 3i-2nd, 3i-1st and 3ith video signal output channels respectively provided between the 6i- according to the second selection signal. And a plurality of second switching elements for electrically connecting the fifth, 6i-2nd, and 6ith data lines to the corresponding 3i-2nd, 3i-1st and 3ith video signal output channels, respectively. A method of driving a video display device. The method of claim 9,
Alternately selecting the data lines and electrically connecting the data lines to an image signal output channel of the data driver
In the image display period of odd frames during 1/2 horizontal period or every frame period during every horizontal period, only the second selection signal is generated at a low logic level, and even frames during another 1/2 horizontal period or every frame period during every horizontal period By generating only the first selection signal at a low logic level in the video display period of
The plurality of first switching elements are turned on during the image display period of the odd frame so that 6i-4th, 6i-3rd, and 6i-1th data lines correspond to 3i-2nd and 3i-1th. Electrically connected to the 3i th video signal output channel,
The plurality of second switching elements are turned on during the image display period of an even frame to display 6i-5th, 6i-2nd, and 6ith data lines corresponding to 3i-2nd, 3i-1th 3ith images. And a signal output channel to be electrically connected to each other.

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