KR101878176B1 - Driving apparatus for image display device and method for driving the same - Google Patents

Abstract

The present invention relates to a driving apparatus for a video display device and a driving method thereof, which can improve the reliability of the video display panel by selectively driving data lines of the video display panel, thereby simplifying a driver circuit of the video display panel, A display panel including a plurality of pixels to display an image; A data driver for generating a video signal such that the data lines of the display panel are selectively alternately driven; The pixel rows of two different colors among the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel are driven in different 1/2 horizontal periods in each horizontal period, A data switching unit for alternately selecting the data lines and electrically connecting the data lines to a video signal output channel of the data driver; And a timing controller for aligning image data input from the outside and supplying the data to the data driver, and for controlling the data switching unit and the data driver.

Description

TECHNICAL FIELD [0001] The present invention relates to a driving apparatus for a video display device and a driving method thereof. BACKGROUND OF THE INVENTION [0002]

The present invention relates to a driving apparatus for a video display device and a driving method thereof, which can improve the reliability of the video display panel by selectively driving data lines of the video display panel, thereby simplifying a driver circuit of the video display panel, .

BACKGROUND ART [0002] Lightweight thin flat panel displays (LCDs) are mainly used as image display devices used in monitors for personal computers, portable tablet terminals, notebooks, and various information devices. As such flat panel display devices, a liquid crystal display, a light emitting display, a plasma display panel, a field emission display, and the like are emerging.

The flat panel display devices include a display panel in which a plurality of pixel cells are arranged and a driving circuit for driving the display panel so that the image is displayed on the display panel by the driving circuit.

In recent years, a method of reducing the manufacturing cost of a video display device by simplifying the number of data driver circuits, for example, data accumulation circuits (ICs) and the number of channels thereof among driving circuits for driving the display panel has been introduced. This is a method of simplifying the number of data integration circuits or the number of channels by selecting the video signal supply lines of the display panel, that is, the data lines, to be alternately driven.

For this purpose, each data line is divided into odd-numbered and even-numbered data line units and alternately driven by odd-numbered and even-numbered data line units. However, in the data line selection driving method of the related art, a coupling phenomenon occurs between adjacent data lines, resulting in distortion of a video signal. In other words, since the circuit for selective driving in odd-numbered and even-numbered data lines is alternately arranged in units of odd-numbered and even-numbered lines, signals for selecting odd-numbered and even-numbered data lines and a coupling phenomenon . In this case, a dimming phenomenon occurs between the odd-numbered data lines and the even-numbered data lines which are adjacent to each other, and the voltage level of the video signal supplied to each data line is distorted.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and it is an object of the present invention to provide a video display device capable of improving the reliability by preventing the degradation of the display quality while simplifying the driver circuit of the video display panel by selectively driving the data lines of the video display panel. And a driving method thereof.

According to an aspect of the present invention, there is provided an apparatus for driving an image display apparatus including a display panel including a plurality of pixels to display an image; A data driver for generating a video signal such that the data lines of the display panel are selectively alternately driven; The pixel rows of two different colors among the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel are driven in different 1/2 horizontal periods in each horizontal period, A data switching unit for alternately selecting the data lines and electrically connecting the data lines to a video signal output channel of the data driver; And a timing controller for aligning image data input from the outside and supplying the data to the data driver, and for controlling the data switching unit and the data driver.

Wherein the timing controller arranges the image data so that pixel columns of two different colors among the red, green, and blue pixel columns display images in different frame periods or different 1/2 horizontal periods, And generates the first and second selection signals so as to have a phase difference of a different logic level alternately in units of video display periods during each frame period or each horizontal line period, and supplies the generated first and second selection signals to the data switching unit.

Wherein the data switching unit includes a plurality of multiplexer circuits composed of a plurality of switching elements, the 3i-2th data line (i is a natural number excluding 0) provided in the red pixel column according to the first and second selection signals, Th or (3i-1) th data lines included in the green pixel column are driven in different 1/2 horizontal periods or different frame periods in each horizontal period, To the video signal output channel of the data driver.

The data switching unit is provided between the 6i-4th, 6i-3th, and 6i-1th data lines and the corresponding 3i-2th and 3i-1th 3i video signal output channels, Th video signal output channels corresponding to the 6i-4th, 6i-3th, and 6i-1th data lines according to a signal of the (3i-2) 1 switching elements and the video signal output channels of the 6i-5th, 6i-2th, and 6i-th data lines and the corresponding video signal output channels of the 3i-2 and 3i- Th video signal output channel corresponding to the 6i-5th, 6i-2nd, and 6i-th data lines, respectively, And a control unit.

The timing controller generates only a second selection signal at a low logic level during a half horizontal period or every frame period of an odd frame during every horizontal period, Numbered frame during a video display period of the even-numbered frame, the first switching devices are turned on during a 1/2 horizontal period or an odd-numbered frame during a horizontal period, And the 6i-4th, 6i-3th, and 6i-1th data lines are electrically connected to the corresponding 3i-2th and 3i-1th video signal output channels, respectively, 2 switching elements are turned on during a half horizontal period or an even-numbered frame display period of every horizontal period to turn the 6i-5th, 6i-2nd, and 6i-th data lines to the 3i-2 and 3i -number 1 3i is characterized in that the second video signal to output channel and electrically connected to each.

According to another aspect of the present invention, there is provided a method of driving an image display apparatus including a plurality of pixels using a data driver, Generating a video signal so as to generate a video signal; The pixel rows of two different colors of the red, green, and blue pixel columns arranged in the direction of the data lines on the display panel using the data switching unit are divided into different 1/2 horizontal periods or different frames Alternately selecting the data lines so as to be driven in a period of the data driver and electrically connecting the data lines to the video signal output channel of the data driver; And arranging image data input from the outside and supplying the data to the data driver, and controlling the data switching unit and the data driver.

Wherein the controlling of the data switching unit and the data driver is performed such that the pixel data of the red, green, and blue pixel columns are different in 1/2 horizontal periods And supplying the data to the data driver in such a manner that an image is displayed in a frame period, and supplying the data driver with the phase difference of a different logic level alternately in every 1/2 horizontal period or every frame period And generating the first and second selection signals and supplying the first and second selection signals to the data switching unit.

Wherein the step of alternately selecting the data lines and electrically connecting the data lines to the video signal output channel of the data driver includes using the data switching unit having a plurality of multiplexer circuits composed of a plurality of switching elements, 2 > data lines (where i is a natural number excluding 0) and the (3i-1) -th data lines provided in the green pixel column provided in the red pixel column are arranged in different 1 / And electrically connecting the (3i-2) th or (3i-1) th data lines with the video signal output channel of the data driver alternately so as to be driven in the first horizontal period or the second horizontal period or in the different frame period.

The data switching unit is provided between the 6i-4th, 6i-3, and 6i-1th data lines and the corresponding 3i-2th and 3i-1th 3i video signal output channels, Th video signal output channel corresponding to the 6i-4th, 6i-3th, and 6i-1th data lines corresponding to the 6i-4th, 6i- Th video signal output channel corresponding to the 6i-5th, 6i-2nd, and 6i-th data lines and the corresponding 3i-2th and 3i- Th video signal output channel corresponding to the 6i-5th, 6i-2th, and 6i-th data lines according to a signal, And a device is provided.

Wherein the step of alternately selecting the data lines and electrically connecting the data lines to the video signal output channel of the data driver includes a step of supplying a second selection signal only during a half horizontal period of each horizontal period or a video display period of odd frames of each frame period And generating the first selection signal at a low logic level during the other half horizontal period or every frame period of the even-numbered frame during the display period of the even-numbered frame, the plurality of first switching elements And the 6i-4th, 6i-3th, and 6i-1th data lines are turned on during the video display period of the odd frame, And the plurality of second switching elements are turned on during the video display period of the even-numbered frames, so that the 6i-5th, 6i-2, and 6i-th data Which it is characterized in that to the 3i-2 th, 3i-1-th 3i-th video signal output channel and electrically connected to each corresponding thereto.

The driving apparatus of the image display apparatus and the driving method thereof according to the present invention having various technical features as described above can simplify the driver circuit of the image display panel by driving the data lines of the image display panel selectively, So that the voltage level of the video signal supplied to the video signal is not distorted. Thus, it is possible to reduce the manufacturing cost of the video display device, and to prevent the deterioration of the display quality of the video display panel, thereby improving the reliability thereof.

1 is a block diagram schematically showing a driving apparatus of a liquid crystal display according to an embodiment of the present invention;
Fig. 2 is a configuration circuit diagram specifically showing the data switching unit shown in Fig. 1. Fig.
FIG. 3 is a view for explaining a data switching unit and a driving method of each data line shown in FIGS. 1 and 2. FIG.

Hereinafter, a driving apparatus and a driving method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. Here, the video display device of the present invention may be a liquid crystal display device, a field emission display device, a plasma display panel, and an organic light emitting diode display device. Hereinafter, the present invention is applied to a liquid crystal display device do.

1 is a block diagram schematically showing a driving apparatus for a liquid crystal display according to an embodiment of the present invention.

The driving apparatus of the liquid crystal display shown in FIG. 1 includes a liquid crystal panel 2 having a plurality of pixels and displaying an image; A data driver 4 for generating an image signal so that the data lines DL1 to DLm of the liquid crystal panel 2 are selectively alternately driven; A gate driver 6 for driving the plurality of gate lines GL1 to GLn; The pixel columns of the red (R), green (G), and blue (B), which are provided in the data line formation direction, in the liquid crystal panel 2, A data switching unit 10 for alternately selecting data lines to be driven in a horizontal period and electrically connecting the data lines to the video signal output channels CH1 to CHn of the data driver 4; And a timing controller 8 for supplying image data RGB input from the outside to the data driver 4 and for controlling the data switching unit 10 and the data and gate drivers 4 and 6.

The liquid crystal panel 2 includes a thin film transistor (TFT) formed in each pixel region defined by a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm, and a liquid crystal capacitor (Clc). The liquid crystal capacitor Clc is composed of a pixel electrode connected to the TFT, and a common electrode facing the pixel electrode and the liquid crystal. The TFT supplies data signals from the data lines DL1 to DLm to the pixel electrodes in response to a scan pulse from the gate lines GL1 to GLn, that is, a gate-on signal. The liquid crystal capacitor Clc charges the difference voltage between the data signal supplied to the pixel electrode and the common voltage supplied to the common electrode, and adjusts the light transmittance by varying the arrangement of the liquid crystal molecules according to the difference voltage. The storage capacitor Cst is connected in parallel to the liquid crystal capacitor Clc so that the voltage charged in the liquid crystal capacitor Clc is maintained until the next data signal is supplied. The storage capacitor Cst is formed by overlapping the pixel electrode with the previous gate line and the insulating film interposed therebetween. Alternatively, the storage capacitor Cst may be formed by overlapping the pixel electrode with the storage line and the insulating film interposed therebetween.

The data driver 4 receives a data control signal DCS from the timing controller 8, for example, a source start signal SSP, a source shift clock SSC, a source output enable A video signal is generated by 1/2 horizontal lines every 1/2 horizontal period so that data lines DL1 to DLm adjacent to each other are alternately driven in at least one horizontal period by using a SOE (Source Output Enable) And generates and outputs a video signal for one horizontal line so that the data lines DL1 to DLm adjacent to each other in the other frame period are alternately driven. In other words, the data driver 4 latches the digital image data input by 1/2 horizontal line or 1 horizontal line according to the SSC, and then converts the latched image data Data into an analog image signal. In response to the SOE signal, a video signal of one horizontal line or one-half horizontal line is supplied to each of the output channels CH1 to CHn for every one horizontal period in which scan pulses are supplied to the gate lines GL1 to GLn . At this time, the data driver 4 selects a gamma voltage having a predetermined level according to the gray level value of the digital image data Data, and supplies the selected gamma voltage to each of the output channels CH1 to CHn as a video signal.

The gate driver 6 receives a gate control signal GCS from the timing controller 8, for example, a gate start pulse (GSP), a gate shift clock (GSC) A gate pulse signal or a gate output enable (GOE) signal to the gate lines GL1 to GLn.

The timing controller 8 supplies image data RGB from the outside to pixel columns of two different colors among red, green and blue pixel columns provided in the liquid crystal panel 2 And supplies them to the data driver 4 by arranging them to display images in different frame periods. The gate control signal GCS and the data control signal DCS are generated using the synchronization signals DCLK, DE, Hsync and Vsync from the outside to control the data driver 4 and the gate driver 6 respectively .

The timing controller 8 also allows the data switching unit 10 to alternately select the data lines DL1 to DLn to electrically connect the video signal output channels CH1 to CHn of the data driver 4 And generates the first and second selection signals SC and CS so as to control the data switching unit 10. Here, the timing controller 8 generates the first and second selection signals SC and CS so that they have different phases alternately in units of 1/2 horizontal periods or every frame period, and supplies them to the data switching unit 10). For example, the first selection signal SC is generated at a high logic level while the second selection signal CS is generated at a low logic level during a 1/2 horizontal period or during an image display period of an odd frame in each frame period . The first selection signal SC may be generated to be a low logic level while the second selection signal CS may be generated to be a high logic level in another half horizontal period or every frame period of an even-numbered frame . On the other hand, during a blank period in which images are not displayed during each frame period, they can be generated at the same logic level.

The data switching unit 10 includes a plurality of multiplexer circuits constituted by a plurality of switching elements and is provided in the red (R) pixel column in accordance with the first and second selection signals SC and CS inputted from the timing controller 8 Th or (3i-1) th data lines included in the green (G) pixel column are driven in different frame periods, 1) th data lines to the video signal output channels CH1 to CHn of the data driver 4 alternately. In other words, in response to any one of the first and second selection signals SC and CS, the data switching unit 10 switches the (3i-2) th May be electrically connected to corresponding video signal output channels CH1 to CHn. During the video display period of the even-numbered frame period, in response to any one of the first and second selection signals SC and CS, the (3i-1) th data lines included in the green (G) And can be electrically connected to the output channels CH1 to CHn. Accordingly, the red pixel columns display a red image in the same frame period, but display images in a 1/2 horizontal period or frame period different from the green pixel columns, and the green pixel columns also display a green image in the same frame period, The image is displayed in a different frame period than the columns. On the other hand, the blue pixel columns can be alternately driven in the same frame period as the red or green pixel columns. In the case of blue, the sensitivity to human eyes is low, so even if the intensity is slightly distorted, the effect on image quality is small.

2 is a configuration circuit diagram showing the data switching unit shown in FIG.

The data switching unit 10 shown in FIG. 2 is provided between the 6i-4th, 6i-3, and 6i-1th data lines and the corresponding 3i-2th and 3i- And the 6i-4th, 6i-3th, and 6i-1th data lines are connected to the 3i-2th and 3i-1th 3i-th video signal output channels corresponding to the first selection signal SC, Th video signal output from the (6i-5) th, (6i-2) th, and 6i th data lines and the corresponding 3i-2th and The 6i-5th, 6i-2, and 6i-th data lines are provided respectively between the 3i-2 and 3i-1 th 3i-th video signal output channels corresponding to the second selection signal CS, And a plurality of second switching elements T2 electrically connected to each other.

The plurality of first switching elements T1 and the plurality of second switching elements T2 may be NMOS transistors or PMOS transistors. However, in the embodiment of the present invention, a plurality of first and second switching elements T1 and T2, Only PMOS transistors are formed. In this case, each of the plurality of first switching devices Tl is turned on only during a period in which the first select signal SC is supplied at a low logic level, so that the 6i-4th, 6i-3th, And the data lines are electrically connected to the corresponding video signal output channels of the (3i-2) th and (3i-1) th video signal output channels, respectively. Each of the plurality of second switching elements T2 is turned on only during a period in which the second selection signal CS is supplied to the low logic level to turn on the 6i-5th, 6i-2th, and 6ith data lines And the video signal output channels of the (3i-2) th and (3i-1) th video signal corresponding thereto.

FIG. 3 is a view for explaining a data switching unit shown in FIG. 1 and FIG. 2 and a driving method of each data line.

As described above, when the first and second switching elements T1 and T2 of the data switching unit 10 are formed of PMOS transistors, the timing controller 8 outputs a video display of an odd frame in every frame period The first selection signal SC is generated at the high logic level and the second selection signal CS is generated at the low logic level during the video display period of the even frame, (SC) is generated at a low logic level while the second selection signal (CS) is generated at a high logic level. In a blank period in which an image is not displayed during each frame period, it can be generated at the same high logical level.

In this case, each of the plurality of second switching elements T2 is turned on during the video display period of the even frame in which the second selection signal CS is supplied at the low logic level, Second, and 6i-th data lines are electrically connected to the corresponding video signal output channels of the (3i-2) th and (3i-1) th video signal output channels, respectively. Each of the plurality of first switching elements Tl is turned on during the video display period of the odd frame in which the first selection signal SC is supplied at the low logic level to form 6i-4th and 6i-3 Th and (6i-1) th data lines are electrically connected to the corresponding video signal output channels of the (3i-2) th and (3i-1) th video signal output channels.

As described above, the data switching unit 10 outputs the data signals to the red (R) pixel columns in response to the first and second selection signals SC and CS generated so as to have a phase difference to the different logic levels on the odd- (3i-2) th data lines and the (3i-1) th data lines included in the green (G) pixel string are driven in different frame periods, Ring phenomenon can be prevented. That is, the 3i-1th data lines provided in the green (G) pixel column supply green video signals only to the respective pixel columns only in response to the first selection signal SC, and 3i The second data lines supply a green image signal to each pixel column only in response to the second selection signal CS, and the coupling phenomenon depending on the first and second selection signals SC and CS .

Accordingly, the driving apparatus of the image display apparatus and the driving method thereof according to the embodiment of the present invention selectively drives the data lines of the image display panel, thereby simplifying the driver circuit of the image display panel 2, So that the voltage level of the video signal supplied to the pixels DLm is not distorted. Thus, it is possible to reduce the manufacturing cost of the video display device, and to prevent the deterioration of the display quality of the video display panel, thereby improving the reliability thereof.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (10)

A display panel having a plurality of pixels to display an image;
A data driver for generating a video signal such that the data lines of the display panel are selectively alternately driven;
Alternately selecting the data lines so that pixel columns of two different colors, red, green, and blue, arranged in the direction of the data lines in the display panel, are driven in different frame periods, respectively, A data switching unit electrically connecting the video signal output channel to the video signal output channel; And
And supplies the data to the data driver. The data driver generates first and second selection signals so that the first and second selection signals have phase differences of different logic levels alternately in units of video display periods in each frame period. And a timing controller for controlling the data switching unit and the data driver. delete The method according to claim 1,
The data switching unit
And a plurality of multiplexer circuits constituted by a plurality of switching elements, wherein the (3i-2) -th data line (i is a natural number excluding 0) provided in the red pixel column according to the first and second selection signals, The 3i-2th or (3i-1) th data lines are alternately electrically connected to the video signal output channel of the data driver so that the (3i-1) th data lines provided in the column are driven in different frame periods And a driving circuit for driving the video display device. The method of claim 3,
The data switching unit
Th video signal output channels of the 6i-4th, 6i-3th and 6i-1th data lines and the corresponding 3i-2th and 3i-1th 3i video signal output channels, respectively, A plurality of first switching elements for electrically connecting the 6i-4th, 6i-3th, and 6i-1th data lines to the corresponding 3i-2th, 3i-1th, And
Th video signal output channels corresponding to the 6i-5th, 6i-2nd and 6i-th data lines and corresponding 3i-2 and 3i-1 th 3i-th video signal output channels, And a plurality of second switching elements for electrically connecting the 5th, 6i-2, and 6i-th data lines to the corresponding 3i-2th and 3i-1th video signal output channels, respectively And a driving circuit for driving the video display device. 5. The method of claim 4,
The timing controller
Only the second selection signal is generated as a low logic level during the video display period of the odd frame in each frame period and only the first selection signal is generated as the low logic level during the video display period of the even frame during each frame period,
The first switching elements are turned on during the video display period of the odd frame so that the 6i-4th, 6i-3th and 6i-1th data lines are connected to the 3i-2th and 3i- Th video signal output channel, respectively,
The plurality of second switching elements are turned on during the video display period of the even-numbered frames, and the 6i-5th, 6i-2th, and 6ith data lines are connected to the 3i-2th, And the signal output channel are electrically connected to each other. Generating image signals by arranging image data inputted from outside such that data lines of a display panel displaying a plurality of pixels are alternately driven by using a data driver;
Arranging the pixel columns of two different colors among the red, green, and blue pixel columns of the display panel to display the image signal in different frame periods, and supplying the aligned image signals to the data driver; And
The data switching unit alternately turns on the display panel so that the pixel columns of the red, green, and blue arranged in the direction of the data lines on the display panel are driven in different frame periods, And generating the first and second selection signals so as to have a phase difference of a different logic level to alternately select the data lines and electrically connect the data lines to the video signal output channel of the data driver. . delete The method according to claim 6,
The step of alternately selecting the data lines and electrically connecting the data lines to the video signal output channel of the data driver
The data switching unit including a plurality of multiplexer circuits constituted by a plurality of switching elements is used, and the 3i-2th data line provided in the red pixel column according to the first and second selection signals, Th or (3i-1) th data lines are alternately connected to the video signal output channels of the data driver so that the (3i-1) -th data lines included in the green pixel column are driven in different frame periods And electrically connecting the first electrode and the second electrode to each other. 9. The method of claim 8,
The data switching unit
Th video signal output channels of the 6i-4th, 6i-3th and 6i-1th data lines and the corresponding 3i-2th and 3i-1th 3i video signal output channels, respectively, A plurality of first switching elements for electrically connecting the 6i-4th, 6i-3th, and 6i-1th data lines to the corresponding 3i-2th, 3i-1th, And
Th video signal output channels corresponding to the 6i-5th, 6i-2nd and 6i-th data lines and corresponding 3i-2 and 3i-1 th 3i-th video signal output channels, And a plurality of second switching elements electrically connecting the 5th, 6i-2, and 6i-th data lines to the corresponding 3i-2th and 3i-1th video signal output channels, respectively And a driving method of the video display device. 10. The method of claim 9,
The step of alternately selecting the data lines and electrically connecting the data lines to the video signal output channel of the data driver
Only the second selection signal is generated as a low logic level during the video display period of the odd frame in each frame period and only the first selection signal is generated as the low logic level during the video display period of the even frame during each frame period,
The plurality of first switching elements are turned on during the video display period of the odd-numbered frames, and the 6i-4th, 6i-3th, and 6i-1th data lines are connected to the 3i-2 and 3i-1 Th video signal output channel, respectively,
The plurality of second switching elements are turned on during the video display period of the even-numbered frames, and the 6i-5th, 6i-2th, and 6ith data lines are connected to the 3i-2th, And the signal output channel are electrically connected to each other.

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