KR20130037265A - Method for preparing group iii-nitride substrate removed stacking fault - Google Patents

Abstract

PURPOSE: A method for manufacturing a III group nitride substrate without a stacking fault is provided to improve the internal quantum efficiency of a light emitting diode by removing the stacking fault on a III group nitride layer using a photoelectrochemical etching method or a lateral growth method. CONSTITUTION: A first III group nitride layer is formed on a substrate(S101). A second III group nitride layer with a plurality of cavities is formed on the first III group nitride layer(S102). A semiconductor is immersed in KOH electrolytes(S103). Light of specific energy is irradiated(S104). A stacking fault part is etched from the surface of the second III group nitride layer by a photoelectrochemical reaction(S105). [Reference numerals] (AA) Start; (BB) End; (S101) Step of forming a first III group nitride layer(120) on a substrate(110); (S102) Step of forming a second III group nitride layer(140) with a plurality of cavities on the first III group nitride layer; (S103) Step of immersing an element formed in the S102 in KOH electrolytes; (S104) Step of irradiating light of specific energy; (S105) Step of etching a stacking fault part by neutralizing the KOH and an oxide film generated on the substrate surface formed in the S102;

Description

 Method for Preparing Group III Nitride Substrate Removed Stacking Defects {Method For Preparing Group III-Nitride Substrate Removed Stacking fault}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for fabricating a group III nitride substrate from which stacking faults have been removed, and more particularly, to a layer existing on a group III nitride layer using a photoelectrochemical etching method or a lateral growth method. A method of manufacturing a nonpolar or semi-polar group III nitride substrate that eliminates stacking faults.

The light emitting diode is applied to a backlight light source, a display light source, a general light source and a full color display. As a material of such an LED, group III-V nitride semiconductors such as gallium nitride (GaN), aluminum nitride (AlN), and indium nitride (InN) are known, and the material has a large energy band gap. Since it has a characteristic suitable for optoelectronic devices, such as can obtain light in the near-wavelength region according to the composition of the nitride, the light emitting device using the same has been applied in various fields such as flat panel display device, optical communication.

A semiconductor based on GaN group III nitride is typically fabricated on a (0001) plane using a c-plane substrate, in which case spontaneous polarization is formed with a growth direction of (0001). In particular, the LED having the quantum well structure of the representative InGaN / GaN has an internal strain caused by lattice mismatch in the quantum well structure when the structure is grown on the (0001) plane, and thus the quantum confinement stark effect is caused by the piezoelectric field. There was a limit to increasing quantum efficiency.

In order to solve this problem, a method of growing a non-polar or semi-polar group III nitride has been proposed. Also in Korean Patent Publication No. 10-2011-0013669 (name of the invention: semipolar (11-22) or (10-13) gallium nitride growth by hydride vapor phase epitaxy, published April 27, 2011) A polar group III nitride growth method has been disclosed. However, the nonpolar or semipolar plane obtained by this method contains the same number of group III atoms and nitrogen atoms and thus exhibits charge neutrality. As a result, the entire crystal is not polarized in the growth direction. However, nonpolar Group III nitride crystals growing on heterogeneous substrates exhibit high defect density, resulting in a problem of reducing quantum efficiency.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it generates light by eliminating stacking faults generated on the surface of a group III nitride substrate using a nonpolar or semipolar sapphire substrate through a photoelectrochemical reaction (PEC). The present invention provides a method for manufacturing a III-nitride substrate in which stacking faults are improved to improve internal quantum efficiency of a diode.

In addition, the present invention provides a method of manufacturing a group III nitride substrate in which a stacking fault is removed from the semipolar sapphire substrate by using an ELOG process to more efficiently remove the stacking fault, thereby improving the internal quantum efficiency of the light emitting diode.

According to an aspect of the present invention, there is provided a method of forming a group III-nitride layer on a substrate that provides a growth surface of a nonpolar or semipolar epitaxy layer; Placing the device formed through the step in an electrolyte and irradiating a predetermined light energy; And etching the stacked defects present on the surface of the group 1 III nitride layer through a photoelectrochemical reaction. It includes.

And forming a group III-nitride layer on the substrate providing the growth surface of the nonpolar or semipolar epitaxy layer; Forming a Group IIIIII nitride layer having a plurality of cavities therein on the Group IIIIII nitride layer formed in the step; And forming a Group III-III nitride layer having a plurality of cavities therein on the Group III-III nitride layer formed in the step. It includes.

Also, forming a group III-nitride layer on a substrate that provides a growth surface of a nonpolar or semipolar epitaxy layer; Forming a Group IIIIII nitride layer having a plurality of cavities therein on the Group IIIIII nitride layer formed in the step; Placing the device formed in the step in an electrolyte and irradiating a predetermined light energy; And etching the stacked defect portion present on the surface of the group II nitride layer through a photoelectrochemical reaction. It includes.

According to the present invention as described above, the light emitting diode by removing the stacking defects generated during the fabrication of the group III nitride substrate using a non-polar or semi-polar sapphire substrate through the etching method and the side growth (ELOG) method using a photoelectrochemical reaction (PEC) Can increase the internal quantum efficiency.

1 is a front view of a first group III nitride layer formed on a substrate according to an embodiment of the present invention.
2A is a schematic diagram of a nonpolar plane in a group III nitride crystal structure according to an embodiment of the present invention.
2B is a schematic of a semipolar plane in a group III nitride crystal structure in accordance with an embodiment of the present invention.
Figure 3 is a schematic diagram of the stacking defects contained in the group III-nitride layer according to an embodiment of the present invention.
4A is an energy level diagram of n-type according to one embodiment of the present invention;
4b is an energy level diagram of p-type according to one embodiment of the present invention;
4c is a block diagram of a photoelectrochemical etching method according to an embodiment of the present invention.
Figure 5 is a front view of the second group III nitride layer formed in accordance with an embodiment of the present invention.
Figure 6a is a schematic diagram of the stacking defects included in the Group II III nitride layer in accordance with an embodiment of the present invention.
Figure 6b is a schematic diagram of the stacking defects included in the Group II III nitride layer after the photoelectrochemical etching method according to an embodiment of the present invention.
Figure 7a is a front view of the third group III nitride layer formed in accordance with an embodiment of the present invention.
7B is a schematic view of the lamination defects included in the III-III nitride layer according to the embodiment of the present invention.
8 is a flowchart illustrating a method of manufacturing a group III nitride substrate using a photoelectrochemical etching method according to an embodiment of the present invention.
Figure 9 is a flow chart for a group III nitride substrate manufacturing method using the lateral growth method according to an embodiment of the present invention.
10 is a flowchart illustrating a method for manufacturing a group III nitride substrate using the photoelectrochemical etching method and the lateral growth method according to an embodiment of the present invention.

Specific features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings. It is to be noted that the detailed description of known functions and constructions related to the present invention is omitted when it is determined that the gist of the present invention may be unnecessarily blurred.

The present invention relates to a method of manufacturing a III-nitride substrate in which the lamination defects of the present invention are removed. Hereinafter, the present invention is described in detail with reference to FIGS. 1 to 10.

'을 따르며, 여기서 '

'을 만족하다. 본 발명의 일실시예로서 Ⅲ족 질화물로 가장 많이 사용되는 GaN을 사용하는 것이 바람직할 것이나, 이에 한정되는 것은 아니다.
Group III referred to herein refers to a semiconductor compound formed of a group III element on the periodic table and nitrogen. As an example of such a group III element, aluminum (Al), gallium (Ga), indium (In), etc. can be illustrated, and these can be included individually or in combination of 2 or more. Therefore, it can be understood as a concept including GaN, AiN, InN, AlGaN, AlInN, GaInN, AlInGaN. Generalizing this, the group III nitride is illustratively '

", Where"

'Satisfy As an embodiment of the present invention, it is preferable to use GaN, which is most often used as a group III nitride, but is not limited thereto.

1 is a front view of a first group III nitride layer formed on a substrate according to an embodiment of the present invention. Here, the group 1 III nitrides each mean a nonpolar or semipolar layer, but preferably a semipolar layer.

2A is a schematic diagram of a nonpolar plane in a group III nitride crystal structure according to an embodiment of the present invention. Here, 'nonpolar' means having a crystallographic direction (a-plane or m-plane) perpendicular to the c-axis.

2B is a schematic diagram of a semipolar plane in a group III nitride crystal structure according to an embodiment of the present invention. Here, "semipolar" means having a crystal direction between 0 and 90 Hz with respect to the (0001) plane or (000-1). At this time, the semipolar plane extends across the hexagonal unit cell in the direction of the polygonal line, and forms an angle other than 90 ° with the c-axis. In particular, compared with the polar layer 0001, since the polar vector is inclined with respect to the growth direction, the image due to the polarity is reduced. The semipolar planes commonly observed in group III nitrides include (11-22), (1-101), (10-11), (10-13), (10-12), (20-21), ( 10-14) and the like, but the present invention is not limited to the above specific values. For example, the semipolar GaN in the (11-22) direction is present at about 58 mm with the (0002) plane.

Referring to FIG. 1, first, a group III-nitride layer 120, which is an epitaxial layer, is grown on the substrate 110. In this case, the substrate 110 may be used without particular limitation as long as it is a substrate suitable for growth of a nonpolar or semipolar III-nitride layer. Such substrates broadly comprise symmetrically equivalent planes such as a-plane, r-plane or m-plane.

In particular, in order to implement semipolarity as the substrate, it is preferable to use an m-plane sapphire substrate. Prior to forming a nitride layer on such a substrate 110, selectively removing residual oxygen in the reaction zone, annealing or heat treating the reaction zone using hydrogen and / or nitrogen (e.g., to a high temperature to a growth temperature). Steps may be performed. In addition, for example, in the case of a sapphire substrate, it may include the step of nitriding the surface of the substrate using anhydrous ammonia and the like.

In addition, an intermediate layer or a buffer layer may be formed on the substrate 110 before the group III nitride layer 120 is grown. This intermediate layer is selectively introduced to obtain better physical properties of the group III nitride layer, and an exemplary material promotes the growth of nonpolar, particularly semipolar, group III nitride layers as well as group III-V compounds such as AlN and AlGaN. Other suitable materials may be used. This utilizes deposition or layer growth techniques well known in the art, such as MOCVD, HVPE, and the like. Conventional layer growth techniques can form apolar or semipolar III-nitride layers on the substrate (or intermediate layers on the substrate) using, for example, MOCVD, HYPE, MBE, etc., but MOCVD is required to ensure better quality molds. It is preferable to use.

The dimension of the intermediate layer thus selectively introduced is not particularly limited but may be in the range of at least about 10 to 50 nm. In addition, as an embodiment, the process conditions may be adjusted to about 550 to 750 ° C. under atmospheric pressure to form the intermediate layer, but is not limited thereto.

The first group III nitride layer 120 may be formed to have a thickness in a range of about 1 to 10 μm, more specifically, about 2 to 5 μm. As such, in order to form the Group 1III nitride layer 120, a growth reaction may be performed for about 60 to 300 minutes under a temperature of about 800 to 1100 ° C. and a pressure of about 200 to 500 torr. The specific growth conditions are not limited thereto. Particularly, the group III-nitride 120 preferably has semi-polar direction characteristics, and specifically, substrate characteristics and growth conditions may be adjusted to have a (11-22) direction.

FIG. 3 is a schematic diagram of the stacking defects included in the group III-nitride layer according to an embodiment of the present invention. In fact, when a semipolar GaN is grown on an m-sapphire substrate, a number of stacking defects are generated as shown in FIG. 3. do. Such a stacking defect has a problem of reducing light extraction efficiency by blocking light reflected from a substrate when manufacturing a light emitting diode, thereby providing a method of increasing light extraction efficiency by removing the light emitting diode.

An etching method using a photoelectrochemical reaction is used as a method of removing the stacking defect of the group 1 III nitride layer 120.

4 is a schematic diagram of a photoelectrochemical reaction according to an embodiment of the present invention. The photoelectrochemical reaction is a reaction in which light is involved in the electrochemical system, and photoelectrode reactions and photogalvanic reactions are typical reactions, but include electroluminescence, etc., in which light is generated as a result of electrochemical reactions. The mechanism of the photoelectrochemical reaction is described with reference to FIG. 4.

Semiconductors have a specific energy bandgap. When the semiconductor absorbs energy larger than the inherent energy bandgap, an electron-hole pair is generated, and electrons in the valence band are excited into the conduction band and holes are generated in place. Band bending occurs on the surface of the semiconductor due to the characteristics of the semiconductor (fermi level equilibrium). FIG. 4A is an energy level diagram of n-type according to an embodiment of the present invention, and indicates a movement direction of an n-type electron-hole. 4b shows the moving direction of the p-type electron-hole as the energy level of the p-type according to the embodiment of the present invention. As shown in FIG. 4A, in the case of n-type, the hole moves toward the boundary, and in FIG. 4B, the electron of the p-type moves toward the boundary.

Figure 4c is a schematic diagram of a photoelectrochemical etching method according to an embodiment of the present invention, when the semiconductor is placed in a tank containing potassium hydroxide (KOH) as an electrolytic solution (electrolyte) is irradiated with a predetermined light energy generated electron-hole pairs The electrons flow into the counter electrode connected by separate wires, and the holes generate oxidation of the semiconductor surface. Since the oxide film is neutralized by potassium hydroxide (KOH), which is an electrolyte, photoelectrochemical etching may be performed in which the surface of the semiconductor is etched. That is, a photoelectrochemical etching method is a method of making an electro-hole pair using light (light), neutralizing the oxide film formed thereon, and etching the same.

Referring to FIG. 3, the first III nitride layer includes a plurality of stacking defects. In fact, the stacking defects and other regions have different band gaps. For example, the stacking defect is zincblend GaN material with a band gap of 3.2 eV, and the other region is wurzite GaN with 3.4 eV band gap. In other words, in order to use the above-described photoelectrochemical etching, it is necessary to absorb energy larger than the bandgap. If the energy of more than 3.2 eV and less than 3.4 eV is injected into the semiconductor, the photoelectrochemical etching is performed in the semiconductor having a bandgap smaller than 3.2 eV. Occurs, and thus only the lamination defect portion can be selectively etched. After re-growth after the photoelectrochemical etching method, it is possible to produce a semi-polar GaN without lamination defects, thereby manufacturing a substrate capable of making a light emitting diode that can further improve internal quantum efficiency.

However, the method of manufacturing a III-nitride substrate using the photoelectrochemical etching method described above corresponds to one embodiment and suggests another method. This is because, as shown in FIG. 3, the stacking defects are thin and distributed in a large number, it is difficult to actually selectively etch only the stacking defects. Therefore, if the portion of the lamination defects is removed to some extent and the photoelectrochemical etching is performed, more effective lamination defects may be removed.

FIG. 5 is a front view of a group III-nitride layer formed according to an exemplary embodiment of the present invention, and using a plurality of cavities 150 may remove some stacking defects.

Figure 6a is a schematic diagram of the stacking defects included in the group II III nitride layer in accordance with an embodiment of the present invention. The group III-nitride layer is formed on the group III-nitride layer and includes a triangular cavity 150. As can be seen in FIG. 6A, the portion where the triangular cavity 150 is located is not found to have a stacking defect. Figure 6b is a schematic diagram of the stacking defects included in the group 2 III nitride layer after the photoelectrochemical etching method according to an embodiment of the present invention, it can be seen that when the two methods are used together, more efficient removal of the stacking defects can be removed. .

FIG. 5 illustrates a mask of a specific pattern (stripe pattern in the drawing) having a cavity 150 below the inside of the group II nitride layer 140 regrown on the group III nitride layer by side growth or overgrowth. It is a figure which shows the process of forming a kind of tunnel which is formed continuously along this.

The term lateral growth or lateral overgrowth is a concept that includes lateral epitaxy overgrowth (LEO, ELO or ELOG), PENDEO epitaxy, etc., and defects or dislocations by making lateral growth easier than vertical growth. Is a process that can suppress propagation in a direction perpendicular to the layer surface. Such processes are commonly known in the art for the purpose of reducing defects or dislocations during c-plane GaN growth by MOCVD or the like.

As an example, the method of growing the group II nitride layer 140 may be performed under a dark thermal growth condition, and the ELOG method may be used as an example of the aforementioned various side growth methods. have. In this case, MOCVD, HYPE, and the like, which are common growth methods, may be used, but it is preferable to use MOCVD which is easy for cavity formation. This is because it may be easy to implement a cavity, especially a triangular cavity, by showing a tendency to grow into an inverted leg shape during the lateral growth process.

The ELOG method is a modification of the selective crystal growth technique, and is used to prevent vertical propagation of dislocations generated at an early growth stage by partially patterning an insulating layer of a thin film on an already grown group III nitride layer. The following description will focus on the ELOG method.

Referring to FIG. 6, first, a patterned mask layer 130 is formed on a first group III nitride layer 120 or a sapphire substrate in a stripe form. In this case, the mask of the stripe pattern may typically be a dielectric material, and typically include SiO ₂ , SiN _x (eg, Si ₃ N ₄ ), and the like.

In order to form the mask pattern, an insulating layer 130 is first formed by, for example, plasma enhanced chemical vapor deposition (PECVD). Next, a set of photolithography methods (in the above method, a conventional method such as, for example, ICP-RIE, etc. may be adopted for etching) on a group 1 III nitride layer 120 is used. The parallel stripe pattern 130 remains. In this case, an area between the masks of the stripe pattern may be referred to as a "window area".

For example, the width of the mask may be set in a range of about 2 to 50 μm (specifically, about 2 to 10 μm), and the width of the window is about 2 to 20 μm (more specifically, about 2 to 10 μm). have.

Further, the mask may be suitable if it is in the range of about 500-2000 mm 3 thickness. In addition, according to the first embodiment, the mask may be formed by setting in all the directions that can be placed on the plane, preferably in the (1-100) direction. The reason for considering the direction of the mask pattern is because it affects the characteristics such as the facet formation of the over-grown group III nitride layer.

Typically, in the case of group III nitride, especially GaN, the growth rate in the c-plane direction is much faster than the other planes. As described above, when the growth rate in the c-plane direction is reduced by using a mask (for example, SiO ₂ material) pattern to grow at a uniform rate, the quality of the overall growth layer is improved as well as flat and smooth. A surface can be obtained. In particular, when the mask pattern is formed in the (1-100) direction, a smoother surface can be formed. However, when the mask is patterned in the (-1-123) direction, the uneven surface of the micro unit may be formed.

Thus, although not necessarily limited to the mask pattern in a particular direction in certain embodiments of the present invention, it may be more desirable to set the mask pattern in the (1-100) direction.

Then, a (re) growth process of the group III nitride is performed, which (re) growth process starts in the window region, in which the microstructure of the lower group 1 III nitride layer 120 is reproduced, while the mask No growth occurs over the area. Over time, crystals growing in the window region gradually grow (overgrowth) over the mask. As such, the growth layer of group III nitride extends vertically and laterally, wherein the regions grown laterally are called " wing regions ". In the wing region, high quality crystals can be obtained in which defects are significantly reduced by lateral growth.

In addition, the rate of extension between vertical and side (horizontal) depends on the growth conditions, so that over time the nitride overgrown layer extending from the window to the side (e.g., the right direction) may have a side ( For example, it may meet and merge with the nitride overgrowth layer extending in the left direction. As a result, the cavity 150 is formed under the boundary to be joined, and the cavity is continuously formed along the mask pattern to form a kind of tunnel structure. The cavity 150 may represent various shapes such as triangles, squares, rectangles, circles, and the like, depending on process conditions, but may have a triangular shape as shown.

In the above embodiment, the cavity 150 is continuously connected to form a tunnel, but this is provided as a preferable purpose, and may be included in the scope of the present invention if it is intentionally or unintentionally closed in some section.

In the above embodiment, semipolar polar group III nitride may be suitable for forming a kind of tunnel by continuously connecting the cavity in the group II nitride layer 140, but the present invention is not limited thereto, and appropriate process conditions may be employed. If the above-mentioned cavity 150 can be formed, nonpolar group III nitride is also possible.

The thickness of the group III-nitride layer 140 may be, for example, in the range of about 3 to 10 μm, and the size (diameter or height) of the cavity is about 2 to 50 μm, more specifically about 2 to 10 μm. May be in the μm range. These numerical ranges are exemplary and can be adjusted according to changes in process conditions.

For example, the triangular cavity size may be formed differently according to the size of the pattern mask. For example, when the mask width of the pattern is about 7 μm, the diameter of the triangular cavity is about 6 μm wide. Will have. If the width of the mask increases, the diameter of the triangular cavity also increases in proportion to this, and the growth time will also increase as the width of the mask increases.

The group III-nitride layer 140 according to the illustrated embodiment may be formed (grown) by various parameter combinations. For example, the growth temperature may be about 700 to 1,100 ° C. (more specifically, about 800 to 1,000 ° C.). And the pressure may range from about 200 to 400 mTorr. For example, when the mask pattern is in the (1-100) direction, the mask pattern may be performed at about 800 to 1100 ° C. for about 240 to 600 minutes. In this case, the flow rate of the Ga source (eg, trimethylgallium, triethylgallium, etc.) supplied may range from about 10 to 30 sccm.

The second III-nitride layer 140 grows in an inverted trapezoidal shape from the window and gradually forms a triangular-shaped cavity 150.

The lateral growth layer obtained as described above can be characterized by x-ray diffraction (XRD) analysis, and in the case of nonpolar and semipolar layers, it is usually anisotropic according to the angle (direction angle). In this regard, for the semipolar III-nitrides obtainable by lateral growth in this embodiment, for example, the range of about 300 to 500 arc sec (FWHM value in arcsec (degree ㅧ 3600)) It may be desirable to indicate.

When the group III-nitride layer 140 is formed through this process, it can be seen from FIG. 6A that no stacking defect occurs in a specific portion. In this case, in order to prevent the remaining stacking defects from occurring, the remaining stacking defects may be formed by reproducing the group III-nitride layer 160 having the cavity 150 ′ as the method of forming the group III-nitride layer 140. You can also remove it.

7A is a front view of a form of a III-III nitride layer formed in accordance with an embodiment of the present invention. FIG. 7B is a schematic view of the lamination defects included in the III-III nitride layer according to one embodiment of the present invention. FIG. As shown in FIG. 7B, if two layers including the cavity are formed, the stacking defect may be removed to some extent, but in this case, the process may be cumbersome and the thickness of the grown epitaxial layer may be too thick.

In an ideal embodiment, as shown in FIG. 6B, a group III-nitride layer 140 having an ELOG process may be generated, and thereafter, only a portion of the lamination defect may be selectively etched and removed through the photoelectrochemical etching method.

8 is a flowchart illustrating a method for manufacturing a group III nitride substrate using the photoelectrochemical etching method according to an embodiment of the present invention.

A group III-nitride layer 120 is formed on the substrate 110 providing the growth surface of the nonpolar or semipolar epitaxy layer (S81). Here, as an embodiment of the present invention, the substrate 110 that provides the growth surface of the nonpolar or semipolar epitaxy layer is an m-plane sapphire substrate, and the group 1 III nitride layer 120 is (11-22). Characterized in that the semi-polar layer in the direction, but is not limited thereto. After the step S81, the photoelectrochemical etching is performed to remove the stacking defects generated in the group 1 III nitride layer 120. At this time, the photoelectrochemical etching method contains the device formed in step S81 in the KOH electrolyte (S82), and when irradiated with light, an oxide film on the surface of the semiconductor is generated by the electron-hole pair generated by the light (S83). When etching (S84) through the neutralization reaction with KOH, it is possible to photoelectrochemical etching that can selectively etch only the desired portion (lamination defects present on the surface of the group 1 III nitride layer 120).

The irradiated light may be selectively etched only by irradiating light energy larger than the energy band gap of the portion to be etched but smaller than the energy band gap of the portion not to be etched.

9 is a flowchart illustrating a method for manufacturing a group III nitride substrate using the lateral growth method according to the embodiment of the present invention.

A group III-nitride layer 120 is formed on the substrate 110 providing a growth surface of the nonpolar or semipolar epitaxy layer (S91). Here, as an embodiment of the present invention, the substrate 110 that provides the growth surface of the nonpolar or semipolar epitaxy layer is an m-plane sapphire substrate, and the group 1 III nitride layer 120 is (11-22). It is characterized by being a semi-polar layer in the direction, but is not limited thereto.

The second group III nitride layer 140 having a plurality of cavities 150 formed therein is formed on the first group III nitride layer 120 formed through the step S91 by lateral growth (S92). The third group III nitride layer 160 having a plurality of cavities 150 ′ formed therein is formed on the second group III nitride layer 140 formed through the step S92 by a lateral growth method (S93). . At this time, the cavity 150 made in the step S92 and the cavity 150 'made in the S83 step are formed to cross each other, so that the lamination defect can be removed. That is, the group III-nitride layer 160 is formed such that the cavity 150 ′ is formed on the stacking defect portion existing on the group II-nitride layer 140 formed by the step S92. In the process of generating the group II nitride layer 140 of step S92, a patterned mask layer is formed on the group III nitride layer 120 (S92-1), and the patterned mask layer after step S82-1. Side-growing the formed Group IIIII nitride layer 140 (S92-2). At this time, as an embodiment, the mask layer of S92-1 is characterized in that it is patterned in the (1-100) direction, it characterized in that the Si0 ₂ or SiN _x material. In the step S93 as in the step S92, the process of generating the group III-nitride layer 160 in step S93 forms a patterned mask layer on the group-III nitride layer 140 (S93-1). ), Laterally growing the group III-nitride layer having the patterned mask layer formed thereon (S93-2).

9 is a flowchart illustrating a method of manufacturing a group III nitride substrate using the photoelectrochemical etching method and the lateral growth method as an embodiment of the present invention.

A first III nitride layer is formed on the substrate 110 to provide a growth surface of the nonpolar or semipolar epitaxy layer (S101). Here, as an embodiment of the present invention, the substrate 110 that provides the growth surface of the nonpolar or semipolar epitaxy layer is an m-plane sapphire substrate, and the group 1 III nitride layer 120 is (11-22). Characterized in that the semi-polar layer in the direction, but is not limited thereto.

The second group III nitride layer 140 having a plurality of cavities 150 formed therein is formed on the first group III nitride layer 120 formed through the step S101 by a lateral growth method (S102). After the step S102, the photoelectrochemical etching is performed to remove the stacking defects generated in the group 2 III nitride layer 140. In this case, the photoelectrochemical etching method contains a semiconductor in a KOH electrolyte (S103), and when light is irradiated, an oxide film on the surface of the semiconductor is generated by electron-hole pairs generated by light (S104). Through etching (S105), photoelectrochemical etching capable of selectively etching only a desired portion (lamination defects present on the surface of the second III nitride layer 140) is possible.

While the present invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. It will be appreciated by those skilled in the art that numerous changes and modifications may be made without departing from the invention. And all such modifications and changes as fall within the scope of the present invention are therefore to be regarded as being within the scope of the present invention.

110; Board
120; Group III-nitride layer
130,130 '; Stripe pattern
140; Group III-nitride layer
150,150 '; Cavity
160; Group III-nitride layer

Claims (15)

(a) forming a Group 1 III nitride layer 120 on the substrate 110 providing a growth surface of a nonpolar or semipolar epitaxy layer;
(b) placing the device formed in step (a) in an electrolyte solution and irradiating a predetermined light energy; And
(c) etching the stacked defects present on the surface of the group III-nitride layer 120 through the photoelectrochemical reaction of step (b); Method of manufacturing a group III nitride substrate is removed lamination defect comprising a.
The method of claim 1,
And a substrate providing the growth surface of the nonpolar or semipolar epitaxy layer is an m-plane sapphire substrate.
The method of claim 1,
The first group III nitride layer 120 is a semi-polar layer in the (11-22) direction, characterized in that the lamination defect removed group III nitride substrate.

The method of claim 1,
The step (b)
And a light energy greater than the band gap energy of the laminated defect portion and less than the band gap energy of the other portion.
(a) forming a Group 1 III nitride layer 120 on the substrate 110 providing a growth surface of a nonpolar or semipolar epitaxy layer;
(b) forming a group III-nitride layer 140 having a plurality of cavities 150 formed therein on the group III-nitride layer 120 formed in step (a); And
(c) forming a group III-nitride layer 160 having a plurality of cavities 150 'formed therein on the group III-nitride layer 140 formed in step (b); Method of manufacturing a group III nitride substrate is removed lamination defect comprising a.
The method of claim 5, wherein
The step (c)
Forming a group III-nitride layer 160 such that a cavity 150 'is formed on the stacking defect portion existing on the group II-nitride layer 140 formed by the step (b); Method of manufacturing a group III nitride substrate, the stacking defect is removed, comprising a.
The method of claim 5, wherein
The step (b)
(b-1) forming a patterned mask layer (130) on the first group III nitride layer (120); And
(b-2) laterally growing a group III nitride layer on the mask layer 130 formed through the step (b-1); Method of manufacturing a group III nitride substrate is removed lamination defect comprising a.
The method of claim 5, wherein
Step (c) is,
(c-1) forming a patterned mask layer 130 'on the second group III nitride layer 140; And
(c-2) laterally growing a group III nitride layer on the mask layer 130 'formed through the step (c-1); Method of manufacturing a group III nitride substrate is removed lamination defect comprising a.
The method according to claim 7 to 8,
The mask layer (130,130 ') is a method of manufacturing a group III nitride substrate is removed lamination, characterized in that patterned in the (1-100) direction.
(a) forming a Group 1 III nitride layer 120 on the substrate 110 providing a growth surface of a nonpolar or semipolar epitaxy layer;
(b) forming a group III-nitride layer 140 having a plurality of cavities 150 formed therein on the group III-nitride layer 120 formed in step (a);
(c) placing the device formed in step (b) in an electrolyte solution and irradiating a predetermined light energy; And
(d) etching the stacked defect portion present on the surface of the Group II III nitride layer 140 through the photoelectrochemical reaction of step (c); Method of manufacturing a group III nitride substrate is removed lamination defect comprising a.
11. The method of claim 10,
And a substrate providing the growth surface of the nonpolar or semipolar epitaxy layer is an m-plane sapphire substrate.
11. The method of claim 10,
The first group III nitride layer 120 is a semi-polar layer in the (11-22) direction, characterized in that the lamination defect removed group III nitride substrate.
11. The method of claim 10,
The step (b)
(b-1) forming a patterned mask layer (130) on the first group III nitride layer (120); And
(b-2) laterally growing a group III nitride layer on the mask layer 130 formed through the step (b-1); Method of manufacturing a group III nitride substrate is removed lamination defect comprising a.
11. The method of claim 10,
The mask layer 130 is a method of manufacturing a group III nitride substrate, the lamination defect is removed, characterized in that patterned in the (1-100) direction.
11. The method of claim 10,
The step (c)
A method of manufacturing a group III nitride substrate from which a lamination defect has been removed, wherein light energy greater than the band gap energy of the lamination defect portion and smaller than the band gap energy of the other portion is used.

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