KR20130015474A - Liquid crystal display device including pixel electrode having different width - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) element is provided to minimize the change of penetration ratio by regularly controlling a width between the pixel electrodes within a process margin. CONSTITUTION: A plurality of gate lines(103) and data lines(105) define a plurality of pixel areas. A TFT(Thin Film Transistor)(110) is arranged within each pixel area. A common electrode(122) is arranged within the pixel area. A plurality of pixel electrodes(124) is arranged at a band shape within the pixel area. The plurality of the pixel electrodes forms an electric field with the common electrode. A width and a space of the pixel electrode are different from an adjacent pixel electrode.

Description

Liquid crystal display device having pixel electrodes of different widths {LIQUID CRYSTAL DISPLAY DEVICE INCLUDING PIXEL ELECTRODE HAVING DIFFERENT WIDTH}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of preventing defects due to process deviations by forming different widths and intervals of pixel electrodes.

In recent years, with the development of the information society, the demand for display devices has increased, resulting in Liquid Crystalline Polymer (LCD), Plasma Display Panel (PDP), Electro Luminescent Display (ELD), Field Emission Display (FED), and Vaporum Fluorescent Display (VFD). Research on various flat panel displays such as) is being actively conducted. Among them, liquid crystal display devices (LCDs) are receiving the most attention because of high quality, mass production technology, ease of driving means, light weight, thinness, and low power consumption.

Liquid crystal display devices have various display modes according to the arrangement of thin and long liquid crystal molecules. TN (Twisted Nematic) mode liquid crystal display devices, which have advantages of easy monochrome display, fast response speed, and low driving voltage, are mainly used. . However, the TN mode liquid crystal display device has a disadvantage in that the viewing angle characteristic is not excellent because the liquid crystal molecules are oriented perpendicular to the electric field. Therefore, in order to overcome the above disadvantage, a new technology, i.e., an IPS (In Plain Switching) mode liquid crystal display, has been proposed.

The IPS mode liquid crystal display device is a liquid crystal display device that improves the wide viewing angle characteristics compared to the TN mode liquid crystal display device by forming a transverse electric field substantially parallel to the surface of the substrate when voltage is applied, thereby aligning the liquid crystal molecules in a plane. In the IPS mode liquid crystal display device, since the image display part of the actual image is visible in up, down, left, and right directions in about 70 °, the viewing angle characteristic can be improved compared to the conventional TN mode liquid crystal display device. There is this.

However, in the IPS mode liquid crystal display device, since the common electrode and the pixel electrode which generate the transverse electric field are made of an opaque metal, there is a problem in that the aperture ratio of the liquid crystal display device is decreased, the transmittance is decreased, and the transmittance is reduced. In addition, as a result, since a strong backlight must be used to obtain proper luminance, power consumption increases.

In order to solve this problem, a method of forming the common electrode and the pixel electrode with a transparent conductive material has been proposed, but even in this case, the aperture ratio was improved but the transmittance was not so excellent. In the IPS mode liquid crystal display, in order to form a transverse electric field, the distance between the electrodes must be set relatively large compared to the cell gap, and the electrodes must have a relatively wide width in order to obtain an electric field having an appropriate intensity. By the way, the transverse electric field is formed only between the electrodes. That is, the transverse electric field is not formed in the upper region of the electrodes having the wide width. Therefore, in the upper region of the electrode, since the liquid crystal molecules maintain the initial alignment state (that is, the alignment state of the off state) regardless of the application of the electric field, the transmittance is not improved.

In order to overcome the disadvantages of the IPS mode liquid crystal display device, a FFS (Fringe Field Switching) mode liquid crystal display device has recently been proposed. Similar to the IPS mode liquid crystal display device, the FFS mode liquid crystal display device can improve the viewing angle characteristic, which is an advantage of the IPS mode, by switching the liquid crystal almost in parallel with the surface of the substrate. In addition, in the FFS mode liquid crystal display device, the gap between the common electrode and the pixel electrode is made smaller than the cell gap to form a transverse electric field, and a fringe field is formed on the electrode to drive the liquid crystal molecules by the electric field on the common electrode and the pixel electrode. To improve the transmittance.

1 is a plan view showing the structure of a conventional FFS mode liquid crystal display device, and FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1. As shown in FIGS. 1 and 2, the FFS mode liquid crystal display device includes a plurality of gate lines 3 and data lines 5 arranged vertically and horizontally to define a plurality of pixels, and a thin film transistor disposed in the pixels. 10) and a common electrode 22 and a pixel electrode 24 disposed in the pixel to form an electric field.

The thin film transistor 10 includes a gate electrode 11 formed on the first substrate 30, a gate insulating layer 32 formed over the entire first substrate 30 on which the gate electrode 11 is formed, and the gate insulation. The semiconductor layer 13 formed on the layer 32, the source electrode 15 and the drain electrode 16 formed on the semiconductor 13 to apply an image signal input from the outside to the pixel, and the first substrate ( 30) a protective layer 36 formed throughout.

Also, a common electrode 22 made of a transparent conductive material such as indium tin oxide (ITO) and a pixel electrode 24 made of an opaque metal are disposed in the pixel to form an electric field. As shown in FIGS. 1 and 2, the common electrode 22 is formed on the gate insulating layer 32, and the pixel electrode 24 is formed on the passivation layer 36. The pixel electrode 24 is connected to the drain electrode 16 through a contact hole (not shown) formed in the protective layer to receive an image signal input from the outside. The common electrode 22 is formed over the entire pixel region, and the pixel electrode 24 is formed to have a predetermined width so that an electric field is formed between the common electrode 22 and the pixel electrode 24. In this case, the electric field is a fringe electric field E formed between the common electrode 22 and the pixel electrode 24, and is formed not only between the electrodes 22 and 24 but also on the opaque pixel electrode 24 to form the pixel electrode 24. The liquid crystal molecules positioned above are also driven by the electric field (E).

On the other hand, the second substrate 40 is formed with a black matrix 42 for preventing light from being transmitted to the image non-display area and a color filter layer 44 for realizing color, and the first substrate 30. The liquid crystal layer 50 is formed between the second substrate 40 to complete the FFS mode liquid crystal display device.

However, the FFS mode liquid crystal display device having the above structure has the following problems.

Typically, the thin film transistor 10, the common electrode 22, and the pixel electrode 24 in the FFS mode are formed by a photo process using a mask. In such a photo process, a process deviation occurs in the size or position of an electrode formed in an error of an exposure process or an error of an etching process.

In particular, in the case of the pixel electrodes 24 formed in a plurality of bands and arranged at regular intervals, if a process deviation occurs during the process, a change in transmittance occurs. For example, when the width a of the pixel electrode 24 is formed to be 2.3 mu m and the width between the pixel electrodes 24 is formed to 5.0 mu m, the relative transmittance is increased when a deviation of ± 0.3, which is the maximum process margin, occurs. The rate of change will be -0.003% and 0.00765%, respectively. This rate of change is an important cause of deterioration of image quality since spots are generated in the corresponding area when an actual image is implemented.

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and an object thereof is to provide a liquid crystal display device capable of minimizing defects caused by process deviations by regularly varying the width of the pixel electrode and the interval between the pixel electrode and the pixel electrode. .

In order to achieve the above object, the liquid crystal display device according to the present invention comprises a plurality of gate lines and data lines defining a plurality of pixel areas; A thin film transistor disposed in each pixel region; A common electrode disposed in the pixel region to form an electric field; And a plurality of pixel electrodes arranged in a band shape in the pixel region to form an electric field with the common electrode, wherein the pixel electrodes are different in width and distance from adjacent pixel electrodes.

The pixel electrode is regularly increased or decreased in the set area by the set width, and the gap between the pixel electrode and the pixel electrode is regularly increased or decreased in the set area, wherein the width and the gap of the pixel electrode are the process margins. Fluctuates within the range of.

In the present invention, the width of the band-shaped pixel electrodes adjacent to each other and the interval between the pixel electrodes are formed to increase or decrease regularly within the process margin so that the variation in transmittance due to the process deviation can be minimized when a process deviation occurs. Thus, the image quality can be prevented from being bad.

1 is a plan view of a conventional liquid crystal display device.
2 is a cross-sectional view taken along the line AA ′ of FIG. 1.
3 is a plan view of a liquid crystal display device according to an exemplary embodiment of the present invention.
4 is a cross-sectional view taken along line BB ′ of FIG. 3.
5 is an enlarged view of area A of FIG. 3;
6 is a simplified diagram showing the structure of an actual pixel electrode of a liquid crystal display according to an embodiment of the present invention.
7A and 7B are simplified views illustrating a structure of a pixel electrode when a process deviation occurs in a liquid crystal display according to an exemplary embodiment of the present invention.
8 is a diagram illustrating a shape of a pixel electrode according to another exemplary embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

3 and 4 are a plan view and a cross-sectional view showing the structure of an FFS mode liquid crystal display device according to an embodiment of the present invention, respectively.

3 and 4, the FFS mode liquid crystal display device according to the present invention includes a plurality of gate lines 103 and data lines 105 arranged vertically and horizontally to define a plurality of pixels, and disposed in the pixels. A thin film transistor 110, a common electrode 122 and a pixel electrode 124 disposed in the pixel to form an electric field.

The thin film transistor 110 includes a gate electrode 111 formed on the first substrate 130, a gate insulating layer 132 formed over the entire first substrate 130 on which the gate electrode 111 is formed, and the gate insulation. A semiconductor layer 113 formed on the layer 132, a source electrode 115 and a drain electrode 116 formed on the semiconductor 113 to apply an image signal input from the outside to the pixel, and the first substrate ( 130) a protective layer 136 formed throughout.

The gate electrode 111 is a photolithography method after laminating a opaque metal having good conductivity such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy on the first substrate 130 by a sputtering process. formed by etching by a photolithography process, and the gate insulating layer 132 is formed on the first substrate 130 on which the gate electrode 111 is formed by an CVD (Chemicla Vapor Deposition) method, such as SiO ₂ or SiNx. It is formed by laminating an insulating material.

In addition, the semiconductor layer 113 forms a semiconductor layer 113 by laminating and etching a semiconductor material such as amorphous silicon (a-Si) over the entire first substrate 130 by CVD. In this case, although not shown in the drawing, the source electrode 115 and the drain electrode 116 are formed by stacking amorphous silicon doped with an impurity or adding an impurity to a part of the semiconductor layer 113, and the semiconductor layer 113. An ohmic contact layer is formed to be ohmic-contacted with each other.

The source electrode 115 and the drain electrode 116 are formed by stacking an opaque metal having good conductivity such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy by sputtering and then etching.

A passivation layer 136 is formed on the thin film transistor 110 by stacking an organic insulating material such as Benzo Cyclo Butene (BCB) or photo acryl. In addition, although not shown in the drawing, the protective layer 136 may be formed of a plurality of layers. For example, the protective layer 136 may be formed of a double layer of an organic insulating layer made of an organic insulating material such as BCB or photoacryl and an inorganic insulating layer made of an inorganic insulating material such as SiO ₂ or SiNx. It may be formed of an insulating layer, an organic insulating layer and an inorganic insulating layer. As the organic insulating layer is formed, the surface of the protective layer 136 is formed to be flat, and the interface property with the protective layer 136 is improved by applying the inorganic insulating layer.

The common electrode 122 is formed on the first substrate 130. In this case, the common electrode 130 is formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the pixel is spaced apart from the gate line 103 and the data line 105 by a predetermined distance. It is formed throughout. Although not shown in the drawing, a common line connected to the common electrode 122 is formed on the first substrate 130 to apply a common voltage to the common electrode 122 from the outside. The common electrode 122 may be formed on the gate insulating layer 132. In this case, the common line may be electrically connected to the common electrode 122 through a contact hole formed in the gate insulating layer 132.

The pixel electrode 124 is formed on the passivation layer 136. In this case, the pixel electrode 124 is made of a transparent conductive material such as ITO or IZO or a metal having good conductivity such as Al or Al alloy. The pixel electrode 124 is formed to have a band-shaped set width and is disposed along an extension direction of the data line 105. Although not shown in the drawing, a protective hole is formed in the passivation layer 136 so that the pixel electrode 124 is electrically connected to the pixel electrode 116 of the thin film transistor 110 so that an image is formed through the thin film transistor 110. The signal is applied to the pixel electrode 124.

In the conventional FFS mode liquid crystal display device, the width of the pixel electrode 124 and the distance between the pixel electrodes 124 are equally formed over the entire first substrate 130, whereas in the present invention, the pixel electrode 124 The width and the distance between the pixel electrodes 124 are formed differently over the entire first substrate 130. As such, by setting the widths of the pixel electrodes 124 and the intervals between the pixel electrodes 124 differently, variations in the transmission efficiency can be minimized even when a process deviation occurs in manufacturing the liquid crystal display device.

In this case, the width of the pixel electrode 124 and the interval between the pixel electrode 124 may be irregularly set or regular formed over the entire first substrate 130.

In an embodiment of the present invention, the width of the pixel electrode 124 decreases from the right side to the left side of the pixel, and the interval between the pixel electrodes 124 increases regularly. In particular, in this embodiment, since the width that decreases from the right side to the left side of the pixel becomes the same, the difference in width and the gap between the adjacent pixel electrodes 124 are always constant.

Meanwhile, a black matrix 142 and a color filter layer 144 for realizing color are formed on the second substrate 140 to prevent light from being transmitted to the image non-display area, and the first substrate 130 is formed on the second substrate 140. The liquid crystal layer 150 is formed between the second substrate 140 to complete the FFS mode liquid crystal display device.

In the FFS mode liquid crystal display device having the above configuration, an electric field is formed between the dummy common electrode 122 formed on the first substrate 130 and the band-shaped pixel electrode 24 formed on the protective layer 136. In this case, the electric field is a fringe electric field formed between the common electrode 122 and the pixel electrode 124, and is formed not only between the electrodes 122 and 124 but also on a predetermined region of the pixel electrode 124, and the liquid crystal molecules of the liquid crystal layer 150. By switching according to this electric field it is possible to implement the image by adjusting the transmittance of the light passing through the liquid crystal layer 150.

FIG. 5 is an enlarged view of region A of FIG. 4 and illustrates the arrangement of the pixel electrode 124 in more detail.

As shown in FIG. 5, the common electrode 122 is formed over the entire pixel, and the pixel electrode 124 is disposed in a band shape. At this time, the width a1-a7 of the pixel electrode 124 disposed in the pixel decreases from the right side to the left side of the pixel (a1> a2> a3> a4> a5> a6> a7), and the pixel electrode 124 The intervals d1-d6 between the pixel electrodes 124 increase from the right side to the left side of the pixel (d1 <d2 <d3 <d4 <d5 <d6).

At this time, the reduction width of the pixel electrode 124 is the same in the entire pixel. The reduction width between the first pixel electrode and the second pixel electrode on the right side is the same as the reduction width between the second pixel electrode and the third pixel electrode on the right side. This rule appears throughout the liquid crystal display device. At this time, if the decrease of the width of the pixel electrode 124 is Δa, a2 = a1-Δa, a3 = a2-Δa, a4 = a3-Δa, a5 = a4-Δa, a6 = a5-Δa , a7 = a6-Δa.

Incidentally, the increment of the interval between the pixel electrodes 124 is the same in the entire pixel. On the right side, the increment of the interval d2 between the second pixel electrode and the third pixel electrode is equal to the increment of the interval d3 between the third pixel electrode and the fourth pixel electrode, and this phenomenon appears the same throughout the liquid crystal display. . At this time, if the increment of the interval between the pixel electrodes 124 is (Δd), d2 = d1 + Δd, d3 = d2 + Δd, d4 = d3 + Δd, d5 = d4 + Δd, d6 = d5 + Δd do.

FIG. 6 is a diagram illustrating a width and an interval of a specific pixel electrode 124 of an FFS mode liquid crystal display device according to an exemplary embodiment of the present invention.

As shown in FIG. 6, the pixel electrode 124 is formed to have a width of 2.5 μm on the right side and decreases toward the left side, where the decrease Δa is 0.1 μm. That is, the width of the pixel electrode 124 decreases by 0.1 μm from right to left. In addition, the interval between the pixel electrodes 124 is 4.7 μm at the right side and increases toward the left side, where the increment Δd is 0.1 μm. That is, the interval between the pixel electrodes 124 increases by 0.1 μm from right to left.

In the present invention, the variation width of the width and the interval of the pixel electrodes 124 of all the pixel electrodes 124 is a process margin value. In the structure of FIG. 6, since the process margin is ± 0.3, the fluctuation range of the pixel electrode 124 is 0.6 μm, and thus the pixel electrode 124 has 2.0 μm, 2.1 μm, 2.2 μm, 2.3 μm, 2.4 μm, 2.5 μm, 2.6 It is formed and disposed in a width of 탆. In addition, since the variation width between the pixel electrodes 124 is also 0.6 µm, the pixel electrodes 124 are disposed at intervals of 4.7 µm, 4.8 µm, 4.9 µm, 5.0 µm, 5.1 µm, 5.2 µm, 5.3 µm.

In the case of manufacturing a FFS mode liquid crystal display device having such a structure, when a process deviation of -0.3 occurs, the pixel electrode 124 is 1.7 μm, 1.8 μm, 1.9 μm, 2.0 μm, 2.1 μm, 2.2 as shown in FIG. 7A. It is arrange | positioned at the space | interval of micrometer, 2.3 micrometers, 5.1 micrometer, 5.2 micrometer, 5.3 micrometer, 5.4 micrometer, 5.5 micrometer, 5.6 micrometer, and 5.7 micrometer.

In addition, when a process deviation of +0.3 occurs, the pixel electrode 124 has a width of 2.3 μm, 2.4 μm, 2.5 μm, 2.6 μm, 2.7 μm, 2.8 μm, 2.9 μm, and 4.5 μm as shown in FIG. 7B. , 4.6 μm, 4.7 μm, 4.8 μm, 4.9 μm, 5.0 μm, 5.1 μm.

As described above, in the present invention, the width and the interval of the pixel electrode 124 are formed to increase and decrease in a sequential and regular manner, so that when a process deviation occurs, the effect of the width and the gap of the pixel electrode 124 can be compensated for. .

According to the present invention, when a process deviation of -0.3 occurs in a conventional FFS mode liquid crystal display device in which the width and the interval of the pixel electrode are set to 2.3 µm and 5.0 µm, respectively, the variation in transmittance is 0.003 and the process deviation of +0.3 is In the present invention, the change in transmittance is 0.00765, whereas in the present invention, the change in transmittance is 0.00224 when a process deviation of -0.3 occurs and the change in transmittance is 0.0003 when a process deviation of +0.3 occurs.

In other words, it can be seen that the transmittance is increased in the present invention compared with the prior art. In particular, when a process deviation of +0.3 occurs, the transmittance can be effectively prevented from being lowered in the FFS mode liquid crystal display device of the present invention compared with the conventional method.

8 is a diagram illustrating a pixel structure of an FFS mode liquid crystal display device according to another exemplary embodiment of the present invention.

As shown in FIG. 8, in this embodiment, the common electrode 222 is formed over the entire pixel, and the pixel electrode 224 is arranged in a band shape. At this time, the width a1-a7 of the pixel electrode 224 disposed in the pixel increases from the right side to the left side of the pixel (a1 <a2 <a3 <a4 <a5 <a6 <a7), and the pixel electrode 224 The distance d1-d6 between the pixel electrodes 224 decreases from the right side to the left side of the pixel (d1> d2> d3> d4> d5> d6).

At this time, the increase width of the pixel electrode 224 is the same in the entire pixel. The increase width between the first pixel electrode and the second pixel electrode on the right side is the same as the increase width between the second pixel electrode and the third pixel electrode on the right side. This rule appears throughout the liquid crystal display device. At this time, if the increment of the width of the pixel electrode 124 is Δa, a2 = a1 + Δa, a3 = a2 + Δa, a4 = a3 + Δa, a5 = a4 + Δa, a6 = a5 + Δa, a7 = a6 + Δ becomes a.

In addition, the reduction width of the interval between the pixel electrodes 224 is the same in the entire pixel. On the right side, the reduction width of the gap d2 between the second pixel electrode and the third pixel electrode is equal to the reduction width of the gap d3 between the third pixel electrode and the fourth pixel electrode, and this phenomenon is the same throughout the liquid crystal display. . At this time, if the decrease of the interval between the pixel electrodes 124 is (Δd), then d2 = d1-Δd, d3 = d2-Δd, d4 = d3-Δd, d5 = d4-Δd, d6 = d5-Δd.

As described above, in the present invention, the width and the interval of the pixel electrode are differently formed over the entire liquid crystal display device. In particular, the width and spacing of the pixel electrodes are different from those of adjacent pixels, and variations in the width and spacing are regular throughout the substrate. As shown in FIGS. 5 and 7, the width and the interval of the pixel electrode may increase or decrease at a predetermined ratio (that is, variations Δa and Δd) from one side of the pixel to the other side. In addition, although not shown in the drawing, the width and spacing of the pixel electrode may increase after decreasing at a predetermined ratio from one side of the pixel to the other side. That is, the width and the interval of the pixel may increase or decrease from the center of the pixel toward the left and right.

In other words, the present invention may be arranged in various forms if it is increased or decreased with an adjacent pixel in a process margin.

On the other hand, although the specific structure of this invention is disclosed in the above-mentioned detailed description, this is for demonstrating this invention and this invention is not limited to this specific structure.

For example, in the detailed description, the pixel electrodes and the data lines are arranged in a straight line parallel to the pixel electrodes and the data lines, but the pixel electrodes and the data lines are formed at least once in the pixel (that is, formed in a '<' shape). Could be. As such, by forming the pixel electrode and the data line in a curved shape, the pixel may be formed into two domains having different viewing angle directions, thereby improving viewing angle characteristics. In addition, the pixel electrodes may be arranged at an angle instead of being parallel to the data line, and the pixel electrodes may be arranged to be substantially parallel to the gate line.

In addition, in the detailed description, although the common electrode is formed on the first substrate and the pixel electrode is formed on the passivation layer, the common electrode may be formed on the gate insulating layer and the pixel electrode may be formed on the passivation layer, and the common electrode may be formed on the first substrate. The pixel electrode may be formed on the gate insulating layer.

Further, in the detailed description, the process margins are 2.3 μm, 2.4 μm, 2.5 μm, 2.6 μm, 2.7 μm, 2.8 μm, 2.9 μm, and the interval between the pixel electrodes is 4.5 μm, 4.6 μm, 4.7 μm, 4.8 Μm, 4.9 μm, 5.0 μm, and 5.1 μm are formed, but the width of the pixel electrode and the distance between the pixel electrodes may be set differently depending on factors such as the size of the liquid crystal display device, and the process margin is fixed to ± 0.3. But it can be set to a different value.

In other words, while the preferred embodiment of the present invention has been described in detail above, it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible.

Therefore, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention defined in the following claims are also within the scope of the present invention.

110: thin film transistor 111: gate electrode
113: semiconductor layer 115: source electrode
116: drain electrode 122: common electrode
124: pixel electrode

Claims (9)

A plurality of gate lines and data lines defining a plurality of pixel regions;
A thin film transistor disposed in each pixel region;
A common electrode disposed in the pixel region to form an electric field; And
A plurality of pixel electrodes arranged in a band shape in the pixel region to form the common electrode and an electric field,
And the pixel electrode is different in width and distance from an adjacent pixel electrode. The method of claim 1, wherein the thin film transistor,
A gate electrode formed on the first substrate;
A gate insulating layer formed over the entire first substrate on which the gate electrode is formed;
A semiconductor layer formed on the gate insulating layer;
A source electrode and a drain electrode formed on the semiconductor layer; And
And a protective layer formed over the entire first substrate. The liquid crystal display device of claim 2, wherein the common electrode is formed on the first substrate and the pixel electrode is formed on the protective layer. The liquid crystal display of claim 3, wherein the pixel electrode is parallel to a data line. The liquid crystal display of claim 1, wherein the pixel electrode is increased or decreased by a predetermined width with an adjacent pixel electrode. 6. The liquid crystal display device according to claim 5, wherein the pixel electrode is regularly increased or decreased in a set area by a set width. The liquid crystal display device according to claim 1, wherein an interval between the pixel electrode and the pixel electrode is increased or decreased by a set length compared to an interval between the adjacent pixel small electrode and the pixel electrode. 8. The liquid crystal display device according to claim 7, wherein an interval between the pixel electrode and the pixel electrode increases or decreases regularly within the set area. The liquid crystal display device of claim 1, wherein the width and the interval of the pixel electrode vary within a range of a process margin.

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