KR20120095653A - Semiconductor light emitting device and method for manufacturing the same - Google Patents

Semiconductor light emitting device and method for manufacturing the same Download PDF

Info

Publication number
KR20120095653A
KR20120095653A KR1020110015104A KR20110015104A KR20120095653A KR 20120095653 A KR20120095653 A KR 20120095653A KR 1020110015104 A KR1020110015104 A KR 1020110015104A KR 20110015104 A KR20110015104 A KR 20110015104A KR 20120095653 A KR20120095653 A KR 20120095653A
Authority
KR
South Korea
Prior art keywords
layer
intermediate layer
quantum well
forming
light emitting
Prior art date
Application number
KR1020110015104A
Other languages
Korean (ko)
Inventor
천주영
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020110015104A priority Critical patent/KR20120095653A/en
Publication of KR20120095653A publication Critical patent/KR20120095653A/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H01L33/18—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0083—Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device and a method of manufacturing the same, and an aspect of the present invention provides a semiconductor device including at least one of a first conductive semiconductor layer having a concave-convex pattern having a concave portion and a convex portion on at least one surface thereof, and at least a portion of a bottom surface of the concave portion. An intermediate layer formed of a dielectric material formed to expose at least a portion of the sidewalls of the uneven pattern, and covering a top surface and a sidewall of the uneven pattern, and having a larger lattice constant than the material of the first conductive semiconductor layer. And it provides a semiconductor light emitting device comprising an active layer formed on the intermediate layer and a second conductive semiconductor layer formed on the active layer.

Description

Semiconductor Light Emitting Device And Method for Manufacturing the Same

The present invention relates to a semiconductor light emitting device and a method of manufacturing the same.

A light emitting diode (LED), which is a kind of semiconductor light source, is a semiconductor device capable of generating light of various colors based on recombination of electrons and holes in a junction portion of a p- and n-type semiconductor when current is applied thereto. Such light emitting diodes have a number of advantages, such as long life, low power, excellent initial driving characteristics, and high vibration resistance, compared to filament-based light sources. In particular, group III nitride semiconductors capable of emitting light in a blue short wavelength region have been in the spotlight.

In the conventional nitride compound semiconductor, since there is about 11% lattice mismatch between GaN and InN, strong strain is generated at the interface between the quantum well and the quantum barrier in the InGaN-based multi-quantum well structure. This strain causes a piezoelectric field in the quantum well, leading to a decrease in internal quantum efficiency. In particular, in the case of the green light emitting diode, since the amount of In contained in the quantum well increases, the internal quantum efficiency is further reduced by the piezoelectric field.

On the other hand, the strain generated in the multi-quantum well structure is affected by the n-type nitride semiconductor layer adjacent to the active layer. The larger the lattice constant mismatch between the n-type nitride semiconductor layer, such as the n-type contact layer and the quantum well layer, causes a larger strain in the active layer. Such a strain decreases luminous efficiency by increasing lattice defects such as dislocations in the quantum well layer, and increases the piezoelectric field in the quantum well structure to change the emission wavelength and increase the forward voltage. Therefore, in the case of a semiconductor light emitting device using a group III nitride semiconductor, a method for minimizing the lattice constant mismatch between the n-type contact layer and the quantum well layer is required.

One object of the present invention is to provide a semiconductor light emitting device having improved luminance characteristics, and furthermore, to provide a method for manufacturing such a semiconductor light emitting device.

In order to realize the above technical problem, an aspect of the present invention is to cover at least a portion of the first conductive semiconductor layer having a concave-convex pattern having a concave portion and a convex portion on at least one surface thereof, and a bottom surface of the concave portion, At least a portion of the side surface is formed of an insulating layer, an intermediate layer formed of a material having a lattice constant larger than the material forming the first conductivity-type semiconductor layer, and covering the upper surface and side surfaces of the uneven pattern, and on the intermediate layer Provided is a semiconductor light emitting device comprising an active layer formed and a second conductive semiconductor layer formed on the active layer.

In an embodiment of the present invention, the active layer includes a structure in which one or more quantum well layers and quantum barrier layers are alternately disposed, and the first conductive semiconductor layer is made of GaN, and the quantum well layer and the intermediate layer Silver is made of InGaN, and at least one of the quantum well layers may have a larger In content than the intermediate layer.

In one embodiment of the present invention, the active layer includes a structure in which the at least one quantum well layer and the quantum barrier layer are alternately arranged, the first conductivity type semiconductor layer is made of GaN, the quantum well layer and the The intermediate layer is made of InGaN, at least one of the quantum well layers may have the same In content as the intermediate layer.

In this case, one of the quantum barrier layers may be disposed between the intermediate layer and the intermediate layer among the quantum well layers.

In an embodiment of the present invention, the intermediate layer may further include a superlattice layer disposed between the active layer and two material layers having different compositions, which are alternately stacked.

In one embodiment of the present invention, the first conductivity-type semiconductor layer is made of GaN, the upper surface of the convex portion may be a C plane (C-plane).

In one embodiment of the present invention, a plurality of convex portions are formed, and may be arranged regularly so that the interval is constant with each other.

In one embodiment of the present invention, the convex portion may have a cylindrical shape.

On the other hand, another aspect of the present invention,

Forming a first conductive semiconductor layer having a concave-convex pattern having a concave portion and a convex portion on at least one surface thereof, and forming a dielectric layer to cover at least a portion of the bottom surface of the concave portion, and to expose at least a portion of the side surfaces of the concave-convex pattern Forming an intermediate layer formed of a material having a lattice constant greater than that of the material forming the first conductive semiconductor layer, and forming an active layer on the intermediate layer. It provides a semiconductor light emitting device manufacturing method comprising the step and forming a second conductivity-type semiconductor layer.

In an embodiment of the present disclosure, the forming of the active layer includes a process of alternately stacking one or more quantum well layers and quantum barrier layers, and the first conductive semiconductor layer is made of GaN, and the quantum well The layer and the intermediate layer may be made of InGaN, and at least one of the quantum well layers may have a larger In content than the intermediate layer.

In an embodiment of the present disclosure, the forming of the active layer includes a process of alternately stacking one or more quantum well layers and quantum barrier layers, and the first conductive semiconductor layer is made of GaN, and the quantum well The layer and the intermediate layer may be made of InGaN, and at least one of the quantum well layers may have the same In content as the intermediate layer.

In this case, in the forming of the active layer, one of the quantum barrier layers may be disposed between the intermediate layer and the intermediate layer among the quantum well layers.

In one embodiment of the present invention, between the forming of the intermediate layer and the step of forming the active layer, forming a superlattice layer formed by alternately stacking two or more material layers of different compositions on the intermediate layer It may further comprise a step.

In an embodiment of the present disclosure, the forming of the first conductivity-type semiconductor layer may include the first conductivity-type semiconductor layer made of GaN, and the upper surface of the convex portion may be a C plane. have.

In the case of the semiconductor light emitting device proposed by the present invention, the light emitting efficiency can be improved by using the intermediate layer grown through the concave-convex pattern on the first conductive semiconductor layer.

1 is a cross-sectional view schematically showing a semiconductor light emitting device according to an embodiment of the present invention.
2 is a perspective view schematically showing an uneven pattern in the semiconductor light emitting device according to the embodiment of the present invention.
3 is a cross-sectional view schematically showing a semiconductor light emitting device according to another embodiment of the present invention.
4 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention.
5 to 9 are cross-sectional views schematically illustrating a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.
10 is a cross-sectional view illustrating in detail a first conductive semiconductor layer and an intermediate layer grown thereon in a semiconductor light emitting device according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Further, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

1 is a cross-sectional view schematically showing a semiconductor light emitting device according to an embodiment of the present invention, and FIG. 2 is a perspective view schematically showing the shape of the uneven pattern 13 in the semiconductor light emitting device shown in FIG. . In this case, it should be noted that some of the components of FIG. 2 are shown in dotted lines to specifically illustrate the shape of the uneven pattern 13.

Referring to FIG. 1, a semiconductor light emitting device according to an exemplary embodiment of the present invention may include a substrate 11, a first conductive semiconductor layer 12, an intermediate layer 15, and the like sequentially grown on the substrate 11. It may be formed to have a basic structure including the active layer 16 and the second conductivity type semiconductor layer 17. In this case, a portion of the upper surface of the first conductive semiconductor layer 12 may have a concave-convex pattern 13 having a concave portion and a convex portion, and the bottom surface of the concave portion may be provided in the form of the dielectric layer 14. have.

The substrate 11 is provided as a substrate for semiconductor growth, and a substrate made of an electrically insulating and conductive material such as sapphire, SiC, MgAl 2 O 4 , MgO, LiAlO 2 , LiGaO 2 , GaN, or the like may be used. In this case, it is most preferable to use the electrically insulating sapphire, sapphire is Hexa-Rhombo R3c symmetry crystals of the c-axis and a-axis lattice constants of 13.001Å and 4.758, respectively It has a C (0001) plane, an A (1120) plane, an R (1102) plane, and the like. In this case, the C surface is relatively easy to grow the nitride thin film, and can be mainly used as a substrate for nitride growth because it is stable at high temperatures.

The first conductive semiconductor layer 12 may be made of a semiconductor doped with n-type impurities, but is not limited thereto. In addition, the first conductive semiconductor layer 12 may be a nitride semiconductor, preferably GaN.

In addition, an uneven pattern 13 may be formed on an upper surface of the first conductivity-type semiconductor layer 12. Referring to FIG. 2, the uneven patterns may have a side surface and an upper surface and a plurality of protruding shapes having a cylindrical shape. A convex portion and a concave portion that is an area between the convex portions may be provided. In the present embodiment, the shape of the convex portion is illustrated as a cylindrical shape, but as described below, a structure capable of growing the semiconductor layer in the horizontal direction on the surface of the convex portion is not necessarily limited thereto, and may be variously formed according to the embodiment. Could be.

Although not shown, a buffer layer may be formed between the substrate 11 and the first conductive semiconductor layer 12 to mitigate lattice mismatch. As such a buffer layer, a low temperature nucleus growth layer such as GaN or AlN having a thickness of several tens nm may be used, and the top surface may be grown to have a C surface.

The dielectric layer 14 is formed on the bottom of the concave portion so that other semiconductor layers are grown on the first conductivity type semiconductor layer 12 so that the semiconductor layer can be grown only on the surface of the convex portion. To ensure that high quality crystals can be obtained. In addition, the dielectric layer may preferably be made of SiO 2 .

In this case, the dielectric layer 14 may be formed on the upper surface of the first conductivity-type semiconductor layer 12 without being limited to a part thereof, as long as the bottom surface of the concave portion is omitted. In this way, a higher quality intermediate layer 15 may be obtained on the first conductivity type semiconductor layer 12.

The intermediate layer 15 is grown on the surface of the uneven pattern 13 of the first conductive semiconductor layer 12. In this case, it is preferable that the intermediate layer 15 is made of a material having a relatively higher constant constant than the material of the first conductive semiconductor layer 12, and more preferably, is laminated on the intermediate layer 15. It may have a lattice constant smaller than that of the semiconductor layer and larger than that of the first conductivity-type semiconductor layer 12.

For example, when the first conductivity type semiconductor layer 12 is made of GaN (a axis: 3.191 / c axis: 5.185), the intermediate layer 15 may be formed of InGaN having a larger lattice constant. In this case, the lattice constant of the InGaN may vary depending on the In content, but preferably has a lattice constant smaller than InN (a-axis: 3.545 / c-axis: 5.703).

By doing so, it is possible to obtain an effect of minimizing the compressive stress applied to the intermediate layer 15, which will be described in detail with reference to FIG.

First, the concave-convex pattern 13 provided in the present embodiment has the convex portions exposed between the dielectric layers 14, and the convex portions have the upper and side surfaces as described above.

In this case, as shown, the upper surface of the convex portion is preferably provided to be the C surface of GaN, the intermediate layer 15 made of InGaN on the C surface may be grown in the vertical direction. Here, InGaN has a relatively large lattice constant (i.e., a-axis length) compared to GaN (shown by dotted lines in the drawing), but in the present embodiment, it grows in the same size to match the lattice constant of GaN, which is a growth nucleus. In the figure, a compressive strain (s1) occurs in the horizontal direction due to such a difference in lattice constant, and such compressive distortion has an adverse effect on the crystal growth quality of the semiconductor layer.

On the other hand, as shown, the side of the convex portion is preferably provided to be the A surface of the GaN, the intermediate layer 15 made of InGaN on the A surface may be grown in the horizontal direction. Here, InGaN has the same lattice constant than GaN, but unlike the upper surface of the convex portion, InGaN can be understood to mean that the c-axis length is larger than that of GaN (shown as dotted lines and solid lines in the drawing as described above). box).

That is, InGaN laterally grown on the side of the convex portion has a compression distortion s2 similar to InGaN grown on the upper surface of the convex portion, but the direction may be different in that the c-axis direction (vertical direction).

As such, when the intermediate layer 15, which is an InGaN layer, is formed on the first conductivity-type semiconductor layer 12, which is a GaN layer on which the uneven pattern 13 is formed, the intermediate layer 15 grown in a relatively flat upper region of the convex portions. Will receive compression distortion in the horizontal direction. The intermediate layer 15 grown in the lateral region of the convex portion which may be provided with a relatively steep slope and an angle closer to the A plane than the C plane of GaN may continue to grow to the area where the compressive distortion in the horizontal direction is reduced. have.

Thus, in the intermediate layer 15, the compressive distortion in the horizontal direction still exists in some regions (i.e., the upper region of the upper surface of the convex portion), while in the other at least some regions (i.e., the upper region of the concave portion), the compressive distortion is not. As a result, the compressive distortion of the intermediate layer 15 is reduced as a whole, and thus, other layers grown thereon can be made of high quality.

The active layer 16 is formed on the intermediate layer 15, and emits light having a predetermined energy by recombination of electrons and holes, and a quantum well layer and a quantum barrier layer alternately stacked with each other. MQW) structure, preferably, the structure in which the quantum well layer is InGaN, the quantum barrier layer is GaN.

In addition, when the intermediate layer 15 is formed of InGaN, at least one of the quantum well layers may be formed of InGaN having a relatively higher In content than the intermediate layer 15. In this way, the stress difference can be minimized by gradually increasing the difference in lattice constant from the first conductive semiconductor layer 12 to the active layer, and the intermediate layer can function as an electron injection layer (EIL) having an electron injection function. There will be.

The second conductivity-type semiconductor layer 17 may have the same composition as the first conductivity-type semiconductor layer 12, but is not limited thereto, and may be formed of a p-doped semiconductor material, and preferably made of GaN. Can be.

Meanwhile, the first, second and second conductive semiconductor layers 12 and 17 and the active layer 16 constituting the light emitting structure may include metal organic chemical vapor deposition (MOCVD) and hydrogen vapor deposition (Hydride). It can be grown using processes known in the art, such as Vapor Phase Epitaxy, 'HVPE'), Molecular Beam Epitaxy (MBE), and the like.

In addition, although not shown, electrodes electrically connected to the first and second conductivity-type semiconductor layers 12 and 17 may be formed, respectively, and may serve to supply power applied from the outside.

3 is a cross-sectional view schematically showing a semiconductor light emitting device according to another embodiment of the present invention. Referring to FIG. 3, a superlattice layer 38, which is similar to the structure of the semiconductor light emitting device described with reference to FIG. 1, but forms a superlattice structure between the intermediate layer 35 and the active layer 36, is disposed. There is a difference in that.

In this case, it is preferable that the superlattice layer 38 has a structure in which InN layers and In x Ga 1- x N (0 = x <1) layers are alternately stacked. These layers are preferably doped with impurities of the same type as the first conductive semiconductor layer 12, for example, may be doped with n-type impurities, in which case the intermediate layer has a higher impurity than the InN layer. It is preferred to be doped to concentration. Also, the InN layer may not be intentionally doped with impurities. These superlattice layers may be formed by repeatedly supplying and blocking Ga sources, and may have different growth temperatures of the InN layer and the In x Ga 1- x N (0 = x <1) layer.

Impurities doped in the superlattice layer 38, such as Si, prevent the transfer of potentials induced in the lower layer to the upper layer. Accordingly, the crystallinity of the active layer 36 formed on the superlattice layer 38 can be improved.

On the other hand, the thickness of each layer in the superlattice layer 38 may be formed to a thickness of less than 10nm, the overall thickness of the superlattice layer 38 is not particularly limited, but if excessively thick may increase the operating voltage It is preferable that the total thickness of the active layer 36 be about 100 to 150 nm or less. In addition, the InxGa 1-x N layer can be made thicker than the InN layer. Furthermore, by thickening the doped In x Ga 1 - x N layer, the resistance can be increased to help current dispersal.

Meanwhile, in the present embodiment, only a configuration in which a superlattice layer, which is a semiconductor layer forming a superlattice structure, is formed between the intermediate layer 35 and the active layer 36, is not necessarily limited thereto, and a GaN layer is disposed instead of the superlattice structure. In addition, various modifications may be made to reduce the strain between the first conductive semiconductor 32 layer and the intermediate layer 35 and the active layer 36.

In the present embodiment, the InN / In x Ga 1- x N (0 = x <1) superlattice layer is illustrated, but is not necessarily limited thereto. For example, InN / In x Ga 1- x N ( 0 <x <1) / GaN superlattice layers are also possible.

4 is a schematic cross-sectional view of a semiconductor light emitting device according to another embodiment of the present invention.

Referring to FIG. 4, the structure is similar to that of the semiconductor light emitting device described with reference to FIGS. 1 to 3, except that the active layer 46 is disposed directly on the top surface of the first conductive semiconductor layer 42. That is, the concave-convex pattern 43 and the dielectric layer 44 are formed on the first conductivity-type semiconductor layer 42 formed of GaN whose upper surface is C surface, and the intermediate layer including the region grown laterally through the convex portion is the first quantum of the active layer. The first quantum well layer 461, which is a well layer, may be provided to alternately stack a quantum barrier layer and a quantum well layer sequentially thereon to form an active layer. In this case, the first quantum well layer 461 may be provided as an In x Ga 1 - x N layer (x <0.2).

5 to 9 are cross-sectional views schematically illustrating a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

First, referring to FIG. 5, the first conductivity type semiconductor layer 52 is formed on the substrate 51. In this case, the first conductivity-type semiconductor layer 52 is an n-type semiconductor layer doped with n-type, may be provided as GaN, dopants used for doping, Si, Ge, Se, Te or C, etc. Can be used and double Si is representatively used. The first conductive semiconductor layer 52 may be formed of, for example, a metal organic chemical vapor deposition (MOCVD) method, a molecular beam deposition method (MBE), or a hydrogen compound vapor deposition method (HVPE). It may be formed by growing on the substrate 51 using a known deposition process.

6 and 7, a mask layer 59 is formed on the first conductivity-type semiconductor layer 52, and the first conductivity-type semiconductor layer 52 is formed through the mask layer 59. By etching, a concave-convex pattern having a concave portion and a convex portion may be formed, and a dielectric layer 54 may be formed on the bottom of the concave portion.

8 and 9 together, the mask layer 59 is removed and an InGaN intermediate layer 55 having a larger lattice constant is grown on the top surface of the first conductivity-type semiconductor layer 52. In this case, the intermediate layer 55 may be grown in the horizontal direction on the side of the uneven pattern to reduce the compression distortion due to the lattice constant difference and to improve the luminous efficiency.

In the present exemplary embodiment, the intermediate layer 55 is stacked on the first conductive semiconductor layer 52. However, as illustrated in FIG. 4, the first quantum well layer is formed on the first conductive semiconductor layer. Such modifications will be readily apparent to those of ordinary skill in the art.

In addition, although not shown, the active layer may be completed by repeatedly stacking GaN / intermediate layers on the intermediate layer 55. In addition, a second conductive semiconductor layer, first and second electrodes may be further formed on the active layer to complete a semiconductor light emitting device.

In addition, a semiconductor layer forming a GaN layer or a superlattice structure may be further formed between the intermediate layer 55 and the active layer.

The present invention is not limited by the above-described embodiments and the accompanying drawings, but is defined by the appended claims. Therefore, it will be apparent to those skilled in the art that various forms of substitution, modification, and alteration are possible without departing from the technical spirit of the present invention described in the claims, and the appended claims. Will belong to the technical spirit described in.

11, 31, 41, and 51: substrates 12, 32, 42, and 52: first conductive semiconductor layer
13, 33, 43, 53: uneven pattern 14, 34, 44, 54: dielectric layer
15, 35, 55: intermediate layer 461: first quantum well layer
17, 37, 47: second conductive semiconductor layer 38: superlattice layer
59: mask layer

Claims (14)

At least A first conductivity type semiconductor layer having a concave-convex pattern having concave and convex portions on one surface thereof;
A dielectric layer covering at least a portion of a bottom surface of the concave portion and exposing at least a portion of side surfaces of the uneven pattern;
An intermediate layer formed to cover the top and side surfaces of the uneven pattern and having a lattice constant greater than that of the first conductive semiconductor layer;
An active layer formed on the intermediate layer; And
A second conductivity type semiconductor layer formed on the active layer;
Semiconductor light emitting device comprising a. The method of claim 1,
The active layer includes a structure in which one or more quantum well layers and a quantum barrier layer are alternately arranged.
The first conductive semiconductor layer is made of GaN, the quantum well layer and the intermediate layer is made of InGaN, wherein at least one of the quantum well layer is a semiconductor light emitting device, characterized in that more than the intermediate layer. The method of claim 1,
The active layer includes a structure in which the at least one quantum well layer and the quantum barrier layer are alternately disposed, wherein the first conductivity type semiconductor layer is made of GaN, and the quantum well layer and the intermediate layer are made of InGaN. At least one of the quantum well layers is a semiconductor light emitting device, characterized in that the same content as the intermediate layer. The method of claim 3,
And one of the quantum barrier layers is disposed between the intermediate layer and the intermediate layer among the quantum well layers. The method of claim 1,
And a superlattice layer disposed between the intermediate layer and the active layer, wherein two material layers having different compositions are alternately stacked. The method of claim 1,
The first conductive semiconductor layer is made of GaN, the upper surface of the convex portion is a semiconductor light emitting device, characterized in that the C plane (C-plane). The method of claim 1,
A plurality of convex portions are formed, the semiconductor light emitting device, characterized in that arranged regularly so that the interval is constant. The method of claim 1,
And said convex portion has a cylindrical shape. Forming a first conductivity-type semiconductor layer having a concave-convex pattern having a concave portion and a convex portion on at least one surface;
Forming a dielectric layer to cover at least a portion of the bottom surface of the concave portion and expose at least a portion of the side surfaces of the concave-convex pattern
Forming an intermediate layer formed of a material having a lattice constant greater than that of the material forming the first conductivity-type semiconductor layer and covering the top and side surfaces of the uneven pattern;
Forming an active layer on the intermediate layer; And
Forming a second conductivity type semiconductor layer;
Gt; a &lt; / RTI &gt; semiconductor light emitting device. 10. The method of claim 9,
Forming the active layer includes a step of alternately stacking one or more quantum well layer and quantum barrier layer,
The first conductivity type semiconductor layer is made of GaN, the quantum well layer and the intermediate layer is made of InGaN, at least one of the quantum well layer semiconductor light emitting, characterized in that the In content is larger than the intermediate layer Device manufacturing method. 10. The method of claim 9,
Forming the active layer includes a step of alternately stacking one or more quantum well layer and quantum barrier layer,
The first conductivity type semiconductor layer is made of GaN, the quantum well layer and the intermediate layer is made of InGaN, at least one of the quantum well layer is a semiconductor light emitting device, characterized in that the same as the middle layer Manufacturing method. The method of claim 11,
The forming of the active layer may include disposing one of the quantum barrier layers between the intermediate layer and the intermediate layer among the quantum well layers. 10. The method of claim 9,
And forming a superlattice layer including an InN layer and an InGaN layer on the intermediate layer between the forming of the intermediate layer and the forming of the active layer. The method of claim 1,
In the forming of the ninth conductive semiconductor layer, the first conductive semiconductor layer is made of GaN, and the upper surface of the convex portion is a C-plane (C-plane). .
KR1020110015104A 2011-02-21 2011-02-21 Semiconductor light emitting device and method for manufacturing the same KR20120095653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020110015104A KR20120095653A (en) 2011-02-21 2011-02-21 Semiconductor light emitting device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020110015104A KR20120095653A (en) 2011-02-21 2011-02-21 Semiconductor light emitting device and method for manufacturing the same

Publications (1)

Publication Number Publication Date
KR20120095653A true KR20120095653A (en) 2012-08-29

Family

ID=46886047

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020110015104A KR20120095653A (en) 2011-02-21 2011-02-21 Semiconductor light emitting device and method for manufacturing the same

Country Status (1)

Country Link
KR (1) KR20120095653A (en)

Similar Documents

Publication Publication Date Title
US9257599B2 (en) Semiconductor light emitting device including hole injection layer
KR101012515B1 (en) Nitride semiconductor light emitting device
US9048389B2 (en) Light emitting diode
US20130248817A1 (en) White light emitting diode
JP2010153838A (en) Nitride semiconductor light emitting element and manufacturing method of the same
KR20100093872A (en) Nitride semiconductor light emitting device and manufacturing method thereof
JP6482573B2 (en) Nitride semiconductor light emitting device
KR20130012375A (en) Semiconductor light emitting device and manufacturing method of the same
KR20120029270A (en) Light emitting device including graphene layer
US7781248B2 (en) Method of manufacturing nitride semiconductor light emitting device and nitride semiconductor light emitting device manufactured using the method
KR20110117963A (en) Nitride semiconductor light emitting device and manufacturing method of the same
CN115498083A (en) Light emitting diode epitaxial structure and light emitting diode
TWI545798B (en) Nitride semiconductor light emitting device and manufacturing method thereof
KR102249624B1 (en) Light emitting structure and Light emitting device having the same
KR101018116B1 (en) Nitride Semiconductor Device and Manufacturing Method of The Same
KR20100024154A (en) Light emitting diode
KR20130011918A (en) Semiconductor light emitting device
KR20120095653A (en) Semiconductor light emitting device and method for manufacturing the same
KR20130101299A (en) Semiconductor light emitting device and method of manufacturing the same
KR20130092829A (en) Fabrication method of nitride semiconductor light emitting device
KR100730752B1 (en) Compound semiconductor having supper lattice layer and light emitting diode using the same and method for fabricating the ligth emitting diode
KR101417051B1 (en) A light emitting diode and a method of fabricating the same
KR20110082268A (en) Nitride semiconductor light emitting device
KR101414652B1 (en) Nitride semiconductor light emitting device
TWI420696B (en) Light-emitting device and the manufacturing method thereof

Legal Events

Date Code Title Description
N231 Notification of change of applicant
E902 Notification of reason for refusal
E601 Decision to refuse application