KR20110138924A - High efficiency light emitting diode - Google Patents

Abstract

PURPOSE: A high efficiency light emitting diode is provided to improve the current distribution property of a semiconductor laminate structure by adopting a horizontal wire part along the edge of semiconductor laminate structure. CONSTITUTION: In a high efficiency light emitting diode, a semiconductor laminate structure(50) is located on a supporting substrate(71). The semiconductor laminate structure comprises a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer. A p- electrode(61) is arranged between the p-type compound semiconductor layer and the supporting substrate. An n- electrode(69) is connected to the n-type bonding pad through a wire. A bonding metal(73) combines the semiconductor laminate structure and the supporting substrate.

Description

High Efficiency Light Emitting Diodes {HIGH EFFICIENCY LIGHT EMITTING DIODE}

The present invention relates to a light emitting diode, and more particularly, to a gallium nitride-based high efficiency light emitting diode having a growth substrate removed by applying a substrate separation process.

In general, nitrides of group III elements, such as gallium nitride (GaN) and aluminum nitride (AlN), have excellent thermal stability and have a direct transition type energy band structure. It is attracting much attention as a substance. In particular, blue and green light emitting devices using indium gallium nitride (InGaN) have been used in various applications such as large-scale color flat panel display devices, traffic lights, indoor lighting, high density light sources, high resolution output systems, and optical communications.

Such a nitride semiconductor layer of Group III elements is difficult to fabricate homogeneous substrates capable of growing them, and therefore, such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), etc., on heterogeneous substrates having a similar crystal structure. Is grown through the process. As a hetero substrate, a sapphire substrate having a hexagonal structure is mainly used. However, sapphire is an electrically insulator, thus limiting the light emitting diode structure. Accordingly, recently, epitaxial layers, such as nitride semiconductor layers, are grown on dissimilar substrates such as sapphire, bonding supporting substrates to the epitaxial layers, and then separating the dissimilar substrates using a laser lift-off technique. Techniques for producing high efficiency light emitting diodes with structures have been developed (see, eg, US Pat. No. 7,704,763).

1 is a cross-sectional view illustrating a conventional light emitting diode.

Referring to FIG. 1, in the conventional vertical light emitting diode, an n-type layer 23, an active layer 25, and a p-type layer 27 of a gallium nitride series are sequentially formed on a growth substrate (not shown). form a p-type electrode 48 on the p-type layer 27, flip-bond the p-type electrode to the Si submount 41 through the bonding metal 43, and then remove the growth substrate and expose the It is produced by forming an n-electrode on the n-type layer 23. On the other hand, an n-type electrode 45 is formed on the lower surface of the Si submount 41. Further, US Patent No. 7,704,763 improves light extraction efficiency by forming a rough surface using dry or PEC etching techniques on the exposed n-type layer 23 surface.

However, the light emitting diode according to the prior art is used as a pad for the n-type electrode to bond the wire. Because of this, during the wire bonding process, a force is applied to the n-type electrode 37, which can deform or damage the epi layers 20 having a relatively very thin thickness of 10 mu m or less. Furthermore, the n-type electrode 37 needs to be formed relatively large with a size sufficient to bond the wire. Since the n-type electrode 37 absorbs light to cause light loss, the light loss increases as the size of the n-type electrode 37 formed on the light extraction surface increases.

On the other hand, the prior art forms the n-type electrode 45 in the bottom surface of the Si submount 41, and uses this as another pad. Unlike the pad for bonding the wire, the n-type electrode 45 is electrically connected to the printed circuit board or the lead through a conductive adhesive such as Ag paste. However, in some cases, it is necessary to separately form pads for bonding wires as p-type pads electrically connected to the p-type electrode 39. At this time, it is necessary to position the pads for bonding the wire at the same level, but in the prior art, it is difficult to place the pads at the same level because the n-type electrode 37 is located above the epi layers 20. do.

In addition, since the p-type electrode 39 contacts almost the entire surface of the p-type layer 27, the current can be evenly distributed to the p-type layer 27 through the p-type electrode 39. In contrast, since the n-type electrode 37 is formed on the light extraction surface, it is formed on a portion of the n-type layer 23, and thus it is difficult to evenly distribute current in the n-type layer 23. The prior art discloses a technique for distributing current by using extensions extending from the n-type electrode 37. However, current dispersion using extensions in a large area chip having a chip size of, for example, 1 × 1 mm 2 or more is limited. .

United States Patent Application Publication No. US 7,704,763

An object of the present invention is to provide a high-efficiency light emitting diode that can prevent the epi layer from being damaged by the force applied to the pad when bonding the wire.

Another object of the present invention is to provide a high efficiency light emitting diode that can improve light extraction efficiency by reducing light absorption by an electrode or pad.

Another object of the present invention is to provide a high-efficiency light emitting diode that can easily perform a wire bonding process by placing the n-type pad and the p-type pad at approximately the same level.

Another problem to be solved by the present invention is to provide a high efficiency light emitting diode that can improve the current dispersion performance to improve the light extraction efficiency.

A light emitting diode according to an aspect of the present invention, the support substrate; A semiconductor laminate structure on the support substrate, the semiconductor laminate structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; A first electrode disposed between the support substrate and the semiconductor stack structure and having ohmic contact with the semiconductor stack structure, and having an area exposed to the outside of the semiconductor stack structure; A first bonding pad positioned on an area exposed to the outside of the first electrode and electrically connected to the first electrode; A second bonding pad positioned on an area exposed to the outside of the first electrode and insulated from the first electrode; A second electrode on the semiconductor laminate; And a wire connecting the second electrode and the second bonding pad.

By forming the first bonding pads and the second bonding pads on the first electrodes, they can be arranged at almost the same level. In addition, since the second bonding pad is formed on the first electrode away from the second electrode, the semiconductor laminate structure may be prevented from being damaged in the wire bonding process, and the second electrode may be formed to be relatively narrow. It is possible to reduce the light absorption of the two electrodes.

The support substrate need not be conductive, and may be, for example, a sapphire substrate. By using a rigid sapphire substrate as a support substrate, it is possible to prevent deformation of the light emitting diode.

Meanwhile, the first electrode may include a reflective layer, and may further include a protective metal layer for protecting the reflective layer. In addition, the reflective layer may be buried between the protective metal layer and the semiconductor laminate, and the protective metal layer may be exposed to the outside.

The light emitting diode may further include an insulating layer interposed between the second bonding pad and the first electrode. The second bonding pad is insulated from the first electrode by the insulating layer.

In addition, the light emitting diode may further include an insulating layer interposed between the wiring and the semiconductor laminate. Wiring is insulated from the side of the semiconductor laminate structure by the insulating layer. Further, the insulating layer may be a distributed Bragg reflector (DBR). Therefore, light generated in the active layer can be prevented from being absorbed by the wiring.

The p-type compound semiconductor layer may be located closer to the support substrate side than the n-type compound semiconductor layer, and the first electrode may be in ohmic contact with the p-type compound semiconductor layer.

On the other hand, the wiring line may extend from the horizontal wiring portions and the horizontal wiring portions extending in opposite directions from the second bonding pads along edges of the semiconductor laminate structure on an area exposed to the outside of the first electrode. It may include a vertical wiring portion connected to the second electrode on the semiconductor laminate structure along the side. Furthermore, the second electrode may be composed of a plurality of portions spaced apart from each other on the semiconductor laminate structure. The vertical wiring portions are connected to the plurality of portions of the second electrode.

According to another aspect of the invention, the support substrate; A semiconductor laminate structure on the support substrate, the semiconductor laminate structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; A first electrode disposed between the support substrate and the semiconductor stack structure and having ohmic contact with the semiconductor stack structure, and having an area exposed to the outside of the semiconductor stack structure; A plurality of second bonding pads positioned on an area exposed to the outside of the first electrode and insulated from the first electrode; A second electrode on the semiconductor laminate; And wires connecting the second electrode and the second bonding pads. By arranging a plurality of second bonding pads on the first electrode and connecting the second bonding pads to the second electrode through wires, the current flowing through the semiconductor stacked structure may be dispersed.

Further, at least one of the wirings may include a horizontal wiring portion extending from a second bonding pad along an edge of the semiconductor laminate structure on a region exposed to the outside of the first electrode and a side surface of the semiconductor laminate structure from the horizontal wiring portion. Accordingly, it may include a vertical wiring portion connected to the second electrode on the semiconductor laminate structure.

According to the present invention, it is possible to provide a high efficiency light emitting diode that can easily perform a wire bonding process by placing a plurality of pads at approximately the same level. Furthermore, by forming the electrodes and the bonding pads apart from each other on the semiconductor laminate structure, light absorption by the bonding pads may be reduced to improve light extraction efficiency, and the semiconductor laminate structure may be prevented from being damaged in the wire bonding process. Furthermore, by adopting horizontal wiring portions extending from the bonding pads along the edges of the semiconductor laminate, current dispersal performance in the semiconductor laminate can be improved.

1 is a cross-sectional view illustrating a light emitting diode having a vertical structure according to the prior art.
2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.
3 is a perspective view illustrating a light emitting diode according to still another embodiment of the present invention.
4 is a perspective view illustrating a light emitting diode according to still another embodiment of the present invention.
5 is a perspective view illustrating a light emitting diode according to still another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, the same reference numerals denote the same components, and the width, length, thickness, etc. of the components may be exaggerated for convenience.

2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 1, the light emitting diode includes a support substrate 71, a bonding metal 73, a semiconductor stack 50, p-electrodes 59 and 61, n-electrode 69, and insulating layer 63. , p-bonding pad 65, n-bonding pad 67, and wiring 68.

The support substrate 71 is separated from the growth substrate for growing the compound semiconductor layers and is a secondary substrate attached to the compound semiconductor layers that have already been grown. The support substrate 71 may be a sapphire substrate, but is not limited thereto, and may be another kind of insulating or conductive substrate. In particular, when the sapphire substrate is used as the growth substrate, since it has the same thermal expansion coefficient as that of the growth substrate, wafer bending can be prevented when bonding the support substrate and removing the growth substrate, and also the semiconductor laminate structure 50 can be firmly I can support it.

The semiconductor stacked structure 50 is disposed on the support substrate 51 and includes a p-type compound semiconductor layer 57, an active layer 55, and an n-type compound semiconductor layer 53. Here, the p-type compound semiconductor layer 57 is located closer to the support substrate 71 side than the n-type compound semiconductor layer 53, similar to a general vertical light emitting diode. The semiconductor laminate 50 is positioned on a portion of the support substrate 71. That is, the support substrate 71 has a relatively large area compared to the semiconductor laminate 50, and the semiconductor laminate 50 is located in an area surrounded by the edge of the support substrate 71.

The n-type compound semiconductor layer 53, the active layer 55, and the p-type compound semiconductor layer 57 may be formed of a III-N series compound semiconductor, such as (Al, Ga, In) N semiconductor. The n-type compound semiconductor layer 53 and the p-type compound semiconductor layer 57 may be a single layer or multiple layers, respectively. For example, the n-type compound semiconductor layer 53 and / or the p-type compound semiconductor layer 57 may include a contact layer and a cladding layer, and may also include a superlattice layer. In addition, the active layer 55 may have a single quantum well structure or a multiple quantum well structure. Since the n-type compound semiconductor layer 53 having a relatively small resistance is located on the opposite side of the support substrate 71, it is easy to form a rough surface on the top surface of the n-type compound semiconductor layer 53. The extraction efficiency of light generated in the active layer 55 is improved.

The p-electrodes 59 and 61 are positioned between the p-type compound semiconductor layer 57 and the support substrate 71 and make ohmic contact with the p-type compound semiconductor layer 57. The p-electrode may include a reflective layer 59 and a protective metal layer 61, wherein the protective metal layer 61 surrounds the reflective layer 59 so that the reflective layer is embedded between the semiconductor stack 50 and the support substrate 71. Can be. The reflective layer 59 may be formed of, for example, a reflective metal such as Ag, and the protective metal layer 61 may be formed of, for example, Ni. The p-electrode, eg, the protective metal layer 61, may be located on the front surface of the support substrate 71, and thus, the protective metal layer 61 may have a region exposed to the outside of the semiconductor stacked structure 50. .

The p-type bonding pad 65 may be positioned on the p-electrode exposed to the outside of the semiconductor laminate 50, for example, the protective metal layer 61. The p-type bonding pad 65 is electrically connected to the p-type compound semiconductor layer 57 through the p-electrodes 59 and 61.

In addition, an n-type bonding pad 67 is positioned on the p-electrode exposed to the outside of the semiconductor laminate 50, for example, the protective metal layer 61. The n-type bonding pad 67 is electrically insulated from the p-electrodes 59 and 61 by the insulating layer 63.

On the other hand, the n-electrode 69 is located on the semiconductor laminate 50 and is electrically connected to the n-type compound semiconductor layer 53. The n-electrode 69 is connected to the n-type bonding pad 67 through the wiring 68, and the wiring 68 is insulated from the side of the semiconductor stacked structure 50 by the insulating layer 63. The wiring 68, the n-type bonding pad 67, and the n-electrode 69 may be formed together by the same material by the same process, but are not limited thereto and may be formed of different materials.

Meanwhile, the insulating layer 63, in particular, the insulating layer 63 formed on the side surface of the semiconductor laminate 50 may be a distributed Bragg reflector (DBR). In this case, the insulating layer 63 reflects the light emitted from the active layer 55 to the wiring 68, thereby preventing the light from being absorbed by the wiring 68.

Meanwhile, the bonding metal 73 is positioned between the support substrate 71 and the p-electrodes 59 and 61 to bond the semiconductor stack 30 and the support substrate 71 to each other. Bonding metal 73 may be formed using eutectic bonding, for example, with Au—Sn.

3 is a perspective view illustrating a light emitting diode according to still another embodiment of the present invention.

Referring to FIG. 3, the light emitting diode according to the present embodiment is generally similar to the light emitting diode described with reference to FIG. 2, but there is a difference in the arrangement of the wiring 88 and the electrode 69.

That is, the wiring 68 of FIG. 2 is directly connected to the second electrode 69 along the side surface of the semiconductor laminate 50 from the n-type bonding pad 67. In contrast, in the present embodiment, the wiring 88 has a horizontal wiring portion 88a extending along the edge of the semiconductor laminate 50 from the n-type bonding pad 67 and an electrode (from the horizontal wiring portion 88a). And a vertical wiring portion 88b extending to 63. Further, the wiring 88 may extend from the bonding pads 67 to both sides along the edge of the semiconductor laminate 50.

For example, the horizontal interconnections 88a may extend from both sides of the n-type bonding pad 67 along the edge of the semiconductor laminate 50, and the vertical interconnects 88b may extend between the semiconductor laminate 50. And may extend from the horizontal wiring portions 88a so as to face each other. For example, when the semiconductor stack 50 has a square pillar shape, the vertical interconnections 88b may be positioned on side surfaces of the semiconductor stack 50 that face each other.

On the other hand, the wiring 88 is insulated from the p-electrodes 59 and 61 and the semiconductor laminated structure 50 by the insulating layer 63. As illustrated in FIG. 3, the insulating layer 63 may cover the entire side surface of the semiconductor stacked structure 50, but is not limited thereto and may partially cover the semiconductor stacked structure. In addition, the insulating layer 63 may be formed of a distributed Bragg reflector (DBR).

Meanwhile, the n-electrode 63 may be electrically connected to each other on the semiconductor stack 50, but may include a plurality of portions spaced apart from each other, as shown in FIG. 3. The plurality of portions of the n-electrode may be symmetrically disposed to face each other, and vertical interconnections 88b may be connected to the spaced portions.

According to the present embodiment, since the horizontal wiring portions 88a extend from both sides from the n-type bonding pad 67, current is previously distributed in the horizontal wiring portions 88a and input to the n-electrode 63. Accordingly, since the current density input to the respective portions of the n-electrode 63 is reduced, the current input to the semiconductor stacked structure 50 can be dispersed.

In the present embodiment, it has been described that a single vertical wiring portion 88b extends from each horizontal wiring portion 88a, but as shown in FIG. 4, a plurality of vertical lines from each horizontal wiring portion 88a are shown. Extensions 88a may extend to connect to n-electrode 63.

5 is a perspective view illustrating a light emitting diode according to still another embodiment of the present invention.

Referring to FIG. 5, the light emitting diode according to the present embodiment is generally similar to the light emitting diode described with reference to FIG. 3, but the plurality of n-type bonding pads 97 are positioned on the p-electrodes 59 and 61. There is a difference. Furthermore, the support substrate 71 is conductive, such as a metal or a semiconductor, and the p-type bonding pad (65 in FIG. 3) is formed below or omitted from the support substrate 71.

The plurality of n-type bonding pads 97 are connected to the n-electrode 63 through the wirings 98. The wires 98 may be directly connected to the n-electrode 63 from each bonding pad 97. Alternatively, the wirings 98 may be connected to the n-electrode 63 through the horizontal wiring portions 98a and the vertical wiring portions 98b as shown in FIG. 5.

According to the present exemplary embodiment, by adopting a plurality of n-type bonding pads 97, currents may be input from the bonding pads 97 by dispersing, and thus, currents input to the semiconductor stacked structure 50 may be easily dispersed. have. Furthermore, by adopting the horizontal wiring portions 98a extending from both n-type bonding pads 97 to both sides, it is possible to disperse the current input to the n-electrode 63, thus allowing current in the semiconductor laminate 50 to be distributed. Easily dispersed

In the above-described embodiments, the p-type compound semiconductor layer 57 is described as being located closer to the support substrate 71 side than the n-type compound semiconductor layer 53, but the present invention is not limited thereto. It may be arranged in reverse. In this case, the n-electrode 69 and the n-type bonding pads 67 and 97 are polarized with the p-electrodes 59 and 61 and the p-type bonding pad 65, respectively.

Claims (13)

Support substrate;
A semiconductor laminate structure on the support substrate, the semiconductor laminate structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer;
A first electrode disposed between the support substrate and the semiconductor stack structure and having ohmic contact with the semiconductor stack structure, and having an area exposed to the outside of the semiconductor stack structure;
A first bonding pad positioned on an area exposed to the outside of the first electrode and electrically connected to the first electrode;
A second bonding pad positioned on an area exposed to the outside of the first electrode and insulated from the first electrode;
A second electrode on the semiconductor laminate; And
And a wire connecting the second electrode and the second bonding pad. The method according to claim 1,
The support substrate is a sapphire light emitting diode. The method according to claim 1,
The first electrode may include a reflective layer; And
A light emitting diode comprising a protective metal layer for protecting the reflective layer. The method according to claim 3,
The reflective layer is buried between the protective metal layer and the semiconductor laminate, the protective metal layer is exposed to the outside. The method according to claim 1,
Further comprising an insulating layer interposed between the second bonding pad and the first electrode,
The second bonding pad is insulated from the first electrode by the insulating layer. The method according to claim 5,
The light emitting diode further comprising an insulating layer interposed between the wiring and the semiconductor laminate. The method of claim 6,
The insulating layer is a light emitting diode DBR. The method according to claim 1,
The first electrode is in ohmic contact with the p-type compound semiconductor layer. The method according to claim 1,
The wiring lines may include horizontal wiring portions extending in opposite directions from the second bonding pads along edges of the semiconductor laminate structure on regions exposed to the outside of the first electrode; And
And vertical interconnections connected from the horizontal interconnections to a second electrode on the semiconductor laminate along a side of the semiconductor laminate. The method according to claim 9,
The second electrode includes a plurality of portions spaced apart from each other on the semiconductor laminate. Support substrate;
A semiconductor laminate structure on the support substrate, the semiconductor laminate structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer;
A first electrode disposed between the support substrate and the semiconductor stack structure and having ohmic contact with the semiconductor stack structure, and having an area exposed to the outside of the semiconductor stack structure;
A second bonding pad positioned on an area exposed to the outside of the first electrode and insulated from the first electrode;
A second electrode on the semiconductor laminate; And
A wire connecting the second electrode and the second bonding pad,
The wiring lines may include horizontal wiring portions extending in opposite directions from the second bonding pads along edges of the semiconductor laminate structure on regions exposed to the outside of the first electrode; And
And vertical interconnections connected from the horizontal interconnections to a second electrode on the semiconductor laminate along a side of the semiconductor laminate. Support substrate;
A semiconductor laminate structure on the support substrate, the semiconductor laminate structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer;
A first electrode disposed between the support substrate and the semiconductor stack structure and having ohmic contact with the semiconductor stack structure, and having an area exposed to the outside of the semiconductor stack structure;
A plurality of second bonding pads positioned on an area exposed to the outside of the first electrode and insulated from the first electrode;
A second electrode on the semiconductor laminate; And
A light emitting diode comprising wirings connecting the second electrode and the second bonding pads. The method of claim 12,
At least one of the wires may include a horizontal wire part extending from a second bonding pad along an edge of the semiconductor stacked structure on a region exposed to the outside of the first electrode; And
And a vertical wiring portion connected from the horizontal wiring portion to a second electrode on the semiconductor laminate structure along a side surface of the semiconductor laminate structure.

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