KR20100116047A - Imbedded printed circuit board within wire redistribution layer and method of fabricating the same - Google Patents

Abstract

PURPOSE: The wiring layer is formed selectively on the part embedded printed circuit board equipped with the redistribution layer and the layer in which the manufacturing method thereof silver part is mounted. CONSTITUTION: The part element is fixed to the redistribution layer(10) through the solder paste(40). In the bottom surface of the redistribution layer, the low dielectric substance layer(20) is arranged. The low dielectric substance layer is formed into the epoxy. The inner isolation layer(50) is formed at the upper part of the part element and low dielectric substance layer.

Description

Embedded printed circuit board with redistribution layer and method of manufacturing the same {Imbedded printed circuit board within wire redistribution layer and Method of fabricating the same}

The present invention relates to a component-embedded printed circuit board having a redistribution layer and a method of manufacturing the same. Specifically, the present invention relates to a method of embedding active and passive devices in a circuit board. Since the connection with the PCB circuit becomes very difficult, a redistribution layer is formed on the surface where the device is mounted, so that it can be applied to various device types, materials, and electrode sizes, and the design freedom of interlayer vias (Any -Layer Interstitial Via Hole).

A printed circuit board (PCB) is a printed circuit board pattern formed of a conductive material such as copper on an electrically insulating substrate, and refers to a board immediately before mounting an electronic component. In other words, in order to mount many kinds of electronic components on a flat plate, it means a circuit board in which a mounting position of each component is determined and a line pattern connecting the components is printed and fixed on the flat surface. Such printed circuit boards generally include a single layer PCB and a buildup substrate formed of multilayered PCBs, that is, a multilayer PCB substrate.

Moreover, unlike these multilayer PCB boards, embedded PCBs are commercially available, in which basic electronic components such as passive devices such as resistors, capacitors, and inductors, and active devices such as diodes and transistors are embedded on or inside the PCB. Miniaturization and cost reduction are implemented.

In order to manufacture the component embedded substrate, a method of connecting a component device and a substrate is largely a method using soldering and a method using a laser via and a plating process.

The method of connecting the PCB circuit by the laser via and the plating process is a technique using a conventional PCB interlayer connection technology, but there is an advantage in that it can be carried out collectively during the PCB manufacturing process. Due to the reduction of electrode size (200um → 100um), accurate machining has become difficult, and due to limited electrode materials, only devices with special electrodes of Cu / Ni, Cu, Au / Ni, and Au are applicable. .

 In addition, the method of connecting the device and the substrate using soldering is a method of connecting the inner layer pad and the solder using conventional surface mounting type (SMT) technology. As it is a widely used method, the technical stability and the range of devices that can be used are very wide. Since the sensitivity to the electrode size is low, it is easy to apply a micro component. As shown in FIG. 1, a general soldering method forms a mounting pad 2 on a copper clad laminate 1, prints a solder paste 4 on the mounting pad 2, and then the component device 5. It is done by fixing it.

However, when the Surface Mounting Type (SMT) method is applied, copper clad laminates (CCLs) of at least 40 μm are required, which reduces the degree of freedom of interlayer vias. I have reached the limit.

The present invention has been made to solve the above-described problems, an object of the present invention is to form a redistribution layer on the surface on which the device is mounted to be applied to various types of devices, materials, sizes of electrodes In addition, the present invention provides a component-embedded printed circuit board which can increase the design freedom of the Any-Layer Interstitial Via Hole.

The present invention provides a component-embedded printed circuit board having a redistribution layer, in which a redistribution layer is formed on a lower surface of a component-embedded printed circuit board in which a component is fixed. To provide.

In particular, the above-described printed circuit board is more preferably characterized in that it further comprises a low dielectric material layer between the redistribution layer and the printed circuit pattern. Here, the low dielectric material layer may be formed of epoxy. The low dielectric material layer enables stable connection of the electrodes of the component elements connected to the circuit pattern through the redistribution layer, and further prevents defects such as shorts between the electrodes when the fixing of the component elements is unstable. .

The printed circuit board according to the present invention includes an internal insulating layer on the redistribution layer, a first printed circuit pattern on the redistribution layer or the internal insulating layer, and any one of the first printed circuit patterns is the low Penetrating through the dielectric material layer is characterized in that connected to the redistribution layer. Due to the configuration of the redistribution layer, it is possible to freely connect the circuit of the minute thickness and the device electrode, and to increase the design freedom due to the selective arrangement of the redistribution layer.

In addition, the above-described first printed circuit pattern is provided with a redistribution layer, characterized in that selectively connected through at least one via hole coated with a plating material. This makes it possible to have a structure that can be connected between each printed circuit pattern when forming the double-sided printed circuit pattern.

In addition, the component-embedded printed circuit board having the redistribution layer according to the present invention can make the thickness of the printed circuit board itself much thinner than that of the conventional substrate, and the internal insulation layer on the redistribution layer inside the printed circuit board. And an auxiliary circuit board having at least one second printed circuit pattern inserted into the internal insulating layer. As a result, it is possible to provide a printed circuit board having a multilayer structure that can further increase autonomy of design of various component devices.

In the structure in which the auxiliary circuit board is inserted, any one of the second printed circuit patterns may be connected to the redistribution layer through the low dielectric material layer, or the second printed circuit pattern of the auxiliary circuit board may be formed of the second printed circuit pattern. It is possible to form a structure that is selectively connected to any one of the one printed circuit pattern through the via hole.

In the above-described component embedded printed circuit board according to the present invention, the material constituting the redistribution layer may be any single metal layer selected from Cu, Sn, Au, and Ni, or an alloy of two or more metals selected from among them, or It can be formed from a composite metal layer. In particular, in this case, the redistribution layer may be formed to a thickness of 5 ~ 20㎛.

The method for manufacturing a printed circuit board according to the present invention described above may be performed in the following configuration.

First, a first step of forming a redistribution layer on the copper foil composite layer and fixing the component elements on the redistribution layer, a second step of forming an internal insulating layer around the component element is fixed, and a copper foil layer on the internal insulating layer The manufacturing process may proceed to a step including laminating and processing the printed circuit and three steps of forming a circuit pattern and four steps.

In particular, the first step of the above-described process step, 1) compressing the copper foil composite layer and the carrier layer formed with copper foil on both sides of the low dielectric material layer and 2) patterning the redistribution layer on the upper copper foil of the copper foil composite layer Plating, and 3) printing solder paste on the redistribution layer and fixing the component elements.

In the above-described process step, the second step may include pressing at least one internal insulating layer having a cavity corresponding to the size of the component element on the low dielectric material layer, and at least one internal insulating layer having no cavity. It is preferably formed by the step of forming by pressing.

And the third step includes laminating the copper foil layer, a) removing the carrier layer of the copper foil composite layer, and b) a hole passing through the redistribution layer and the first printed circuit pattern layer or the first printed circuit pattern layer. And processing c) plating the inner surface of the hole.

Another embodiment of the manufacturing method of a component-embedded printed circuit board having a redistribution layer according to the present invention is as follows.

In the above-described steps 1 to 4, the second step may be formed by including an auxiliary circuit board having at least one second printed circuit pattern between the internal insulating layers.

In the process step according to another embodiment described above, the step 3 is a) removing the carrier layer of the copper foil composite layer and b) the redistribution layer and the first printed circuit pattern layer or the first and second printed circuit pattern Processing a hole communicating with, c) may be formed to include a step of plating the inner surface of the hole.

In the manufacturing process according to another embodiment described above, the redistribution layer is any one metal layer selected from Cu, Sn, Au, Ni, or an alloy or composite metal layer of two or more metals selected from these. Of course, it can form.

According to the present invention, by providing a component embedded substrate having a redistribution layer on the surface on which the component device is mounted, the component device is fixed through the surface mounting process to increase the design freedom of interlayer vias.

Specifically, by selectively forming a redistribution layer on the layer on which the component is mounted, it is possible to fix the device at a precise position more precisely and effectively even if the size of the electrode is small, and to freely connect the component elements using the redistribution layer. It is possible to increase the design chair induction.

In particular, since the redistribution layer is formed on the lower surface of the part in which the component device is mounted, there is an advantage in that the component device can be completely encapsulated inside the substrate.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation of the present invention.

2A and 2B are cross-sectional views illustrating an internal configuration of a component embedded printed circuit board having a redistribution layer according to the present invention.

In the description with reference to the accompanying drawings, the same components are given the same reference numerals regardless of the reference numerals, and duplicate description thereof will be omitted. In addition, the substrate described below is a concept including all of the substrate for transmitting the electrical signal between electronic components. (For example, the substrate according to the present invention includes a rigid substrate, a flex substrate, an LCTT substrate, a single-sided / multi-faceted / multilayer substrate, a semiconductor mounting substrate (BGA, FBGA, TBGA), and the like.

Referring to FIG. 2A, the basic circuit of the printed circuit board according to the present invention is that the redistribution layer 10 is formed on the lower surface of the position where the component element D is fixed.

Specifically, in the printed circuit board according to the present invention, the component device D is fixed to the redistribution layer 10 through the solder paste 40, and a low dielectric material layer ( 20) is placed. In addition, an internal insulating layer 50 is formed on the component element D and the low dielectric material layer 20, and a circuit pattern 30 is formed on an upper surface of the internal insulating layer 50 and a lower surface of the low dielectric material layer 20. , 60) can be formed.

In the printed circuit board having such a structure, holes are formed by mechanical processing of the circuit pattern 30 and the redistribution layer 10 through a laser, and the redistribution layer and the circuit pattern are formed in the holes through plating 70. Allow electrical connection. In addition, the circuit pattern 60 formed on the inner insulation layer and the circuit pattern 30 formed on the lower surface of the low dielectric material layer 20 (hereinafter, these two circuit patterns are defined as 'first printed circuit patterns'). ) Also processes via holes (H1) through a laser, and plated (80) the inside of the holes so that they can be electrically communicated.

The redistribution layer 10 may be selectively formed at a position where the active element and the passive element are fixed to the layer on which the component is mounted. This is because the devices have a very small electrode in recent years, it is very difficult to connect with the circuit of the printed circuit board, the present invention forms a redistribution layer, by mounting the elements in this portion to be connected to the circuit pattern, the electrode Even if the size of is very small, it is possible to fix the device more accurately and precisely, and thus a very stable structure can be realized.

In particular, if necessary, by using the redistribution layer, the degree of freedom in designing an active device and a passive device can be increased freely, and since the redistribution layer exists on the lower surface of the device mounting portion, the device is completely encapsulated inside the substrate. This allows for stability and overall thickness reduction.

The thickness of the redistribution layer 10 is preferably formed to 5 ~ 20㎛, the redistribution layer used may be formed of a single metal selected from Cu, Sn, Au, Ni. Alternatively, the alloy may be formed of an alloy of two or more metals selected from Cu, Sn, Au, and Ni, or a composite metal layer, for example, Au / Ni, Au / Cu, Ni / Cu, or the like. . In particular, the redistribution layer is basically to pattern the copper foil (Cu), it is preferable to improve the wettability (wetability) with the solder paste through the plating treatment with the above-described alloy or composite metal.

In addition, the low dielectric material layer 20 is preferably composed of a material having a low Dk / Df characteristic, it is preferable that the thickness is formed in the range of 5 ~ 20㎛. For example, the low dielectric material layer may be made of an epoxy resin, or the like, and may be formed of an adhesive sheet made of various resins and fillers that do not contain a glass component. The electrode of the component element formed on the redistribution layer 10 is contacted in a very fine range of width and thickness bar, the short between the electrodes when the component element is a change in the minute inclination, etc. in the PCB manufacturing process There is a fatal problem that may occur, due to the presence of the low dielectric material layer 20 according to the present invention is implemented with the advantage that the component device can maintain a stable contact structure.

In particular, in addition to forming a circuit on the lower surface of the low dielectric material layer 20, it is also possible to form a separate circuit pattern (not shown) on the upper surface of the low dielectric material layer. In other words, a new circuit pattern can be processed on the upper surface of the low dielectric layer in addition to the redistribution layer of the component mounting portion. In this case, the low dielectric material layer is connected to a portion of the circuit pattern 30 formed on the lower surface of the low dielectric material layer and the circuit pattern formed on the upper surface of the low dielectric layer by the hole plating 70. Through-holes can be formed so that they can be electrically conductive, respectively.

In addition, the layer 30 for forming the printed circuit pattern used in the printed circuit board of the above-described structure is preferably using a Cu foil of 3 ~ 20㎛, to attach the device on the CCL in the conventional manufacturing process If formed, the present invention allows the device to be embedded on a Cu Foil that is much thinner than the copper foil forming the CCL, thereby reducing the thickness of the embedded PCB.

Referring to FIG. 2B, this is a cross-sectional view showing a printed circuit board as another embodiment according to the present invention. The basic configuration of FIG. 2A is the same (the same reference numerals), but differs in this embodiment in that another printed circuit layer is inserted and embedded in the internal insulating layer 50. That is, in the present embodiment, the printed circuit layer to be inserted is defined as an 'secondary circuit board 90' having the 'second printed circuit pattern 92'. Of course, even in this case, the component device D is mounted on the redistribution layer 10, and a lower dielectric material layer 20 is provided below. In addition, although the first printed circuit pattern 30 and the redistribution layer 10 are connected to each other through the plating layer 70, a laser is formed between the first printed circuit pattern 30 and the second printed circuit pattern 90. It is slightly different in that via holes are processed and filled with plating materials 81 such as Cu to connect the circuit patterns. In this structure, it is possible to form more multilayered circuits therein while maintaining the thickness of the same printed circuit board, thereby increasing the degree of freedom in selecting a variety of circuit designs. This also has a more stable structure due to the presence of the redistribution layer 10 and the low dielectric material layer 20 according to the present invention.

Hereinafter, a manufacturing process of a component embedded printed circuit board having a redistribution layer according to the present invention having the above-described structure will be described. 3A and 3B are flowcharts of a manufacturing process according to the present invention, and FIGS. 4A and 4B are process conceptual diagrams showing a specific process sequence according to this conceptual diagram.

Referring to FIG. 3A, the manufacturing process according to the present invention basically includes fixing component parts on a redistribution layer (A), forming an internal insulation layer (B), and processing a printed circuit (C). ), And subsequently forming a circuit pattern (D). In any case, the step of forming the redistribution layer according to the present invention will be included in the gist of the present invention.

3B and 4A, the step (A) of fixing the component elements on the redistribution layer may be embodied in a process of forming a copper foil composite layer, forming a redistribution pattern, and fixing the component elements ( S 1 ~ S 3).

That is, in step S 1, a copper foil (Cu) 10 is disposed on an upper portion of the low dielectric material layer 20, and a Cu foil 30 formed on a carrier 31 is disposed below, and an adhesive layer 41 is disposed on a lower portion thereof. The carrier 40 is formed to be compressed by pressing (Press). Thus, a layer of a structure in which a copper foil and a carrier are combined is defined as a 'copper composite'.

Subsequently, in step S 2, the copper foil 10 of the uppermost portion of the copper foil composite is patterned to form a redistribution pattern 10, and the plating redistribution pattern 11 is formed by plating. This plating process is to implement the effect that can improve the adhesion (wetability) with the solder paste to be described later to increase the stability of the process.

In the drawing, the structure in which the redistribution pattern is formed in a portion in which the device is mounted is schematically illustrated, but it is also possible to form a circuit pattern in a portion other than the device mounting. That is, in addition to the redistribution pattern in which the element formed on the upper surface of the low dielectric material layer 20 is mounted, other circuit pattern layers may be formed.

After that, the circuit pattern formed on the lower surface of the low dielectric material layer and the circuit pattern formed on the upper surface of the low dielectric material layer are formed on the bottom surface of the low dielectric material layer through hole processing together when the hole (H2) is processed in step S5 to be described later. The circuit pattern formed on the upper surface of the low dielectric material layer and the circuit pattern formed on the upper surface of the low dielectric material layer can be made to conduct a new circuit layer.

After that, as shown in step S3, the solder paste 40 is printed on the redistribution pattern, and the component device D is mounted on the redistribution layer.

Referring to FIG. 4B, a step (B) is then formed to form an internal insulating layer, which will be described with reference to the conceptual diagram of step S4. The internal insulating layer 50 is formed on the structure after the step S3. . The internal insulation layer 50 is formed to have a structure surrounding the low dielectric material layer 20 and the component element D. The internal insulation layer 50 is not particularly formed as a single layer, but corresponds to the size of the component element. At least one insulating layer 51 or 52 having a cavity is preferably provided, and at least one insulating layer 53 without a cavity is also provided and formed by pressing and compressing it. This has the efficiency of preventing damage to the component elements due to the glass fleet or the like provided in the insulating layer. Of course, when the internal insulation layer 50 is formed, a copper foil layer 60 for forming a circuit pattern may be further included thereon.

(c) The step of processing the printed circuit is formed by the step (S5) of separating the carrier layer from the copper foil composite and the step (S6) of processing and plating the holes.

Referring to the conceptual diagram shown, in step S5, the carrier layers 31, 40, and 41 are separated from the copper foil composite in step S4, and the base substrate of the printed circuit board is formed. Thereafter, the via hole H1 is formed through a laser. And holes H2 so as to be electrically connected to the first printed circuit patterns 30 and 60 formed above and below through the plating process 80, and the component elements, the redistribution layer, and the printed circuit patterns 30 and The hole H2 is filled by plating 70 with a material such as Cu to be connected.

Subsequently, in step S6, the printed circuit patterns 30 and 60 are patterned to complete the printed circuit board.

5A and 5B illustrate a manufacturing process of another embodiment according to the present invention. 4A and 4B, the process and the components described above are almost the same, and there is a difference in the process of forming the auxiliary circuit board 90 in step S4, which will be described in detail. After the process of FIG. 5A is performed in the same process as that of FIG. 4A, the auxiliary circuit board including the second printed circuit pattern 92 in the intermediate space of the internal insulation layer in step S4. 90). The copper insulating layer 60 is further included on the upper portion of the internal insulation layer, thereby forming a single structure as a whole by pressing.

Subsequently, in step S 5, the carrier layers 31, 40, and 41 are separated from the structure, and a via hole selectively connecting the first printed circuit patterns 30 and 60 and the second printed circuit pattern 92 through a laser. (H1) is processed, and further, a hole (H2) connecting the first printed circuit pattern 30 and the redistribution layer 10 is processed. (Of course, when the upper surface of the low dielectric material layer further includes a new circuit pattern other than the redistribution layer, as described above, a separate hole connecting the first printed circuit pattern 30 and the new circuit pattern. Further processing can be achieved.)

Thereafter, the holes 71 and 81 are filled in the holes H1 and H2 by plating with a plating material.

Thereafter, a circuit pattern is patterned on the first printed circuit patterns 30 and 60 to complete a printed circuit board. As a result, a plurality of circuit layers may be implemented in one printed circuit board having the same thickness, thereby enabling more efficient use.

The manufacturing process of the above-described printed circuit board according to the present invention includes a redistribution layer and a low dielectric material layer made of a material having a low dielectric constant and a low loss rate under the portion where the device is mounted, and embeds an active device or a passive device. Thereafter, a laser drill may be used to form a via penetrating the low dielectric material layer or provide a printed circuit board having a structure capable of performing electrode connection of a selective device through a redistribution layer. In particular, the redistribution layer allows the device to be fixed more accurately and effectively even at a small size of the electrode, and increases the degree of freedom in design to freely connect the component elements using the redistribution layer.

In the foregoing detailed description of the present invention, specific examples have been described. However, various modifications are possible within the scope of the present invention. The technical idea of the present invention should not be limited to the embodiments of the present invention but should be determined by the equivalents of the claims and the claims.

1 is a process diagram schematically illustrating a surface mounting technique according to the prior art.

2A and 2B show cross-sectional views of a printed circuit board as one preferred embodiment according to the present invention.

3A and 3B illustrate a flowchart of a manufacturing process of a printed circuit board according to the present invention.

4A and 4B show a conceptual diagram of a manufacturing process of a printed circuit board according to the present invention.

5A and 5B illustrate a conceptual diagram of a manufacturing process of a printed hero board according to another exemplary embodiment of the present invention.

Claims (19)

In the component embedded printed circuit board, Component-embedded printed circuit board having a redistribution layer, characterized in that the redistribution layer is formed on the lower surface of the position where the component element is fixed. The method according to claim 1, And a low dielectric material layer between the redistribution layer and the printed circuit pattern. The method according to claim 2, The low dielectric material layer is a component embedded printed circuit board having a redistribution layer, characterized in that formed of epoxy (epoxy). The method according to claim 2, The printed circuit board includes an internal insulating layer on the redistribution layer, and includes a first printed circuit pattern on a lower surface of the low dielectric material layer or an upper surface of the internal insulating layer. Any one of the first printed circuit pattern is a printed circuit board having a redistribution layer, characterized in that connected to the redistribution layer through the low dielectric material layer. The method according to claim 4, The first printed circuit pattern, A component embedded printed circuit board having a redistribution layer, which is selectively connected through at least one via hole coated with a plating material. The method according to claim 2, The printed circuit board has an internal insulating layer on the redistribution layer, And an auxiliary circuit board having at least one second printed circuit pattern inserted into the internal insulation layer. The method according to claim 6, Any one of the second printed circuit pattern is a printed circuit board having a redistribution layer, characterized in that connected to the redistribution layer through the low dielectric material layer. The method of claim 7, And the second printed circuit pattern of the auxiliary circuit board is selectively connected to one of the first printed circuit patterns through a via hole. The method according to any one of claims 1 to 8, The redistribution layer is any one single metal layer selected from Cu, Sn, Au, and Ni, or an alloy or composite metal layer of two or more metals selected from them. Circuit board. The method according to claim 9, The redistribution layer is a component embedded printed circuit board having a redistribution layer, characterized in that 5 ~ 20㎛. The method according to claim 4 or 6, The upper surface of the low dielectric material layer further comprises at least one circuit pattern that is electrically connected through the first circuit pattern and the low dielectric material layer, embedded printed circuit board having a redistribution layer. Forming a redistribution layer on the copper foil composite layer and fixing the component elements on the redistribution layer; Forming an internal insulating layer around the component elements; Stacking a copper foil layer on the internal insulation layer and processing a printed circuit; Forming a circuit pattern; Method of manufacturing a component-embedded printed circuit board having a redistribution layer comprising a. The method according to claim 12, The step 1 includes forming at least one circuit pattern including a redistribution layer on the copper foil composite layer, and fixing a component device on the redistribution layer. Manufacturing method. The method of claim 12, wherein the first step, 1) compressing a copper foil composite layer and a carrier layer having copper foils formed on both surfaces of the low dielectric material layer; 2) patterning and plating the redistribution layer on the upper copper foil of the copper foil composite layer; 3) printing solder paste on the redistribution layer and fixing component elements; Method of manufacturing a component-embedded printed circuit board having a redistribution layer comprising a. The method according to claim 12, The second step, At least one internal insulating layer having a cavity corresponding to the size of the component element on the low dielectric material layer; A method of manufacturing a component-embedded printed circuit board having a redistribution layer, characterized in that it is formed by pressing at least one internal insulating layer having no cavity. The method according to claim 12, wherein the three step, the copper foil layer is laminated, a) removing the carrier layer of the copper foil composite layer; b) processing holes through the redistribution layer and the first printed circuit pattern layer or the first printed circuit pattern layer; c) plating the inner surface of the hole; Method of manufacturing a component-embedded printed circuit board having a redistribution layer comprising a. The method according to claim 12, The second step, And forming an auxiliary circuit board having at least one second printed circuit pattern between the internal insulation layers. The method according to claim 17, The third step, a) removing the carrier layer of the copper foil composite layer; b) processing a hole communicating the redistribution layer and the first printed circuit pattern layer or the first and second printed circuit patterns; c) plating the inner surface of the hole; Method of manufacturing a component-embedded printed circuit board having a redistribution layer comprising a. The method according to any one of claims 12 to 18, The redistribution layer is any one of a single metal layer selected from Cu, Sn, Au, Ni, or an alloy or composite metal layer of two or more metals selected from among them. Method of manufacturing a circuit board.

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