KR20100012657A - Thin film transistor and manufacturing method thereof - Google Patents

Abstract

PURPOSE: A thin film transistor and a manufacturing method thereof are provided to use an imprint mold, thereby patterning a gate insulating layer at the same time. CONSTITUTION: A semiconductor channel layer(120) and a gate insulating layer(130) are successively formed on the upper part of a substrate(110). The gate insulating layer is patterned in a wall shape by pressurizing an imprint mold(200) in which a recess pattern of the wall shape is formed on the gate insulating layer. A source electrode/a drain electrode and a gate electrode are formed at the same time by evaporating an electrode solution on both sides and the upper part of the gate insulating layer patterned in the wall shape. The imprint mold is made of elastomeric material with large elasticity.

Description

Thin film transistor and its manufacturing method {THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor and a method for manufacturing the same, and more particularly, to a thin film transistor manufacturing method capable of simplifying the process by performing a patterning process using an imprint technique, and a thin film transistor manufactured by the manufacturing method. will be.

In recent years, active matrix display devices such as TFT-LCDs and AMOLEDs (Active Matrix OLEDs) use a lot of thin film transistors (Thin Film Transistor) formed on a transparent insulating substrate as a pixel driving element.

In general, the thin film transistor is composed of a gate electrode, a semiconductor insulating layer whose conductivity of charge is controlled by a voltage applied to the gate insulating film, the source / drain electrodes, and the gate electrode.

In order to manufacture such a thin film transistor, a variety of fine patterns must be formed using a plurality of mask processes, and each mask process includes a thin film deposition (coating) process, a cleaning process, a photolithography process, an etching process, and a photo process. And many processes such as resist stripping, inspection and the like.

The photolithography process is a series of photolithography processes including application of photoresist, mask alignment, exposure, development, and strip, which not only has a long process time but also wastes strip solution to remove the photoresist pattern. It is large and there is a problem that expensive equipment such as exposure equipment is required. In particular, as the size of the substrate becomes larger and the pattern size becomes smaller, the price of the exposure equipment increases. In addition, the size of the pattern is not only limited by the wavelength of light used for exposure, but also has the disadvantage of increasing the device cost, such as requiring a mechanism for precisely controlling the mask position.

Accordingly, the present invention has been made to solve the above problems, an object of the present invention is to simplify the thin film transistor manufacturing process by performing a patterning process using an imprint technology.

In order to achieve the above object, a thin film transistor manufacturing method according to the present invention comprises the steps of: (a) sequentially forming a semiconductor channel layer and a gate insulating film on the substrate; (b) pressing the imprint mold having the well-shaped recessed pattern to the gate insulating film to pattern the gate insulating film into a well shape; And (c) simultaneously depositing electrode solutions on both sides and top of the well patterned gate insulating layer to form a source electrode, a drain electrode, and a gate electrode.

Here, the imprint mold is preferably made of a rubber material having a large elasticity.

The recessed pattern has a well shape in which both sides are recessed deeper than the center, and the gate insulating pattern is patterned into a well shape in which a center region and both side regions are respectively divided by the well-shaped recessed pattern.

An inner region of the center of the gate insulating layer patterned into the well shape is defined as a region where the gate electrode is to be formed, and outer regions of both sides are defined as a region where the source electrode and the drain electrode are to be formed.

On the other hand, in order to achieve the above object, a thin film transistor according to the present invention, a substrate; A semiconductor channel layer formed on the substrate; A gate insulating film formed in a well shape in an upper region of the semiconductor channel layer; A gate electrode formed on the well-shaped gate insulating layer; And source and drain electrodes formed on both sides of the well-shaped gate insulating film.

Here, the gate electrode, the source electrode and the drain electrode are divided by the well-shaped gate insulating film.

According to the present invention, the gate insulating film is patterned at once using an imprint mold having a well-shaped recessed pattern, thereby reducing manufacturing cost and processing time, as compared with the conventional thin film transistor manufacturing method of patterning through a photo process. It works.

In addition, according to the present invention, since the source electrode, the drain electrode and the gate electrode can be simultaneously formed through one solution process of depositing an electrode solution on both sides and top of the gate insulating film patterned in a well shape by an imprint mold, There is an effect that can simplify the manufacturing process.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments described below may be modified in many different forms, and the scope of the present invention is not limited to the embodiments described below. Embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Like reference numerals denote like elements throughout the embodiments. The size or thickness of the film or regions is exaggerated for clarity of specification.

1A to 1E are cross-sectional views illustrating a method of manufacturing a thin film transistor according to an exemplary embodiment of the present invention, and illustrate a method of manufacturing a thin film transistor having a coplanar structure.

First, referring to FIG. 1A, after the semiconductor channel layer 120 is formed on the substrate 110 by using a deposition method such as sputtering, a gate insulating layer 130 is formed on the semiconductor channel layer 120.

Herein, silicon single crystal, transparent glass, transparent plastic, or the like is used as the substrate 110. In the case of a p-type transistor, a substrate doped with n-type ions is used. The semiconductor channel layer 120 may be formed of a monomolecular semiconductor material or a polymer semiconductor material, and the gate insulating layer 130 may be formed of an inorganic material such as tetraethly orthosilicate (TEOS), or a polyimide or acrylic material ( organic materials such as acrylate) are used.

Next, referring to FIG. 1B, an imprint mold 200 in which a well-shaped recessed pattern 210 is formed in a lower region is prepared.

Here, the imprint mold 200 is preferably made of a highly elastic rubber material, for example, polydimethylsiloxane (PDMS).

The recessed pattern 210 is for patterning the gate insulating layer 130, and has a well shape in which both sides are recessed deeper than the center portion.

Next, referring to FIG. 1C, the prepared imprint mold 200 is pressed onto the gate insulating layer 130 to pattern the gate insulating layer 130 into a well shape by the recessed pattern 210.

Through the patterning process, the gate insulating layer 130 has a well shape in which a center region and both side regions are respectively divided. A center inner region of the well insulating gate insulating layer 130 is defined as a region where a gate electrode is to be formed. The outer regions on both sides are defined as regions in which source and drain electrodes are to be formed.

That is, the gate electrode region, the source electrode region, and the drain electrode region are divided by the well patterned gate insulating layer 130.

Next, referring to FIG. 1D, the imprint mold 200 is removed through a strip process or a cleaning process.

Next, referring to FIG. 1E, an electrode solution is deposited on both sides and top of the patterned gate insulating layer 130 by inkjet or printing to form the source electrode 140, the drain electrode 150, and the gate electrode 160. Form each.

That is, in the related art, a photolithography process requiring a long process time, a large amount of strip solution, and an expensive exposure apparatus for patterning the gate insulating layer 130 is used. Since the gate insulating layer 130 may be patterned at one time using the formed imprint mold 200, manufacturing cost and processing time may be reduced.

In addition, although a plurality of processes are conventionally required to form the source electrode, the drain electrode, and the gate electrode, according to the present invention, both sides and the top of the gate insulating layer 130 patterned in a well shape by the imprint mold 200. Since the source electrode 140, the drain electrode 150, and the gate electrode 160 may be simultaneously formed through one solution process of depositing an electrode solution, the manufacturing process may be simplified.

So far, the present invention has been described with reference to the preferred embodiments, and those skilled in the art to which the present invention belongs may be embodied in a modified form without departing from the essential characteristics of the present invention. You will understand. Therefore, the disclosed embodiments should be considered in descriptive sense only and not for purposes of limitation. The scope of the present invention is shown in the claims rather than the foregoing description, and all differences within the scope will be construed as being included in the present invention.

1A to 1E are cross-sectional views illustrating a method of manufacturing a thin film transistor according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

110: substrate

120: semiconductor channel layer

130: gate insulating film

140: source electrode

150: drain electrode

160: gate electrode

200: imprint mold

210: depression pattern

Claims (11)

(a) sequentially forming a semiconductor channel layer and a gate insulating film on the substrate; (b) pressing the imprint mold having the well-shaped recessed pattern to the gate insulating film to pattern the gate insulating film into a well shape; And (c) depositing an electrode solution on both sides and top of the well patterned gate insulating film to form a source electrode, a drain electrode, and a gate electrode at the same time. The method of claim 1, And the imprint mold is made of a rubber material having a high elasticity. The method of claim 1, The recess pattern has a well shape in which both sides are recessed deeper than the center. The method of claim 3, wherein in step (b), And the gate insulating film is patterned into a well shape in which a center region and two side regions are respectively divided by the recessed pattern. The method of claim 4, wherein in step (b), A thin film characterized in that a middle inner region of the gate insulating layer patterned into the well shape is defined as a region where the gate electrode is to be formed, and outer regions on both sides are defined as a region where the source electrode and the drain electrode are to be formed. Transistor manufacturing method. The method of claim 1, wherein in step (b), After the gate insulating layer is patterned, removing the imprint mold through a strip process or a cleaning process. Board; A semiconductor channel layer formed on the substrate; A gate insulating film formed in a well shape in an upper region of the semiconductor channel layer; A gate electrode formed on the well-shaped gate insulating layer; And And a source electrode and a drain electrode formed on both sides of the well-shaped gate insulating film. The method of claim 7, wherein And the gate electrode, the source electrode and the drain electrode are divided by the well-shaped gate insulating film. The method of claim 7, wherein The substrate is a thin film transistor, characterized in that made of any one of silicon single crystal, transparent glass, transparent plastic. The method of claim 7, wherein The semiconductor channel layer is a thin film transistor, characterized in that made of a single molecule semiconductor material or a polymer semiconductor material. The method of claim 7, wherein And the gate insulating film is made of an inorganic material or an organic material.

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