KR20090100062A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A semiconductor device and a method for manufacturing the same are provided to prevent a short circuit between a storage node contact and a bit line due to shortage of overlap margin. CONSTITUTION: A semiconductor device includes a semiconductor substrate, a gate, a first insulating layers, a first storage node contact(116), a bit line contact(118), a second insulating layer(114), a bit line(120), a capping layer(122), a second storage node contact(126), and a third dielectric polish layer(124). The semiconductor substrate has a bit line contact area and the storage node contact area within the active area. The first insulating layers are formed at the outer side of the landing plug formed on the gate sidewall active area of the semiconductor substrate and the active area. A first storage node contacts are formed on the landing plug of the storage node contact area, and the bit line contact is formed on the landing plug of the bit line contact area.

Description

Semiconductor device and method for manufacturing the same

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device and a method of manufacturing the same that can prevent the electrical short between the storage node contact and the bit line caused by the lack of overlap margin. .

In order to increase the integration of semiconductor devices and reduce manufacturing costs, the size of wafers forming semiconductor devices is gradually increasing. In addition, the size of cell transistors is gradually decreasing in order to increase the degree of integration of semiconductor devices.

Higher integration of the semiconductor device should be made first of all by lowering the critical dimension of the circuit pattern. In addition, in order to reduce the contact resistance between the upper pattern and the lower pattern, and to achieve high reliability and high speed driving of the semiconductor device, stable contact between the lower pattern and the upper pattern should be ensured.

On the other hand, as the design rule is reduced due to the miniaturization of semiconductor devices, the storage node contact is formed as a hole type and a line type as an electrical connection path between the capacitor and the lower conductor, which is a storage location for storing data. The area is also decreasing.

Conventionally, the storage node contact is formed after manufacturing a bit line including a bit line contact, and as the semiconductor device becomes finer, an overlap margin between the bit line contact and the storage node contact is insufficient.

Accordingly, when the storage node contact is formed, a bridge is generated between the storage node contact and the bit line contact, and an electrical short is generated between the storage node contact and the bit line contact, thereby failing a semiconductor device. have.

The present invention provides a semiconductor device and a method of manufacturing the same that can prevent electrical short between the storage node contact and the bit line caused by the lack of overlap margin.

A semiconductor device according to the present invention includes a semiconductor substrate having an active region and a bit line contact region and a storage node contact region in the active region; A gate formed on the semiconductor substrate; A landing plug formed on the gate side active region of the semiconductor substrate and a first insulating layer formed outside the active region; A first storage node contact formed on the landing plug of the storage node contact region and a bit line contact formed on the landing plug of the bit line contact region; A second insulating layer formed to surround the first storage node contact and the bit line contact; A bit line formed on the bit line contact and the second insulating layer; A capping layer formed on the bit line contact and the second insulating layer to cover the bit line; A second storage node contact formed on the first storage node contact; And a third insulating layer formed to surround the second storage node contact.

The capping film is made of an insulating film.

The capping film is made of a nitride film.

The capping film has a thickness of 200 to 300 kPa.

In addition, a method of manufacturing a semiconductor device according to the present invention may include forming a gate on a semiconductor substrate having an active region and a bit line contact region and a storage node contact region in the active region; Forming a first insulating layer outside the active region of the semiconductor substrate and forming a landing plug on the gate side active region; Forming a second insulating layer on the landing plug and the first insulating layer to expose the landing plug of the storage node contact region; Forming a first storage node contact on the landing plug of the storage node contact region; Etching the second insulating layer to expose the landing plug of a bit line contact region; Forming a bit line contact on the landing plug of the exposed bit line contact region and forming a bit line on the bit line contact and the second insulating layer; Forming a capping layer on the bit line contact, the first storage node contact, and the second insulating layer to cover the bit line; Forming a third insulating layer exposing the first storage node contact on the capping layer; And forming a second storage node contact on the exposed first storage node contact.

The capping film is formed of an insulating film.

The capping film is formed of a nitride film.

The capping film is formed to a thickness of 200 ~ 300Å.

According to the present invention, a semiconductor device may be manufactured by sequentially forming a first storage node contact, a bit line, and a second storage node contact to secure a margin between the first storage node contact and the bit line contact.

The present invention also provides a second storage node contact formed on the first storage node contact by forming a capping layer on the insulating film including the bit line, the first storage node contact, and the bit line contact before the second storage node contact is formed. It is possible to prevent the electrical short between the storage node contact and the bit line caused by the lack of overlap margin when forming the.

Hereinafter, a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention will be described in detail.

1A to 1D are diagrams illustrating a semiconductor device in accordance with an embodiment of the present invention.

As shown, the lower portion of the semiconductor substrate 100 has a plurality of active regions 104 defined by the device isolation layer 102, and has a bit line contact region and a storage node contact region in the active region 104. A plurality of gates 106 are formed having a recessed structure and provided with spacers 108 on the side.

A landing plug 112 is provided above the active region 104 on the side of the gate 106 of the semiconductor substrate 100, that is, on the bit line contact region and the storage node contact region, and extends to the outside of the active region 104. The first insulating film 110 is formed.

A first storage node contact 116 is formed on the landing plug 112 of the storage node contact region, and a bit line contact 118 is formed on the landing plug 112 of the bitline contact region. A second insulating layer 114 is formed on the first insulating layer 110 to surround the first storage node contact 116 and the bit line contact 118.

Bit lines 120 electrically connected to the bit line contacts 118 are formed on the bit line contacts 118 and the second insulating layer 114.

A capping layer 122 is formed on the bit line contact 118 and the second insulating layer 114 to cover the bit line 120 on the portions other than the upper portion of the first storage node contact 116. A second storage node contact 126 is formed on the first storage node contact 116, and a third insulating layer 124 is formed on the capping layer 122 to surround side surfaces of the second storage node contact 126. do.

The capping film 122 is made of an insulating film, preferably made of a nitride film, and has a thickness of 200 to 300 kPa. The capping layer 122 is formed between the second storage node contact 126 and the bit line 120 to form a gap between the second storage node contact 126 and the bit line 120 due to the lack of overlap margin. To prevent electrical shorts.

Meanwhile, the semiconductor device according to the present invention is formed by the method shown in FIGS. 2A to 2K.

2A and 2B, a semiconductor substrate 100 having a plurality of active regions 104 partitioned by an isolation layer 102 and having a bit line contact region and a storage node contact region in the active region 104. ) And a plurality of gates 106 having a recessed structure at the bottom thereof and a spacer 108 on the side.

Then, a first insulating film 110 covering the gate 106 is formed on the semiconductor substrate 100.

Referring to FIG. 2C, portions of the active region 104 other than the gate 106 forming portion, that is, portions of the first insulating layer 110 in the bit line contact region and the storage node contact region are removed.

Next, a landing plug 112 is formed in a portion of the side active region 104 of the exposed gate 106.

Next, a second insulating layer 114 is formed on the landing plug 112 and the first insulating layer 110 to expose the landing plug 112 in the storage node contact region.

Referring to FIG. 2D, a conductive film for forming a storage node contact is formed on the second insulating layer 114 including the landing plug 112 portion of the storage node contact region.

Next, a planarization process is performed on the conductive layer and the second insulating layer 114 to form a first storage node contact 116 on the exposed landing plug 112 of the storage node contact region.

2E to 2G, an etching process is performed on the second insulating layer 114 to expose a portion of the landing plug 112 of the bit line contact region.

Then, the bit line contact 118 electrically connected to the exposed landing plug 112 portion on the second insulating layer 114 and the bit line 120 electrically connected to the bit line contact 118. To form.

2H through 2K, the bit line contact 118, the first storage node contact 116, and the second insulating layer 114 may be prevented from being electrically shorted with the second storage node contact formed in a subsequent process. Capping layer 122 is formed to cover the bit line 120 including the upper portion. The capping film 122 is formed of an insulating film, such as a nitride film, and formed to have a thickness of 200 to 300 Å. The capping layer 122 is formed of the second storage node contact and the second storage node contact, which are formed in a subsequent process, due to the lack of overlap margin between the bit line 120 and the second storage node contact. Serves to prevent electrical shorts between lines 120.

Thereafter, a third insulating layer 124 is formed on the capping layer 122 to expose the first storage node contact 116.

Subsequently, after forming the second storage node contact 126 on the exposed first storage node contact 116, a planarization process is performed.

Accordingly, as shown in FIG. 2K, in which Z-Z 'of FIG. 2H is cut, the capping layer 122 is formed between the first and second storage node contacts 116 and 126 and the bit line 120. It can be seen that the electrical short between the first and second storage node contacts (116, 126) and the bit line 120.

As described above, according to the present invention, a semiconductor device is manufactured by sequentially forming a first storage node contact, a bit line, and a second storage node contact, thereby securing a margin between the first storage node contact and the bit line contact. In addition, a capping layer is formed on the insulating layer including the bit line, the first storage node contact, and the bit line contact before the second storage node contact is formed.

Therefore, the capping layer is formed between the second storage node contact and the bit line formed on the first storage node contact, and thus the storage node contact of the semiconductor device caused by the lack of overlap margin when forming the second storage node contact. Electrical short between the bit lines can be prevented.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

1A to 1D illustrate a semiconductor device according to an embodiment of the present invention.

2A to 2K are process-specific views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

Claims (8)

A semiconductor substrate having an active region and a bit line contact region and a storage node contact region in the active region; A gate formed on the semiconductor substrate; A landing plug formed on the gate side active region of the semiconductor substrate and a first insulating layer formed outside the active region; A first storage node contact formed on the landing plug of the storage node contact region and a bit line contact formed on the landing plug of the bit line contact region; A second insulating layer formed to surround the first storage node contact and the bit line contact; A bit line formed on the bit line contact and the second insulating layer; A capping layer formed on the bit line contact and the second insulating layer to cover the bit line; A second storage node contact formed on the first storage node contact; And A third insulating layer formed to surround the second storage node contact; Semiconductor device comprising a. The method of claim 1, The capping film is a semiconductor device, characterized in that consisting of an insulating film. The method of claim 1, The capping film is a semiconductor device, characterized in that consisting of a nitride film. The method of claim 1, The capping film is a semiconductor device, characterized in that having a thickness of 200 ~ 300Å. Forming a gate on a semiconductor substrate having an active region and a bit line contact region and a storage node contact region in the active region; Forming a first insulating layer outside the active region of the semiconductor substrate and forming a landing plug on the gate side active region; Forming a second insulating layer on the landing plug and the first insulating layer to expose the landing plug of the storage node contact region; Forming a first storage node contact on the landing plug of the storage node contact region; Etching the second insulating layer to expose the landing plug of a bit line contact region; Forming a bit line contact on the landing plug of the exposed bit line contact region and forming a bit line on the bit line contact and the second insulating layer; Forming a capping layer on the bit line contact, the first storage node contact, and the second insulating layer to cover the bit line; Forming a third insulating layer exposing the first storage node contact on the capping layer; And Forming a second storage node contact on the exposed first storage node contact; Method for manufacturing a semiconductor device comprising a. The method of claim 5, wherein And the capping film is formed of an insulating film. The method of claim 5, wherein The capping film is a manufacturing method of a semiconductor device, characterized in that formed by a nitride film. The method of claim 5, wherein The capping film is a manufacturing method of a semiconductor device, characterized in that formed in a thickness of 200 ~ 300Å.

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