KR20090071086A - Liquid crystal display apparatus of inversion type and method of dirving the same - Google Patents

Abstract

A liquid crystal display apparatus of an inversion type and a method of driving the same are provided to reduce a load and power consumption by precharging a pixel on the same data line with a previous pixel with the same polarity and reducing switching width of the pixel. A timing controller(41) outputs a gate control signal(GDC) and a data control signal(DDC) to control a data driving unit(43) and a gate driving unit(42). The timing controller outputs an gate out enable signal to output a multi-gate signal in response to a pixel signal which is outputted a vertical two-dot inversion type. A gate driving unit outputs a multi-gate signal in response to the gate out enable signal. A data driving unit outputs a pixel signal to each data line(DL1-DLm) of the liquid crystal panel(44).

Description

Inversion driving device and method of liquid crystal display device {LIQUID CRYSTAL DISPLAY APPARATUS OF INVERSION TYPE AND METHOD OF DIRVING THE SAME}

The present invention relates to an inversion driving technology of a liquid crystal display device, and more particularly, to an inversion driving device and a method of a liquid crystal display device suitable for preventing generation of vertical lines and reducing heat generation and power consumption.

Recently, with the development of information technology (IT), the importance of the flat panel display device as a visual information transmission medium has been further emphasized, and low power consumption, thinning, light weight, and high quality are required to secure improved competitiveness in the future.

A liquid crystal display (LCD), which is a typical display device of a flat panel display device, is an apparatus for displaying an image using optical anisotropy of liquid crystal, and has advantages such as thin, small size, low power consumption, and high quality.

Such a liquid crystal display device is a display device in which image information is individually supplied to pixels arranged in a matrix, and a desired image is displayed by adjusting light transmittance of the pixels. Accordingly, the liquid crystal display includes a liquid crystal panel in which pixels, which are the smallest unit for implementing an image, are arranged in an active matrix form, and a driving unit for driving the liquid crystal panel. Since the LCD does not emit light by itself, a backlight unit is provided to supply light to the LCD. The driver includes a timing controller and a data driver and a gate driver.

The driving method of the liquid crystal panel includes a line inversion, column inversion, and dot inversion depending on the phase of the pixel (or data) signal applied to the data line. have. The line inversion method is a method of inverting and applying a phase of a pixel signal applied to a data line for each line, and the column inversion method is a method of inverting and applying a phase of a pixel signal applied to a data line for each column. The dot inversion method is a method of inverting and applying a phase of a pixel signal applied to a data line for each column and line.

As described above, the reason for driving the liquid crystal in the inversion method is to prevent the deterioration phenomenon by the liquid crystal is continuously arranged in only one direction. In other words, the inversion scheme is to alternately supply a positive image signal and a negative image signal so that the liquid crystals are arranged in the right direction and then in the opposite direction.

FIG. 1 is a polarity table of pixel signals of a current frame and a next frame in which a dot inversion driving method is used. As shown in FIG. It can be seen that the negative pixel signals appear alternately in the horizontal and vertical directions.

However, the dot inversion method has an advantage of providing excellent image quality. However, since the pixel signal needs to be inverted and output in units of pixels, a high speed switching operation is required. Because of this, a lot of power is consumed, there was a disadvantage that the amount of heat generated.

The proposed method to solve this problem is the column inversion method. FIG. 2 is a polarity table of pixel signals of the current frame and the next frame showing the column inversion driving method. As shown in FIG. .

The column inversion method has a relatively low load amount to solve the power consumption and heat generation problems raised in the dot inversion method, but there is a problem in that a vertical dim phenomenon occurs as shown in FIG. 3.

As such, the dot inversion driving method of the conventional liquid crystal panel driving type has an advantage of providing relatively excellent image quality, but requires a high-speed switching operation, which consumes a lot of power and generates a large amount of heat. In addition, although the column inversion method has relatively reduced load amount, the power consumption and heat generation problems raised in the dot inversion method have been solved to some extent, but a vertical line phenomenon has occurred. Therefore, there is an inevitable trend to apply the dot inversion method.

Accordingly, an object of the present invention is to solve the power consumption and heat generation problems while ensuring the image quality by applying the multi-gate method to the vertical 2-dot inversion method.

In order to achieve the above object, the present invention provides a gate out enable signal to output a gate control signal and a data control signal and to output a multi-gate signal corresponding to a pixel signal output in a vertical 2-dot inversion scheme. A timing controller for outputting; A gate driver for outputting a gate signal to each gate line of the liquid crystal panel in response to the gate control signal, and outputting a multi-gate signal in response to the gate-out enable signal; A data driver for outputting a pixel signal to each data line of the liquid crystal panel in response to the data control signal; And a liquid crystal panel driven by the multi-gate signal and the pixel signal in a vertical 2-dot inversion manner so that pixels of the same polarity on the same data line are precharged.

According to another aspect of the present invention, there is provided a method of outputting a gate out enable signal to output a multi-gate signal corresponding to a pixel signal output in a vertical 2-dot inversion scheme; Outputting a multi-gate signal in response to the gate-out enable signal when outputting a gate signal to each gate line of the liquid crystal panel; And driving the vertical two-dot inversion method by the multi-gate signal and the pixel signal to precharge the pixels having the same polarity on the same data line.

According to the present invention, when the liquid crystal panel is driven by the vertical 2-dot inversion method, the multi-gate signal is used to precharge the pixels on the same data line with the same polarity pixel signal, thereby reducing the swing width of the pixel signal. As a result, the load is reduced, thereby reducing power consumption and heat generation.

In addition, since the vertical line phenomenon generated during column inversion does not occur, the image quality can be prevented from being lowered.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 4 is a block diagram of an embodiment of an inversion driving apparatus of the liquid crystal display according to the present invention. As shown in FIG. 4, the gate control signal for controlling the driving of the gate driver 42 and the data driver 43 is shown. GDC) and data control signal (DDC), the digital video data (RGB) is sampled and rearranged and output, and the gate is output so that the multi-gate signal is output in response to the pixel signal output in the vertical 2-dot inversion method. A timing controller 41 for outputting an out enable signal; In response to the gate control signal GDC supplied from the timing controller 41, a gate signal is output to the gate lines GL1 to GLn of the liquid crystal panel 44. A gate driver 42 correspondingly outputting a multi-gate signal; A data driver 43 for outputting a pixel signal to each of the data lines DL1 to DLm of the liquid crystal panel 44 in response to the data control signal DDC supplied from the timing controller 41; And a liquid crystal panel 44 driven by the gate signal and the pixel signal in a vertical two-dot inversion manner to precharge pixels of the same polarity on the same data line. When described in detail with reference to the accompanying Figures 5 to 8 as follows.

The timing controller 41 may include a gate control signal GDC and a data driver 43 for controlling the gate driver 42 using the vertical / horizontal synchronization signals Hsync / Vsync and the clock signal CLK supplied from the system. Outputs a data control signal (DDC) for controlling. In addition, the timing controller 41 samples the digital pixel data RGB input from the system, rearranges the digital pixel data RGB, and supplies the same to the data driver 43.

As the gate control signal GDC, there are a gate start pulse GSP, a gate shift clock GSC, a gate out enable GOE, and the like, and as a data control signal DDC, a source start pulse SSP and a source shift clock. (SSC), source out enable (SOE), polarity signal (POL), and the like.

The gate driver 42 sequentially supplies the gate signal to the gate lines GL1 to GLn in response to the gate control signal GDC input from the timing controller 41, thereby corresponding thin film transistor TFT on the horizontal line. ) Are turned on. Accordingly, pixel signals supplied through the data lines DL1 to DLm are stored in the respective storage capacitors C _ST through the thin film transistors TFT.

In more detail, the gate driver 42 shifts the gate start pulse GSP according to the gate shift clock GSC to generate a shift pulse. The gate driver 42 supplies a gate signal consisting of gate on / off sections (signals) to the corresponding gate line GL every horizontal period in response to the shift clock. In this case, the gate driver 42 supplies a gate-on signal only in an enable period in response to the gate-out enable signal GOE, and supplies a gate-off signal (gate low signal) in other periods.

The data driver 43 converts the pixel data RGB into an analog pixel signal (or data voltage) corresponding to the gray scale value in response to the data control signal DDC input from the timing controller 41. The converted pixel signal is supplied to the data lines DL1 to DLm on the liquid crystal panel 44.

In more detail, the data driver 43 generates the sampling signal by shifting the source start pulse SSP according to a source shift clock. Subsequently, the data driver 43 sequentially inputs and latches the pixel data RGB by a predetermined unit in response to the sampling signal. The data driver 43 converts the latched pixel data RGB for one line into an analog pixel signal and supplies the same to the data lines DL1 to DLm.

The liquid crystal panel 44 is formed in each crossing portion of the plurality of liquid crystal cells (C _LC) arranged in a matrix, a data line (DL1~DLm) and gate line (GL1~GLn) each of the liquid crystal cell (C _LC And a thin film transistor (TFT) connected to each of them.

The thin film transistor TFT is turned on when the gate signal is supplied from the gate line GL, and supplies the pixel signal supplied through the data line DL to the liquid crystal cell C _LC . The thin film transistor TFT is turned off when the gate off signal is supplied through the gate line GL to maintain the pixel signal charged in the liquid crystal cell C _LC .

The liquid crystal cell C _LC includes a pixel electrode connected to a common electrode and a thin film transistor TFT with a liquid crystal interposed therebetween. The liquid crystal cell C _LC further includes a storage capacitor C _ST so that the charged pixel signal is stably maintained until the next pixel signal is charged. The storage capacitor C _ST is formed between the pixel electrode and the previous gate line. In the liquid crystal cell C _LC , an arrangement state of liquid crystals having dielectric anisotropy varies according to pixel signals charged through the thin film transistor TFT, and light transmittance is adjusted accordingly to implement gradation.

On the other hand, when the liquid crystal panel 44 is driven in the vertical two-dot inversion method as shown in FIG. 5, the timing controller 41 has a multi-gate from the gate driver 42 to the gate line of the liquid crystal panel 44. The gate out enable signal GOE is outputted so that the signal is supplied.

6A and 6B illustrate an example in which the multi-gate signal is a series of gate signals for two adjacent gate lines having the same polarity. In order to supply a multi-gate signal having a shape as shown in FIGS. 6A and 6B from the gate driver 42 to the gate line of the liquid crystal panel 44, the timing controller 41 has a corresponding gate out. Outputs the enable signal GOE.

In this case, a series of gate signals as shown in FIG. 6A is supplied from the gate driver 42 to the first gate line GL ₁ of the liquid crystal panel 44, and at the same time, a fourth gate line ( GL ₄ ) is supplied with a series of gate signals as shown in FIG. 6B.

Accordingly, when the pixels of the first horizontal line are charged with the pixel signals supplied from the data driver 43 through the data lines DL _{1 to} DL _m , the pixels having the same polarity of the fourth horizontal line are the pixel signals. Precharged simultaneously.

The principle of precharging using the multi-gate signal as described above will be described in detail with reference to (a)-(d) of FIGS.

First, as shown in FIG. 7A, the gate signal GS1 is output to the first gate line GL1 and the gate signal GS4 is output to the fourth gate line GL1. Accordingly, when the pixel of the first gate line is charged with the positive pixel signal, the pixel of the fourth gate line is simultaneously precharged with the positive pixel signal.

Thereafter, as shown in FIG. 7B, the gate signal GS2 is output to the second gate line GL2 and the gate signal GS3 is output to the third gate line GL3. Accordingly, when the pixel of the second gate line is charged with the negative pixel signal, the pixel of the third gate line is precharged simultaneously with the negative pixel signal.

Thereafter, as shown in FIG. 7C, the gate signal GS3 is output to the third gate line GL3 and the gate signal GS6 is output to the sixth gate line GL6. Accordingly, when the pixel of the third gate line is finally charged with the negative pixel signal, the pixels of the sixth gate line are simultaneously precharged with the negative pixel signal.

Thereafter, as shown in FIG. 7D, the gate signal GS4 is output to the fourth gate line GL4 and the gate signal GS5 is output to the fifth gate line GL5. Accordingly, when the pixel of the fourth gate line is finally charged with the positive pixel signal, the pixels of the fifth gate line are precharged simultaneously with the positive pixel signal.

Thereafter, the pixels of the gate line are precharged and finally charged in the same manner as described above.

In the above description, the multi-gate signal has the same polarity and is described as an example of a gate signal for two adjacent gate lines, but there may be other multi-gate signals.

As another example, the multi-gate signal may be a gate signal for three adjacent gate lines having the same polarity.

The principle of precharging using the multi-gate signal as described above will be described below with reference to (a)-(e) of FIGS.

First, as shown in FIG. 8A, the gate signals GS1, GS4, and GS5 are simultaneously output to the first, fourth, and fifth gate lines GL1, GL4, and GL5. Accordingly, when the pixel of the first gate line is charged with the positive pixel signal, the pixels of the fourth and fifth gate lines are precharged for the first time simultaneously with the positive pixel signal.

Thereafter, as shown in FIG. 8B, the gate signals GS2, GS3, and GS6 are simultaneously output to the second, third, and sixth gate lines GL2, GL3, and GL6. Accordingly, when the pixel of the second gate line is charged with the negative pixel signal, the pixels of the third and sixth gate lines are precharged for the first time simultaneously with the negative pixel signal.

Thereafter, as shown in FIG. 8C, the gate signals GS3, GS6, and GS7 are simultaneously output to the third, sixth, and seventh gate lines GL3, GL6, and GL7. . Accordingly, when the pixel of the third gate line is finally charged with the negative pixel signal, the pixel of the sixth gate line is precharged second with the negative pixel signal, and the pixel of the seventh gate line is It is first precharged with the negative pixel signal.

Thereafter, as shown in FIG. 8D, the gate signals GS4, GS5, and GS8 are simultaneously output to the fourth, fifth, and eighth gate lines GL4, GL5, and GL8. . Accordingly, when the pixel of the fourth gate line is finally charged with the positive pixel signal, the pixel of the fifth gate line is precharged second with the positive pixel signal, and the pixel of the eighth gate line is the positive electrode. First precharged with the pixel signal of the surname.

Subsequently, as shown in FIG. 8E, the gate signals GS5, GS8, and GS9 are simultaneously applied to the fifth, eighth, and ninth gate lines GL5, GL8, and GL9. Output Accordingly, when the pixel of the fifth gate line is finally charged with the positive pixel signal, the pixel of the eighth gate line is secondly precharged with the positive pixel signal, and the pixel of the ninth gate line is the positive electrode. First precharged with the pixel signal of the surname.

Subsequent precharging and charging operations are performed on the pixels of the subsequent gate line in the same manner.

By doing so, the pixel signals are switched (transitioned) at the same polarity, so that the swing width is reduced accordingly, so that the load is reduced and the power consumption and heat generation amount are reduced. In addition, since the inversion is performed with two vertical dots, the vertical line phenomenon that occurs during column inversion does not occur.

1 is a polarity table of pixel signals of a current frame and a next frame showing a dot inversion driving method;

2 is a polarity table of pixel signals of a current frame and a next frame showing a column inversion driving method;

3 is an exemplary view showing a vertical line phenomenon.

4 is a block diagram of an inversion driving device of the liquid crystal display device according to the present invention;

5 is a polarity table of a pixel signal of a vertical 2-dot inversion method applied to the present invention.

6 (a) and 6 (b) are waveform diagrams of a multi-gate signal according to the present invention.

7A to 7D are polarity tables of pixel signals of a vertical two-dot inversion method showing a principle of precharging using two multi-gate signals.

8A to 8E are polarity tables of pixel signals of a vertical two-dot inversion scheme showing a principle of precharging using three multi-gate signals.

*** Description of the symbols for the main parts of the drawings ***

41: timing controller 42: gate driver

43: data driver 44: liquid crystal panel

Claims (5)

A timing controller for outputting a gate control signal and a data control signal and outputting a gate out enable signal to output a multi-gate signal in response to a pixel signal output in a vertical 2-dot inversion scheme; A gate driver for outputting a gate signal to each gate line of the liquid crystal panel in response to the gate control signal, and outputting a multi-gate signal in response to the gate-out enable signal; And a liquid crystal panel which is driven by the multi-gate signal and the pixel signal in a vertical 2-dot inversion manner, and pre-charges pixels of the same polarity on the same data line. . The inversion driving device of claim 1, wherein the multi-gate signal is a series of gate signals simultaneously supplied to two or more gate lines. 2. The inversion of the liquid crystal display device according to claim 1, wherein the liquid crystal panel is configured such that the pixels are precharged with a pixel signal of the same polarity on a subsequent same data line and then recharged by a corresponding pixel signal supplied next. drive. Outputting a gate out enable signal to output a multi-gate signal in response to a pixel signal output in a vertical 2-dot inversion scheme; A second process of outputting a multi-gate signal in response to the gate-out enable signal when outputting a gate signal to each gate line of the liquid crystal panel; And a third step of precharging the pixels having the same polarity on the same data line by driving the vertical two-dot inversion method by the multi-gate signal and the pixel signal. . The method of claim 4, wherein subsequent pixels of the same polarity on the same data line are pixels that are the same polarity and adjacent to the pixels of the previous gate line.

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