KR20060134779A - Liquid crystal display apparatus and driving method thereof - Google Patents

Abstract

A liquid crystal display device and a driving method thereof are provided to prevent an erroneous image from being displayed during one frame by generating compensation pixel data for all gate lines in one frame. A liquid crystal display device includes plural gate lines(G1~Gn), plural data lines(D1~Dm), plural pixels, a gate driver(140), and a compensation circuit(300). The gate lines are arranged to cross the data lines. The pixels are connected to corresponding gate and data lines. The gate driver drives the gate lines in response to a vertical synchronous signal and precharge-drives and main-drives the respective gate lines during one frame. The compensation circuit receives pixel data from the outside and outputs compensation pixel data, which compensates the brightness variation of the pixels due to the precharge-driving.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY APPARATUS AND DRIVING METHOD THEREOF}

1 is a view showing a liquid crystal display device according to a preferred embodiment of the present invention;

FIG. 2 is a timing diagram of some signals used in the liquid crystal display shown in FIG. 1; FIG.

3 is a correction circuit according to a preferred embodiment of the present invention;

4A and 4B illustrate an example of a display image of a liquid crystal display device performing precharge driving;

5 is a correction circuit according to another embodiment of the present invention capable of performing correction on first and second pixel data;

6 is a timing diagram showing pixel data input to the correction circuit shown in FIG. 5 and correction pixel data output from the correction circuit;

7 is a correction circuit implemented in another embodiment of the present invention.

FIG. 8 is a timing diagram showing correction pixel data output from the correction circuit shown in FIG. 7; FIG. And

9 is a view showing a correction circuit according to another embodiment of the present invention.

* Description of the main parts of the drawing

100: liquid crystal display device 110: liquid crystal panel

120: timing controller 130: data driver

140: gate driver 300, 500, 700, 900: correction circuit

Line memory: 310, 320, 510, 520, 540, 550, 710, 720, 910, 920

330, 560, 730: correction unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly, to a liquid crystal display device employing a precharge driving method and a driving method thereof.

In general, a liquid crystal display (LCD) includes two display panels including a pixel electrode and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix form and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit forming a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to form an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to control the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, the polarity of the data voltage is inverted based on the common voltage in units of frames, rows, or dots in order to prevent deterioration of the liquid crystal caused by the application of an electric field in one direction for a long time.

Meanwhile, as the resolution of the liquid crystal display device increases, the number of scanning lines, that is, gate lines, increases, and accordingly, the time taken to charge the pixels of one line decreases rapidly. In order to compensate for the reduced charging time, a precharge driving method is used. Here, in the precharge driving method, when charging a pixel connected to an arbitrary gate line, the pixel connected to an adjacent gate line having the same polarity as the charged pixel is precharged to change the polarity of the pixel, and then charged with data of the corresponding pixel. How to do it. That is, two gate lines are driven at the same time so that one gate line is driven twice in one frame, that is, precharge drive and main drive.

For example, in the liquid crystal display device driven by dot inversion, the pixel connected with the k-th gate line is precharged when the pixel connected with the k- 2nd gate line is driven by the first pixel data. Since the pixel connected to the k-th gate line is already precharged with the first pixel data, the pixel connected to the k-th gate line may be displayed differently from the desired luminance under the influence of the first pixel data when the main driving is performed with the second pixel data which is the original data. This ghost phenomenon is the biggest disadvantage of the precharge driving method.

Accordingly, an object of the present invention is to provide a liquid crystal display and a driving method thereof capable of preventing ghost phenomenon during precharge driving.

According to an aspect of the present invention for achieving the above object, a liquid crystal display device comprises: a plurality of gate lines, a plurality of data lines arranged to intersect the plurality of gate lines, each of the A plurality of pixels connected to a corresponding gate line among the gate lines and a corresponding data line among the data lines, and the plurality of gate lines in response to a vertical synchronizing signal, each gate line being free for one frame. A gate driver for charging and main driving, a correction circuit for receiving pixel data from an external device, and outputting correction pixel data correcting a change in luminance of the pixels by the precharge driving; and correcting the data lines with the correction pixel data. And a data driving circuit for driving.

The correction circuit is provided in the timing controller.

The correction circuit outputs the correction pixel data based on a line memory for storing precharge pixel data input during the precharge driving, and a difference between the precharge pixel data and main pixel data currently input from the outside. And a correction unit.

The line memory stores initial precharge pixel data, and the correction unit outputs the initial precharge pixel data stored in the line memory as the correction pixel data at the start of one frame.

The correction circuit may include a line memory for storing precharge pixel data input during the precharge driving, and a lookup for outputting the correction pixel data corresponding to a difference between the precharge pixel data and the main pixel data currently input from the outside. Contains a table.

The correction circuit outputs j-th pixel data corresponding to j-2 (j is a positive integer) gate line and stores j-th pixel data corresponding to j-th gate line input from the outside. A selector for outputting one memory and one of the j-th pixel data and the j-2th pixel data from the first memory as k-th pixel data corresponding to a k (k is a positive integer) -th gate line; a second memory for outputting the k-2th pixel data corresponding to the k-2th gate line and storing the kth pixel data from the selector, and the kth pixel data and the k-2 from the selector And a correction unit for outputting the correction pixel data based on the difference of the second pixel data.

J and k respectively designate the plurality of gate lines sequentially, and the correction unit outputs the j th pixel data as the k th pixel data when j is 1 or 2, and j is 1 or Outputs the k-th pixel data as the correction pixel data when 2, and when the j is greater than 3, the correction pixel based on the difference between the k-th pixel data and the k-2 pixel data from the selector Output the data.

The first memory outputs a j-1 th pixel data, a first line memory that stores the j th pixel data, and a j-2 th pixel data, and stores the j-1 th pixel data. And a second line memory configured to output k-1th pixel data, a third line memory to store the kth pixel data, and to output the k-2th pixel data. And a fourth line memory for storing the k-th pixel data from the selector.

When the data bit width of each of the pixels is p, the size of each of the third and fourth line memories is ((p-q) * (number of data lines)). In this case, the third line memory stores an upper (pq) bit of data of each of the pixels of the k-th pixel data, and the fourth line memory stores each of the pixels of the k + 1-th pixel data. Stores the high (pq) bit of data.

Further, the correction unit is based on a difference between an upper (pq) bit of data of each of the pixels of the k-th pixel data and an upper (pq) bit of data of each of the pixels of the k + 1th pixel data. The correction pixel data is obtained.

The correction unit outputs the k-th data as the correction pixel data when the difference between the k-th pixel data and the k-2th pixel data is smaller than a threshold value, and the k-th pixel data and the k-2th pixel. The k-th pixel data is output as the correction pixel data when the product of the difference of the data and the differential constant is larger than the k-th pixel data. The correction unit is configured such that a difference between the k-th pixel data and the k-2th pixel data is not smaller than a threshold value and a product of the difference between the k-th pixel data and the k-2th pixel data and a differential constant is the kth pixel. When not greater than the data, the product of the difference between the k-th pixel data RGB _Gk and the k-second pixel data RGB _{Gk -2} and the difference constant α is multiplied by the k-second pixel data RGB _{Gk And (2} ) RGB _{Gk -2-} (RGB _Gk -RGB _{Gk -2} ) * α as the correction pixel data.

The k th pixel data and the k-2 th pixel data have the same polarity.

According to another aspect of the present invention, a liquid crystal display device includes: a plurality of gate lines, a plurality of data lines arranged to intersect the plurality of gate lines, a gate line corresponding to each of the gate lines, and A gate driver configured to drive a plurality of pixels connected to a corresponding data line among the data lines and the plurality of gate lines in response to a vertical synchronization signal, and to precharge the second gate line when the first gate line is driven; A timing controller which receives pixel data from the outside and outputs correction pixel data based on a difference between first pixel data corresponding to the first gate line and second pixel data corresponding to the second gate line, and A data sphere for driving the data lines with the correction pixel data when the second gate line is driven And a circuit.

The timing controller drives pixels connected to the first gate line and pixels connected to the second gate line with the same polarity.

The timing controller outputs j-second pixel data corresponding to j-2 (j is a positive integer) gate line and stores j-th pixel data corresponding to j-th gate line input from the outside. A first memory and a selector for outputting one of said j-th pixel data and said j-2th pixel data from said first memory as said second pixel data in response to a selection signal, and outputting said first pixel data And a second memory for storing the second pixel data from the selector, and a correction unit for outputting the corrected pixel data based on a difference between the first pixel data and the second pixel data from the selector. .

The selection signal has a first level such that the j-th pixel data is selected when j is 1 or 2, and has a second level so that the j-2nd pixel data is selected when j is greater than 2.

The correction unit outputs the k-th pixel data as the correction pixel data when j is 1 or 2, and the k-th pixel data and the k-2th pixel from the selector when j is greater than 3 The correction pixel data is output based on the difference in data.

The timing controller includes a line memory for storing the first pixel data, and a correction unit for outputting the correction pixel data based on a difference between the first pixel data and the second pixel data.

The line memory stores initial precharge pixel data, and the correction unit outputs the initial precharge pixel data stored in the line memory as the correction pixel data at the start of one frame.

According to still another aspect of the present invention, there is provided a method of driving a liquid crystal display, comprising: inputting first data, a plurality of pixels connected to a first gate line, and a plurality of pixels connected to a second gate line adjacent to the first gate line Driving pixels of the first data as the first data, inputting second data, calculating corrected pixel data based on a difference between the first data and the second data, and the second gate line. Driving the plurality of pixels coupled to the correction pixel data.

The driving of the pixel connected to the second gate line as the second data may include driving the pixel connected to the second gate line as the second data and simultaneously connecting the third gate line adjacent to the second gate line. A pixel is driven with the correction pixel data.

The driving method further includes storing the first data in a line memory.

The calculating of the corrected pixel data includes outputting the second data as the corrected pixel data when a difference between the first data and the second data is smaller than a threshold.

Computing the corrected pixel data includes outputting the second data as the corrected pixel data when a product of a difference between the first data and the second data and a difference constant is greater than the second data.

Computing the corrected pixel data may include: wherein the difference between the first data and the second data is not less than a threshold value and the product of the difference between the first data and the second data and the differential constant is not greater than the second data. when the first data (RGB _Gk) and the second data the product of the difference and the differential constant (α) of (RGB _{Gk -2)} and the second data (RGB _{Gk -2)} a value ((RGB _Gk- in ₂ )-(RGB _Gk- RGB _{Gk -2} ) * alpha) is output as the correction pixel data.

In the calculating of the correction pixel data, the correction pixel data is calculated based on a difference between an upper q bit of the first data and an upper q bit of the second data.

The second gate line is adjacent to the first gate line, and the second gate line is a gate line connected to a pixel having the same polarity as a pixel connected to the first gate line.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 illustrates a liquid crystal display according to a preferred embodiment of the present invention.

Referring to FIG. 1, the liquid crystal display 100 may include a liquid crystal panel 110, a timing controller 120, a data driver 130, and a gate driver 140.

The liquid crystal panel 110 includes a plurality of gate lines G1 -Gn, a plurality of data lines D1 -Dm perpendicularly intersecting the gate lines G1 -Gn, and each of the gate lines G1. A plurality of pixels connected to a corresponding gate line of -Gn and a corresponding data line of the data lines D1 to Dm are included, and the pixels are arranged in a matrix structure.

Each pixel includes a thin film transistor (not shown) having a gate electrode and a source electrode connected to a gate line and a data line, respectively, a liquid crystal capacitor (not shown), and a storage capacitor (not shown) connected to a drain electrode of the thin film transistor. It includes. In this pixel structure, the gate lines are sequentially selected by the gate driver 140, and when the gate-on voltage is applied in the form of a pulse to the selected gate line, the thin film transistor of the pixel connected to the gate line is turned on, and then the data driver A voltage including pixel information is applied to each data line by 130. This voltage is applied to the liquid crystal capacitor and the storage capacitor through the thin film transistor of the pixel to drive these capacitors to perform a predetermined display operation.

The timing controller 120 receives a horizontal sync signal H_SYNC, a vertical sync signal V_SYNC, a data enable signal DE, and pixel data RGB provided from an external graphic source. The timing controller 120 converts a data format to conform to the specifications of the liquid crystal panel 110, and corrects pixel data CRGB corrected by the correction circuit 300 to correct a luminance change of pixels due to precharge driving. The horizontal synchronization start signal STH and the load signal TP are output to the data driver 130. Specific driving and operation of the correction circuit 300 will be described later in detail.

In addition, the timing controller 120 may include a vertical synchronization start signal STV1 (start vertical), a gate clock signal CPV1, in response to the horizontal synchronization signal H_SYNC, the vertical synchronization signal V_SYNC, and the data enable signal DE. And an output enable signal (OE: output enable) to the gate driver 140. The vertical synchronization signal STV1 indicates the start of output of the gate on pulse, the gate clock signal CPV1 controls the output timing of the gate on pulse, and the output enable signal OE defines the width of the gate on pulse. .

The data driver 130 generally includes a plurality of data driver ICs, and the liquid crystal panel 110 of the liquid crystal panel 110 in response to the correction pixel data CRGB and the control signals STH and TP provided from the timing controller 120. Signals for driving the data lines D1 -Dm are generated. For example, latching correction pixel data CRGB sequentially received in synchronization with the load signal TP, and converting a timing system of dot at a time scanning into a line at a time scanning. The pixel data is output to the data lines D1 -Dm.

The gate driver 140 includes a plurality of gate driver ICs, and the gate lines G1 -Gn of the liquid crystal panel 110 according to control signals CPV1, STV1, and OE provided from the timing controller 120. Scan sequentially. Here, scanning refers to sequentially applying a gate-on voltage to the gate line to make the pixel of the gate line to which the gate-on voltage is applied to enable a data write.

FIG. 2 is a timing diagram of some signals used in the liquid crystal display shown in FIG. 1. The vertical synchronization start signal STV1 is a start signal for gate line driving including precharge driving.

In the liquid crystal display shown in FIGS. 1 and 2, one gate line is driven twice during one frame by the vertical synchronization start signal STV1. Therefore, one gate line is precharge driven and main driven twice in one frame. That is, when the k-2nd gate line G _{k -2} is main driven, the kth gate line G _k is precharge driven. In such precharge driving, the charge amount of the k-th gate line G _k increases by driving the k- 2nd gate line G _{k -2} . K is a positive integer herein.

3 shows a correction circuit according to a preferred embodiment of the present invention. The correction circuit 300 according to an exemplary embodiment of the present invention includes pixel data RGB _Gk (hereinafter referred to as k-th pixel data) and pixels previously input for pixels connected to a k-th gate line G _k currently input from the outside. The pixel data RGB _Gk-2 (hereinafter referred to as k-2 pixel data) for the pixels connected to the -2nd gate line G _k-2 is compared, and the corrected pixel data CRGB _Gk is output according to the comparison result. do.

Referring to FIG. 3, the correction circuit 300 includes first and second line memories 310 and 320 and a correction unit 330. The first line memory 310 outputs the k-1 th pixel data RGB _Gk-1 and stores the k th pixel data RGB _Gk . The second line memory 320 outputs the k-2 th pixel data RGB _{Gk -2 and} stores the k-1 th pixel data RGB _Gk-1 . Correction unit 330 compares the k-th pixel data of the main pixel data (RGB _Gk) and the pre-charge the pixel data in k-2-th pixel data (RGB _{Gk -2),} and outputs the corrected pixel data (CRGB _Gk) .

An algorithm for obtaining corrected pixel data in the correction unit 330 is shown in Equation 1 below.

if (θ> (RGB _{Gk -2} -RGB _Gk )), CRGB _Gk = RGB _Gk

else if (α * (RGB _{Gk -2} -RGB _Gk )> RGB _Gk ), CRGB _Gk = RGB _Gk

else CRGB _Gk = RGB _Gk -α * (RGB _{Gk -2} -RGB _Gk )

Where θ is the threshold and α is the differential constant.

The correction unit 330 outputs the k-th data as the correction pixel data CRGB _Gk when the difference between the k-th pixel data RGB _Gk and the k-2nd pixel data RGB _Gk is smaller than the threshold value θ.

The correction unit 330 is k-th when the product of the difference between the k-th pixel data RGB _Gk and the k-2nd pixel data RGB _{Gk -2} and the difference constant α is greater than the k-th pixel data RGB _Gk . The pixel data RGB _Gk is output as the correction pixel data CRGB _Gk .

The correction unit 330 determines that the difference between the k-th pixel data RGB _Gk and the k-th pixel data RGB _{Gk -2} is not smaller than the threshold value θ and the k-th pixel data RGB _Gk and k-2 the second pixel data as a product of the difference and differential constant (α) of (RGB _{Gk -2)} not more than the k-th pixel data (RGB _Gk), the k-th pixel data (RGB _Gk) and the k-2-th pixel data (RGB Correcting the value (RGB _Gk -α * (RGB _{Gk -2} -RGB _Gk )) obtained by subtracting the product of the difference of _{Gk -2} and the difference constant α from the k-2nd pixel data RGB _{Gk -2} It outputs as pixel data CRGB _Gk .

The correction pixel data CRGB _Gk of the k-th gate line output from the correction circuit 300 is further processed after the gamma correction or the like is performed in the timing controller 120. Is provided.

4A and 4B illustrate an example of a display image of a liquid crystal display that performs precharge driving. Referring to FIG. 4A, only pixels connected to the k-th gate line G _{k -2} are light gray, and the remaining gate lines G _{k -1} , G _k , and G _{k +1} are equally dark gray. Although it should be displayed, a ghost phenomenon occurs in which pixels connected to the k-th gate line G _k are displayed brighter by pixel data of pixels connected to the k-2 th gate line G _{k -2} . According to the present invention, since the correction data CRGB _Gk correcting the luminance of the k-th pixel data RGB _Gk is output according to the difference between the k-th pixel data RGB _Gk and the k-2nd pixel data RGB _Gk , the ghost is output. The phenomenon is eliminated.

In general, a ghost phenomenon occurs when the difference between the k-th pixel data RGB _{Gk -2} and the k-th pixel data RGB _Gk is large, so that the correction unit 330 is configured to adjust the pixel data RGB _Gk and RGB _Gk-2 . Only some of the upper bits can be compared to determine if correction is required.

In a preferred embodiment, the first and second line memories 310 and 320 are sized to store the upper four bit data of 8 bit pixel data corresponding to each of the pixels. That is, each of the first and second line memories 310 and 320 has a size equal to 4 bits * 3 (R, G, B) * (the number of pixels connected to one gate line). The correction unit 330 compares the k-2nd pixel data RGB _Gk-2 and the kth pixel data RGB _Gk and outputs the corrected pixel data CRGB _Gk . As such, the first and second line memories 310 and 320 may be compared by comparing only the upper 4 bits instead of the entire 8-bit pixel data of each of the data RGB _Gk and RGB _{Gk −2} in the correction unit 330. Can be reduced to 1/2.

In a preferred embodiment of the present invention, the correction circuit 300 shown in FIG. 3 is included in the timing controller 120 of the liquid crystal display 100 shown in FIG. 1. However, the correction circuit 300 may be configured independently of the timing controller 120.

Also, the correction circuit 300 shown in FIG. 3 has a configuration suitable for a 1-dot inverted liquid crystal display device in which k-th pixel data RGB _{Gk -2} and k-th pixel data RGB _Gk are driven with the same polarity. Have The correction circuit 300 may be variously changed according to the inversion driving type of the liquid crystal display. For example, the correction circuit provided in the 2-dot inverted liquid crystal display outputs the correction pixel data RGB _Gk based on the difference between the k-4th pixel data RGB _{Gk -4} and the kth pixel data RGB _Gk . Has a configuration for.

Referring back to FIG. 3, the correction unit 330 does not perform correction on previous pixel data when the first pixel data RGB _G1 and the second pixel data RGB _G2 are inputted, but the data RGB _G1 , RGB _G2 ) is output as corrected pixel data as it is. The first and second pixel data is because there is no previous pixel data.

5 shows a correction circuit according to another embodiment of the present invention capable of performing correction on the first and second pixel data. The correction circuit 500 shown in FIG. 5 is provided inside the timing controller 120 shown in FIG. 1 and may be configured separately from the timing controller 120 as necessary.

Referring to FIG. 5, the correction circuit 500 includes first to fourth line memories 510, 520, 540, and 550, a multiplexer 530, and a correction unit 560. The first line memory 510 outputs the j−1 th pixel data RGB _{Gj −1 and} stores the j th pixel data RGB _Gj provided from the outside. The second line memory 520 outputs the j-2 th pixel data RGB _{Gj-2 and} stores the j−1 th pixel data RGB _Gj-1 from the first line memory 510. The multiplexer 530 selects one of the j-th pixel data RGB _Gj and the j-second pixel data RGB _Gj-2 output from the second line memory 520 in response to the selection signal SEL. Output as (SRGB _Gj ). The selection signal SEL is activated to select the j-th pixel data RGB _Gj when j is 1 or 2, and is generated in the timing controller 120.

The third line memory 540 outputs the k−1 th pixel data SRGB _{Gk −1 and} stores the k th pixel data SRGB _Gk from the multiplexer 530. The fourth line memory 550 outputs the k-2nd pixel data SRGB _{Gk -2} , and stores the k−1th pixel data RGB _Gk-1 from the third line memory 540. The correction unit 560 outputs correction pixel data CRGB _Gk based on the difference between the pixel data SRGB _{Gk -2} and SRGB _Gk . The correction algorithm of the correction unit 560 is the same as Equation 1 mentioned above.

FIG. 6 is a timing diagram illustrating pixel data RGB _Gk input to the correction circuit 500 and correction pixel data CRGB _Gk output from the correction circuit 500 illustrated in FIG. 5.

5 and 6, when the first gate line G1 and the second gate line G2 are precharged, the input pixel data RGB _Gj is transferred through the multiplexer 530 and the correction unit 560. It is output as it is as correction pixel data CRGB _Gk . That is, the correction pixel data CRGB _G1 and CRGB _G2 for the gate lines G1 and G2 are a and b, respectively. Since j = 3 when the first gate line G1 is main driven, the multiplexer 530 outputs the pixel data RGB _{Gj −2} from the second line memory 520 as the selection pixel data SRGB _Gk . do. The correction unit 560 is a correction pixel data CRGB _Gk based on the difference between the pixel data SRGB _Gk output from the multiplexer 530 and the pixel data SRGB _{Gk -2} from the fourth line memory 550. Print a ' Thereafter, the corrected pixel data CRGB _Gk b ', c', d ', e', and f 'are sequentially output.

According to the correction circuit 500 illustrated in FIG. 5 as described above, the gate lines G1 and G2 are precharged, and then the pixel data a and b when the precharge is driven when the main drive is performed. Corrected pixel data a 'and b' are generated by correcting main-driven pixel data. Therefore, the pixels connected to the gate lines G1 and G2 are driven with the correction pixel data a 'and b'. According to such a correction circuit 500, it is possible to prevent the ghost phenomenon occurring in the entire frame during precharge driving.

7 shows a correction circuit implemented in another embodiment of the present invention. Referring to FIG. 7, the correction circuit 700 includes first and second line memories 710 and 720 and a correction unit 730. Initial precharge pixel data RGBx is stored in the first and second line memories 710 and 720 at the beginning of every frame, respectively. The initial precharge pixel data RGBx has a value of a middle gray level.

FIG. 8 is a timing diagram illustrating correction pixel data CRGB _Gk output from the correction circuit 700 illustrated in FIG. 7. Since the initial precharge pixel data RGBx is stored in the first and second line memories 710 and 720, the pixels connected to the gate lines G1 and G2 are stored in x, which is the initial precharge pixel data RGBx. Driven by When the gate line G1 is driven main, correction pixel data a 'based on the difference between the precharge pixel data x and the input pixel data a is generated. Further, when the gate line G2 is main driven, corrected pixel data b 'is generated based on a difference between the precharge pixel data x and the input pixel data b.

The correction circuit 700 shown in FIG. 7 does not have the first and second line memories 510 and 520 and the multiplexer 530 in the correction circuit 500 shown in FIG. Correction pixel data for these fields can be obtained.

9 is a view showing a correction circuit according to another embodiment of the present invention. The correction circuit 900 shown in FIG. 9 includes first and second line memories 910, 920, and a lookup table (instead of the correction unit 330 of the correction circuit 300 shown in FIG. 3). 930). The lookup table 930 is a kind of memory that stores correction pixel data CRGB _Gk according to a difference between the input pixel data RGB _Gk and the pixel data RGB _{Gk −2} from the line memory 920. The lookup table 930 outputs corresponding correction pixel data CRGB _Gk when the pixel data RGB _G and RGB _{Gk −2} are input.

In the above, the configuration and operation of the circuit according to the present invention are shown in accordance with the above description and drawings, but this is merely an example, and various changes and modifications are possible without departing from the spirit of the present invention. to be.

According to the present invention as described above, the ghost phenomenon can be prevented in the precharge-driven liquid crystal display device. Furthermore, when the main driving of the first and second gate lines of a frame is performed, the correction of the entire gate lines of one frame is generated by generating the correction pixel data with reference to the pixel data which precharged the first and second gate lines. Pixel data can be generated. Therefore, it is possible to prevent an error image that can appear in an entire frame by precharge driving.

Claims (37)

A plurality of gate lines; A plurality of data lines arranged to cross the plurality of gate lines; A plurality of pixels each connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines; A gate driver configured to drive the plurality of gate lines in response to a vertical synchronization signal, wherein each gate line is precharged and main driven for one frame; A correction circuit for receiving pixel data from an external device and outputting correction pixel data correcting a change in luminance of the pixels by the precharge driving; And And a data driver circuit driving the data lines with the correction pixel data. The method of claim 1, And the correction circuit is provided in a timing controller. The method of claim 1, The correction circuit, A line memory for storing precharge pixel data input during the precharge driving; And And a correction unit for outputting the correction pixel data based on a difference between the precharge pixel data and main pixel data currently input from the outside. The method of claim 3, wherein And the line memory stores initial precharge pixel data. The method of claim 4, wherein The correction unit, And the initial precharge pixel data stored in the line memory at the beginning of one frame as the correction pixel data. The method of claim 1, The correction circuit, A line memory for storing precharge pixel data input during the precharge driving; And And a lookup table configured to output the corrected pixel data corresponding to the difference between the precharge pixel data and the main pixel data currently input from the outside. The method of claim 1, The correction circuit, a first memory configured to output j-second pixel data corresponding to j-2 (j is a positive integer) and to store j-th pixel data corresponding to the j-th gate line input from the outside; A selector for outputting one of the j-th pixel data and the j-2-th pixel data from the first memory as k-th pixel data corresponding to a k-th (k is a positive integer) gate line; a second memory configured to output k-th pixel data corresponding to a k-th gate line and store the k-th pixel data from the selector; And And a correction unit for outputting the correction pixel data based on the difference between the k-th pixel data and the k-2th-pixel data from the selector. The method of claim 7, wherein And j and k respectively designate the plurality of gate lines sequentially. The method of claim 8, The correction unit, And outputting the j-th pixel data as the k-th pixel data when j is 1 or 2. The method of claim 8, The correction unit And outputting the k-th pixel data as the correction pixel data when j is 1 or 2. FIG. The method of claim 10, The correction unit, And the correction pixel data are output based on the difference between the k-th pixel data and the k-2th-pixel data from the selector when j is greater than three. The method of claim 7, wherein The first memory, a first line memory configured to output j-th pixel data and to store the j-th pixel data; And And a second line memory configured to output the j-2 th pixel data and to store the j-1 th pixel data. The method of claim 7, wherein The second memory, a third line memory configured to output k-th pixel data and to store the k-th pixel data; And And a fourth line memory configured to output the k-2th pixel data and to store the k-1th pixel data from the selector. The method of claim 12, When the data bit width of each of the pixels is p, The size of each of the third and fourth line memories is ((p-q) * (number of data lines)). The method of claim 14, The third line memory stores an upper (p-q) bit of data of each of the pixels of the k-th pixel data; And And the fourth line memory stores upper (p-q) bits of data of each of the k + 1th pixel data. The method of claim 15, The correction unit, Obtaining the corrected pixel data based on a difference between an upper (pq) bit of data of each of the pixels of the k-th pixel data and an upper (pq) bit of data of each of the pixels of the k + 1th pixel data Liquid crystal display. The method of claim 7, wherein The correction unit, And outputting the k-th data as the correction pixel data when the difference between the k-th pixel data and the k-2th pixel data is smaller than a threshold. The method of claim 7, wherein The correction unit, And outputting the k-th pixel data as the correction pixel data when the product of the difference between the k-th pixel data and the k-2th-pixel data and the difference constant is greater than the k-th pixel data. The method of claim 7, wherein The correction unit, The difference between the kth pixel data and the k-2nd pixel data is not less than a threshold and the product of the difference between the kth pixel data and the k-2nd pixel data and the differential constant is not greater than the kth pixel data. When the difference between the k th pixel data RGBGk and the k-2 th pixel data RGBGk-2 and the difference constant α is subtracted from the k-2 th pixel data RGBGk-2, A liquid crystal display for outputting RGBGk-2- (RGBGk-RGBGk-2) * α) as the correction pixel data. The method of claim 7, wherein And the k-th pixel data and the k-th pixel data have the same polarity. A plurality of gate lines; A plurality of data lines arranged to cross the plurality of gate lines; A plurality of pixels each connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines; A gate driver driving the plurality of gate lines in response to a vertical synchronization signal, wherein the gate driver precharges a second gate line when driving the first gate line; A timing controller configured to receive pixel data from an external source and output correction pixel data based on a difference between first pixel data corresponding to the first gate line and second pixel data corresponding to the second gate line; And And a data driver circuit driving the data lines with the correction pixel data when the second gate line is driven. The method of claim 21, The timing controller, And a pixel connected to the first gate line and a pixel connected to the second gate line with the same polarity. The method of claim 21, The timing controller, a first memory configured to output j-second pixel data corresponding to j-2 (j is a positive integer) and to store j-th pixel data corresponding to the j-th gate line input from the outside; A selector for outputting, as the second pixel data, one of the j-th pixel data and the j-second-th pixel data from the first memory in response to a selection signal; A second memory for outputting the first pixel data and storing the second pixel data from the selector; And And a correction unit for outputting the correction pixel data based on a difference between the first pixel data and the second pixel data from the selector. The method of claim 20, The selection signal is, And a second level such that the j-th pixel data is selected when j is 1 or 2, and a second level so that the j-2nd pixel data is selected when j is greater than 2. The method of claim 24, The correction unit, And outputting the k-th pixel data as the correction pixel data when j is 1 or 2. FIG. The method of claim 25, The correction unit, And the correction pixel data are output based on the difference between the k-th pixel data and the k-2th-pixel data from the selector when j is greater than three. The method of claim 21, The timing controller, A line memory for storing the first pixel data; And And a correction unit for outputting the correction pixel data based on a difference between the first pixel data and the second pixel data. The method of claim 27, And the line memory stores initial precharge pixel data. The method of claim 28, The correction unit, And the initial precharge pixel data stored in the line memory at the beginning of one frame as the correction pixel data. Inputting first data; Driving a plurality of pixels connected to a first gate line and a plurality of pixels connected to a second gate line adjacent to the first gate line as the first data; Inputting second data; Calculating corrected pixel data based on the difference between the first data and the second data; And And driving the plurality of pixels connected to the second gate line as the correction pixel data. The method of claim 30, The driving of the pixel connected to the second gate line as the second data may include: Driving a pixel connected to the second gate line as the second data and driving a pixel connected to a third gate line adjacent to the second gate line as the correction pixel data. . The method of claim 30, And storing the first data in a line memory. The method of claim 30, Computing the correction pixel data, And outputting the second data as the correction pixel data when the difference between the first data and the second data is smaller than a threshold. The method of claim 30, Computing the correction pixel data, And outputting the second data as the correction pixel data when the product of the difference between the first data and the second data and the differential constant is greater than the second data. The method of claim 30, Computing the correction pixel data, When the difference between the first data and the second data is not less than a threshold and the product of the difference and the differential constant of the first data and the second data is not greater than the second data, the first data RGBGk and The difference between the second data RGBGk-2 and the difference constant α is multiplied by the A value (RGBGk-2)-(RGBGk-RGBGk-2) * α in the second data RGBGk-2. And a liquid crystal display device for outputting the correction pixel data. The method of claim 30, Computing the correction pixel data, And the correction pixel data is calculated based on a difference between an upper q bit of the first data and an upper q bit of the second data. The method of claim 30, And the second gate line is adjacent to the first gate line, and the second gate line is a gate line connected to a pixel having the same polarity as a pixel connected to the first gate line.

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