KR20090060481A - Method of manufacture for pcb - Google Patents
Method of manufacture for pcb Download PDFInfo
- Publication number
- KR20090060481A KR20090060481A KR1020070127305A KR20070127305A KR20090060481A KR 20090060481 A KR20090060481 A KR 20090060481A KR 1020070127305 A KR1020070127305 A KR 1020070127305A KR 20070127305 A KR20070127305 A KR 20070127305A KR 20090060481 A KR20090060481 A KR 20090060481A
- Authority
- KR
- South Korea
- Prior art keywords
- substrate
- dfr
- circuit board
- coating
- thickness
- Prior art date
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0014—Shaping of the substrate, e.g. by moulding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
The present invention relates to a circuit board manufacturing method. More specifically, in the method of manufacturing a circuit board using the semi-additive method, a half etching process is added to replace expensive raw materials, thereby reducing raw material costs and adding a polishing process to copper plating. The present invention relates to a method for manufacturing a circuit board that eliminates the thickness variation in the circuit.
Recently, trends for IC packages and FPCB circuit boards have been increasingly used in the FINE pattern, and the core thickness of raw materials is getting thinner.
However, it was difficult to form a FINE pattern and adjust a constant width and hole location by using an existing etching method using the material.
Therefore, a research has been attempted to fabricate a circuit board by applying a semi-additive method of forming a pattern with copper plating by proceeding in the same way to a DFR developing process instead of a conventional etching method, but there are some problems.
First, there is a problem in that productivity is lowered and production costs are increased because the raw material price for the semi-additive is high.
In addition, there is a problem that a problem occurs during the wire bonding (WIRE BONDING) in the finished product state due to the thickness variation of the copper plating in the process of forming the pattern by copper plating.
1 is a process chart for a conventional etching method.
Referring to Figure 1 described above the etching method is as follows.
First, D / F coating. The circuit is then placed on the coating and developed.
An etchant is poured on the surface of the developed substrate to melt the metal.
Next, after the peeling step of scraping off the coating layer coated on the metal surface, the fabrication of the circuit board by the conventional etching method is completed.
Such a method is a method of manufacturing a general circuit board.
Another method is as follows.
Figure 2 is a process chart of the semi-additive (SEMI-ADDITIVE) method applied to the present invention.
Referring to Figure 2 describes the semi-additive (SEMI-0ADDITIVE) method applied to the present invention.
First, holes are processed in the substrate. And D / F coating used for the etching method is performed. The film is coated on the surface of the coated substrate and exposed to light.
It develops on the exposed board | substrate and plates a pattern (PATTERN).
D / F stripping remaining on the plated circuit board surface and SOFT etching are performed.
The present invention has been made to solve the above problems, in the method of manufacturing a circuit board using a semi-additive method, by adding a half etching process to replace expensive raw materials to reduce the raw material cost and add a polishing process copper plating process It is an object of the present invention to provide a method for manufacturing a circuit board that eliminates the thickness variation in the circuit.
According to an aspect of the present invention, there is provided a method of fabricating a circuit board, the method comprising: etching HALF to thin a surface of the substrate; Laser drilling a hole in the substrate; Coating chemical copper on the laser drilled substrate; Applying a DFR coating to the substrate coated with chemical copper; Performing a DFR development and exposure on the substrate having a DFR coating; Performing a DFR development and electroplating the exposed substrate; Performing a polishing process on the electroplated substrate to make the plating thickness uniform; DFR stripping the polished substrate; SOFT etching the DFR stripped substrate; Performing a PSR pretreatment process on the SOFT etched substrate; And performing a post process on the substrate subjected to the PSR pretreatment process.
In addition, the thickness of the Cu produced in the HALF etching step is characterized in that 2 ~ 3 μm.
As described above, according to the present invention, in the method of manufacturing a circuit board using the semi-additive process, a half etching process is added to replace expensive raw materials, thereby reducing raw material costs and adding a polishing process to thickness variation in the copper plating process. The circuit board manufacturing method eliminates the cost and contributes to the productivity improvement, and eliminates the plating thickness polarization generated in the copper plating process by eliminating the plating thickness variation caused by the current or the gap distance and the flow of the plating solution in the copper plating process. Can be obtained.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First of all, in adding reference numerals to the components of each drawing, it should be noted that the same reference numerals are used as much as possible even if displayed on different drawings. In addition, in describing the present invention, it is determined that the detailed description of the related well-known configuration or function may obscure the gist of the present invention.
In this case, detailed description thereof will be omitted.
3 is a flowchart illustrating a circuit board manufacturing method according to a preferred embodiment of the present invention.
Referring to FIG. 3, first, HALF etching is performed (S10). Here, HALF etching is used to thinly cut Cu on the upper and lower surfaces of the substrate in order to convert the commonly used substrate into the substrate used in the semi-additive process. In other words, the thickness of a general substrate is about 12μm, making it as thin as 2 ~ 3μm.
This makes it possible to use a substrate commonly used in the semi-additive process, thereby reducing the cost of the material.
Next, holes (HOLE) are formed on the surface of the substrate by laser drilling (S20). And chemical copper is formed (S30).
After forming the chemical copper is subjected to DFR coating (S40). Next, the DFR development and exposure described in the background art are performed (S50).
Electrocopper plating is performed on the exposed substrate (S60).
A polishing process is performed on the electroplated substrate (S70). Here, the polishing process is a process that does not exist in the prior art, the plating thickness variation caused by the current or the inter-pole distance and the flow of the plating liquid in the copper plating process occurs to remove this to polish the plated surface through the polishing process to uniform the thickness of the surface To make.
Next step is DFR stripping (S80). The PSR pretreatment process is performed through the SOFT etching process (S90) (S100). Finally finish in the post-process (S110).
4 is an explanatory diagram illustrating a HALF etching step in the flowchart of FIG. 3.
Referring to Figure 4, as described above, this process is the process of adding the present invention in the conventional process in order to convert the substrate commonly used in the semi-additive process to the substrate of the upper and lower surfaces of the substrate Cut Cu thinly. In other words, the thickness of the general substrate is about 12μm, which makes it thin as 2 ~ 3μm, so that the commonly used substrate can be used in the semi-additive process, thereby reducing the cost of the material.
As shown in the figure, the HALF E / T solution is sprayed on the raw material and the surface of the raw material is etched to make the thickness of Cu thin.
FIG. 5 is an explanatory diagram illustrating a polishing process step in the flowchart of FIG. 3.
Referring to FIG. 5, the plating thickness variation caused by the current or the inter-pole distance and the flow of the plating liquid is generated in the copper plating process. To make the thickness uniform.
As shown in the drawing, the surface of the copper plated substrate is polished using a polishing roller.
The above description is merely illustrative of the technical idea of the present invention, and those skilled in the art to which the present invention pertains may make various modifications and changes without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present invention.
1 is a process chart for a conventional etching method,
Figure 2 is a process diagram of the semi-additive (SEMI-ADDITIVE) method applied to the present invention,
3 is a flow chart showing a circuit board manufacturing method according to a preferred embodiment of the present invention;
4 is an explanatory diagram illustrating a HALF etching step in the flowchart of FIG. 3;
FIG. 5 is an explanatory diagram illustrating a polishing process step in the flowchart of FIG. 3.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070127305A KR20090060481A (en) | 2007-12-10 | 2007-12-10 | Method of manufacture for pcb |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070127305A KR20090060481A (en) | 2007-12-10 | 2007-12-10 | Method of manufacture for pcb |
Publications (1)
Publication Number | Publication Date |
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KR20090060481A true KR20090060481A (en) | 2009-06-15 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020070127305A KR20090060481A (en) | 2007-12-10 | 2007-12-10 | Method of manufacture for pcb |
Country Status (1)
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KR (1) | KR20090060481A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101039330B1 (en) * | 2009-10-19 | 2011-06-08 | 삼성전기주식회사 | Printed circuit board and manufacturing method thereof |
CN103813657A (en) * | 2012-10-05 | 2014-05-21 | Si弗莱克斯有限公司 | The printed circuit board manufacturing method |
CN113395836A (en) * | 2021-05-19 | 2021-09-14 | 惠州市金百泽电路科技有限公司 | Method for manufacturing small-spacing high-thickness pure copper circuit board |
-
2007
- 2007-12-10 KR KR1020070127305A patent/KR20090060481A/en not_active Application Discontinuation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101039330B1 (en) * | 2009-10-19 | 2011-06-08 | 삼성전기주식회사 | Printed circuit board and manufacturing method thereof |
CN103813657A (en) * | 2012-10-05 | 2014-05-21 | Si弗莱克斯有限公司 | The printed circuit board manufacturing method |
CN113395836A (en) * | 2021-05-19 | 2021-09-14 | 惠州市金百泽电路科技有限公司 | Method for manufacturing small-spacing high-thickness pure copper circuit board |
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