KR20090053243A - Method of inspecting operation of a test handler - Google Patents

Abstract

The operation check method of the test handler sets a virtual semiconductor device in the customer tray. The virtual semiconductor device is loaded from the customer tray into the test tray. The virtual semiconductor device of the test tray is tested. Input test data for the virtual semiconductor device. The virtual semiconductor device is unloaded from the test tray to the customer tray according to the test data.

Description

How to check the operation of the test handler {METHOD OF INSPECTING OPERATION OF A TEST HANDLER}

The present invention relates to a method of checking the operation of a test handler. More specifically, the present invention relates to a test handler operation checking method for confirming that the test handler is operating normally.

In general, memory ICs or non-memory semiconductor devices and module ICs having the semiconductor devices circuitically configured on a single substrate are shipped after various tests after production.

The test handler is an apparatus for automatically testing the semiconductor device and the module. In the test handler, the customer trays containing the semiconductor devices to be tested by the operator are loaded into the loading stacker of the test handler, the semiconductor devices of the loading stacker are transferred to a separate test tray having heat resistance, and then remounted. The test tray in which the semiconductor devices are mounted is sent to a test site to perform a test. At the test site, a predetermined electrical test is performed by electrically connecting the lead or ball portion of the semiconductor devices mounted on the test tray to the socket of the test head. The test handler performs a test by separating semiconductor devices of a test tray from which a test is completed, and classifying and mounting the semiconductor devices on a customer tray of an unloading stacker according to a test result.

When there is an abnormality in the operation of the test handler, it is difficult to trust the quality of the semiconductor devices tested in the test handler. Therefore, it is necessary to check whether the test handler is operating normally before the test handler tests the semiconductor devices.

The test handler does not operate unless semiconductor devices are accommodated in the customer tray. Therefore, customer trays containing the semiconductor elements are required to check the operation of the test handler. Therefore, it is inconvenient to have the semiconductor elements when checking the test handler.

The present invention provides a test handler operation checking method in which semiconductor devices are unnecessary.

The test handler operation checking method according to the present invention sets a virtual semiconductor device in a customer tray. The virtual semiconductor device is loaded from the customer tray to the test tray. The virtual semiconductor device of the test tray is tested. Test data corresponding to the virtual semiconductor device is input. The virtual semiconductor device is unloaded from the test tray to the customer tray according to the test data.

According to an embodiment of the present invention, the setting of the virtual semiconductor device for the customer tray may be performed by inputting virtual data to the test handler.

According to another exemplary embodiment of the present invention, test data corresponding to the virtual semiconductor device may be input while the virtual semiconductor device is tested.

According to another embodiment of the present invention, the test for the virtual semiconductor device may be performed for the same time as the test for the actual semiconductor device.

The present invention uses a virtual semiconductor device to check the operation of the test handler. Therefore, there is no need to prepare an actual semiconductor device to check the operation of the test handler.

Hereinafter, with reference to the accompanying drawings will be described in detail the operation check method of the test handler according to an embodiment of the present invention. As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. In describing the drawings, similar reference numerals are used for similar elements. In the accompanying drawings, the dimensions of the structures are shown in an enlarged scale than actual for clarity of the invention.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, action, component, part, or combination thereof described in the specification, and one or more other features. It should be understood that it does not exclude in advance the possibility of the presence or addition of gongs or numbers, steps, actions, components, parts or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

1 is a plan view illustrating a general test handler 100.

Referring to FIG. 1, the test handler 100 includes a loading stacker 110, a loading unit 130, a preheating chamber 150, a test chamber 160, a heat removing chamber 170, and an unloading. The unit 140 includes an unloading stacker 120, a loading picker 181, and an unloading picker 182.

The loading stacker 110 and the unloading stacker 120 are disposed at the front of the handler. The loading stacker 110 includes a plurality of customer trays (CTs) in which semiconductor devices to be tested are stored. The unloading stacker 120 is loaded with a plurality of empty customer trays CT in which the semiconductor devices which have been tested are classified and stored according to the test result.

The loading unit 130 is disposed at the rear of the loading stacker 110, and the test tray TT in which the semiconductor elements conveyed from the loading stacker 110 are mounted is placed in a horizontal state and waits. The test tray TT has a structure in which a plurality of carrier modules CM for fixing and releasing a semiconductor element are arranged at regular intervals in a rectangular frame made of metal having excellent heat resistance.

The unloading unit 140 is disposed at the rear of the unloading stacker 120, and preferably is disposed directly in front of the heat removing chamber 170 to transfer the test tray TT conveyed from the heat removing chamber 170. Receive immediately. In the unloading unit 140, the semiconductor devices are separated from the test tray TT conveyed from the heat removal chamber 170.

The preheat chamber 150 is disposed immediately behind the loading unit 130, and moves the test element TT conveyed from the loading unit 130 backward by one step in a vertical state. It functions to bring the temperature state. To this end, a first tray conveying unit (not shown) for moving the test tray TT step by step inside the preheating chamber 150 and a high temperature hot air or a low temperature cooling gas into the preheating chamber 150. A first temperature composition unit (not shown) for selectively supplying is installed.

In addition, a first rotator 152 is installed at the front of the preheating chamber 150 to rotate the horizontal test tray TT transferred from the loading unit 130 to 90 degrees to convert it to a vertical state. More specifically, as shown in FIG. 2, the first rotator 152 is configured to increase the space utilization inside the preheating chamber 150 by rotating the test tray TT in a horizontal state downward by 90 degrees. do.

The test chamber 160 is disposed between the preheating chamber 150 and the heat removing chamber 170, and tests the semiconductor elements of the test tray TT conveyed from the preheating chamber 150 under a predetermined temperature state. The test chamber 160 is vertically coupled to a test head 162 having a plurality of test sockets (not shown) which electrically connect the semiconductor elements of the test tray TT to perform a test. In front of the test head 162, the contact push unit 164 for pressing the semiconductor element of the test tray TT toward the test head 162 and connecting it to a test socket (not shown) at a predetermined pressure is moved forward and backward. It is installed to reciprocate.

Like the preheat chamber 150, the test chamber 160 is provided with a second temperature composition unit (not shown) for selectively supplying hot hot air or low temperature cooling gas into the test chamber 160.

The test head 162 is electrically connected to a separate test equipment called an external tester (TESTER) to exchange electrical signals.

The heat removal chamber 170 applies a thermal stress opposite to that of the preheating chamber 150 while moving the test tray TT conveyed from the test chamber 160 one step forward in a vertical state, thereby removing the original semiconductor device. Reduce to room temperature.

To this end, the heat removal chamber 170 also has a second tray conveying unit (not shown) that moves the test tray TT step by step, as in the preheating chamber 150, and a high temperature hot air or a low temperature cooling gas into the chamber. It is provided with a third temperature composition unit (not shown) for selectively supplying.

In addition, a second rotator 172 is installed at the front of the heat removal chamber 170 in a horizontal state by rotating the test tray TT in a vertical state by 90 degrees.

Although the preheating chamber 150, the test chamber 160, and the heat removing chamber 170 may be formed in a single layer, two test trays TT are formed in the test chamber 160 by forming two layers of upper and lower layers at the rear of each chamber. May be configured to be tested simultaneously.

In this case, a tray elevating device (not shown) for elevating the test tray TT to the upper and lower layers may be configured at the rearmost portions of the preheating chamber 150 and the heat removing chamber 170.

A loading side tray transfer 132 for conveying the test tray TT in a horizontal state is installed between the loading unit 130 and the preheating chamber 150. In addition, an unloading side tray transfer 142 is provided between the unloading unit 140 and the heat removal chamber 170 to convey the test tray TT in a horizontal state.

The loading picker 181 and the unloading picker 182 are installed to be movable in the XYZ direction on the upper side of the handler, respectively, and vacuum-adsorb the semiconductor elements to be tested of the loading stacker 110 to the loading unit 130. In addition, the unloading unit 140 performs vacuum adsorption on the tested semiconductor elements and transfers them to the unloading stacker 120.

FIG. 2 is a flowchart for explaining an operation checking method of the test handler 100 shown in FIG. 1.

Referring to FIG. 2, virtual data is input to the test handler 100. Due to the virtual data, the loading picker 181 of the test handler 100 operates as if the actual semiconductor device is accommodated in the customer tray CT. Therefore, a virtual semiconductor device is set in the customer tray CT (S110).

Loading the customer stack CTs in which the virtual semiconductor devices are stored in the loading stacker 110 and operating the test handler 100, the loading picker 181 adsorbs the virtual semiconductor devices of the loading stacker 110. By performing the operation of mounting on the carrier module (CM) of the test tray (TT) that is waiting in a horizontal state to the loading unit 130. At this time, the preheating chamber 150 and the heat removing chamber 170 maintain a predetermined temperature state by the first and second temperature composition units (S120).

When the operation of mounting the virtual semiconductor devices to the test tray TT is completed by the loading unit 130, the loading side tray transfer 132 horizontally moves the test tray TT into the preheat chamber 150.

Subsequently, the first rotator 152 rotates the test tray TT 90 degrees downward to change the attitude of the test tray TT from a horizontal state to a vertical state.

Then, the first tray transfer unit heats or cools the virtual semiconductor elements to a predetermined test temperature state while transferring the test tray TT one step in one direction (from front to back).

When the test tray TT moves to the rearmost side of the preheating chamber 150, a separate tray transfer moves the test tray TT horizontally to the side and conveys the inside of the test chamber 160.

When the test tray TT moved into the test chamber 160 is aligned with the front of the test head 162, the contact push unit 164 moves backward to press the carrier module CM of the test tray TT. do. The virtual semiconductor devices are connected to the test socket of the test head 162 at a predetermined pressure, and a predetermined electrical signal is applied to the virtual semiconductor devices from an external tester to test the virtual semiconductor devices. (S130).

The virtual semiconductor devices are not actually connected to the test socket of the test head 162, and no electric signal is applied from an external tester. Therefore, test data for the virtual semiconductor devices is not calculated. If the test data is not calculated, an operation for unloading a subsequent virtual semiconductor device is not performed in the test handler 100.

Therefore, while testing the virtual semiconductor devices, test data corresponding to the virtual semiconductor devices is input to the test handler 100 (S140).

The test data may be any value. The test data is a test result of the virtual semiconductor device. The test for the virtual semiconductor devices may be performed for the same time as the test for the real semiconductor devices. Therefore, the test data can be easily input.

When the test is completed, the contact push unit 164 moves forward to release the connection between the virtual semiconductor device and the test head 162, and a separate tray transfer moves the test tray TT horizontally to the side to remove the heat chamber. Return to 170.

The test tray TT conveyed to the heat removal chamber 170 is transferred forward by one step by the second tray conveying unit, and the virtual semiconductor devices are cooled or heated under a thermal stress opposite to that of the preheat chamber 150. Restored to room temperature.

The test tray TT transferred to the foremost of the heat removal chamber 170 is rotated by 90 degrees by the second rotator 172 to be reduced from the vertical state to the horizontal state.

The test tray TT reduced in the horizontal state in the heat removal chamber 170 is horizontally moved by the unloading side tray transfer 142 and is conveyed to the unloading part 140 outside the heat removal chamber 170.

Subsequently, the unloading picker 182 separates the virtual semiconductor devices from the test tray TT of the unloading unit 140 and classifies the virtual semiconductor devices into the customer trays CT of the unloading stacker 120 according to the test data. It is stored (S150).

As described above, according to embodiments of the present invention, the operation of the test handler is checked using a virtual semiconductor device without an actual semiconductor device. Therefore, the operation check of the test handler can be performed easily and quickly.

While the foregoing has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

1 is a plan view illustrating a general test handler.

FIG. 2 is a flowchart for explaining an operation checking method of the test handler illustrated in FIG. 1.

Explanation of symbols on the main parts of the drawings

10: loading stacker 20: unloading stacker

30: loading part 32: loading side tray transfer

40: unloading portion 42: unloading side tray transfer

50: preheat chamber 52: first rotator

60: test chamber 62: test head

64: contact push unit 70: heat removal chamber

72: second rotator 81: loading picker

82: unloading picker CT: customer tray

TT: Test Tray CM: Carrier Module

Claims (4)

Setting up a virtual semiconductor device in a customer tray; Loading the virtual semiconductor device from the customer tray to a test tray; Testing a virtual semiconductor device of the test tray; Inputting test data corresponding to the virtual semiconductor device; And And unloading the virtual semiconductor device from the test tray to the customer tray in accordance with the test data. The method of claim 1, wherein the setting of the virtual semiconductor device in the customer tray is performed by inputting virtual data into the test handler. The method of claim 1, wherein test data for the virtual semiconductor device is input during testing of the virtual semiconductor device. The method of claim 1, wherein the test on the virtual semiconductor device is performed for the same time as the test on the real semiconductor device.

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