KR20090050310A - Plasma display apparatus - Google Patents

Abstract

The present invention relates to an energy recovery circuit for supplying a driving signal to a plasma display panel and a plasma display device using the same, wherein the device is characterized in that the energy supply path and the energy recovery path to the scan electrode formed in the plasma display panel are separated from each other. It features.

According to the present invention, when the driving signal is supplied to the plasma display panel using the energy recovery circuit, the number of elements included in the panel driving circuit can be reduced by separating the energy supply path and the energy recovery path, and the panel driving circuit. It can improve the stability.

Description

Plasma display apparatus

The present invention relates to a plasma display device, and more particularly, to a driving circuit for supplying a driving signal to a plasma display panel.

The plasma display panel (hereinafter referred to as PDP) displays an image by excitation and emitting phosphors by vacuum ultraviolet rays (VUV) generated when the inert gas is discharged.

Such a PDP is not only large in size and thin in thickness, but also has a simple structure and is easy to manufacture, and has a high luminance and high luminous efficiency compared to other flat display devices. In particular, the AC surface-discharge type 3-electrode plasma display panel has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge to protect the electrodes from sputtering caused by the discharge.

The plasma display panel is time-division driven by a reset period for initializing all cells, an address period for selecting cells, and a sustain period for causing display discharge in the selected cells in order to realize gray levels of an image. do.

In order for the driving circuit to supply the driving signals to the plasma display panel, a large number of switching elements and clamping diodes are required, thereby increasing the cost and increasing the size due to the increase in the number of components. There is a problem that consumes a lot of power consumption.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display apparatus having a driving circuit capable of reducing manufacturing costs and improving stability in a panel driving circuit provided in the plasma display apparatus.

According to an aspect of the present invention, there is provided a plasma display apparatus comprising: a plasma display panel on which a plurality of scan electrodes and sustain electrodes are formed; And a scan driving driver circuit for supplying a driving signal to the scan electrode, wherein the scan driving circuit includes an inductor forming a resonance circuit together with capacitance of the panel; A first switch turned on to supply a sustain voltage to the scan electrode; A second switch turned on to supply a reference voltage to the scan electrode; And third and fourth switches for controlling energy supply and recovery to the scan electrodes, respectively, wherein an energy supply path through the third switch and an energy recovery path through the fourth switch are separated from each other. The two switches are connected to the energy supply path and the energy recovery path, respectively.

According to the present invention configured as described above, when the driving signal is supplied to the plasma display panel using the energy recovery circuit, the number of elements provided in the panel driving circuit can be reduced by separating the energy supply path and the energy recovery path. In addition, the stability of the panel driving circuit can be improved.

Hereinafter, a plasma display device according to the present invention will be described in detail with reference to the accompanying drawings. 1 is a perspective view illustrating an embodiment of a structure of a plasma display panel.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). . The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be simultaneously formed and thus not physically connected. .

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, a lower dielectric layer 24 and a partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 24 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells.

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer 23 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 illustrates an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. Do. For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel with respect to the divided subfield.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. A reset section for initializing the discharge cells of the entire screen using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all scan electrodes (Y), thereby erasing discharge in all discharge cells. Is generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, the negative scan signal scan is sequentially applied to the scan electrode, and at the same time, the data signal data having the positive voltage Va is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. Meanwhile, a signal for maintaining a sustain voltage is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain pulse having a sustain voltage Vs is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 4 are exemplary embodiments of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. 4. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

5 is a circuit diagram illustrating a configuration of a scan driving circuit for supplying a driving signal to a scan electrode of a plasma display panel, wherein the scan driving circuit includes an energy recovery unit 20, a sustain driver 30, and a reset driver 40. And a scan IC 50.

The sustain driver 30 includes a sustain voltage power supply Vsus for supplying a high potential sustain voltage Vsus during the sustain period, and a sustain-up switch Su_up turned on so that the sustain voltage Vsus is applied to the scan electrode 10. And a sus-down switch Su_dn turned on so that the voltage applied to the scan electrode 10 drops to the ground voltage. That is, the sustain driver 30 is connected to the sustain voltage power supply Vsus and the sustain-up switch Su_up is connected to the sustain switch Sus_up and ground.

The energy recovery unit 20 may include a source capacitor Cs for recovering and storing energy supplied to the scan electrode 10, and an energy supply switch that is turned on so that energy stored in the source capacitor Cs is supplied to the scan electrode 10 ( ER_up) and an energy recovery switch ER_dn which is turned on to recover energy from the scan electrode 10. The source capacitor Cs forms a resonant circuit together with the inductor L to enable supply and recovery of energy to the scan electrode 10.

The reset driver 40 is connected to the set-up switch Set_up and the voltage source Vy, which are turned on to supply a gradually rising set-up signal to the scan electrode 10, and gradually descend to the negative voltage -Vy. The set-down switch Set_dn turned on to supply the set-down signal to the scan electrode 10, and the pass switch Pass_sw forming a current path path with the scan electrode 10.

As shown in FIG. 5, in the set-up switch Set_up, a drain is connected to a sustain voltage power source, a source is connected to a pass switch Pass_sw, and a gate is a variable resistor. And a setup signal which gradually rises as the resistance value of the variable resistor changes.

The set-down switch Set_dn has a drain connected to the scan IC 50, a source connected to a negative voltage (-Vy), and a variable resistor (not shown) connected to the gate. As the resistance value of the variable resistor (not shown) changes, a setdown signal that gradually decreases is generated.

The scan IC 50 is turned on to apply a scan-up switch Q1 connected to a scan voltage power source that is turned on to apply the scan voltage Vsc to the scan electrode 10, and a ground voltage to the scan electrode 10. And a scan-down switch Q2.

FIG. 6 illustrates an embodiment of a waveform of a sustain signal supplied to a plasma display panel.

5 and 6, in the energy supply period ER_up, energy is supplied from the source capacitor Cs to the scan electrode 10, and the voltage of the sustain signal applied to the scan electrode 10 gradually increases. . For this purpose, the scan-down switch Q2, the pass switch Pass_sw and the energy supply switch ER_up may be turned on in the energy supply period ER_up.

In the sustain voltage sustain period SUS_up, the energy supply switch ER_up is turned off, the scan-down switch Q2, the pass switch Pass_sw and the sus-up switch Sus_up are turned on, and the scan electrode 10 is turned on. The voltage of the applied sustain signal maintains the sustain voltage Vs.

In the energy recovery section ER_down, energy is recovered from the scan electrode 10 to the source capacitor Cs of the energy recovery unit 20 to generate a current flow from the scan electrode 10 toward the source capacitor Cs. The voltage of the reset signal applied to the scan electrode 10 may gradually decrease from the sustain voltage Vs.

In the energy recovery period ER_down, the scan-down switch Q2, the pass switch Pass_sw and the energy recovery switch ER_dn may be turned on for the current flow as described above.

In the ground voltage sustain period SUS_dn, the energy recovery switch ER_dn is turned off, the scan-down switch Q2, the pass switch Pass_sw and the sus-down switch Sus_dn are turned on, and the scan electrode 10 is turned on. The voltage of the sustain signal applied to) maintains the reference voltage GND, for example, the ground voltage.

7 to 11 illustrate circuit diagrams of embodiments of a scan driving circuit according to the present invention.

Referring to FIG. 7, the scan driving circuit included in the plasma display apparatus according to the present invention does not include the pass switch Pass_sw as shown in FIG. 5, and energy to the scan electrode through the energy supply switch ER_up. Preferably, the supply path a and the energy recovery path b from the scan electrode through the energy recovery switch ER_dn are separated from each other.

In addition, as illustrated in FIG. 7, the sus-up switch Su_up may be connected to the energy supply path a, and the sus-down switch Su_dn may be connected to the energy recovery path b.

As described above, the energy supply path (a) and the energy recovery path (b) are separated, and the sus-up switch Sus-up and the sus-down switch Sus-dn are supplied to the energy supply path a and the energy recovery path b. By connecting to the respective circuits, the large-capacity pass switch Pass_sw can be removed, and control of the scan driving circuit for supplying a driving signal to the scan electrodes can be facilitated.

According to an embodiment of the present invention, the sus-up switch Su_up may be connected to one end of the energy supply switch ER_up, and the inductor L may be connected to the other end thereof. In addition, a sus-down switch Su_dn may be connected to one end of the energy recovery switch ER_dn, and an inductor L may be connected to the other end thereof.

Referring to FIG. 8, an inductor forming a resonance circuit together with a source capacitor Cs is connected to a first inductor L1 connected in series with an energy supply switch ER_up and a second inductor L2 connected in series with an energy recovery switch ER_dn. ) May be included.

FIG. 9 is a circuit diagram showing another embodiment of the configuration of the scan driving circuit according to the present invention. The same configuration as that described with reference to FIGS. 7 and 8 among the configurations of the scan driving circuit shown in FIG. It will be omitted.

Referring to FIG. 9, between the inductor L and the energy supply switch ER_up or between the inductor L and the energy to prevent the current from flowing in the reverse direction in each of the energy supply path a and the energy recovery path b. Diodes D1 and D2 may be connected between the recovery switch ER_dn.

More specifically, the anode terminal of the first diode D1 is connected to the inductor L and the cathode terminal is connected to the energy supply switch ER_up, so that the scan electrode in the energy supply path a Can prevent the current from flowing in the direction of the source capacitor Cs. In addition, the cathode terminal of the second diode D1 is connected to the inductor L, and the anode terminal is connected to the energy recovery switch ER_dn, so that the source capacitor Cs in the energy recovery path b is provided. Can prevent the current from flowing in the scan electrode direction.

On the other hand, in the sustain voltage sustain period SUS_up, the voltage at one end of the inductor L may resonate at a high frequency toward the sustain voltage Vs, and accordingly, the peak (above the sustain voltage Vs at the end of the inductor L may be There may be a problem that an EMI problem occurs due to a peak voltage, an unnecessary resonance phenomenon, and an inductor is damaged.

In the reference voltage holding period SUS_dn, the voltage of one end of the inductor L may resonate at a high frequency toward the reference voltage GND, thereby causing the same problem as described above.

By the above operation, the magnitude of the circulating current flowing through the energy recovery circuit can be increased instantaneously, thereby increasing the switch invention and decreasing the energy efficiency.

In order to improve the above problem, in the scan driving circuit according to the present invention, a clamping diode may be connected to one end of the inductor L.

For example, as shown in FIG. 9, the first clamping diode D3 is connected between the sustain voltage source Vs and the inductor L, so that the voltage of one end of the inductor L is greatly resonated above the sustain voltage. It can prevent. In addition, the second clamping diode D4 is connected between the reference voltage source GND and the inductor L to prevent the voltage of one end of the inductor L from greatly resonating below the reference voltage.

Positions of the first and second clamping diodes D3 and D4 may be changed from those shown in FIG. 9.

Referring to FIG. 10, the connection position of the set-down switch Set_dn and the voltage source Vy may be changed in the setdown driver for generating the setdown signal among the reset drivers.

For example, the set-down switch Set_dn is connected to the energy recovery switch ER_dn and the scan-up switch Q1 of the scan IC, and the voltage source Vy is connected to the energy supply switch ER_up and the scan-down switch of the scan IC. May be connected to (Q2).

By changing the connection position of the setdown driver as illustrated in FIG. 10, the floating power included in the setdown driver may be removed.

In addition, a voltage source for generating the setdown signal and a voltage source for generating the scan signal may be commonly used as the scan voltage source Vsc.

For example, as illustrated in FIG. 11, the number of voltage sources included in the scan driving circuit is changed by removing the scan voltage source Vsc connected to the scan IC and changing the voltage source included in the set-down driver to the scan voltage source Vsc. Can be reduced.

FIG. 12 is a circuit diagram showing an embodiment of the configuration of the scan / sustain driving circuit according to the present invention. The configuration of the scan / sustain driving circuit shown in FIG. 12 is the same as that described with reference to FIGS. The description thereof will be omitted.

As shown in FIG. 12, in the plasma display device according to the present invention, a driving circuit for supplying driving signals to the scan electrode and the sustain electrode formed in the panel may be commonly used as one scan / sustain driving circuit.

In this case, since the sustain signal is alternately supplied to the scan electrode and the sustain electrode in the sustain period, the energy charged in the sustain electrode can be recovered and supplied to the scan electrode to supply the sustain signal to the scan electrode. In order to supply the sustain signal, energy charged in the scan electrode may be recovered and supplied to the sustain electrode.

Referring to FIG. 12, in the energy supply section ER_up of the scan electrode, the energy supply switch ER_up is turned on, and the energy charged in the sustain electrode through the energy supply path a may be recovered and supplied to the scan electrode. . Accordingly, the voltage of the sustain signal supplied to the scan electrode may gradually increase, and the voltage of the sustain signal supplied to the sustain electrode may gradually decrease.

In the sustain voltage sustain period SUS_up, the first sus-up switch Su_up1 and the second sus-down switch Sus_dn2 are turned on so that the voltage of the sustain signal applied to the scan electrode maintains the sustain voltage Vs. The voltage applied to the sustain electrode may maintain the reference voltage GND.

In the energy recovery period ER_dn of the scan electrode, the energy recovery switch ER_dn is turned on, and the energy charged in the scan electrode through the energy recovery path b may be recovered and supplied to the sustain electrode. Accordingly, the voltage of the sustain signal supplied to the scan electrode may gradually decrease, and the voltage of the sustain signal supplied to the sustain electrode may gradually increase.

In addition, in the reference voltage holding period SUS_dn of the scan electrode, the second sus-up switch Su_up2 and the first sus-down switch Su_dn1 are turned on, so that the voltage of the sustain signal applied to the scan electrode is the reference voltage GND. ), And the voltage applied to the sustain electrode may maintain the sustain voltage (Vs).

Although not shown in FIG. 12, the scan / sustain driving circuit according to the present invention may further include a z-bias switch and a bias voltage source Vz_bias connected to the sustain electrode to supply the bias voltage Vzb.

In the above, the driving circuit according to the present invention has been described as an example, but the present invention is not limited thereto and may be used to generate driving signals supplied to various display panels such as LCD and OLED in addition to the plasma display panel. have.

Although the preferred embodiments of the present invention have been described in detail above, those skilled in the art to which the present invention pertains should make the present invention without departing from the spirit and scope of the present invention as defined in the appended claims. It will be appreciated that various modifications or changes can be made. Accordingly, modifications to future embodiments of the present invention will not depart from the technology of the present invention.

1 is a perspective view illustrating an embodiment of a structure of a plasma display panel.

2 is a cross-sectional view illustrating an embodiment of an electrode arrangement of a plasma display panel.

FIG. 3 is a timing diagram illustrating an embodiment of a method of time-divisionally driving a plasma display panel by dividing one frame into a plurality of subfields.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel.

5 is a circuit diagram showing the configuration of a scan driving circuit for supplying a driving signal to a scan electrode of the plasma display panel.

FIG. 6 is a diagram illustrating an embodiment of a waveform of a sustain signal supplied to a plasma display panel.

7 to 11 are circuit diagrams illustrating embodiments of a scan driving circuit according to the present invention.

12 is a circuit diagram illustrating an embodiment of a configuration of a scan / sustain driving circuit according to the present invention.

Claims (11)

A plasma display panel in which a plurality of scan electrodes and sustain electrodes are formed; And a scan driving driver circuit for supplying a driving signal to the scan electrode. The scan drive circuit is An inductor forming a resonance circuit together with capacitance of the panel; A first switch turned on to supply a sustain voltage to the scan electrode; A second switch turned on to supply a reference voltage to the scan electrode; And Third and fourth switches for controlling the supply and recovery of energy to the scan electrode, respectively, The energy supply path through the third switch and the energy recovery path through the fourth switch are separated from each other, and the first and second switches are connected to the energy supply path and the energy recovery path, respectively. . The method of claim 1, And the first switch is connected between one end of the third switch and a sustain voltage source, and the second switch is connected between one end of the fourth switch and a reference voltage source. The method of claim 1, And a first diode having a cathode end connected to the third switch and an anode end connected to the inductor. The method of claim 1, And a second diode having an anode terminal connected to the fourth switch and a cathode terminal connected to the inductor. The method of claim 1, And a clamping diode coupled between one end of the inductor and a voltage source. The method of claim 5, The clamping diode is a plasma display device, characterized in that the cathode (cathode) is connected to the sustain voltage source, the anode (anode) is connected to one end of the inductor. The method of claim 5, The clamping diode of claim 1, wherein an anode terminal is connected to a reference voltage source, and a cathode terminal is connected to one end of the inductor. The method of claim 1, And a scan IC including fifth and sixth switches connected to the energy supply path and the energy recovery path, respectively. The method of claim 1, And a set-down driver connected between the energy recovery path and the scan IC and including a seventh switch and a voltage source connected in series. The method of claim 9, The seventh switch is connected to the fourth switch, and the voltage source is connected to the scan IC. The method of claim 1, And the scan driving circuit recovers energy charged in the sustain electrode and supplies the energy to the scan electrode.

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