KR20090017798A - Method for fabricating probe card assembly - Google Patents

Abstract

A method for fabricating the probe card assembly is provided to simplify the process and reduce the whole process step by applying the back side IPC process to the bonding step of the lower plate and the formation of the probe structure by using silicon junction wafer. The first and the second silicon wafer(38) are bonded. The selective etching process is performed on the first and the second silicon wafer to form the tip formation region. The probe structure (34) is formed by forming metal in the region including tip formation region. The backside of the wafer having the probe structure is selectively etched and then the tip portion of the probe structure is exposed. The junction part of the probe beam of the probe structure is bonded with the probe structure junction (39a) of the lower substrate. The probe structure boned into the lower substrate is left and the total wafer is removed.

Description

Method for fabricating probe card assembly

The present invention relates to a silicon probe structure, specifically, to simplify the process and reduce the overall process step by applying a backside Inductively Coupled Plasma (ICP) process in the formation of the probe structure using a silicon bonded wafer and the bonding of the lower substrate. The present invention relates to a method of forming a probe card structure which improves the efficiency of a manufacturing process.

Generally, in a semiconductor manufacturing process, after finishing a wafer manufacturing process, a good product is sorted by a probing test, this good product is put into a package, and finished in the form of a final product.

When probing using a probe card and a prober before diesting in a wafer state, in consideration of efficiency, the probe tip of the probe card is simultaneously brought into contact with the pads on the chip area during probing on all integrated circuit chip areas on the wafer. And applying an electrical signal is ideal.

Of course, the inspection using the probe card is applied to the inspection of various semiconductor devices including the display element in addition to the semiconductor memory element.

1A and 1B are cross-sectional views showing a lower substrate bonding structure of a probe structure of the prior art.

In the structure of the conventional probe card shown in FIG. 1A, a metal pillar is directly placed on the lower substrate terminal 12 in the lower substrate (Multi-Layer Ceramic (MLC) 11) positioned below the probe card structure. Formed to form a space for the probe card to move.

That is, a metal stud is formed on the lower substrate 11, a horizontal beam 13 and 14 supporting the probe is formed, a tip / post of the probe is formed, and the tip portion is formed. It is a structure which makes contact with the terminal 15 of the semiconductor devices 16.

In the case of FIG. 1B, a metal stud is formed on the lower substrate 11, a horizontal beam 13 supporting the probe, a tip / post of the probe, and a tip portion are formed. To the terminals of the semiconductor devices.

However, in such a process method, if a problem occurs in any part of the lower substrate, the problem occurs that the lower substrate itself cannot be used.

In this case, a situation arises in which all efforts put into the process up to now have to be treated as a loss, which causes the producer to consider the risk of the process and eventually induce high production costs.

In addition, in the prior art, in the formation of the probe structure, the plating proceeds in a stepwise manner, and the process must be repeated. Accordingly, there is a limit to the height that can be formed.

In other words, as the height increases, the number of repetitions of the process increases. This in turn entails an increase in process costs.

As described above, the formation of the probe structure of the prior art probe card has a lot of complexity in terms of the process. In order to increase the height of the structure there is a problem that does not end in one process but requires several iterative processes.

And since the structure of the probe card of the prior art is formed through a number of processes on the MLC (Multi Layer Ceramic) substrate, the MLC substrate must have a strong chemical resistance that can withstand in all chemical and wet processes.

In addition, MLC substrates require durability to withstand the large pressures that occur locally over thousands of probe operations. This creates limitations in the choice of MLC substrates, and forces the use of expensive MLC substrates.

In addition, in conventional MEMS probe cards, all the thousands to tens of thousands of probes are simultaneously formed on an MLC substrate. Even if only a few of the many probes fail, it is difficult to repair them.

The present invention is to solve such a problem of the manufacturing process of the prior art probe card, by applying a backside Inductively Coupled Plasma (ICP) process in the formation of the probe structure using a silicon bonded wafer and the bonding of the lower substrate. It is an object of the present invention to provide a method of forming a probe card structure that simplifies the process and reduces the overall process step, thereby increasing the efficiency of the manufacturing process.

The present invention is to solve the problem of the manufacturing process of the probe card of the prior art, the formation of the probe card structure to ensure the ease of the process and to reduce the manufacturing cost by performing the plating process for the production of the probe structure at once The purpose is to provide a method.

The present invention is to solve the problem of the manufacturing process of the probe card of the prior art, and by simplifying the process by forming a silicon probe structure including the probe portion, the probe pillar portion, the beam portion integrally to reduce the overall process time and efficient It is an object of the present invention to provide a method of forming a probe card structure that allows production to take place.

The present invention forms a probe on the bonded silicon substrate, forms a via on the silicon substrate, and finally bonds the MLC substrate to prevent deterioration and deterioration of the MLC substrate generated during the probe manufacturing process. It is an object of the present invention to provide a method for forming a probe card structure in which a substrate can prevent mechanical breakage of an MLC substrate by buffering pressure during a probe operation.

According to the present invention, since the probe is formed on the bonded silicon substrate and the via is formed on the silicon substrate, the probe is finally bonded to the MLC substrate, so that the probe can move backward to the silicon substrate itself using wet etching. It is an object of the present invention to provide a method for forming a probe card structure which can reduce the manufacturing process of metal pillars by securing a space.

Method for forming a probe card structure according to the present invention for achieving the above object comprises the steps of forming a tip forming region by the bonding and selective etching process of the first and second silicon wafer; in the region including the tip forming region Growing a metal to form a probe structure; selectively etching a backside of the wafer on which the probe structure is formed to expose a tip portion of the probe structure; a junction of the probe beam of the probe structure to a probe of a lower substrate Bonding the structure to the junction; removing the entire wafer leaving the probe structure bonded to the lower substrate.

Here, the tip forming region is composed of a tip forming first and second regions, and selectively etching the first silicon wafer to define a tip forming first region, and the first silicon wafer having the tip forming first region And bonding the second silicon wafer, and selectively etching the second silicon wafer on the tip forming first region to define the tip forming second region.

The exposing the tip portion of the probe structure may include applying a photoresist to a backside of the wafer on which the probe structure is formed, and selectively patterning the photoresist to form a rear surface of the tip formation portion of the probe structure. Forming a tip open region in which a tip portion of the probe structure is exposed by selectively etching the backside ICP process using the photoresist pattern;

And in the step of forming the probe structure, the probe structure includes a tip portion and a tip beam portion for supporting the tip portion, the tip portion is formed in the tip forming region, and the tip beam portion is connected to the tip portion and formed on the surface of the wafer. It is characterized by.

In the forming of the probe structure, metal growth may be simultaneously performed at a portion where the tip portion and the tip beam portion are formed.

And in the step of exposing the tip portion of the probe structure, it is characterized in that only the end of the tip portion is partially exposed.

And removing the entire wafer while leaving the probe structure bonded to the lower substrate, wherein the entire wafer is removed using a silicon etching solution, and upon removal, the lower substrate is protected by an insulating layer.

And a photoresist pattern for selectively exposing the seed metal layer of a portion including a tip portion formed in the tip formation region, a beam portion for supporting the tip portion, and a bonding region for bonding with the lower substrate, to form the probe structure. Forming a first growth metal layer on a tip portion, a beam portion for supporting the tip portion, and a bonding region for bonding the lower substrate by a metal growth process using the exposed seed metal layer; Controlling the surface roughness and height of the first growth metal layer by planarizing the entire surface on which the first growth metal layer is formed; forming another photoresist pattern to expose the planarized first growth metal layer; and metal growth The process includes forming a second growth metal layer and again controlling surface roughness and height. And it characterized in that.

Such a method of forming a probe card structure according to the present invention has the following effects.

First, by forming a probe structure using a silicon bonded wafer and applying a backside Inductively Coupled Plasma (ICP) process in the bonding process of the lower substrate, it is possible to simplify the process and reduce the overall process step to increase the efficiency of the manufacturing process. .

Second, a probe may be formed on the bonded silicon substrate, and vias may be formed on the silicon substrate, and then finally bonded to the MLC substrate to prevent deterioration and deterioration of the MLC substrate generated during the probe manufacturing process.

Third, the manufacturing process of the metal pillar can be reduced by securing a space in which the probe can move back on the silicon substrate itself by using wet etching.

Fourth, the plating process of the portion including the probe portion, the probe pillar portion, and the beam portion for manufacturing the probe structure is performed at once, thereby securing the ease of the process and reducing the manufacturing cost.

Fifth, it is possible to secure the ease of the tip forming process based on MEMS (Micro Electro Mechanical Systems) and to manufacture the tip end in various shapes with a simplified process.

Sixth, since the silicon wafer is dry-etched to form the tip end forming region, the shape of the tip end can be kept constant, and the tip end length can be adjusted.

Hereinafter, a preferred embodiment of the method for forming a probe card structure according to the present invention will be described in detail.

Features and advantages of the method of forming the probe card structure according to the present invention will become apparent from the detailed description of each embodiment below.

2A to 2V are cross-sectional views of a process for forming a probe tip using a silicon bonded wafer according to the present invention.

3A to 3F are cross-sectional views of a process for forming a probe card structure according to the present invention.

The present invention is to form a probe tip using a bonded silicon wafer, and to perform the plating process of the portion including the probe portion, the probe pillar portion, and the beam portion for the manufacture of the probe structure at once, and the lower substrate of the manufactured probe structure The backside Inductively Coupled Plasma (ICP) process is applied during the bonding process.

In the following description, the tip forming first region is the tip intermediate region 23a and the tip end region 23b formed on the first silicon wafer 21, and the tip forming second region is the tip base formed on the second silicon wafer. It is an area 23c.

First, as shown in FIG. 2A, the first photoresist 22 is coated on the entire surface of the first silicon wafer 21 by spin coating, and the first photoresist 22 is selectively patterned as shown in FIG. 2B. Thus, the first photoresist pattern 22a for forming the needle tip is formed.

Here, the open region of the first photoresist pattern 22a defines a tip end region for forming the needle tip and is a region for dry etching the lower first silicon wafer 21.

Subsequently, as shown in FIG. 2C, a dry etching process using an inductively coupled plasma (ICP) is performed using the first photoresist pattern 22a as a mask to selectively etch the first silicon wafer 21 to form a tip intermediate region ( 23a).

As shown in FIG. 2D, the dry etching process is performed again under a different condition from the etching process for forming the tip intermediate region 23a, so that the tip end region 23b is continuous at the bottom surface of the tip intermediate region 23a. To form.

Here, the forming height and width of the tip are determined according to the degree of etching of the dry etching process for defining the tip middle region 23a and the tip end region 23b.

In particular, it is possible to lengthen the tip end length by adjusting the time of the etching process for forming the tip end area 23b.

Thus, the process of defining the tip forming 1st area | region to the 1st silicon wafer 21, bonding a 2nd silicon wafer, and defining the tip forming 2nd area | region is performed.

As shown in FIG. 2E, the first photoresist pattern 22a used as a mask in the etching process for defining the tip middle region 23a and the tip end region 23b is removed, and as shown in FIG. 2F. The second silicon wafer 24 is bonded to the front surface including the tip middle region 23a and the tip end region 23b to form a tip base region.

Here, the bonding method may be a silicon-silicon direct bonding method (eutetic bonding) using a medium material.

As shown in FIG. 2G, the bonded second silicon wafer 24 is processed by determining a height of a pillar to be a tip base region through a chemical mechanical polishing (CMP) process.

Here, it is possible to adjust the height of the tip support pillar region to be high or low by adjusting the processing amount of the CMP process.

Subsequently, as shown in FIG. 2H, the second photoresist 25 is applied to the entire surface of the second silicon wafer processing layer 24a and selectively patterned as shown in FIG. 2I to form the tip pillar region. 2 Photoresist pattern 25a is formed.

Next, as shown in FIG. 2J, a dry etching process using an inductively coupled plasma (ICP) is performed using the second photoresist pattern 25a as a mask to selectively etch the second silicon wafer processing layer 24a to form a tip base. The region 23c is formed.

In the following description, all of the tip intermediate region 23a, the tip end region 23b, and the tip base region 23c are referred to as the tip forming region 26.

The second silicon wafer processing layer 24a and the first silicon wafer 21 on which the tip formation regions 26 are formed are referred to as a tip pattern formation wafer 27.

Next, as shown in FIG. 2K, the second photoresist pattern 25a used as a mask is removed in the etching process of forming the tip pillar region 23c.

Subsequently, as shown in FIG. 2L, a seed metal layer 28 for forming a tip is deposited on the entire surface including the tip forming region 26.

Here, the seed metal layer 28 is a stacked structure of Ti / Cu.

As shown in FIG. 2M, a third photoresist layer 29 is formed by applying photoresist or dry film photoresist (DFR) to the entire surface of the seed metal layer 28.

As shown in FIG. 2N, the third photoresist pattern may be patterned to selectively open the third photoresist 29 so that the tip formation region 26 is opened and the region including the probe beam becomes a pillar supporting the probe region. (29a) is formed.

Here, the contact pillar forming region used in the bonding process with the lower substrate is opened in the outer region of the probe beam region.

Subsequently, as shown in FIG. 2O, a tip formation region 26, a probe beam region, and a contact pillar are formed by a metal growth process using a seed metal layer 28 using the third photoresist pattern 29a as a mask. The first growth metal layer 30 is formed in the formation region.

Here, the metal growth process uses an electroplating method.

As shown in FIG. 2P, a surface planarization operation using a CMP process is performed on the entire surface on which the first growth metal layer 30 is formed to control the surface roughness and height of the first growth metal layer 30.

Next, as shown in FIG. 2Q, the fourth photoresist 31 is applied to the entire surface including the planarized first growth metal layer 30a whose surface roughness and height are controlled by the planarization operation.

As shown in FIG. 2R, the fourth photoresist 31 is selectively patterned to expose the probe beam region and the contact pillar forming region to form the fourth photoresist pattern 31a.

Next, as shown in FIG. 2S, the second growth metal layer 32 is formed in the open probe beam region and the contact pillar forming region by performing an electroplating process.

As shown in FIG. 2T, a surface planarization operation using a CMP process is performed on the entire surface of the second growth metal layer 32 to control the surface roughness and height of the second growth metal layer 32.

Here, in order to protect the surface of the planarized second growth metal layer 32a whose surface roughness and height are controlled by the planarization operation, Au electroplating is performed to form the surface protective layer 33.

Subsequently, as shown in FIG. 2U, the third and fourth photoresist pattern layers 29a and 31a used for the electroplating are removed, and the seed layer used to grow the metal layer is removed as shown in FIG. 2V. 34 is formed.

Bonding with the lower substrate of the probe structure 34 manufactured by such a process is performed as follows.

First, as shown in FIG. 3A, a fifth photoresist 36 is applied to an opposite surface of the tip pattern forming wafer 27 on which the probe structure 34 is formed, and then selectively patterned as shown in FIG. 3B. A fifth photoresist pattern 36a is formed to selectively expose the backside of the tip formation region 27.

3A to 35A shows a contact pillar layer 35 used for bonding the lower substrate.

3C, the ICP etching process is performed using the fifth photoresist pattern 36a as a mask to selectively remove the tip pattern forming wafer 27.

This backside ICP process forms a tip open region 37 where the tip portion of the probe structure 34 is exposed.

Here, the tip pattern forming wafer 27 of the probe beam region and the contact pillar forming region of the probe structure 34 is not etched.

3D, the fifth photoresist pattern 36a used as a mask is removed during the etching process for forming the tip open region 37.

3E, the probe structure 34 having the tip portion exposed by the tip open region 37 is bonded to the lower substrate 38.

The description of the bonding process herein uses FIGS. 3E and 3F using a laterally shifted structure rather than a cross section from FIGS. 3A to 3D to clarify the bonded portion of the probe structure 34 repeatedly formed on the wafer. Illustrated and explained.

The junction between the probe structure junction 39a of the lower substrate 38 and the probe beam portion is bonded by a bonding material.

Here, 39a of the lower substrate 38 is an MLC junction that is bonded to the MLC.

3F, the tip pattern forming wafer 27 supporting the bonded probe structure is removed using a silicon etching solution so that only the probe structure 34 is positioned on the lower substrate 38.

As such, the lower substrate 38 is protected by the high etching selectivity with the insulating materials of the lower substrate 38 when the tip pattern forming wafer 27 is removed using the silicon etching solution.

The method for forming a probe card structure according to the present invention described above simplifies the process by applying a backside Inductively Coupled Plasma (ICP) process in the formation of the probe structure using the silicon bonded wafer and the bonding of the lower substrate. To reduce the efficiency of the manufacturing process.

In addition, fabrication using a silicon bonded wafer can reduce the overall process step, thereby increasing the efficiency of the manufacturing process, and simplifying the process by integrally forming a silicon probe structure including a probe part, a probe pillar part, and a beam part. Reduced process time ensures efficient production.

The shape of the tip intermediate region, tip end region and tip base region of the probe structure described above and the etching process for forming the same include not only dry etching using inductively coupled plasma (ICP) but also various other shapes and etching methods. Of course, it can be formed by.

It is apparent that the application of various shapes of the probe structure and other etching methods fall within the scope of the technical idea of the present invention in which the first and second silicon wafers are bonded to define a tip formation region.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

1A and 1B are cross-sectional views showing a lower substrate bonding structure of a probe structure of the prior art

2A to 2V are cross-sectional views of a process for forming a probe tip using a silicon bonded wafer according to the present invention.

3A-3F are cross-sectional views of a process for forming a probe card structure according to the present invention.

Explanation of symbols for the main parts of the drawings

21.24. First and Second Silicon Wafers 22.25.29.31.36. 1,2,3,4,5 photoresist

22a.25a.29a.31a.36a. 1,2,3,4,5 photoresist pattern

23a. Tip Middle Area 23b. Tip end area

23c. Tip base area 26. Tip forming area

27. Tip pattern forming wafer 28. Seed metal layer

30.32. First and second growth metal layers 30a.32a. Planar growth metal layer

33. Surface protective layer 34. Probe structure

35. Contact pillar layer 37. Tip open area

Claims (13)

Forming a tip forming region by bonding and selectively etching the first and second silicon wafers; Growing a metal in a region including the tip forming region to form a probe structure; Selectively etching a backside of the wafer on which the probe structure is formed to expose a tip portion of the probe structure; Bonding the junction of the probe beam of the probe structure with the probe structure junction of a lower substrate; Removing the entire wafer leaving the probe structure bonded to the lower substrate. The method of claim 1, wherein the tip forming region consists of the tip forming first and second regions, Selectively etching the first silicon wafer to define a tip forming first region; Bonding a second silicon wafer to a first silicon wafer having the tip forming first region, And selectively etching the second silicon wafer on the tip forming first region to define a tip forming second region. The method of claim 1, wherein exposing the tip portion of the probe structure comprises: Applying a photoresist to the backside of the wafer on which the probe structure is formed; Selectively patterning the photoresist to form a photoresist pattern in which a rear surface of the tip forming portion of the probe structure is selectively exposed; And selectively etching by a backside ICP process using the photoresist pattern to form a tip open region where the tip portion of the probe structure is exposed. The method of claim 1, wherein in the forming of the probe structure, The probe structure includes a tip portion and a tip beam portion for supporting the tip portion, the tip portion is formed in the tip forming region, and the tip beam portion is connected to the tip portion and formed on the surface of the wafer. Forming method. 5. The method of claim 4, wherein the metal growth in the step of forming the probe structure is simultaneously performed at the portion where the tip portion and the tip beam portion are formed. The method of claim 1, wherein exposing the tip portion of the probe structure: A method of forming a probe card structure, characterized in that only the tip of the tip portion is partially exposed. The method of claim 1, wherein in the step of removing the entire wafer while leaving the probe structure bonded to the lower substrate, Removing the entire wafer using a silicon etching solution, and upon removal the lower substrate is protected by an insulating layer. The method of claim 1, wherein the etching process for defining the tip formation region is a dry etching process using inductively coupled plasma (ICP). The method of claim 2, wherein in the forming of the tip forming second region, Bonding the second silicon wafer to the first silicon wafer, and processing the bonded second silicon wafer to adjust the thickness of the second silicon wafer to determine the formation height of the tip forming second region. Forming method. The method of claim 1, in order to form a probe structure, Forming a photoresist pattern such that a seed metal layer of a tip portion formed in the tip forming region, a beam portion for supporting the tip portion, and a portion including a bonding region for bonding with the lower substrate is selectively exposed; Forming a first growth metal layer on a tip portion, a beam portion for supporting the tip portion, and a bonding region for bonding the lower substrate by a metal growth process using the exposed seed metal layer; Controlling the surface roughness and height of the first growth metal layer by planarizing the entire surface on which the first growth metal layer is formed; Forming another photoresist pattern to expose the planarized first growth metal layer; Forming a second growth metal layer by a metal growth process and again controlling the surface roughness and height. The method of claim 10, wherein a surface protective layer is formed on the surface of the second growth metal layer whose surface roughness and height are controlled. The method of forming a probe card structure according to claim 10, wherein the seed metal layer is formed in a stacked structure of Ti / Cu, and a metal growth process is performed by an electroplating method. The method for forming a probe card structure according to claim 11, wherein the surface protective layer is formed using an electroplating method using Au.

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