KR100905708B1 - Method for fabricating probe card assembly using silicon bonded wafer - Google Patents

Abstract

The present invention relates to a method of forming a probe card structure using a silicon bonded wafer which reduces the overall process step by manufacturing using a silicon bonded wafer, thereby increasing the efficiency of the manufacturing process. Forming a tip forming region by depositing and selectively exposing a seed metal layer on a front surface including the tip forming region; a tip portion formed in the tip forming region and a probe beam portion for supporting the tip portion; Simultaneously forming a growth metal layer in the portion including; And forming a probe structure by controlling the formation height and surface roughness of the growth metal layer.

Probe cards, MLC, probe structures, bonded wafers, ICP

Description

Method for fabricating probe card assembly using silicon bonded wafer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon probe structure, and more particularly, to a method of forming a probe card structure using a silicon bonded wafer, in which a manufacturing process using a silicon bonded wafer is reduced to increase the efficiency of the manufacturing process.

Generally, in a semiconductor manufacturing process, after finishing a wafer manufacturing process, a good product is sorted by a probing test, this good product is put into a package, and finished in the form of a final product.

When probing using a probe card and a prober before diesting in a wafer state, in consideration of efficiency, the probe tip of the probe card is simultaneously brought into contact with the pads on the chip area during probing on all integrated circuit chip areas on the wafer. And applying an electrical signal is ideal.

Of course, the inspection using the probe card is applied to the inspection of various semiconductor devices including display elements in addition to the semiconductor memory elements.

1A and 1B are cross-sectional views showing a lower substrate bonding structure of a probe structure of the prior art.

In the structure of the conventional probe card shown in FIG. 1A, a metal pillar is directly placed on the lower substrate terminal 12 in the lower substrate (Multi-Layer Ceramic (MLC) 11) positioned below the probe card structure. Formed to form a space for the probe card to move.

That is, a metal stud is formed on the lower substrate 11, a horizontal beam 13 and 14 supporting the probe is formed, a tip / post of the probe is formed, and the tip portion is formed. It is a structure which makes contact with the terminal 15 of the semiconductor devices 16.

In the case of FIG. 1B, a metal stud is formed on the lower substrate 11, a horizontal beam 13 supporting the probe, a tip / post of the probe, and a tip portion are formed. To the terminals of the semiconductor devices.

However, in such a process method, if a problem occurs in any part of the lower substrate, the problem occurs that the lower substrate itself cannot be used.

In this case, a situation arises in which all efforts put into the process up to now have to be treated as a loss, which causes the producer to consider the risk of the process and eventually induce high production costs.

In addition, in the prior art, in the formation of the probe structure, the plating proceeds in a stepwise manner, and the process must be repeated. Accordingly, there is a limit to the height that can be formed.

In other words, as the height increases, the number of repetitions of the process increases. This in turn entails an increase in process costs.

As described above, the formation of the probe structure of the prior art probe card has a lot of complexity in terms of the process. In order to increase the height of the structure there is a problem that does not end in one process but requires several iterative processes.

The present invention is to solve the problem of the manufacturing process of the conventional probe card as described above, the formation of the probe card structure using the silicon bonded wafer to increase the efficiency of the manufacturing process by reducing the overall process step by manufacturing using a silicon bonded wafer. The purpose is to provide a method.

The present invention is to solve the problem of the manufacturing process of the probe card of the prior art, by using a silicon bonded wafer to ensure the ease of the process and to reduce the manufacturing cost by performing the plating process for the production of the probe structure at once It is an object of the present invention to provide a method for forming a probe card structure.

The present invention is to solve the problem of the manufacturing process of the probe card of the prior art, and by simplifying the process by forming a silicon probe structure including the probe portion, the probe pillar portion, the beam portion integrally to reduce the overall process time and efficient It is an object of the present invention to provide a method for forming a probe card structure using a silicon bonded wafer to be produced.

Method for forming a probe card structure using a silicon bonded wafer according to the present invention for achieving the above object comprises the steps of forming a tip forming region by the bonding and selective etching process of the first and second silicon wafers; Depositing and selectively exposing a seed metal layer on a front surface including the tip forming region; Simultaneously forming a growth metal layer in a portion including a tip portion formed in the tip forming region and a probe beam portion for supporting the tip portion; And controlling the formation height and surface roughness of the growth metal layer to form a probe structure.

Here, the tip forming region is composed of a tip forming first and second regions, and selectively etching the first silicon wafer to define a tip forming first region, and the first silicon wafer having the tip forming first region Bonding the second silicon wafer; and selectively etching the second silicon wafer on the tip forming first region to define a tip forming second region.

The tip forming first region includes a tip intermediate region formed by etching the first silicon wafer under different etching conditions and a tip end region continuous from the tip intermediate region, and the tip forming second region serves as a pillar of the tip. The tip base area, characterized in that the tip base area is continuous in the tip middle area.

In the forming of the tip forming second region, the second silicon wafer is bonded to the first silicon wafer, the bonded second silicon wafer is processed, and the thickness of the second silicon wafer is adjusted to form the tip forming second region. It is characterized by determining the height.

Such a method of forming a probe card structure using a silicon bonded wafer according to the present invention has the following effects.

First, fabrication using a silicon bonded wafer can reduce the overall process step and increase the efficiency of the manufacturing process.

Second, since the plating process of the portion including the probe portion, the probe pillar portion, and the beam portion for the manufacture of the probe structure is performed at once, there is an effect of securing the ease of the process and reducing the manufacturing cost.

Third, it is possible to secure the ease of the tip forming process based on MEMS (Micro Electro Mechanical Systems) and to manufacture the tip end in various shapes with a simplified process.

Fourth, since the silicon wafer is used in the dry etching process to form the tip end forming region, the shape of the tip end can be kept constant and the length of the tip end can be adjusted.

Fifth, in defining the column area connected to the tip end, the length can be freely adjusted through the CMP process.

Hereinafter, a preferred embodiment of a method of forming a probe card structure using a silicon bonded wafer according to the present invention will be described in detail.

Features and advantages of the method of forming the probe card structure using the silicon bonded wafer according to the present invention will become apparent from the detailed description of each embodiment below.

2A to 2V are cross-sectional views of a process for forming a probe card structure using a silicon bonded wafer according to the present invention.

In the following description, the tip forming first region is the tip intermediate region 23a and the tip end region 23b formed on the first silicon wafer 21, and the tip forming second region is the tip base formed on the second silicon wafer. It is an area 23c.

First, as shown in FIG. 2A, the first photoresist 22 is coated on the entire surface of the first silicon wafer 21 by spin coating, and the first photoresist 22 is selectively patterned as shown in FIG. 2B. Thus, the first photoresist pattern 22a for forming the needle tip is formed.

Here, the open region of the first photoresist pattern 22a defines a tip end region for forming the needle tip and is a region for dry etching the lower first silicon wafer 21.

Next, as shown in FIG. 2C, a dry etching process using an inductively coupled plasma (ICP) is performed using the first photoresist pattern 22a as a mask to selectively etch the first silicon wafer 21 to form a tip intermediate region ( 23a).

As shown in FIG. 2D, the dry etching process is performed again under a different condition from the etching process for forming the tip intermediate region 23a, so that the tip end region 23b is continuous at the bottom surface of the tip intermediate region 23a. To form.

Here, the forming height and width of the tip are determined according to the degree of etching of the dry etching process for defining the tip middle region 23a and the tip end region 23b.

In particular, it is possible to lengthen the tip end length by adjusting the time of the etching process for forming the tip end area 23b.

Thus, the process of defining the tip forming 1st area | region to the 1st silicon wafer 21, bonding a 2nd silicon wafer, and defining the tip forming 2nd area | region is performed.

As shown in FIG. 2E, the first photoresist pattern 22a used as a mask in the etching process for defining the tip middle region 23a and the tip end region 23b is removed, and as shown in FIG. 2F. The second silicon wafer 24 is bonded to the front surface including the tip middle region 23a and the tip end region 23b to form a tip base region.

Here, the bonding method may be a silicon-silicon direct bonding method (eutetic bonding) using a medium material.

As shown in FIG. 2G, the bonded second silicon wafer 24 is processed by determining a height of a pillar to be a tip base region through a chemical mechanical polishing (CMP) process.

Here, it is possible to adjust the height of the tip support pillar region to be high or low by adjusting the processing amount of the CMP process.

Subsequently, as shown in FIG. 2H, the second photoresist 25 is applied to the entire surface of the second silicon wafer processing layer 24a and selectively patterned as shown in FIG. 2I to form the tip pillar region. 2 Photoresist pattern 25a is formed.

Subsequently, as shown in FIG. 2J, a dry etching process using an inductively coupled plasma (ICP) is performed using the second photoresist pattern 25a as a mask to selectively etch the second silicon wafer processing layer 24a to form a tip. The base region 23c is formed.

In the following description, all of the tip intermediate region 23a, the tip end region 23b, and the tip base region 23c are referred to as the tip forming region 26.

The second silicon wafer processing layer 24a and the first silicon wafer 21 on which the tip formation regions 26 are formed are referred to as a tip pattern formation wafer 27.

Next, as shown in FIG. 2K, the second photoresist pattern 25a used as a mask is removed in the etching process of forming the tip pillar region 23c.

Subsequently, as shown in FIG. 2L, a seed metal layer 28 for forming a tip is deposited on the entire surface including the tip forming region 26.

Here, the seed metal layer 28 is a laminated structure of Ti and Cu.

As shown in FIG. 2M, a third photoresist layer 29 is formed by applying photoresist or dry film photoresist (DFR) to the entire surface of the seed metal layer 28.

As shown in FIG. 2N, the third photoresist pattern may be patterned to selectively open the third photoresist 29 so that the tip formation region 26 is opened and the region including the probe beam becomes a pillar supporting the probe region. (29a) is formed.

Here, the contact pillar forming region used in the bonding process with the lower substrate may be opened together in the outer region of the probe beam region.

Subsequently, as shown in FIG. 2O, a metal growth process using a seed metal layer 28 using the third photoresist pattern 29a as a mask is performed on the tip forming region 26 and the probe beam region. The growth metal layer 30 is formed. When the contact pillar forming region is open, the first growth metal layer 30 is also formed in the region.

Here, the metal growth process uses an electroplating method.

As shown in FIG. 2P, a surface planarization operation using a CMP process is performed on the entire surface on which the first growth metal layer 30 is formed to control the surface roughness and height of the first growth metal layer 30.

Next, as shown in FIG. 2Q, the fourth photoresist 31 is applied to the entire surface including the planarized first growth metal layer 30a whose surface roughness and height are controlled by the planarization operation.

As shown in FIG. 2R, the fourth photoresist 31 is selectively patterned to expose the tip formation region and the probe beam region, thereby forming the fourth photoresist pattern 31a. When the first growth metal layer 30 is formed in the contact pillar forming region, the contact pillar forming region is also patterned to be exposed together.

Subsequently, as shown in FIG. 2S, the second growth metal layer 32 is formed in the open tip formation region and the probe beam region by performing an electroplating process. In this case, when the contact pillar forming region is opened, the second growth metal layer 32 is formed in the corresponding region.

As shown in FIG. 2T, a surface planarization operation using a CMP process is performed on the entire surface of the second growth metal layer 32 to control the surface roughness and height of the second growth metal layer 32.

Here, in order to protect the surface of the planarized second growth metal layer 32a whose surface roughness and height are controlled by the planarization operation, Au electroplating is performed to form the surface protective layer 33.

Subsequently, as shown in FIG. 2U, the third and fourth photoresist pattern layers 29a and 31a used for the electroplating are removed, and the seed layer used to grow the metal layer is removed as shown in FIG. 2V. 34 is formed.

The method of forming a probe card structure using the silicon bonded wafer according to the present invention described above can reduce the overall process step by fabricating using a silicon bonded wafer, thereby increasing the efficiency of the manufacturing process, and the probe portion, the probe pillar portion, and the beam portion By integrally forming the silicon probe structure containing, the process is simplified to reduce the overall process time to ensure efficient production.

The shape of the tip intermediate region, tip end region and tip base region of the probe structure described above and the etching process for forming the same include not only dry etching using inductively coupled plasma (ICP) but also various other shapes and etching methods. Of course, it can be formed by.

It is apparent that the application of various shapes of the probe structure and other etching methods fall within the scope of the technical idea of the present invention in which the first and second silicon wafers are bonded to define a tip formation region.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

1A and 1B are cross-sectional views showing a lower substrate bonding structure of a probe structure of the prior art

2A to 2V are cross-sectional views of a process for forming a probe card structure using a silicon bonded wafer according to the present invention.

Explanation of symbols for the main parts of the drawings

21.24. First and Second Silicon Wafers 22.25.29.31. 1,2,3,4 photoresist

22a.25a.29a.31a. 1,2,3,4 photoresist pattern

23a. Tip Middle Area 23b. Tip end area

23c. Tip base area 26. Tip forming area

27. Tip pattern forming wafer 28. Seed metal layer

30.32. First and second growth metal layers 30a.32a. Planar growth metal layer

33. Surface protective layer 34. Probe structure

Claims (10)

delete Forming a tip forming region by bonding and selectively etching the first and second silicon wafers; Depositing and selectively exposing a seed metal layer on a front surface including the tip forming region; Simultaneously forming a growth metal layer in a region including a tip portion formed in the tip forming region and a probe beam portion for supporting the tip portion; Controlling the formation height and surface roughness of the growth metal layer to form a probe structure; The tip forming region may be formed of the first and second tip forming regions, and the forming of the tip forming region may include: Selectively etching the first silicon wafer to define a tip forming first region; Bonding a second silicon wafer to a first silicon wafer having the tip forming first region, And selectively etching the second silicon wafer on the tip forming first region to define a tip forming second region. The probe card structure of claim 2, wherein the etching process for defining the tip forming first region and the tip forming second region is performed by a dry etching process using inductively coupled plasma (ICP). Method of formation. The method of claim 2, wherein the tip forming first region, A tip intermediate region formed by etching the first silicon wafer under different etching conditions and a tip end region continuous from the tip intermediate region, The tip forming second region is a tip base region serving as a pillar of the tip, and the tip base region is continuous in the tip intermediate region. The method of claim 2, wherein in the forming of the tip forming second region, Bonding the second silicon wafer to the first silicon wafer, and processing the bonded second silicon wafer to adjust the thickness of the second silicon wafer to determine the formation height of the tip forming second region. Method for forming a probe card structure using. delete 3. The method of claim 2, in order to form the probe structure, Forming a photoresist pattern to selectively expose the seed metal layer in the region including the tip portion and the probe beam portion formed in the tip formation region; Forming a first growth metal layer in the region including the tip portion and the tamchip beam portion by a metal growth process using the exposed seed metal layer; Controlling the surface roughness and height of the first growth metal layer by planarizing the entire surface on which the first growth metal layer is formed; Forming another photoresist pattern to expose the planarized first growth metal layer; A method of forming a probe card structure using a silicon bonded wafer, comprising: forming a second growth metal layer by a metal growth process and again controlling surface roughness and height. 8. The method of forming a probe card structure using a silicon bonded wafer according to claim 7, wherein a surface protective layer is formed on the surface of the second growth metal layer whose surface roughness and height are controlled. The method of forming a probe card structure using a silicon bonded wafer according to claim 2, wherein the seed metal layer is formed of a stacked structure of Ti and Cu, and a metal growth process is performed by an electroplating method. 9. The method for forming a probe card structure using a silicon bonded wafer according to claim 8, wherein the surface protective layer is formed by using an Au electroplating method.

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