KR20080100706A - Method of manufacturing semiconductor substrate having gan layer - Google Patents

Method of manufacturing semiconductor substrate having gan layer Download PDF

Info

Publication number
KR20080100706A
KR20080100706A KR1020070046723A KR20070046723A KR20080100706A KR 20080100706 A KR20080100706 A KR 20080100706A KR 1020070046723 A KR1020070046723 A KR 1020070046723A KR 20070046723 A KR20070046723 A KR 20070046723A KR 20080100706 A KR20080100706 A KR 20080100706A
Authority
KR
South Korea
Prior art keywords
gan
thin film
substrate
metal
film
Prior art date
Application number
KR1020070046723A
Other languages
Korean (ko)
Other versions
KR100878512B1 (en
Inventor
권광우
김익현
Original Assignee
나이넥스 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 나이넥스 주식회사 filed Critical 나이넥스 주식회사
Priority to KR20070046723A priority Critical patent/KR100878512B1/en
Priority to PCT/KR2008/002682 priority patent/WO2008140254A1/en
Publication of KR20080100706A publication Critical patent/KR20080100706A/en
Application granted granted Critical
Publication of KR100878512B1 publication Critical patent/KR100878512B1/en

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C30B29/406—Gallium nitride
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Led Devices (AREA)

Abstract

The GaN film of good quality and low cost can be manufactured by forming a fine pattern without an additional photoetching process. The GaN method for manufacturing a semiconductor substrate is provided. A step is for forming the GaN thin film on a substrate. A step is for forming the phase mask layer(120) on the GaN thin film. A step is for forming the metallic film by depositing the predetermined metal on the phase mask layer. A step is for transforming the metallic film to metal particle(132) by heat treatment. A step is for patterning by etching the phase mask layer and GaN thin film using metal particles as a mask. A step is for removing metal particles. A step is for forming the GaN film by re-growing GaN on the resultant.

Description

Method of manufacturing semiconductor substrate having GaN layer

1 is a cross-sectional view sequentially illustrating a GaN semiconductor substrate manufacturing process according to a preferred embodiment of the present invention.

FIG. 2 is an electron micrograph of a state in which a metal thin film deposited on a silicon oxide film is granulated by heat treatment in a GaN semiconductor substrate manufacturing process according to a preferred embodiment of the present invention.

3 is an electron micrograph of a cross section of a GaN semiconductor substrate having a GaN thin film formed thereon according to a manufacturing process according to a preferred embodiment of the present invention.

4 is a schematic cross-sectional view of a GaN light emitting device fabricated on a GaN semiconductor substrate formed according to a preferred embodiment of the present invention.

5 is a cross-sectional view sequentially showing a GaN semiconductor substrate manufacturing process according to another embodiment of the present invention.

6 is a schematic cross-sectional view of a GaN light emitting device fabricated on a GaN semiconductor substrate formed according to another embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: Heterogeneous single crystal substrate

500: Si substrate

110, 510: GaN thin film

120, 520: dislocation mask layer

130, 530: metal thin film

132, 532: metal particles

140, 540: GaN film

150, 550: air gap

40, 60: GaN light emitting diode element

The present invention relates to a GaN semiconductor substrate manufacturing process for growing a GaN single crystal thin film on a substrate, and more particularly to a GaN semiconductor substrate manufacturing process capable of growing a GaN single crystal film minimized crystal defects on a heterogeneous single crystal substrate.

A gallium nitride (GaN) semiconductor film is a material used to fabricate semiconductor devices such as light emitting diodes, light receiving devices, and FETs. In order for the gallium nitride film to be used in such a semiconductor device, it must be formed in the form of a single crystal with few crystal defects. At present, there is no method for growing a GaN single crystal substrate largely at a productive price. Therefore, a GaN semiconductor substrate in which GaN is grown in a thin film form on a heterogeneous single crystal substrate is generally used. However, since there is no single crystal substrate of GaN and the lattice constant, GaN single crystal thin film is formed on the single crystal substrate by introducing a buffer layer forming technique to Al 2 O 3 , SiC single crystal substrate having a different lattice constant from GaN. Doing. However, due to the difference in lattice constant, crystal defects are naturally formed in the GaN thin film. In particular, threading dislocation adversely affects device characteristics and lifetime.

Epitaxial lateral overgrowth (ELO) and pendeo epitaxy methods are used to reduce such crystal defects.

The ELO method is a method in which a part of GaN is covered with a silicon oxide film or a nitride film, and GaN, which is regrown in the exposed part of GaN, is bonded while growing laterally over the silicon oxide film. The ELO method described above reduces the amount of dislocation in the thin film by masking the dislocation directly below the growth mask. However, the dislocation present in the exposed GaN is not masked, so that the dislocation existing in the GaN film grows as it is.

The pendeo epitaxy method which improves these disadvantages is to expose the hetero-crystal substrate by etching the exposed GaN other than the mask, and to re-grow the GaN on the GaN wall immediately below the mask so that the part on the mask is laterally grown. This can greatly reduce the amount of dislocations.

The mask used in the above-described ELO method or pendeo epitaxy method has a stripe shape or a dot shape having a side surface in the (11-20) direction in the case of a c plane sapphire substrate. In addition, the mask having the above-described shape is generally formed by patterning through an exposure, development, and etching process using a photosensitive polymer.

However, the conventional pendeo epitaxy method has a problem that it is difficult to obtain a flat GaN film as the width of the mask becomes wider. Due to the lateral growth characteristics of the GaN thin film, the growing edge grows with crystallinity in an inclined direction. In this state, when the upper side of the mask is laterally grown and combined with other GaN, it is not easy to form a flat thin film due to crystallinity, but it is easy to form irregularities, and other defects occur at the part where GaN and GaN meet. do. In addition, in order to cover the upper part of the mask with GaN, there is a disadvantage that a thicker GaN than the existing thickness is required.

Meanwhile, other studies solve the above problem by removing the mask and growing the GaN after making the structure of the pendeo epitaxy, but the dislocation in the seed GaN does not block because of the absence of the mask. There is a disadvantage.

This disadvantage can be reduced by forming a narrow mask pattern, for which a pattern in the range of 1 μm or less is preferable. In order to form such a fine pattern, an expensive development mask and an exposure machine are essential. However, in order to reduce the width of the mask to less than 0.5 um in such a pattern using a fine mask, a problem arises that the manufacturing cost increases.

The pendeo epitaxy process, on the other hand, is one of the methods that enables GaN growth on Si single crystal substrates. In general, since the Si substrate has a large difference in lattice constant and thermal expansion with GaN, the GaN film formed on the Si substrate is known to increase cracks and crystal defects as the thickness increases. However, unlike other substrates, the Si substrate has the advantages of high productivity and large area, and low price / area, allowing mass production of 300 mm diameter substrates. Accordingly, the present applicant intends to propose a method for producing a GaN thin film having excellent properties using a Si substrate.

An object of the present invention for solving the above problems is to provide a GaN semiconductor substrate manufacturing method for easily growing a high quality GaN thin film on a heterogeneous single crystal substrate.

Another object of the present invention is to provide a GaN semiconductor substrate manufacturing method that can simplify the production process and improve productivity by forming a fine pattern without using a photolithography process.

It is still another object of the present invention to provide a method for producing a GaN semiconductor substrate for a GaN light emitting device that is economical and productive by forming a high quality GaN film having few crystal defects on a Si substrate.

A feature of the present invention for achieving the above-described technical problem relates to a GaN semiconductor substrate manufacturing method for forming a GaN film with low crystal defects on a heterogeneous single crystal substrate, the GaN semiconductor substrate manufacturing method,

(a) forming a GaN thin film on the substrate,

(b) forming a dislocation mask layer on the GaN thin film,

(c) depositing a predetermined metal on the dislocation mask layer to form a metal thin film,

(d) heat-treating to a predetermined temperature to deform the metal thin film into metal particles,

(e) etching and patterning the dislocation mask layer and the GaN thin film using the metal particles as a mask,

(f) removing the metal particles,

(g) re-growing GaN on the resultant of step (f) to form a GaN film;

To form a GaN film having few crystal defects on the substrate.

In the manufacturing method having the characteristics described above, the substrate is made of any one of Al 2 O 3 , SiC, Si substrate which is a hetero single crystal substrate and GaN film,

When the substrate is a Si substrate, in the step (e), the metal particles may be patterned by etching to the predetermined depth of the substrate as well as the dislocation mask layer and the GaN thin film.

In the manufacturing method having the above characteristics, the metal constituting the metal thin film is made of any one of Au, Pt, Sn, Ag, Zn, In, the metal particles have an irregular shape and distribution, the metal particles The size of is preferably less than 1 μm. The size of the metal particles is determined by the thickness of the metal thin film, the type of metal and the heat treatment temperature of the metal, and may be partially oxidized or nitrided according to the heat treatment atmosphere.

In the manufacturing method having the above-mentioned characteristic, it is preferable that the said potential mask layer consists of a silicon oxide film or a silicon nitride film.

The GaN semiconductor substrate manufactured according to the GaN semiconductor substrate manufacturing method having the above-described characteristics may be used as a substrate such as a GaN light emitting device and an electronic device.

Hereinafter, a manufacturing process of a GaN semiconductor substrate according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings. 1 is a cross-sectional view sequentially illustrating a manufacturing process of a GaN semiconductor substrate according to a preferred embodiment of the present invention.

First, referring to FIG. 1A, the GaN thin film 110 is grown to a predetermined thickness on the hetero single crystal substrate 100. The hetero single crystal substrate 100 uses an Al 2 O 3 , SiC substrate, and grows a GaN thin film on the substrate 100 using a general MOCVD method. The grown GaN thin film 110 may have a thickness of about 200 nm or more, but may be less than that. The grown GaN thin film 110 may or may not be doped, and may be a GaN thin film containing some Al, In, or other materials other than GaN.

Next, a dislocation mask layer 120 is formed on the GaN thin film 110. The potential mask layer 120 is formed by depositing a silicon oxide film or a silicon nitride film on the entire surface. Hereinafter, the silicon oxide film will be described as an example. The thickness of the dislocation mask layer 120 may be from several tens of nm to several μm, but about 200 nm is most preferable to regrow GaN in a future process.

Next, a metal thin film 130 is formed on the potential mask layer 120. At this time, as a metal usable as the metal thin film 130, Sn, In, Zn, Ag having a relatively low melting point and Au, Pt, etc., which are known to form particles well, are suitable. As such, the metal thin film may be formed of any one of Au, Pt, Sn, Ag, Zn, and In. In addition, since the thickness of the metal thin film depends on the size of the metal particles formed in a future process, the thickness of the metal thin film is determined according to the size of the metal particles required.

Next, referring to FIG. 1B, the metal thin film 130 is heat-treated at a predetermined temperature to form metal particles 132. At this time, since the thickness of the metal thin film 130 tends to increase in the size of the metal particles when they are granulated by heat treatment, the size of the metal particles 132 may be adjusted by adjusting the thickness of the metal thin film 130. have. Heat treatment of the metal thin film is carried out at a temperature of several hundred ℃ in a nitrogen or oxygen atmosphere. Similarly, the size of the particles can be partially controlled by controlling the heat treatment temperature and time. The metal particles have an irregular shape and distribution, and the size of the metal particles is preferably less than 1 μm. The size of the metal particles is determined according to the thickness of the metal thin film, the type of metal and the heat treatment temperature.

Next, referring to FIG. 1C, the silicon oxide film serving as the potential mask layer 120 is etched and patterned using the metal particles 132 as a mask. At this time, the etching method is most preferably dry etching. In particular, when using a reactive plasma gas containing a fluorine component at the time of etching, since the etching ratio of the silicon oxide film to the metal particles 132 is large, the GaN thin film 110 under the silicon oxide film using the metal particles 132 as a mask. It becomes possible to etch the silicon oxide film until it is revealed.

Next, referring to FIG. 1D, the exposed GaN thin film 110 is etched to pattern the GaN thin film. At this time, not only the metal particles 132 but also the silicon oxide film, which is the patterned dislocation mask layer 122, serves as a mask for etching the GaN thin film 110. As a result, the GaN thin film under the silicon oxide film, which is the patterned dislocation mask layer 122, is not etched, and all of the exposed GaN thin film without the silicon oxide film is etched. The etching of the GaN thin film 110 has sufficient etching rate for the etching of the silicon oxide film by using a reactive plasma gas containing Cl 2 and BCl 3 as main components, so that etching is possible until the underlying substrate is exposed. According to the thickness of the GaN thin film, the thickness of the silicon oxide film to act as a mask should be adjusted.

Next, referring to FIG. 1E, when the pattern etching of the GaN thin film is finished, the remaining metal particles 132 are wet etched. It mainly uses a dedicated etching solution based on a strong acid or a metal, and is a solution which does not etch a silicon oxide film. The substrate is immersed in such a solution for a certain time to remove metal particles, washed in deionized water, and then drained to prepare a substrate for regrowth of GaN.

Next, referring to FIG. 1 (f), the GaN is regrowed using the GaN thin film 112 patterned on the substrate on which the dislocation mask layer 122 and the GaN thin film 112 are seeded. GaN film 140 is formed.

3 is an electron micrograph of a cross section of a GaN semiconductor substrate in which GaN is regrown on a substrate to form a flat GaN film according to a preferred embodiment of the present invention. Referring to FIGS. 3 and 1 (f), GaN regrows on the wall of the GaN thin film 112 directly below the patterned silicon oxide layer 122, due to the rapid growth of the lateral growth due to the characteristics of growth. The gap 150 is formed in the lower portion while meeting the opposite GaN. GaN thus grown continues to grow to cover all of the top portion of the silicon oxide film, thereby forming a flat GaN film 140.

4 illustrates a cross-sectional view of the LED device 40 formed on the GaN film 410 grown on the sapphire substrate 400 according to the above-described preferred embodiment. Referring to FIG. 4, the LED device 40 formed on the GaN film 410 has GaN having an active layer 430 in the form of a multi-quantum well between an n-GaN layer 420 and a p-GaN layer 440. A portion of the thin film is etched to expose the n-GaN layer 420. After forming the transparent electrode 450 on the surface of the remaining p-GaN layer 440, the cathode electrode 422 and the anode electrode 452 on each of the exposed n-GaN layer 420 and transparent electrode 450 ).

Hereinafter, a method of manufacturing a GaN semiconductor substrate according to another exemplary embodiment of the present invention will be described with reference to FIG. 5. 5 are cross-sectional views sequentially illustrating a process of manufacturing a GaN semiconductor substrate according to the present embodiment. The GaN semiconductor substrate manufacturing method according to the present embodiment relates to a method of forming a GaN film with few crystal defects on a Si substrate.

Referring to Figure 5, the process of Figure 5 (a) to (b) is the same as the manufacturing method of the preferred embodiment described above. First, the GaN thin film 510 is grown on the Si substrate 500 to a thickness such that no crack occurs, and then the dislocation mask layer 520 is formed. Next, a metal thin film 530 is formed by depositing a metal on the potential mask layer 520, and then heat-treated to granulate metals of the metal thin film, thereby forming metal particles 532.

Next, referring to FIGS. 5C and 5D, the dislocation mask layer 520 is etched using the metal particles as a mask to form a random circle pattern having a diameter of less than 1 μm, and then the metal particles and the metal particles. The GaN thin film 510 is etched using the patterned oxide particles as a mask. At this time, the Si (500) substrate is etched by a predetermined depth (d1), so that the defective GaN regrown in the exposed Si substrate during the GaN thin film regrowth in a subsequent process is performed on the GaN 512 wall surface under the mask particle 522. It is desirable to induce blocking by GaN without regrown defects.

Next, referring to FIGS. 5E and 5F, after removing the metal particles by wet etching, the Si substrate having a portion of the surface etched by regrowing the patterned GaN thin film 512 with seed. The GaN film 540 having few crystal defects is formed on the 502. At this time, as GaN lateral growth (lateral growth) meets the opposite GaN to form a gap 550 in the lower portion.

6 illustrates a cross-sectional view of a GaN light emitting diode device manufactured by applying a semiconductor substrate having a GaN film 610 grown on a Si substrate 600 according to the present embodiment. Referring to FIG. 6, the light emitting diode 60 formed on the GaN film 610 grown on the Si substrate 600, which is a conductive substrate, according to the present embodiment, has an n-GaN layer 620 and a p-GaN layer 640. It has a structure consisting of an active layer 630 having a multiple quantum well in between. The cathode electrode 662 is formed on the bottom surface of the Si substrate 600 using the conductivity of the Si substrate 600, and the anode electrode 652 forms the transparent electrode 650 on the surface of the p − GaN layer 640. Is then formed on it.

In addition, in the case of the light emitting diode formed on the Si substrate, since the light generated in the active layer is absorbed by the Si substrate due to the low reflectivity of the Si substrate, it is preferable to form a reflective film at the lower end of the n-GaN layer. As the reflective film, it is preferable to apply a Bragg reflective film in which an Al x Ga 1 - x N (x = 0 to 1) / GaN thin film is repeatedly grown.

Although the present invention has been described above with reference to preferred embodiments thereof, this is merely an example and is not intended to limit the present invention, and those skilled in the art do not depart from the essential characteristics of the present invention. It will be appreciated that various modifications and applications which are not illustrated above in the scope are possible. For example, in the embodiment of the present invention, the type of metal particles, the temperature of heat treatment, the size of the metal particles, etc. may be variously modified in order to prevent crystal defects from occurring in the regrown GaN film. And differences relating to such modifications and applications should be construed as being included in the scope of the invention defined in the appended claims.

The present invention is an improvement of the conventional pendeo epitaxy method, and by the present invention, it is possible to more easily and inexpensively realize formation of a GaN thin film having fewer crystal defects on a hetero single crystal substrate.

In particular, the present invention enables the fabrication of light emitting diodes on such GaN thin films by realizing GaN thin film growth with fewer crystal defects on the Si substrate. As such, by providing the GaN semiconductor substrate of the Si substrate that can be used in the fabrication of GaN light emitting diode device according to the present invention, it is possible to increase the output of the light emitting diode using a Si substrate of 2 inches or more, and thus the diode The effect is to reduce the price of.

Claims (8)

(a) forming a GaN thin film on the substrate; (b) forming a dislocation mask layer on the GaN thin film; (c) depositing a predetermined metal on the dislocation mask layer to form a metal thin film; (d) heat treating to a predetermined temperature to deform the metal thin film into metal particles; (e) etching and patterning the dislocation mask layer and the GaN thin film using the metal particles as a mask; (f) removing the metal particles; (g) re-growing GaN on the resultant of step (f) to form a GaN film; And forming a GaN film having few crystal defects on the substrate. The method of claim 1, wherein the substrate is Al 2 O 3 Or a SiC substrate. The method of claim 1, wherein the substrate is made of a Si substrate, In the step (e), the metal particles are used as a mask to etch and pattern not only the dislocation mask layer and the GaN thin film but also a predetermined depth of a Si substrate. The GaN semiconductor substrate manufacturing method of claim 1, wherein the metal constituting the metal thin film is made of any one of Au, Pt, Sn, Ag, Zn, and In. The method of claim 1, wherein the metal particles have an irregular shape and distribution, and the metal particles have a size of less than 1 μm. The GaN semiconductor substrate manufacturing method of claim 1, wherein the potential mask layer is formed of a silicon oxide film or a silicon nitride film. The method of claim 1, wherein the size of the metal particles is determined by a thickness of the metal thin film, a type of metal, and a heat treatment temperature of the metal. A GaN light emitting device manufactured using a GaN semiconductor substrate manufactured according to the GaN semiconductor substrate manufacturing method according to any one of claims 1 to 7.
KR20070046723A 2007-05-14 2007-05-14 Method of manufacturing semiconductor substrate having GaN layer KR100878512B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR20070046723A KR100878512B1 (en) 2007-05-14 2007-05-14 Method of manufacturing semiconductor substrate having GaN layer
PCT/KR2008/002682 WO2008140254A1 (en) 2007-05-14 2008-05-14 Method of manufacturing semiconductor substrate having gan layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR20070046723A KR100878512B1 (en) 2007-05-14 2007-05-14 Method of manufacturing semiconductor substrate having GaN layer

Publications (2)

Publication Number Publication Date
KR20080100706A true KR20080100706A (en) 2008-11-19
KR100878512B1 KR100878512B1 (en) 2009-01-13

Family

ID=40002396

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20070046723A KR100878512B1 (en) 2007-05-14 2007-05-14 Method of manufacturing semiconductor substrate having GaN layer

Country Status (2)

Country Link
KR (1) KR100878512B1 (en)
WO (1) WO2008140254A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120071517A (en) * 2010-12-23 2012-07-03 에피스타 코포레이션 Optoelectronic device and method for manufacturing the same
KR101286771B1 (en) * 2011-08-22 2013-07-16 고려대학교 산학협력단 OLED and manufacturing method of the same
KR101448870B1 (en) * 2012-11-28 2014-10-13 한국기계연구원 Method for fabricating nano/micro hybrid structure
US9093605B2 (en) 2010-12-02 2015-07-28 Epistar Corporation Optoelectronic device and method for manufacturing the same

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012142473A (en) * 2011-01-05 2012-07-26 Shogen Koden Kofun Yugenkoshi Photoelectric element and method of manufacturing the same
KR101373398B1 (en) * 2012-04-18 2014-04-29 서울바이오시스 주식회사 Method for preparing high efficiency Light Emitting Diode thereof
CN103614769B (en) * 2013-10-25 2016-03-16 中国电子科技集团公司第五十五研究所 A kind of Gallium nitride homoepitaxy method based on original position etching
US9171810B2 (en) * 2013-11-21 2015-10-27 Nxp B.V. Electronic device incorporating a randomized interconnection layer having a randomized conduction pattern
CN103647008B (en) * 2013-12-31 2016-04-06 中国科学院半导体研究所 The method of growth semi-polarity GaN thick film
CN104078335B (en) * 2014-06-30 2017-04-19 中国科学院上海微系统与信息技术研究所 Composite seed crystal template and method for growing GaN single crystals through HVPE

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4088111B2 (en) * 2002-06-28 2008-05-21 日立電線株式会社 Porous substrate and manufacturing method thereof, GaN-based semiconductor multilayer substrate and manufacturing method thereof
KR100682879B1 (en) * 2005-01-07 2007-02-15 삼성코닝 주식회사 Epitaxial growth method
KR100682880B1 (en) * 2005-01-07 2007-02-15 삼성코닝 주식회사 Epitaxial growth method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9093605B2 (en) 2010-12-02 2015-07-28 Epistar Corporation Optoelectronic device and method for manufacturing the same
KR20120071517A (en) * 2010-12-23 2012-07-03 에피스타 코포레이션 Optoelectronic device and method for manufacturing the same
KR101286771B1 (en) * 2011-08-22 2013-07-16 고려대학교 산학협력단 OLED and manufacturing method of the same
KR101448870B1 (en) * 2012-11-28 2014-10-13 한국기계연구원 Method for fabricating nano/micro hybrid structure

Also Published As

Publication number Publication date
WO2008140254A1 (en) 2008-11-20
KR100878512B1 (en) 2009-01-13

Similar Documents

Publication Publication Date Title
KR100878512B1 (en) Method of manufacturing semiconductor substrate having GaN layer
TWI445052B (en) Growth of indium gallium nitride (ingan) on porous gallium nitride (gan) template by metal-organic chemical vapor deposition (mocvd)
JP5180050B2 (en) Manufacturing method of semiconductor device
US6844569B1 (en) Fabrication method of nitride-based semiconductors and nitride-based semiconductor fabricated thereby
CN102694087B (en) Electronic device and method of manufacturing the same
KR100902512B1 (en) Method for growing GaN crystal on silicon substrate, method for manufacturing GaN-based light emitting device and GaN-based light emitting device
JP3139445B2 (en) GaN-based semiconductor growth method and GaN-based semiconductor film
JP4371202B2 (en) Nitride semiconductor manufacturing method, semiconductor wafer, and semiconductor device
KR101380717B1 (en) Semi-conductor substrate and method and masking layer for producing a free-standing semi-conductor substrate by means of hydride-gas phase epitaxy
JP4903189B2 (en) Method of growing semipolar nitride single crystal thin film and method of manufacturing nitride semiconductor light emitting device using the same
JP3821232B2 (en) Porous substrate for epitaxial growth, method for producing the same, and method for producing group III nitride semiconductor substrate
US20140127848A1 (en) Nitride semiconductor light-emittting device and process for producing the same
JP4471726B2 (en) Method for producing single crystal sapphire substrate
JP2003249453A (en) Manufacturing method for gallium nitride substrate
JPH10321911A (en) Method for manufacturing epitaxial layer of compound semiconductor on single-crystal silicon and light-emitting diode manufactured therewith
JPH11145516A (en) Manufacture of gallium nitride compound semiconductor
JP2010512301A (en) Crystal growth of (Al, In, Ga, B) N M-plane and semipolar plane on various substrates
JP2014519188A (en) Semiconductor thin film structure and method for forming the same
US10892159B2 (en) Semipolar or nonpolar group III-nitride substrates
JP2010521810A (en) Semiconductor heterostructure and its manufacture
JP4356208B2 (en) Vapor phase growth method of nitride semiconductor
JP4743989B2 (en) Semiconductor device, method for manufacturing the same, and method for manufacturing a semiconductor substrate
JP2002008998A (en) Manufacturing method for group iii nitride compound semiconductor element
JP4924563B2 (en) Method for producing substrate product having macro step, method for producing epitaxial wafer, and method for producing nitride semiconductor light emitting device
KR20140148200A (en) Method of manufacturing iii-nitride semiconductor layer

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee