KR101373398B1 - Method for preparing high efficiency Light Emitting Diode thereof - Google Patents

Abstract

The present invention discloses a light emitting diode manufacturing method using a three-dimensional structure. According to one embodiment of the present invention, after forming the three-dimensional structure on the substrate, by forming a particle between the three-dimensional structure it can improve the light extraction efficiency by the scattering effect (scattering) effect. In addition, there is a technical feature that can be easily reused by separating the substrate and the three-dimensional structure.

Description

Method for preparing high efficiency Light Emitting Diode

The present invention relates to a high efficiency light emitting diode manufacturing method, and more particularly to a high efficiency light emitting diode manufacturing method that can be expected to improve the light extraction efficiency by forming particles between the three-dimensional structure.

 A light emitting diode (LED) is one of light emitting devices that emit light when a current is applied. Such a light emitting diode converts electricity into light using characteristics of a compound semiconductor, and is known to be excellent in energy saving effect because it can emit high efficiency light at low voltage.

In particular, gallium nitride (GaN) -based light emitting diodes exhibit a broad emission spectrum including infrared to infrared, and can be used in various ways, and do not include environmentally harmful substances such as arsenic (As) and mercury (Hg). This is attracting attention as a next generation light source.

1 is a cross-sectional view schematically showing a layer structure of a planar light emitting diode according to the prior art.

As shown in FIG. 1, the light emitting diode 10 is configured in the order of the substrate 1, the n-type semiconductor layer 2, the active layer 3, and the p-type semiconductor layer 4. The p-electrode 5 is formed on the p-type semiconductor layer 4, and the n-electrode 6 is formed on the exposed surface of the n-type semiconductor layer 2. At this time, the substrate is usually used sapphire, Si, SiC, the active layer is made of a multi-quantum well structure. In the active layer, light is generated by combining holes flowing through the p-type semiconductor layer and electrons flowing through the n-type semiconductor layer.

However, when the gallium nitride compound semiconductor is grown in a thin film form on the substrate, the luminous efficiency is lowered due to lattice constant mismatch or difference in thermal expansion coefficient, and it is difficult to grow a large area, thereby increasing production cost.

In order to alleviate this drawback, techniques for forming nanoscale light emitting diodes by forming p-n junctions in the form of nanostructures have been studied. In this regard, Korean Patent Laid-Open No. 2010-0028412 discloses a technology for efficiently growing nanorods by directly growing nanostructures on a substrate.

When forming a plurality of nanostructures as described above, it has a low average refractive index due to the space between the nanostructures, it can exhibit a high light extraction efficiency due to the structural characteristics of scattering light.

Accordingly, the present invention is to provide a light emitting diode capable of measuring the electrical properties (EL) after regrowth of the semiconductor layer, including the advantages of the nano-structure as described above, and maximize the light extraction efficiency.

Embodiments of the present invention provide a light emitting diode having a high luminous efficiency including a three-dimensional structure and particles in accordance with the above-mentioned needs.

In the method of manufacturing a light emitting diode according to an embodiment of the present invention, forming a GaN-based semiconductor layer on a substrate, and forming a plurality of metal nano dot masks on the GaN-based semiconductor layer and selectively etching the plurality of GaN-based 3 layers. Forming a dimensional structure, forming particles between the plurality of GaN-based three-dimensional structures, exposing a GaN surface on top of the GaN-based three-dimensional structure by removing the metal nano dot mask, and the exposed Re-growing the first semiconductor layer using the GaN surface as a seed.

In addition, according to another embodiment of the present invention, a method of manufacturing a light emitting diode includes forming a GaN based semiconductor layer on a substrate, and sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on the GaN based semiconductor layer. Stacking, forming a plurality of metal nano dot masks on the second semiconductor layer and then selectively etching to form a plurality of GaN-based three-dimensional structures, and forming particles between the plurality of GaN-based three-dimensional structures Exposing the surface of the second semiconductor layer on the GaN-based three-dimensional structure by removing the metal nano dot mask, and regrowing the second semiconductor layer using the exposed second semiconductor layer as a seed. It includes.

The light emitting diode according to the present invention has a low average refractive index due to the structural characteristics of the three-dimensional structure (space between the three-dimensional structure), and can improve the light extraction efficiency due to the structural characteristic of scattering light.

In addition, since a large number of dislocations are removed when the three-dimensional structure is formed, when the particles are interposed between the three-dimensional structures and the semiconductor layer is regrown, dislocations are not found in the region where the particles are present, and thus the efficiency can be expected to be improved.

In addition, by filling the particles between the three-dimensional structure, it is possible to enable pn junction (junction) of the light emitting diode in the form of a three-dimensional structure.

In addition, it is possible to provide a light emitting diode with improved convenience and economy in that it is possible to easily separate the substrate and the three-dimensional structure.

1 is a cross-sectional view of a light emitting device according to the prior art.
2 to 3 show a step-by-step method of manufacturing a high-efficiency light emitting diode light emitting diode of the present invention.
4 to 5 show a step-by-step method of manufacturing a light emitting diode separating the substrate and the three-dimensional structure according to an embodiment of the present invention.
6 and 7 are SEM images of a metal nano dot mask formed on a GaN based semiconductor layer according to an embodiment of the present invention.
8 and 9 are SEM photographs of the GaN-based three-dimensional structure formation according to another embodiment of the present invention.
10 and 11 are SEM pictures of particles inserted between the three-dimensional structure according to the present invention.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention. However, the embodiments illustrated below are not intended to limit the scope of the invention, but rather to provide a thorough understanding of the invention to those skilled in the art. In the following drawings, like reference numerals refer to like elements, and the size of each element in the drawings may be exaggerated for clarity and convenience of explanation.

In the present specification, each of "first semiconductor" and "second semiconductor" means "n-type" or "p-type", and has opposite conductive properties. Therefore, when the first semiconductor is an n-type semiconductor, the second semiconductor corresponds to a p-type semiconductor and vice versa.

The light emitting diode of the present invention forms a three-dimensional structure, there is a feature to improve the light efficiency by forming particles therebetween, it will be described.

The light emitting diode manufacturing method of the present invention comprises the steps of forming a GaN-based semiconductor layer on a substrate, forming a three-dimensional structure, forming particles between the three-dimensional structure, and the first or second on the three-dimensional structure Re-growing the semiconductor layer.

2 and 3 illustrate a process of forming a three-dimensional structure and particles according to the present invention.

GaN  Steps to Form a Series Semiconductor

2A and 3A illustrate forming GaN-based semiconductor layers 120 and 220 on substrates 110 and 210.

GaN-based semiconductor layers 120 and 220 are formed on the substrates 110 and 210. The substrates 110 and 210 are semiconductor crystal growth substrates, and a sapphire substrate polished on both sides may be used. In addition, the GaN-based semiconductor layers 120 and 220 usable in the present invention may be formed of Ga, N, or other materials including Group III, such as In, Al, or group V, such as P, As, Sb. More specifically, it may be selected from GaN, InN, AlN, InGa, AlGaN, InGaN, AlInN, and preferably GaN.

In addition, it is preferable to use undoped GaN (u-GaN) or n-GaN as the GaN-based semiconductor layers 120 and 220. In the present invention, it is more preferable to use u-GaN.

The GaN-based semiconductor layers 120 and 220 may be formed of a substrate using metal organic chemical vapor deposition (MOCVD) or hydride vapor deposition (HVPE) or molecular beam growth (MBE) or metal organic chemical vapor deposition (MOCVD). It can form on a phase.

Referring to FIG. 3B, a step of sequentially stacking a first semiconductor layer 230, an active layer 240, and a second semiconductor layer 250 on the GaN-based semiconductor layer 220 is performed in a pn junction form. It is possible to make a three-dimensional structure with a LED structure made.

Meanwhile, the forming of the GaN-based semiconductor layer on the substrate may further include forming a u-GaN layer and forming a high concentration n-GaN layer. This is to make it possible to selectively etch the three-dimensional structure later, which will be described later.

Forming a three-dimensional structure

The three-dimensional structure may be used as a seed for regrowing the semiconductor layer on the three-dimensional structure, and may be used as a medium for separating the regrown semiconductor layer and the substrate. In addition, when the regrown semiconductor layer is not separated from the substrate, particles may be inserted between the three-dimensional structures to serve as a medium capable of improving the light efficiency.

After forming a plurality of metal nano dot masks (not shown) on the GaN-based semiconductor layer 120 and the second semiconductor layer 250, the semiconductor layer is selectively vertically etched to form a GaN-based three-dimensional structure 120'260 ).

In order to form the dot mask, a metal layer is formed on the GaN series semiconductor layer 120 or the second semiconductor layer 250, and a heat treatment is used. When the metal layer is heat treated, the thin metal layer may be melted to form a self-aggregating mass, that is, metal nano dots. This heat treatment process may use a known method.

Specifically, a metal layer (not shown) may be sequentially formed on the GaN-based semiconductor layer 120 or the second semiconductor layer 250. Preferably, a sacrificial layer (not shown) may be formed on the GaN-based semiconductor layer 120 or the second semiconductor layer 250, and metal layers may be sequentially formed.

The sacrificial layer may be formed to compensate for the difference in surface tension between the semiconductor layer and the metal layer. Therefore, the sacrificial layer does not affect the underlying layer, and an insulating material should be used while being able to easily form a metal nanodot pattern during the heat treatment process. The material that can be used for the sacrificial layer may be composed of silica (SiO 2), silicon nitride (Si 3 N 4), or the like, and preferably, may be made of silica.

The sacrificial layer may be formed by a known method, and in the present invention, the sacrificial layer is formed by using a plasma chemical vapor deposition (PECVD) method, and preferably in the range of about 10 to 1000 nm, more preferably about 50 to 100 nm. It can be formed in the thickness of.

Next, the metal layer is gold (Au), silver (Ag), nickel (Ni), cobalt (Co), iron (Fe), copper (Cu), platinum (Pt), palladium (Pd), aluminum (Al), Or combinations thereof may be used. Preferably, nickel (Ni) may be used to form a metal layer in the form of a thin film having a thickness of 5 nm to 50 nm, and may be formed in a thin film having a thickness of 10 nm to 20 nm.

After forming the sacrificial layer and the metal layer on the GaN-based semiconductor layer 120 or the second semiconductor layer 250 by using an electron beam coater (e-beam coater) to form a three-dimensional structure, The heat treatment is performed to form metal nano dots (not shown). Thereafter, a selective and vertical etching can be performed using a dry etching method to form a three-dimensional structure.

Dry etching methods used in this case include reactive ion etching (RIE), inductively coupled plasma reactive ion etching (ICP-RIE), chemical ion beam etching (CAIBE), and the like. For example, in the case of using ICP-RIE, it is preferable to etch the GaN-based semiconductor layer while suppressing the etching of the metal nano dots by appropriately adjusting process parameters such as selectivity and etch rate.

Meanwhile, the three-dimensional structures 120 'and 260 formed by the above method are three-dimensional structures 120' formed by etching a part of the GaN-based semiconductor layer, or the first semiconductor layer 230 and the active layer 240. And a 3D structure 260 having a pn junction shape, including the second semiconductor layer 250.

The three-dimensional structures 120 ′ and 260 may be rods or pillars of micro or nano size. Preferably the diameter of the three-dimensional structure may be 50 ~ 2000nm, preferably 100 to 1000nm, the three-dimensional structure may be 100nm ~ 3㎛, preferably 500nm ~ 2㎛. In addition, the spacing between the three-dimensional structure (120 ', 260) is in the range of 100 to 2 ㎛, preferably 200 to 1.5 ㎛.

The three-dimensional structures 120 'and 260 as described above may be used as seeds for future growth of the semiconductor layer, and may also serve as GaN buffers or substrates for manufacturing GaN-based LEDs.

Particles  Forming step

2B and 3B, particles 130 and 270 are inserted between the three-dimensional structures 120 ′ and 260 by using a spin coater.

As a method of using the particles 130 and 270, dip coating, spray coating, spin coating, or the like may be used, but it is more preferable to use a spin coating method. When rotating at high speed using a spin coater, particles 130 and 270 are evenly distributed over the entire surface of the LED substrate and the three-dimensional structure according to the present invention by strong rotation, and the amount of particles and the particle layer are adjusted. Can be. At this time, the amount of particles is an amount that can sufficiently cover the three-dimensional structure and the substrate. After inserting the particles using the spin coater in the same manner as above, it may include a process of spraying a predetermined amount of DI water (ultra pure water) including particles of different sizes.

Meanwhile, the particles 130 and 270 to be inserted are formed of SiO 2 or SiN x as a material having a refractive index different from that of the three-dimensional structures 120 ′ and 260.

Specifically, the size of the particles (130, 270) has a size of about 50nm to 1㎛, the specific size is to be determined according to the distance between the three-dimensional structure.

In order to further improve the light efficiency, it is more preferable to mix particles having different sizes at the same time than to use particles of a single size. In one embodiment, particles of 100 nm size and particles of 1 μm size may be mixed and used simultaneously.

When the particles are inserted between the three-dimensional structure in the same way as above, the light extraction efficiency is improved. That is, when the light emitted from the active layer is emitted to the outside, the difference between the refractive index of GaN semiconductor layer and the refractive index of air (GaN refractive index: 2.4, air refractive index: 1) decreases the critical angle at which light can be emitted, resulting in total internal reflection. Loss occurs.

In order to compensate for the loss of light, when the Sio2 particle having a refractive index of 1.46 is added, the refractive indexes of the GaN semiconductor layer, the air, and the particles all show different values, thereby changing the light path inside, and the probability of escape of the light. This increases the light extraction efficiency is improved.

Regrowth Stage

As shown in FIGS. 2C and 3C, the sacrificial layer and the metal nano dot mask remaining on the top of the three-dimensional structures 120 ′ and 260 into which the particles 130 and 270 are inserted are removed to remove the GaN-based semiconductor layer 20 on the top of the three-dimensional structure. ') Or the surface of the second semiconductor layer 250 is exposed.

In order to remove the sacrificial layer and the metal nano dot mask, it can be removed using HF, buffer oxide etching. In addition, it may be removed by wet etching, and may be immersed in a dedicated etching solution according to a strong acid or a metal for a predetermined time to remove the metal nanodots.

As a result, the surface of the GaN based semiconductor layer 20 ′ or the second semiconductor layer 150 is exposed only at the upper end of the three-dimensional structure. The exposed surface is used as a seed using organometallic chemical vapor deposition (MOCVD), molecular beam growth (MBE), hydride vapor deposition (HVPE), epitaxy lateral overgrowth (ELOG), and a first semiconductor layer ( 140) or the second semiconductor layer 250 can be regrown in the range of 1㎛ ~ 5㎛.

The regrown first semiconductor layer 140 may be an n-GaN, p-GaN, or u-GaN-based semiconductor layer, preferably an n-GaN semiconductor layer. After the first semiconductor 140 is regrown, the active layer 150 and the second semiconductor layer 160 may be further formed.

In addition, the second semiconductor layer 250 regrown in FIG. 3D is preferably a p-GaN semiconductor layer.

In the regrowth step, regrowth is suppressed in the region where the particles are formed, and lateral epitaxial growth (ELOG) grows from the top of the 3D structure. Therefore, the amount of dislocation of the regrown first semiconductor layer 140 and the second semiconductor layer 250 can be greatly reduced. In addition, since the growth rate is uniform, there is an advantage that the occurrence of pin holes or cracks is suppressed.

In addition, the potential is not found in the region where the particles are present has the advantage that the efficiency is improved.

On the other hand, the present invention has a feature that can separate the substrate and the three-dimensional structure, it will be described.

4 and 5 is a process of separating the substrate and the three-dimensional structure according to the present invention, which is an optional step. In fact, forming particles between the three-dimensional structures can be seen more improved light extraction effect than forming an air gap between the three-dimensional structure. However, the present invention has a technical feature that it is possible to recycle the substrate and the substrate and the three-dimensional structure by separating the substrate and the three-dimensional structure, it will be described a method for this.

In order to easily separate the substrate and the three-dimensional structure, the present invention uses the principle that only a high concentration of n-GaN semiconductor layer is etched.

4 and 5 will be described in more detail the components constituting the GaN-based semiconductor layer, and the process of removing the substrate.

GaN  line Semiconductor layer  Forming step

First, referring to FIG. 4A, a buffer layer (not shown) is formed on a substrate 310, and a GaN-based semiconductor layer 320 (u-GaN layer 321, a high concentration n-GaN layer 322, and a u-GaN layer) is formed. 323) can be grown sequentially so that the high concentration n-GaN layer is located in the middle of the three-dimensional structure.

Alternatively, in the GaN-based semiconductor layer 320, the u-GaN layer 321 and the high concentration n-GaN layer 322 may be formed so that the high concentration n-GaN layer is positioned on the top of the three-dimensional structure. That is, the location of the high concentration n-GaN layer is located inside the three-dimensional structure, so that it can be formed in various locations (top, middle, bottom). This is to remove the high concentration of n-GaN in an etching process later, so that the substrate and the three-dimensional structure can be utilized usefully.

For example, when the height of the u-GaN layer is grown high on the substrate and a high concentration n-GaN layer is formed thereon, the high concentration n-GaN layer is positioned on the top of the three-dimensional structure to etch the high concentration n-GaN layer. After this, there is an advantage that the substrate and the three-dimensional structure (u-GaN layer) can be used as it is.

In another example, when the high concentration n-GaN layer is formed in the middle of the three-dimensional structure, after the high concentration n-GaN layer is etched, the u-GaN layer on the substrate may be polished and removed, and the substrate may be reused. have.

FIG. 5A illustrates a buffer layer (not shown) on the substrate 410, and sequentially grows a GaN-based semiconductor layer 420 (u-GaN layer 421, high concentration n-GaN layer 422). The first semiconductor layer 430 and the active layer 440 are grown thereon and the second semiconductor layer 450 is grown.

In this case, the first semiconductor layer 430 should be formed of a low concentration n-GaN layer, the total thickness of the GaN-based semiconductor layer 420 stacked on the substrate may be 500nm ~ 2㎛.

In detail, the doping concentration of the high concentration n-GaN layers 322 and 422 may be 1 × 10 ¹⁸ cm 3 to 1 × 10 ²⁰ cm 3. In addition, the doping concentration of the first semiconductor layer 340 to be regrown and the first semiconductor layer 440 formed on the GaN-based semiconductor is characterized in that less than 1 × 10 ¹⁸ cm 3.

Meanwhile, a capping layer (not shown) may be grown on the active layer 440. The capping layer is formed to protect the active layer and may be formed using the MOCVD method.

Next, a three-dimensional structure is formed, a particle is formed, and a step of regrowth is performed. (Because the process is the same, a brief description will be omitted here).

As shown in FIG. 4B, the GaN-based semiconductor layer 320 is stacked on the substrate 310, and then vertically etched to form a three-dimensional structure 320, particles 340 are formed between the three-dimensional structures, and the first semiconductor. The layer is regrown 330. Thereafter, as shown in FIG. 4C, the active layer 340 and the second semiconductor layer 350 may be included on the first semiconductor layer 330.

particle  Removal steps

The particle removal step and the three-dimensional structure removal step are performed selectively. Indeed, the formation of particles between three-dimensional structures can see an improved light extraction effect than the formation of air gaps between three-dimensional structures.

However, the present invention has a technical feature that can separate the substrate and the three-dimensional structure, it will be described a method for this.

Wet etching is used to remove particles between the substrate and the three-dimensional structure. When all particles are removed using BOE (Buffered Oxide Etchant), the three-dimensional structures are present in an air gap state, and the three-dimensional structures are not affected at all.

Steps to Remove 3D Structure

After removing particles in the above manner, the n-GaN region of the three-dimensional structure having a size of several hundred nanometers is easily etched and lifted off by penetrating an etching solution into the air gap formed between the three-dimensional structures. Can be.

4D and 5C, when the GaN-based semiconductor layer is formed, a high concentration n-GaN layer is included in the middle portion of the 3c-dimensional structure. This is to ensure that only high concentrations of n-GaN 322,422 are etched later upon selective separation of the substrate and the three-dimensional structure. Due to the difference in concentration, the low concentration n-GaN layer is not etched, and only the high concentration n-GaN layers 322 and 422 formed in the middle of the three-dimensional structure are etched, so that the substrate and the three-dimensional structure can be easily removed.

As the high concentration n-GaN layers 322 and 422 are removed by the selective etching of the electrochemical etching described below, the substrates 310 and 410 and the three-dimensional structure may be separated. Alternatively, dry dtching may be used.

A feature of the present invention is that the high concentration n-GaN layer can be formed at various positions (top, middle, etc.) inside the three-dimensional structure, and thus can be polished to reuse the substrate or formed on the substrate and the substrate. The advantage is that some of the dimensional structures can be used.

In an embodiment related to a method of separating a substrate, the first semiconductor layer 330 and the n-GaN-based three-dimensional structure 320 are connected to each other using an anode and a platinum electrode as a cathode, and then oxalic acid and diluted A chemical cell can be constructed in potassium hydroxide, and a predetermined voltage can be applied to induce etching. At this time, the voltage is 1 ~ 80V, the concentration of the etching solution is maintained at 0.01 ~ 3M, the time is 1 ~ 30 minutes (not necessarily limited to this) The step is to adjust the doping concentration and voltage of the n-GaN-based three-dimensional structure Etch rate can be controlled. For example, the higher the doping concentration, the faster the etching rate. Even in the case of voltage, the voltage increase in a predetermined range may increase the etching rate, but at higher voltages, the etching rate may decrease.

Hereinafter, preferred examples are provided to aid in understanding the present invention, but the following examples are provided only for easier understanding of the present invention, and the present invention is not limited thereto.

6 and 7 are SEM photographs of metal nano dot masks formed on GaN-based semiconductor layers, and FIGS. 8 and 9 are SEM photographs of three-dimensional structures.

FIG. 6 is a 10 nm nano dot mask photograph generated by heat treatment at 850 ° C. for 1 minute under a nitrogen atmosphere, and FIG. 7 is a 20 nm nano dot mask photograph produced by heat treatment at 850 ° C. for 1 minute under a nitrogen atmosphere. .

8 is a photograph of a three-dimensional structure formed by etching a 10 nm dot mask, Figure 9 is a photograph of a three-dimensional structure formed by etching a 20 nm dot mask. 8 and 9, it can be seen that a plurality of three-dimensional structures are formed on the substrate at nano-sized intervals, and the spacing and height between the three-dimensional structures are not constant. This causes light loss due to total internal reflection.

Accordingly, the present invention is characterized in that it is possible to improve the light efficiency by inserting the particles between the three-dimensional structure (the refractive index of the three-dimensional structure, air, particles are all different)

FIG. 10 shows SEM images of particles inserted between three-dimensional structures. It can be seen that particles are densely inserted between three-dimensional structures.

FIG. 11 shows an SEM image of particles inserted only between three-dimensional structures after particle insertion, and no aggregation of particles on top of the three-dimensional structure, thereby forming a considerably smooth surface.

It is intended that the invention not be limited by the foregoing embodiments and the accompanying drawings, but rather by the claims appended hereto. Accordingly, various forms of substitution, modification, and alteration may be made by those skilled in the art without departing from the technical spirit of the present invention described in the claims, which also belong to the scope of the present invention. will be.

110, 210,
120,220,321,421: u-GaN semiconductor layer
120 ', 260,320,460: 3D structure
130,270,340,470: active layer

Claims (13)

Forming a GaN based semiconductor layer on the substrate;
Forming a plurality of metal nano dot masks on the GaN-based semiconductor layer and then selectively etching to form a plurality of GaN-based three-dimensional structures;
Forming SiO 2 or SiN x particles having a diameter of 50 nm to 1 μm between the plurality of GaN based three-dimensional structures;
Removing the metal nano dot mask to expose a GaN surface on top of the GaN-based three-dimensional structure;
And re-growing the first semiconductor layer using the exposed GaN surface as a seed. delete The method of claim 1,
The GaN-based semiconductor layer is a manufacturing method of a high-efficiency light emitting diode, characterized in that u-GaN or n-GaN. The method of claim 1,
The GaN-based three-dimensional structure is a manufacturing method of a high-efficiency light emitting diode, characterized in that the rod or pillar of a micro or nano size. The method of claim 1,
The GaN-based three-dimensional structure has a height of 100nm to 3㎛, the diameter of the manufacturing method of high efficiency light emitting diode, characterized in that 50nm to 1000nm. The method of claim 1,
The GaN-based three-dimensional structure of the spacing method of the high efficiency light emitting diode, characterized in that the range of 100nm to 2㎛. delete The method of claim 1,
Regrowing the first semiconductor layer formed on the top of the three-dimensional structure is a method of manufacturing a high efficiency light emitting diode, characterized in that using the epitaxy side growth (ELOG) growth method. The method of claim 1,
And after the regrowth of the first semiconductor layer, further forming an active layer and a second semiconductor layer. The method of claim 1,
Forming a GaN-based semiconductor layer on the substrate,
forming a u-GaN layer, and growing a high concentration n-GaN layer having a doping concentration of 1 × 10 ¹⁸ cm 3 to 1 × 10 ²⁰ cm 3, followed by successively forming a u-GaN layer. Method of manufacturing a high efficiency light emitting diode. The method of claim 10,
The method includes forming an active layer and a second semiconductor layer after regrowth of the first semiconductor layer;
Removing particles between the three-dimensional structures; And
Removing the substrate by removing only the high concentration n-GaN-based three-dimensional structure having a doping concentration of 1 × 10 ¹⁸ cm 3 to 1 × 10 ²⁰ cm 3 by electrochemical etching or dry etching. Method of manufacturing a light emitting diode. delete delete

Images