KR20080099411A - Test pad, method of manufacturing the same, liquid crystal display device having the test pad and method of manufacturing the same - Google Patents

Abstract

A test pad, and an LCD device having the same are provided to prevent ESD from generated, and simplify a test process by electrically connect array element of the LCD panel with the test pad. A test pad comprises a first interconnection(163), a bottom pad, an insulating layer, an upper pad, a second wiring(161), and a test pad(160). The bottom pad is connected to the first interconnection. The insulating layer is formed on the bottom pad. The upper pad formed on the insulating layer and is overlapped with the bottom pad at least. The second wiring is connected to the upper pad. The test pad is connected to the second wiring.

Description

Test pad, method for manufacturing same, liquid crystal display device having same and method for manufacturing same {test pad, method of manufacturing the same, liquid crystal display device having the test pad and method of manufacturing the same}

1 is a plan view showing a part of a liquid crystal panel according to an embodiment of the present invention.

FIG. 2 is an enlarged plan view of a test pad unit “A” of the liquid crystal panel of FIG. 1 according to one embodiment of the present invention; FIG.

3A and 3B are cross-sectional views taken along the line II ′ of FIG. 2.

4 is a cross-sectional view showing a part of a display area and a test pad part of a liquid crystal panel of the present invention in one view.

5 is a flowchart of an inspection process as an example of using a test pad portion of a liquid crystal display device according to the present invention;

<Description of Signs of Major Parts of Drawings>

100 liquid crystal panel 110 first substrate

120: second substrate 121: data wiring

123: data link line 131: gate wiring

133 gate electrode 135 gate insulating film

137: active layer 139: ohmic contact layer

141: source electrode 143: drain electrode

145: protective film 147: first contact hole

149: second contact hole 151: third contact hole

153: pixel electrode 155: link electrode

160: test pad 161: second test wiring

161a: upper pad 163a: lower pad

163: first inspection wiring 180: liquid crystal layer

181: light blocking pattern 183: color filter pattern

185: common electrode 190: sealing member

The present invention relates to a test pad, a method of manufacturing the same, a liquid crystal display having the same, and a method of manufacturing the same.

Conventional liquid crystal display devices display an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display includes a liquid crystal panel and a driving circuit for driving the liquid crystal panel.

The liquid crystal panel is formed of a liquid crystal layer formed between the first substrate on which the thin film transistor array is formed and the second substrate on which the color filter array is formed, and are bonded to each other at regular intervals.

Data lines arranged in parallel in one direction and gate lines arranged in parallel in a direction intersecting the data lines are formed on the first substrate, and a pixel is disposed in an area where the data lines and the gate lines cross. ) Is defined.

In addition, the pixel includes a switching element electrically connected to the gate lines and the data lines.

Referring to a driving principle of the switching element, when a scan signal supplied from the gate driver circuit unit through the gate lines is applied to each gate line, the switching element corresponding to the gate line is applied. In a turn-on state, a data signal supplied from the data driver circuit through the data lines is applied to the pixel.

The gate driving circuit unit and the data driving circuit unit receive a signal from a printed circuit board (PCB).

The gate driver circuit part and the data driver circuit part are formed of a plurality of integrated circuits (ICs).

The printed circuit board receives an external signal, converts the signal into a signal suitable for the operation of the liquid crystal panel, and supplies it to the gate driving circuit unit and the data driving circuit unit.

In order to enable such a series of processes, the printed circuit board, the gate driving circuit unit, the data driving circuit, and the liquid crystal panel should be electrically connected to each other. This connection method is a chip-on-glass method (COG).

The COG method is a technology in which a gate driver circuit unit and a data driver circuit unit are directly mounted on a substrate of a liquid crystal panel.

The COG type liquid crystal panel needs a test pad to inspect the data driver circuit.

However, there is a problem in that static electricity flows into the liquid crystal panel through the test pads, causing defects in the liquid crystal display.

The present invention can easily detect the presence or absence of defects in the driving circuit and signal wiring, and by providing a test pad electrically connected to the driving circuit and the signal wiring only when necessary, it is possible to prevent damage to the liquid crystal panel by static electricity. An object of the present invention is to provide a test pad, a method of manufacturing the same, a liquid crystal display having the same, and a method of manufacturing the same.

Test pad according to the present invention to achieve the above object,

A first wiring, a lower pad connected to the first wiring, an insulating film formed on the lower pad, an upper pad formed on the insulating film and overlapping at least the lower pad, a second wiring connected to the upper pad, and the second It characterized in that it comprises a test pad connected to the wiring.

Method of manufacturing a test pad according to the present invention in order to achieve the above object,

Forming a first wiring and a lower pad connected to the first wiring on a substrate, forming an insulating film on the substrate including the first wiring and the lower pad, at least the lower pad on the insulating film; And forming an overlapping upper pad, a second wiring connected to the upper pad, and a test pad connected to the second wiring.

In order to achieve the above object, the liquid crystal display device according to the present invention,

A first substrate having a display area and a non-display area around the display area, a second substrate facing the first substrate, a liquid crystal layer interposed between the first substrate and the second substrate, the first substrate and the An encapsulation member formed around the display region between the second substrate, a display element formed in the display region on the first substrate, at least one driving chip mounted in the non-display region on the first substrate, the driving chip and the A link line connecting the display element, a first test line connected to the link line, a lower pad formed at one end of the first test line, an upper pad overlapping the lower pad and the insulating layer therebetween, and a second connected to the upper pad. And a test pad connected to the test wiring and the second test wiring.

In order to achieve the above object, the manufacturing method of the liquid crystal display device according to the present invention,

Forming a gate wiring, a data link line, a first test wiring branched from the data link line, and a lower pad connected to the first test wiring on a first substrate, on the first substrate including the gate wiring; Forming an insulating film, forming a thin film transistor connected to the gate wiring on the insulating film, forming a data wiring connected to the thin film transistor and crossing the gate wiring, and a pixel electrode connected to the thin film transistor; Forming a link electrode connecting a data line and the data link line, an upper pad overlapping the lower pad, a second test wire connected to the upper pad, and a test pad connected to the second test wire. It is done.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view showing a part of a liquid crystal panel according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the liquid crystal panel 100 includes a first substrate 110 and a second substrate 120 that are bonded to each other.

The liquid crystal panel 100 includes a display area DA in which an image is embodied, and a non-display area NA in which a data driver circuit part for supplying a signal to the display area DA is disposed. Is done.

The data driver circuit part includes a plurality of data driver ICs 150, and the data driver IC 150 is connected to each data line 121 to supply a signal, and has a predetermined interval in the non-display area NA. It is arranged.

In the display area DA, data lines 121 arranged in parallel in one direction on the first substrate 110 and gate lines 131 arranged in a direction crossing the data lines 121. ) Are arranged. A pixel P is defined by the intersection of the gate line 131 and the data line 121. A thin film transistor (TFT) connected to the gate line 131 and the data line 121 is formed at an intersection point between the gate lines 131 and the data line 121. The thin film transistor is connected to the pixel electrode 153 formed in the pixel P. On the second substrate 120 facing the first substrate 110, a black matrix formed corresponding to the boundary of the pixels P and the thin film transistor, a color filter pattern formed corresponding to the pixel P, and The common electrode constituting the electric field with the pixel electrode 153 is included. The liquid crystal layer is formed between the first substrate 110 and the second substrate 120.

In the non-display area NA, data link lines 123 connected to the data lines 121 and data drives connected to the data link lines 123 are formed on the first substrate 110. ICs 150 are formed. The data driver IC 150 is connected to a plurality of data link lines 123, and a test pad unit A is disposed near the outermost data link line 123 connected to the data driver IC 150. .

The test pad unit A has a first test wiring 163 branched from the data link line 123, a lower pad formed at one end of the first test wiring 163, and the lower pad and the insulating layer therebetween. An overlapping upper pad, a second test wiring 161 connected to the upper pad, and a test pad 160 connected to the second test wiring 161 are included.

The overlapping lower pad and the upper pad form a seam region (T).

The lower pad and the upper pad are insulated from each other by the insulating layer, but may be electrically connected to each other through a joint technique, for example, laser welding.

When a failure occurs in the liquid crystal display, the lower pad and the upper pad are electrically connected to each other in the joint area T of the test pad part A, and then the driver driving IC 150 is connected to the test pad. And a failure of the data line 121 can be detected.

That is, when a failure does not occur in the liquid crystal display, the test pad and the data link line 123 are not electrically connected to each other in the test pad unit A. Static electricity may be prevented from flowing into the liquid crystal panel 100.

When the thin film transistor array is formed on the first substrate 110 of the liquid crystal display, the test pad unit A is also formed.

Thereafter, the first substrate 110 and the second substrate 120 are bonded to each other, and a liquid crystal layer is formed between the first substrate 110 and the second substrate 120 to form a liquid crystal panel 100. The data driver ICs 150 are mounted on the first substrate 110.

In the case of using the test pad unit A, for example, a test for the presence or absence of a failure of the liquid crystal panel 100 or a failure occurs while the liquid crystal display device is used as a finished product.

That is, since the test pad unit A is used only to detect an inspection or a defect in the liquid crystal display device, when the liquid crystal display device is normally used, static electricity is introduced through the test pad unit so that a defect does not occur. The test pad and the thin film transistor array device are insulated from each other.

FIG. 2 is a plan view showing an enlarged test pad unit "A" of the liquid crystal panel of FIG. 1 according to one embodiment of the present invention, and FIGS. 3A and 3B are cut along the line II ′ of FIG. 2. It is a cross section.

In the test pad part A illustrated in FIG. 3A, the lower pad 163a and the upper pad 161a are insulated from the joint area T so that the test pad part A is electrically connected to the data line 121. It is not shown.

The test pad part A shown in FIG. 3B electrically connects the lower pad 163a and the upper pad 161a by using a welding technique, for example, laser welding the joint area T. FIG. (See the "W" point). The test pad part A illustrated in FIG. 3B is applied when a defect occurs in the liquid crystal display or a defect in the driving circuit unit and the array element of the liquid crystal display.

As shown in FIG. 2, the test pad unit A has a joint area T between the test pad 160 and the data link line 123, and the test pad 160 is located in the joint area T. As shown in FIG. And the data link line 123 are not electrically connected.

An upper pad 161a formed at one end of the second test wire 161 connected to the test pad 160 and a lower pad 163a formed at one end of the first test wire 163 connected to the data link line 123. The gate insulating layer 135 and the passivation layer 145 are formed therebetween, and the upper pad 161a and the lower pad 163a overlap each other.

The width d of the joint region T formed by overlapping the lower pad 163a and the upper pad 161a only secures a space that can be electrically connected to each other by a joint welding technique, for example, laser welding. Just do it.

As shown in FIG. 3A, a first test line connected to the data link line 123 and the data link line 123 on the first substrate 110 of the non-display area NA of the liquid crystal panel 100. The lower pad 163a formed at one end of the 163 and the first inspection wiring 163 is formed.

A gate insulating layer 135 and a protective layer 145 are formed on the first substrate 110 on which the data link line 123, the first test wiring 163, and the lower pad 163a are formed.

The upper pad 161a overlapping the lower pad 163a with a predetermined width d on the passivation layer 145, the second test wiring 161 connected to the upper pad 161a, and the second test. The test pad 160 connected to the wiring 161 is formed.

The upper pad 161a, the second test wiring 161, and the test pad 160 are made of a transparent conductive electrode material.

The transparent conductive electrode material includes at least one selected from the group consisting of indium tin oxide and indium zinc oxide.

The data link line 123, the first test wiring 163, and the lower pad 163a may include aluminum (Al), chromium (Cr), molybdenum (Mo), copper (Cu), and an aluminum alloy. And at least one selected from the group consisting of tungsten (W).

The gate insulating layer 135 may be formed of an inorganic insulating layer or an organic insulating layer, for example, a nitride layer or an oxide layer.

The passivation layer 145 may be formed of an inorganic insulating layer or an organic insulating layer. For example, a nitride layer, a photo acryl layer, or the like may be used.

The data link line 123 is connected to the data driver IC 150.

4 is a cross-sectional view showing a part of the display area of the liquid crystal panel 100 and the test pad unit "A" of the present invention in one drawing.

Referring to FIG. 4, a gate line 131 and a gate electrode 133 connected to the gate line 131 are formed in the display area DA on the first substrate 110.

At the same time, the first test line 163 connected to the data link line 123 and the data link line 123 using a material forming the gate line 131 in the non-display area NA on the first substrate 110. The lower pad 163a connected to the first test wire 163 is formed.

Thereafter, a gate insulating layer 135 is formed on the first substrate 110 on which the gate line 131 and the data link line 123 are formed.

Semiconductor patterns 137 and 139 are formed on the gate insulating layer 135 at the gate electrode 133.

The semiconductor patterns 137 and 139 are disposed on both sides of the active layer 137 made of pure amorphous silicon to which no impurities are added and the active layer 137, and an ohmic contact layer made of amorphous silicon into which impurities are injected. (139).

Alternatively, the semiconductor pattern may be made of a polycrystalline silicon layer made of amorphous crystallized silicon.

One side of the semiconductor pattern 137 and 139 from the data line 121 and the data line 121 crossing the gate line 131 on the gate insulating layer 135 on which the semiconductor patterns 137 and 139 are formed. The source electrode 141 extending to the second electrode 141 is spaced apart from the source electrode 141 to form a drain electrode 143 formed on the other side of the semiconductor patterns 137 and 139.

The data line 121 is connected to the vicinity of the data link line 123.

The passivation layer 145 is formed on the first substrate 110 on which the source and drain electrodes 141 and 143 are formed.

The passivation layer 145 may include a first contact hole 147 exposing a portion of the drain electrode 143 and a second contact hole exposing a portion of the data line 121 near the data link line 123. 149 and a third contact hole 151 exposing a part of the data link line 123 near the data line 121.

Thereafter, the pixel electrode 153, the second and third contact holes 149, which are electrically connected to the drain electrode 143 through the first contact hole 147 on the first substrate 110. A link electrode 155 electrically connecting the data line 121 and the data link line 123 through the 151 and the lower pad 163a of the test pad part A to overlap the joint region T. FIG. ) Is formed an upper pad 161a, a second test wiring 161 connected to the upper pad 161a, and a test pad 160 connected to the second test wiring 161.

At least one of the pixel electrode 153, the link electrode 155, the upper pad 161a, the second test wiring 161, and the test pad 160 is made of the same material.

The light blocking pattern 181, the color filter pattern 183 corresponding to the pixel P, and the pixel electrode 153 may be formed on the second substrate 120 facing the first substrate 110. The common electrode 185 is formed.

The first substrate 110 and the second substrate 120 are bonded by the encapsulation member 190 formed around the display area DA.

The liquid crystal layer 180 is formed between the first substrate 110 and the second substrate 120.

As well as the liquid crystal display device having the above structure, as long as it is a display device to which the test pad unit A according to the present invention can be applied, it can be considered to belong to the scope of the present invention.

For example, an In-Plane-Switching type liquid crystal display device, a twisted nematic liquid crystal display device, a vertical alignment method liquid crystal display device, and an organic electroluminescence display device. The present invention can also be applied to display devices such as display devices.

5 is a flowchart illustrating an inspection process as an example of using a test pad unit of a liquid crystal display according to the present invention.

When using the said test pad part, there exists a process of inspecting the presence or absence of the defect of the said liquid crystal panel, for example in a manufacturing process. In addition, while the liquid crystal display is used as a finished product, a defect occurs and there is an inspection process for analyzing the cause of the defect.

First, a liquid crystal display having the test pad unit A mentioned above is completed (S100).

Upon completion of the liquid crystal display, it is checked whether the liquid crystal display displays an image normally (S110).

It is determined whether the liquid crystal panel is defective through the inspection (S120).

As a result of the inspection, if the liquid crystal display normally displays an image, the liquid crystal display is distributed and provided to the consumer (S120).

As a result of the inspection, when the liquid crystal display does not normally display an image and a screen defect occurs, an inspection process for analyzing a cause of the defect of the liquid crystal display is performed (S160).

The inspection process for analyzing the cause of the failure of the liquid crystal display device is as follows.

The upper pad 161a and the lower pad 163a are electrically connected to each other in the joint area T of the test pad part A of the liquid crystal display using a joint welding method, for example, a laser welding method.

The laser welding method is a method of melting and bonding the upper pad 161a and the lower pad 163a by irradiating a laser having a predetermined pulse to the joint region T.

The signal of the driver driver IC 160 and the data line 121 is detected through the test pad 160 of the test pad unit A, and the detected signal is analyzed.

By detecting a signal from the plurality of test pad units A disposed in the liquid crystal display, the location of the defect and the cause of the defect may be analyzed.

The liquid crystal display device having the inspection process as described above may be discarded (S170).

Meanwhile, the liquid crystal display device provided to the consumer is used by the consumer as a finished product (S140).

Although the liquid crystal display has the test pad unit, since the test pad unit is substantially insulated from the thin film transistor array inside the liquid crystal panel, static electricity may be introduced from the test pad unit to prevent defects from occurring.

When the consumer uses the liquid crystal display when a defect occurs, for example, a bright spot on the screen, a dark spot on the screen, or a screen shake occurs (S150), the consumer returns or repairs the liquid crystal display product.

The returned liquid crystal display is subjected to a test process to analyze the cause of the failure (S160).

The inspection process for analyzing the cause of the failure of the liquid crystal display is as follows.

The upper pad 161a and the lower pad 163a are electrically connected to each other in the joint area T of the test pad part A of the liquid crystal display using a joint welding method, for example, a laser welding method.

The laser welding method is a method of melting and bonding the upper pad 161a and the lower pad 163a by irradiating a laser having a predetermined pulse to the joint region T.

The signal of the driver driver IC 150 and the data line 121 is detected through the test pad 160 of the test pad unit A, and the detected signal is analyzed.

By detecting a signal from the plurality of test pad units A disposed in the liquid crystal display, the location of the defect and the cause of the defect may be analyzed.

The liquid crystal display device having the inspection process as described above may be discarded (S170).

On the other hand, the test pad unit having the structure described above may also be connected to the gate driving circuit unit, and detects a signal of the gate driving circuit unit and the gate wiring to check whether there is a defect.

As described above, the test pad according to the present invention, a method of manufacturing the same, and a liquid crystal display and the method of manufacturing the same according to the present invention are not limited thereto, and those skilled in the art within the technical idea of the present invention. It is clear that the deformation and improvement are possible by this.

According to the present invention, the liquid crystal display having the test pad can not only prevent static electricity from flowing through the test pad during the manufacturing process or use, but also when the liquid crystal display is inspected, There is an effect that can be electrically connected to the array element to facilitate the inspection process.

Claims (16)

First wiring; A lower pad connected to the first wiring; An insulating film formed on the lower pad; An upper pad formed on the insulating layer and overlapping at least the lower pad; A second wiring connected to the upper pad; And And a test pad connected to the second wiring. The method of claim 1, And the upper pad, the second wiring, and the test pad are integrally formed. Forming a first wiring and a lower pad connected to the first wiring on a substrate; Forming an insulating film on the substrate including the first wiring and the lower pad; Forming an upper pad overlapping the lower pad, a second wiring connected to the upper pad, and a test pad connected to the second wiring on the insulating layer. The method of claim 3, wherein And electrically connecting the upper pad and the lower pad to each other. The method of claim 4, wherein Electrically connecting the upper pad and the lower pad to each other; Method for producing a test pad, characterized in that carried out using a laser welding method. A first substrate having a display area and a non-display area around the display area; A second substrate facing the first substrate; A liquid crystal layer interposed between the first substrate and the second substrate; An encapsulation member formed around the display area between the first substrate and the second substrate; A display element formed in the display area on the first substrate; At least one driving chip mounted in the non-display area on the first substrate; A link line connecting the driving chip to the display element; A first test wire connected to the link line; A lower pad formed at one end of the first inspection line; An upper pad overlapping the lower pad and the insulating layer therebetween; A second test wire connected to the upper pad; And And a test pad connected to the second test wire. The method of claim 6, The display element, A gate wiring formed on the first substrate and a gate electrode connected to the gate wiring; The insulating film covering the gate electrode; A semiconductor pattern formed on the insulating film at the gate electrode position; A data line formed in the display area on the first substrate and intersecting the gate line, a source electrode formed on one side of the semiconductor pattern from the data line, and a drain electrode spaced apart from the source electrode on the other side of the semiconductor pattern ; And And a pixel electrode connected to the drain electrode. The method of claim 7, wherein And the upper pad, the second test wiring, and the test pad are integrally formed on the same layer as the pixel electrode. The method of claim 7, wherein And the link line is a data link line connecting the data line and the driving chip. The method of claim 7, wherein And the data link line is formed on the same layer as the gate line. The method of claim 7, wherein And a link electrode connected to the data link line and the data line. The method of claim 7, wherein The pixel electrode, the upper pad, the second test wiring, and the test pad include at least one selected from the group consisting of indium tin oxide and indium zinc oxide. Device. Forming a gate wiring, a data link line, a first test wiring branched from the data link line, and a lower pad connected to the first test wiring on a first substrate; Forming an insulating film on the first substrate including the gate wiring; Forming a thin film transistor connected to the gate line on the insulating layer; Forming a data line connected to the thin film transistor and crossing the gate line; and A pixel electrode connected to the thin film transistor, a link electrode connecting the data line and the data link line, an upper pad overlapping the lower pad, a second test wire connected to the upper pad, and a test pad connected to the second test wire Method of manufacturing a liquid crystal display device comprising the step of forming a. The method of claim 13, Bonding the first substrate and the second substrate to each other; And And mounting a data driving chip connected to the data link line on the first substrate. The method of claim 13, The pixel electrode, the upper pad, the second test wiring, and the test pad include at least one selected from the group consisting of indium tin oxide and indium zinc oxide. Method of manufacturing the device. The method of claim 13, Irradiating a laser onto the upper pad to electrically connect the upper pad and the lower pad; And And detecting a signal through the test pad.

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