KR20080085504A - Liquid crystal display panel and method for manufacturing the same - Google Patents

Abstract

An LCD(Liquid Crystal Display) panel and a method for manufacturing the same are provided to prevent the tilting distortion of liquid crystals due to storage of DC voltage, thereby suppressing display unevenness by forming a connection electrode. A TFT(Thin Film Transistor) substrate(300) is divided into a display area and a non-display area. A plurality of data lines and gate lines are formed in the display area. TFTs are formed at crossing points of the gate lines and the data lines. A plurality of pixel electrodes are electrically connected to the TFTs. Storage capacitors are electrically connected to the pixel electrodes. A storage voltage supply electrode(62) and a common voltage supply electrode are formed in the non-display area. The common voltage supply electrode is formed above a lower substrate(1) to supply a common voltage to a common electrode formed on an upper substrate(52). The storage voltage supply electrode is formed in the same layer and of the same material as a gate electrode, thereby supplying a storage voltage to a storage line. A connecting electrode(68) shields the storage voltage supplied to the storage voltage supply electrode in order to prevent a potential difference from being generated between the storage voltage supply electrode and the common electrode.

Description

Liquid crystal display panel and its manufacturing method {LIQUID CRYSTAL DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME}

1 is a view showing a liquid crystal display panel according to the present invention.

2 is a cross-sectional view illustrating a first embodiment of the present invention taken along line AA ′ of FIG. 1.

3 is a cross-sectional view of a conventional liquid crystal display panel.

4 is a cross-sectional view illustrating a second embodiment of the present invention taken along line AA ′ of FIG. 1.

5A through 5F illustrate a method of manufacturing the liquid crystal display panel illustrated in FIG. 2.

6A to 6E illustrate a method of manufacturing the liquid crystal display panel illustrated in FIG. 4.

<Explanation of Signs of Major Parts of Drawings>

1: lower substrate 4: gate electrode

6: source electrode 8: drain contact hole

10: drain electrode 12: active layer

14: ohmic contact layer 18: gate insulating film

20: protective film 22: pixel electrode

30: storage line 52: upper substrate

54: black matrix 56: color filter

58: overcoat layer 60: upper substrate

62: storage supply electrode 64: common voltage supply electrode

70: common contact hole

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel and a method for manufacturing the same, and more particularly, to a liquid crystal display panel and a method for manufacturing the same, which can reduce bright spot defects and prevent DC voltage accumulation.

Ultra-thin flat panel display, especially liquid crystal display, has low operating voltage and low power consumption, so it can be used as a portable device.It can be applied to TV, notebook computer, monitor, spacecraft, aircraft, etc. Wide and diverse

Generally, a liquid crystal display device includes a liquid crystal display panel and a driving circuit for driving the liquid crystal display panel. The liquid crystal display panel includes a color filter substrate and a TFT substrate bonded together with a predetermined space, and a liquid crystal layer injected between the two substrates. Here, the TFT substrate includes a plurality of gate lines, a plurality of data lines crossing each gate line, a plurality of pixel electrodes formed in a matrix form in each pixel region defined by each gate line and data line, and a gate. And a plurality of thin film transistors that are switched by signals of lines to transfer signals of data lines to each pixel electrode.

The color filter substrate includes a black matrix for blocking light in portions other than the pixel region, R, G, and B color filter layers for expressing color colors, and a common electrode forming an electric field with the pixel electrode.

When the conventional liquid crystal display device is driven in a normally white mode (NW mode), when a potential difference between the pixel electrode and the common electrode occurs, the liquid crystal moves, and the darkened pixel (black) becomes dark. Is displayed. If a potential difference does not occur between the pixel electrode and the common electrode, the liquid crystal does not move, and the pixel is displayed with a bright point indicating a bright state.

However, when a defect occurs in a pixel driven in a normally white mode, a dot defect may be displayed in which a pixel to be displayed as a dark point is represented by a bright point, or a dot defect in which a pixel to be represented by a bright point is represented by a dark point is poor. .

On the other hand, bright spots are better recognized by users than dark spots. Therefore, in recent years, there has been a demand for a liquid crystal display device capable of reducing bright spot defects.

Accordingly, an object of the present invention is to provide a liquid crystal display panel and a method for manufacturing the same, which can reduce a bright point defect and prevent DC voltage accumulation.

According to an aspect of the present invention, there is provided an LCD panel including: an upper substrate and a lower substrate facing each other with a liquid crystal interposed therebetween; A thin film transistor connected to the gate line and the data line which intersect the gate insulating layer on the lower substrate; A pixel electrode connected to the thin film transistor; A storage line overlapping the pixel electrode with at least one insulating layer therebetween to form a storage capacitor; A storage supply electrode formed on the non-display area of the lower substrate to supply a storage voltage to the storage line; A common electrode formed on the upper substrate to form an electric field with the pixel electrode; A common supply electrode formed on the non-display area of the lower substrate to supply a common voltage to the common electrode; And a connection electrode connected to the common supply electrode to shield the storage voltage supplied to the storage common electrode and formed on the non-display area of the lower substrate.

Method of manufacturing a liquid crystal display device according to the present invention for achieving the above object comprises the steps of preparing a color filter substrate comprising a common electrode formed on the upper substrate; A thin film transistor formed on an opposing lower substrate with the upper substrate and the liquid crystal interposed therebetween, a pixel electrode connected to the thin film transistor, and overlapping with the pixel electrode and at least one insulating layer interposed therebetween to form a storage capacitor. A storage line, a storage supply electrode formed on a non-display area to supply a storage voltage to the storage line, a common supply electrode formed on a non-display area to supply a common voltage to the common electrode, and a connection to the common supply electrode. Preparing a thin film transistor substrate to shield the storage voltage supplied to the storage common electrode and to include a connection electrode formed on the non-display area; And bonding the color filter substrate and the thin film transistor substrate to each other.

Hereinafter, a liquid crystal display of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view showing the structure of a liquid crystal display panel according to the present invention, Figure 2 is a cross-sectional view showing a first embodiment of the present invention taken along the line AA 'of FIG.

1 and 2, the liquid crystal display panel according to the present invention includes a color filter substrate 400 and a TFT substrate 300 facing each other.

The color filter substrate 400 includes black matrices 54 to block light in portions other than the pixel region, R, G and B color filter layers 56 to express color colors, pixel electrodes 22 and electric fields. It comprises a common electrode 60 forming a.

The black matrix 54 prevents light leakage and absorbs external light to increase contrast. The black matrix 54 is formed to overlap the thin film transistor TFT of the lower substrate 1, the gate lines, and the data lines, and distinguishes a pixel region in which the color filter 56 is to be formed.

The color pulses 56 are formed in pixel areas separated by the black matrix 54. The color filter 56 is formed for each of red (R), green (G), and blue (B) to implement red (R), green (G), and blue (B) colors.

The overcoat layer 58 serves to planarize the upper substrate 52 by applying a transparent resin having insulating properties to the upper substrate 52 on which the color filter 56 is formed.

The common electrode 60 is applied with a common voltage to generate a potential difference with the pixel electrode 22 formed on the lower substrate 1.

The TFT substrate 300 is divided into a display area A / A and a non-display area.

The display area A / A includes a plurality of data lines (not shown) and gate lines (not shown) that cross each other to form a pixel area, and a thin film transistor formed at each point where the plurality of gate lines and data lines cross each other. TFT, a plurality of pixel electrodes 22 connected to the thin film transistor TFT, and a storage capacitor Cst connected to the pixel electrode 22 are formed.

The thin film transistor TFT selectively supplies a data signal on the data line to the pixel electrode 22 in response to the gate signal of the gate line. The thin film transistor TFT includes a gate electrode 4 connected to a gate line, a source electrode 6 connected to a data line, and a drain electrode 10 connected to the pixel electrode 22 through a drain contact hole 8. The semiconductor layer 16 overlaps the gate electrode 4 and the gate insulating layer 18 and forms a channel between the source and drain electrodes 6 and 10. The semiconductor layer 16 is composed of an active layer 12 and an ohmic contact layer 14.

The pixel electrode 22 is formed of a transparent conductive material having a high light transmittance and positioned in a pixel region formed by a data line (not shown) and a gate line (not shown). The pixel electrode 22 is formed on the passivation layer 20 coated on the entire lower substrate 1, and is connected to the drain electrode 10 through the drain contact hole 8 penetrating the passivation layer 20.

The storage capacitor Cst is formed of the pixel electrode 22 and the storage line 30 overlapping each other with the gate insulating layer 18 and the passivation layer 20 interposed therebetween, thereby stably maintaining the voltage charged in the liquid crystal cell Clc. .

The storage supply electrode 62 and the common supply electrode 64 are formed in the non-display area.

The common supply electrode 64 is formed on the lower substrate 1 to supply a common voltage to the common electrode 60 formed on the upper substrate 52. The common supply electrode 64 is formed to surround at least one side of the display area.

The storage supply electrode 62 is formed of the same metal on the same plane as the gate electrode 4 and supplies a storage voltage to the storage line 30. The storage supply electrode 62 is formed between the common supply electrode 64 and the display area to surround at least one side of the display area along the common supply electrode 64.

The connection electrode 68 shields the storage voltage supplied to the storage supply electrode 62 to prevent a potential difference between the storage supply electrode 62 and the common electrode 60. As shown in FIG. 3A, the common voltage is reduced through the storage supply electrode 140 and the common supply electrode 120 for supplying a storage voltage to the storage line 160 forming the pixel electrode 190 and the storage capacitor. This is because when the potential difference between the supplied common electrodes 240 occurs, a DC voltage component accumulates in the liquid crystal as time passes, causing tilt distortion of the liquid crystal, resulting in a stain-based defect. Accordingly, in the present invention, as shown in FIG. 3B, the connection electrode 68 supplied with the common voltage through the common supply electrode 64 does not generate a potential difference with the common electrode 60. Accordingly, the DC voltage component may be prevented from accumulating in the liquid crystal between the common electrode 60 and the storage supply electrode 62, thereby preventing staining defects due to tilt distortion of the liquid crystal.

To this end, the connection electrode 68 overlaps the storage supply electrode 62 with the same metal as the pixel electrode 22 on the same plane as the pixel electrode 22, that is, on the passivation layer 20, as shown in FIG. 2. Can be formed. In this case, the connection electrode 68 is connected to the common supply electrode 64 through the common contact hole 70 passing through the gate insulating layer 18 and the passivation layer 20. In addition, as shown in FIG. 4, the connection electrode 68 is coplanar with the source / drain 6 and 10 electrodes, that is, the storage supply electrode 62 is made of the same metal as the source / drain metal on the gate insulating layer 18. It may be formed to overlap with. In this case, the connection electrode 68 is connected to the common supply electrode 64 through the common contact hole 70 penetrating the gate insulating film 18.

A method of manufacturing the liquid crystal display panel of the present invention will be described with reference to FIGS. 5A to 5F.

5A through 5F illustrate a method of manufacturing the liquid crystal display panel illustrated in FIG. 2.

As shown in FIG. 5A, a gate metal layer is formed on the lower substrate 1 through a deposition process. Thereafter, the gate metal layer is patterned by a photolithography process and an etching process to form a gate electrode 4, a gate line, a storage line 30, a storage supply electrode 62, and a common supply electrode 64.

Subsequently, as illustrated in FIG. 5B, SiOx and SiNx are formed on the lower substrate 1 on which the gate electrode 4, the gate line, the storage line 30, the storage supply electrode 62, and the common supply electrode 64 are formed. The gate insulating film 18 is formed by applying an inorganic insulating material such as the like. Subsequently, a pure amorphous silicon layer and an impurity amorphous silicon layer are sequentially formed on the gate insulating film 18. Thereafter, the pure amorphous silicon layer and the impurity amorphous silicon layer are patterned by a photolithography process and an etching process to form the active layer 12 and the ohmic contact layer 14.

Next, as shown in FIG. 5C, a source / drain metal layer is deposited on the gate insulating film 18 on which the active layer 12 and the ohmic contact layer 14 are formed. Thereafter, the deposited source / drain metal layer is patterned by a photolithography process and an etching process to form data lines and source / drain electrodes 6 and 10.

In addition, the ohmic contact layer 14 between the source / drain electrodes 6 and 10 is removed through an etching process using the source and drain electrodes 6 and 10 as a mask, and the active layer 12, which is a lower layer thereof, is exposed. Channels are formed.

Subsequently, as shown in FIG. 5D, an inorganic insulating material such as SiNx, SiOx or the like or an organic insulating material such as an acrylic resin is coated on the lower substrate 1 on which the source / drain electrodes 6 and 10 are formed. ) Is formed. The protective film 20 is patterned by a photolithography process and an etching process to form a drain contact hole 8 exposing a part of the drain electrode 10 and to expose a part of the common supply electrode 64. 66 is formed.

Subsequently, as shown in FIG. 5E, a transparent conductive film such as ITO (Indium-Tin-Oxide), IZO, or ITZO is deposited on the protective film 20, and the deposited transparent conductive film is patterned by a photolithography process and an etching process. As a result, the pixel electrode 22 and the connection electrode 68 are formed.

Thereafter, as shown in FIG. 5F, the lower substrate 1, the black matrix 54, the color filter 56, the overcoat layer 58, and the common electrode 60 sequentially formed as described above are sequentially formed. The substrate 52 is bonded.

6A to 6E illustrate a method of manufacturing the liquid crystal display panel illustrated in FIG. 4.

In the manufacturing method of the liquid crystal display panel according to the second exemplary embodiment of the present invention, the process of forming the lower substrate from the gate insulating film 18 is the same as that of the first exemplary embodiment.

As shown in FIG. 6A, the gate insulating film 18 is patterned by a photolithography process and an etching process to form a common contact hole 66 exposing a part of the common supply electrode 64. Thereafter, a pure amorphous silicon layer and an impurity amorphous silicon layer are sequentially formed on the gate insulating film 18. The pure amorphous silicon layer and the impurity amorphous silicon layer are patterned by a photolithography process and an etching process to form an active layer 12 and an ohmic contact layer 14.

Next, as shown in FIG. 6B, the gate insulating film 18 on which the active layer 12 and the ohmic contact layer 14 are formed, and the storage insulating electrode 62 and the common voltage supply electrode 64 are formed. 18) a source / drain metal layer is deposited on. Thereafter, the deposited source / drain metal layer is patterned by a photolithography process and an etching process to form data lines (not shown) and source / drain electrodes 6 and 10 on the gate insulating layer 18. At the same time, a connection electrode 68 connected to the common supply electrode 64 through the common contact hole 66 is formed on the gate insulating layer 18 on which the storage supply electrode 62 and the common supply electrode 64 are formed. The connection electrode 68 is formed to overlap the storage supply electrode 62 with the gate insulating layer 18 therebetween.

Then, the ohmic contact layer 14 between the source / drain electrodes 6 and 10 is removed through an etching process using the source and drain electrodes 6 and 10 as a mask, and the active layer 12, which is a lower layer thereof, is exposed. Channels are formed.

Subsequently, as shown in FIG. 6C, an inorganic insulating material such as SiNx, SiOx or the like or an organic insulating material such as an acrylic resin is coated on the lower substrate 1 on which the source / drain electrodes 6 and 10 are formed, thereby protecting the protective film 20. ) Is formed. As the formed protective material is patterned by a photolithography process and an etching process, a drain contact hole 8 exposing a part of the drain electrode 10 is formed, and at the same time, the protective material formed on the connection electrode 68 is formed by a photolithography process and an etching process. Patterned by the process, the connection electrode 68 is exposed.

Subsequently, as shown in FIG. 6D, ITO (Indium-Tin-Oxide) is deposited on the passivation layer 20, and the deposited ITO (Indium-Tin-Oxide) is patterned by a photolithography process and an etching process. The electrode 22 is formed.

Thereafter, as shown in FIG. 6E, the lower substrate 1, the black matrix 54, the color filter 56, the overcoat layer 58, and the common electrode 60 sequentially formed as described above are sequentially formed. The substrate 52 is bonded.

Meanwhile, in the method of manufacturing the liquid crystal display panel according to the first and second embodiments of the present invention, before the color filter substrate 400 and the TFT substrate 300 are bonded, the color filter substrate 400 and the TFT substrate 300 are bonded. Checking each one). If a defect occurs by inspecting the color filter substrate 400 and the TFT substrate 300 through the inspection step, the pixel electrode 22 and the storage line 30 of the corresponding pixel are shorted through a laser repair process. Let's do it. Thereafter, the pixel where the defect is generated maintains a constant potential difference between the pixel electrode 22 to which the storage voltage is applied and the common electrode 60 to which the common voltage is applied, regardless of the operation of the thin film transistor. Black) can prevent dot defect.

As described above, the liquid crystal display panel according to the present invention and a method of manufacturing the same by forming a connection electrode for shielding the storage voltage supplied to the storage supply electrode to prevent the potential difference between the storage supply electrode and the common electrode DC voltage (DC) It is possible to prevent the liquid crystal tilt distortion that occurs due to the accumulation and the unevenness of the stain system.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

An upper substrate and a lower substrate facing each other with the liquid crystal interposed therebetween; A thin film transistor connected to the gate line and the data line which intersect the gate insulating layer on the lower substrate; A pixel electrode connected to the thin film transistor; A storage line overlapping the pixel electrode with at least one insulating layer therebetween to form a storage capacitor; A storage supply electrode formed on the non-display area of the lower substrate to supply a storage voltage to the storage line; A common electrode formed on the upper substrate to form an electric field with the pixel electrode; A common supply electrode formed on the non-display area of the lower substrate to supply a common voltage to the common electrode; And a connection electrode connected to the common supply electrode to shield the storage voltage supplied to the storage common electrode and formed on the non-display area of the lower substrate. The method of claim 1, And the connection electrode is formed to overlap the storage supply electrode with the gate insulating layer and a passivation layer formed to cover the thin film transistor. The method of claim 2, And the connection electrode is formed of the same metal as the pixel electrode on the passivation layer. The method of claim 3, wherein And the connection electrode is connected to the common supply electrode through a common contact hole through the gate insulating layer and the passivation layer to expose a portion of the common supply electrode. The method of claim 1, And the connection electrode overlaps the storage supply electrode with the gate insulating layer interposed therebetween. The method of claim 5, And the connection electrode is formed of the same metal as the source / drain electrode of the thin film transistor on the gate insulating layer. The method of claim 6, And the connection electrode is connected to the common supply electrode through a common contact hole through the gate insulating layer to expose a portion of the common supply electrode. Preparing a color filter substrate including a common electrode formed on the upper substrate; A thin film transistor formed on an opposing lower substrate with the upper substrate and the liquid crystal interposed therebetween, a pixel electrode connected to the thin film transistor, and overlapping with the pixel electrode and at least one insulating layer interposed therebetween to form a storage capacitor. A storage line, a storage supply electrode formed on a non-display area to supply a storage voltage to the storage line, a common supply electrode formed on a non-display area to supply a common voltage to the common electrode, and a connection to the common supply electrode. Preparing a thin film transistor substrate to shield the storage voltage supplied to the storage common electrode and to include a connection electrode formed on the non-display area; And bonding the color filter substrate and the thin film transistor substrate to each other. The method of claim 8, Preparing the thin film transistor substrate Forming a gate electrode, the storage line, the storage supply electrode, and the common supply electrode of the thin film transistor on the lower substrate; Forming a gate insulating film on the lower substrate to cover the gate electrode, the storage line, the storage supply electrode, and the common supply electrode; Forming an active layer and an ohmic contact layer of the thin film transistor on the gate insulating film; Forming a source electrode and a drain electrode of the thin film transistor on the lower substrate on which the active layer and the ohmic contact layer are formed; Forming a passivation layer having a drain contact hole exposing the drain electrode and a common contact hole exposing the common supply electrode; Forming a pixel electrode in contact with the drain electrode through the drain contact hole on the passivation layer and forming a connection electrode in contact with the common supply electrode through the common contact hole; Manufacturing method of display panel. The method of claim 8, Preparing the thin film transistor substrate Forming a gate electrode, the storage line, the storage supply electrode, and the common supply electrode of the thin film transistor on the lower substrate; Forming a gate insulating film on the lower substrate to cover the gate electrode, the storage line, the storage supply electrode, and the common supply electrode; Forming a common contact hole penetrating the gate insulating film to expose the common supply electrode; Forming an active layer and an ohmic contact layer of the thin film transistor on the gate insulating film; Forming a source electrode and a drain electrode of the thin film transistor on a lower substrate on which the active layer and the ohmic contact layer are formed, and simultaneously forming a connection electrode contacting the common voltage supply electrode through the common contact hole; Forming a protective film having a drain contact hole exposing the drain electrode; And forming a pixel electrode on the passivation layer, the pixel electrode being in contact with the drain electrode through the drain contact hole. The method of claim 8, Inspecting whether each of the color filter substrate and the thin film transistor substrate is defective before bonding the color filter substrate and the thin film transistor substrate; And darkening the defective pixel when the defective pixel is detected in the thin film transistor substrate. The method of claim 11, Darkening the bad pixels And shorting a pixel electrode of the defective pixel and a storage line overlapping the pixel electrode.

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