KR20080062545A - An array substrate of in-plane switching mode liquid crystal display device and the method for fabricating thereof - Google Patents

Abstract

An array substrate of an in-plane switching mode LCD(Liquid Crystal Display) and a method of manufacturing the array substrate are provided to correct a pixel voltage which is reduced according to a repair process into a pixel voltage of a normal pixel to improve picture quality. An array substrate an in-plane switching mode LCD includes a gate line(120), a gate electrode(125) extended from the gate line, a gate compensation electrode(126) in an island pattern, which is extended from the gate line and arranged in parallel with the gate electrode at a distance from the gate electrode, a data line(130) intersecting the gate line to define a pixel region, a source electrode(132) extended from the data line, and a drain electrode(134) partially overlapped with the gate electrode and the gate compensation electrode. The array substrate further includes an active layer(140) and an ohmic contact layer in an island pattern, which are formed at the intersection of the gate line and the data line and partially overlapped with the gate electrode, a pixel electrode(160) connected to the drain electrode through a drain contact hole(CH2), a common electrode(170) extended from a common line(150) arranged in parallel with the gate line, a repair line(165) partially overlapped with pixel electrodes respectively located on both sides thereof, and a gate connecting pattern(175) in an island shape, which is overlapped with the gate line and the gate compensation electrode.

Description

An array substrate of in-plane switching mode liquid crystal display device and the method for fabricating

1 is a plan view showing a unit pixel of a conventional array substrate for a transverse electric field type liquid crystal display device.

2A is a circuit diagram showing a normal pixel of a conventional transverse electric field type liquid crystal display device, and FIG. 2B is a circuit diagram showing a state in which a defective pixel is repaired.

3A is a timing diagram showing charging characteristics of a normal pixel of a conventional transverse electric field type liquid crystal display device.

3B is a timing diagram illustrating charging characteristics of a pixel subjected to a repair process.

4 is a plan view showing unit pixels of an array substrate for a transverse electric field type liquid crystal display device according to the present invention;

5A through 5E are cross-sectional views illustrating a process sequence by cutting along line V-V of FIG. 4.

6A to 6E are cross-sectional views illustrating a process sequence by cutting along line VI-VI of FIG. 4.

FIG. 7 is a diagram for describing a method of repairing a defective pixel when a defective pixel occurs in an array substrate for a transverse electric field type liquid crystal display according to an exemplary embodiment of the present invention. FIG.

* Explanation of symbols for the main parts of the drawings *

100: substrate 120: gate wiring

125: gate electrode 126 gate compensation electrode

130: data wiring 132: source electrode

134: drain electrode 150: common wiring

160: pixel electrode 165: repair wiring

170: common electrode 175: gate connection pattern

CH2: Drain contact hole T: Thin film transistor

P: pixel area

The present invention relates to a transverse electric field type liquid crystal display device, and more particularly, to improve a problem in which weak brightness points are generated due to a decrease in ΔVP of a pixel effective voltage during a repair process, thereby manufacturing a liquid crystal display device having a high quality normally black mode. It's about things.

In particular, the present invention relates to a transverse electric field type liquid crystal display device in which the first and second electrodes for driving the liquid crystal of the liquid crystal display device are formed on the same plane.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the liquid crystal may be artificially applied to control the direction of the molecular arrangement.

Accordingly, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Hereinafter, a conventional transverse electric field type liquid crystal display device will be described with reference to the accompanying drawings.

1 is a plan view illustrating a unit pixel of a conventional array substrate for a transverse electric field type liquid crystal display device.

As shown, a gate wiring 20 and a gate electrode 25 extending from the gate wiring 20 are formed on the substrate 10 in a first direction.

The data line 30, the source electrode 32 extending from the data line 30, and the drain electrode 34 spaced apart from each other are configured in a second direction perpendicular to the gate line 20. do.

In this case, an area defined by the gate line 20 and the data line 30 perpendicular to each other is referred to as a pixel area P.

In this case, a thin film transistor T is formed at an intersection point of the gate line 20 and the data line 30, and the thin film transistor T is formed on the gate electrode 25 and the gate electrode 25. And an island-like active layer 40 and an ohmic contact layer (not shown) overlapping with each other, and source and drain electrodes 32 and 34 formed thereon.

In this case, the active layer 40 is made of pure amorphous silicon, and the ohmic contact layer (not shown) is made of impurity amorphous silicon, respectively.

The pixel electrode 60 in contact with the drain electrode 34 is formed in the pixel region P through the drain contact hole CH1 exposing a part of the drain electrode 34.

In this case, the pixel electrode 60 may include an extension part 60a in contact with the drain electrode 34, a plurality of vertical parts 60b vertically branching from the extension part 60a to the pixel region P, And a horizontal portion 60c connecting the vertical portions 60b to one. The common electrode 70 is configured to be spaced apart from the pixel electrode 60 to be parallel to each other in the pixel region P.

The common electrode 70 is branched from the common wiring 50 spaced apart from the gate wiring 20 in parallel with each other, and is vertically divided 70a parallel to the pixel electrode vertical portion 60b, and It includes a horizontal portion (70b) for connecting the vertical portion (70a) into one.

Here, the pixel electrode 60 is configured to overlap the gate wiring 20 of the front end, and the gate wiring 20 of the front end is the first electrode, and a part of the pixel electrode 60 overlapping the second electrode is made second. A storage capacitor Cst serving as an electrode is configured.

FIG. 2A is a circuit diagram illustrating a normal pixel of a conventional transverse electric field type liquid crystal display, and FIG. 2B is a circuit diagram illustrating a state in which defective pixels are repaired.

As illustrated, a plurality of gate wirings 20 and data wirings 30 intersect vertically and horizontally on the array substrate 10 to form a mattress, and a plurality of thin film transistors T are formed at these intersections.

In addition, a plurality of pixel electrodes (60 of FIG. 1) connected to the plurality of thin film transistors T and parallel common electrodes (70 of FIG. 1) spaced in parallel therebetween are arranged in parallel with a liquid crystal layer (not shown). The liquid crystal capacitor Clc and the storage capacitor Cst described in FIG. 1 are configured.

Here, when a defect occurs in an upper pixel, the thin film transistor T and the pixel electrode of the defective pixel are cut, and the cut pixel electrode and the adjacent pixel electrode are connected.

In this case, in the transverse electric field driving normally black, the liquid crystal capacitor Clc and the storage capacitor Cst are doubled as compared to the normal pixel. As a result, the pixel effective voltage increases due to the decrease in ΔVp due to the deterioration of the charging characteristic, which is recognized as a weak point that fails to implement a full black voltage.

This will be described with reference to the accompanying drawings.

3A is a timing diagram illustrating charging characteristics of a normal pixel of a conventional transverse electric field type liquid crystal display, and FIG. 3B is a timing diagram illustrating charging characteristics of a pixel subjected to a repair process, which will be described with reference to FIGS. 2A and 2B. Do it.

As illustrated, when a gate pulse is applied to the gate wiring 20, the thin film transistor T of the corresponding wiring is turned on, and an image signal applied to each data line 30 through each of the turned on thin film transistor T is output. It is applied to the pixel (P of FIG. 1). The liquid crystal capacitor Clc and the storage capacitor Cst connected to the thin film transistor T are charged while the thin film transistor T is turned on, and when the thin film transistor T is turned off, the thin film transistor T is turned on in the next frame. The charge charge is maintained until turned on. At this time, a common pulse is constantly applied to the common electrode (70 of FIG. 1).

Here, when the repair process is performed in a transverse electric field mode liquid crystal display device driving normally black, the pixel voltage is doubled at the falling edge of the scan signal Vgate applied to the gate wiring 20. The liquid crystal voltage decreases by ΔVp due to the capacitor Clc and the storage capacitor Cst, which causes a problem in that the pixel voltage increases to be recognized as a weak point.

Here, the charging characteristic of the normal pixel of the conventional transverse electric field type liquid crystal display device is shown in equation (1),

- - - (1)

- - - (One)

The charging characteristic of the pixel subjected to the repair process is shown in Equation (2).

- - - (2)

- - - (2)

이다.therefore,

to be.

Due to the decrease in ΔVp, the pixel effective voltage is increased so that a full black voltage cannot be realized, and a problem of deterioration of image quality perceived as a weak point compared to the peripheral part occurs.

The present invention has been made to solve the above-mentioned problem, and an object thereof is to improve image quality by compensating? Vp, which decreases according to a repair process, in the same manner as a normal pixel.

An array substrate for a transverse electric field type liquid crystal display device according to the present invention for achieving the above object is a substrate, a gate wiring formed in one direction on the substrate, a gate electrode extending from the gate wiring, and the gate electrode An island-shaped gate compensation electrode spaced in parallel with each other, a data line defining a pixel region vertically crossing the gate line, a source electrode extending from the data line, and spaced apart from the source electrode and the gate electrode and the gate A drain electrode in which a compensation electrode and a part thereof overlap each other;

Contacting the drain electrode through an island-like active layer and an ohmic contact layer overlapping the gate electrode and a portion of the gate line and a data line, and a drain contact hole exposing a part of the drain electrode; A common electrode branched from the pixel electrode, the common wiring spaced in parallel with the gate wiring, and alternately arranged in parallel with the pixel electrode;

And a repair wiring configured to overlap the pixel electrodes on both sides and a portion thereof, and an island-shaped gate connection pattern configured to overlap each of the gate wiring and the gate compensation electrode.

In this case, the repair wiring is made of the same material as the data line and the gate connection pattern is made of the same material as the pixel electrode.

The pixel electrode may include an extension part in contact with the drain electrode, a plurality of vertical parts vertically branching from the extension part to the pixel area, and a horizontal part connecting the vertical parts into one. And a vertical portion branched from the common wiring and arranged in parallel with the pixel electrode, and a horizontal portion connecting the vertical portions into one.

In addition, the drain electrode is configured in a T-shape. The pixel capacitor may be configured to overlap the gate wiring of the front end, and the storage capacitor may be configured such that the gate wiring of the front end is the first electrode, and a part of the pixel electrode overlapping the second electrode is the second electrode.

According to an aspect of the present invention, there is provided an array substrate for a transverse electric field type liquid crystal display device, the method comprising: preparing a substrate, a gate wiring on the substrate, a gate electrode extending from the gate wiring, and a gate electrode; Forming an island-shaped gate compensation electrode spaced in parallel with each other, a common wiring spaced in parallel with the gate wiring, and a common electrode connected to the common wiring, the gate electrode and wiring, a gate compensation electrode, and a common wiring; Forming a gate insulating film on the substrate on which the common electrode is formed;

Forming a pure and an impurity amorphous silicon layer on the gate insulating layer in sequence, and patterning the stacked layers to form an island-like active layer and an ohmic contact layer overlapping the gate electrode and a portion thereof; A data line defining a pixel region crossing the gate line perpendicularly to the gate line, a source electrode extending from the data line and overlapping the gate electrode with a portion thereof, and spaced apart from the source electrode; Forming a drain electrode overlapping a portion of each of the gate electrode and the gate compensation electrode, and an island-shaped repair wiring on one side of the pixel area;

Forming a passivation layer including the data line, the source and drain electrodes, and a drain contact hole exposing a portion of the drain electrode on the substrate on which the repair line is formed, and a pixel electrode contacting the drain electrode on the passivation layer And forming an island-shaped gate connection pattern in which part of the gate electrode and the gate compensation electrode overlap each other.

In this case, the repair wiring is formed such that the pixel electrodes on both sides and a part of the repair wiring overlap each other.

The pixel electrode is formed so as to overlap the gate wiring at the front end, and a storage capacitor having the gate wiring at the front end as the first electrode and a part of the pixel electrode overlapping the second electrode as the second electrode is formed. The drain electrode may be formed in a T shape.

When a defect occurs in any pixel of the transverse electric field type liquid crystal display device according to the present invention for achieving the above object, cutting the thin film transistor and the pixel electrode located in the defective pixel using a laser, and the cutting Welding the both electrodes through the repaired pixel electrode and the repair wiring overlapping each of the pixel electrodes of the normal pixel region adjacent thereto, and through the gate connection pattern configured in the normal pixel, the gate wiring and the gate. The repairing of the parasitic capacitor is performed by welding the compensation electrode.

In this case, the parasitic capacitor uses the gate compensation electrode as the first electrode and the drain electrode overlapping the second electrode. The cutting or welding may be performed using a laser.

Hereinafter, a transverse electric field type liquid crystal display device according to the present invention will be described with reference to the accompanying drawings.

4 is a plan view illustrating unit pixels of an array substrate for a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

As illustrated, the gate wiring 120 and the gate electrode 125 extending from the gate wiring 120 are formed on the substrate 100 in a first direction, and are spaced apart in parallel with the gate electrode 125. The island-shaped gate compensation electrode 126 is further configured.

The data line 130, the source electrode 132 extending from the data line 130, and the drain electrode 134 spaced apart from each other are formed in a second direction perpendicular to the gate line 120. .

In this case, one side of the drain electrode 134 overlaps the gate electrode 125 and a part thereof, and the other side of the drain electrode 134 overlaps the gate compensation electrode 126.

The area defined by the gate line 120 and the data line 130 perpendicularly intersecting is referred to as a pixel area P.

In this case, a thin film transistor T is formed at an intersection point of the gate line 120 and the data line 130, and the thin film transistor T is part of a gate electrode 125 and an upper portion of the gate electrode 125. And an island-like active layer 140 and an ohmic contact layer (not shown) overlapping each other, and source and drain electrodes 132 and 134.

The active layer 140 is made of pure amorphous silicon, and the ohmic contact layer (not shown) is made of impurity amorphous silicon, respectively.

The pixel electrode 160 in contact with the drain electrode 134 is formed in the pixel region P through the drain contact hole CH2 exposing a part of the drain electrode 134.

In this case, the pixel electrode 160 includes an extension part 160a contacting the drain electrode 134, a plurality of vertical parts 160b vertically branching from the extension part 160a to the pixel region P, And a horizontal portion 160c connecting the vertical portions 160b to one. The pixel electrode 160 and the common electrode 170 spaced apart in parallel in the pixel region P are configured.

The common electrode 170 is branched from the common wiring 150 spaced apart from the gate wiring 120 to be parallel to the vertical portion 170b configured to cross and parallel to the pixel electrode vertical portion 160b. It includes a horizontal portion (170b) for connecting the vertical portion (170a) into one.

Here, the pixel electrode 160 is configured to overlap the gate wiring 120 of the front end, and the gate wiring 120 of the front end is the first electrode, and a part of the pixel electrode 160 overlapping the second electrode is made second. The storage capacitor Cst can be configured as an electrode.

In this case, the pixel electrode 160 is extended to the adjacent pixel electrode 160 to form an island-shaped repair wiring 165 in which both pixel electrodes 160 and portions thereof overlap each other, and the gate compensation is performed. An island-shaped gate connection pattern 175 in which a part of the electrode 126 and the gate line 120 overlap each other is further configured.

At this time, when a defect occurs in any pixel of the array substrate 100, the thin film transistor T and the pixel electrode 160 positioned in the defective pixel are cut, and the thin film transistor T and the cut pixel electrode ( The 160 is connected to the pixel electrode 160 of the neighboring normal pixel region through the repair wiring 165.

Next, when the gate compensation electrode 126 and the gate wiring 120 are welded through an island-shaped gate connection pattern 175 further configured in the normal pixel area, the gate compensation electrode 126 and the drain electrode are welded. An additional parasitic capacitor Cgs may be formed between 143.

In this way, the parasitic capacitor Cgs can be doubled, and when applied to the waveform of FIG. 3B, the value of the pixel effective voltage can be further lowered.

Therefore, by setting the value of ΔVp to be the same level as that of the normal pixel, the weak point problem occurring in the normally black mode can be solved.

Hereinafter, a method of manufacturing an array substrate for a liquid crystal display device according to the present invention will be described with reference to the accompanying drawings.

5A to 5E and FIGS. 6A to 6E are cross-sectional views illustrating a process sequence by cutting along lines V-V and VI-VI of FIG. 4, respectively.

As shown in FIGS. 5A and 6A, one selected from a group of conductive metals is deposited on the substrate 100 and patterned to form a gate wiring 120 and a gate extending from the gate wiring 120 in one direction. An electrode 125 and an island-shaped gate compensation electrode 126 spaced apart in parallel with the gate electrode 125 are formed.

At the same time, the common wiring 150 spaced in parallel with the gate wiring 120, and the plurality of vertical parts 170a branched from the common wiring 150 to the pixel region (P of FIG. 4) and connected thereto are connected to one. A common electrode (170 in FIG. 4) including a horizontal portion 170b is formed.

Next, silicon nitride (SiNx) or silicon oxide (SiO ₂ ) is formed on the entire upper surface of the substrate 100 on which the gate wiring 120, the gate electrode 125, the gate compensation electrode 126, the common electrode 170, and the like are formed. The gate insulating layer 145 is formed of one selected from the group of inorganic insulating materials such as the like.

5B and 6B, a pure amorphous silicon layer and an impurity amorphous silicon layer (not shown) are sequentially formed on the substrate 100 on which the gate insulating layer 145 is formed, and then patterned to form the gate electrode. An active layer 140 and an ohmic contact layer 141 overlapping the 125 and a portion thereof are stacked.

As shown in FIGS. 5C and 6C, one or more selected of conductive metal groups are deposited on the substrate 100 on which the active and ohmic contact layers 140 and 141 are formed and patterned to form the gate wiring ( A data line (130 of FIG. 4) perpendicularly intersecting with 120, a source electrode 132 extending from the data line, and a drain electrode 134 spaced apart from the source electrode 132 are formed.

In this case, the T-shaped drain electrode 134 overlapping the gate compensation electrode 126 and a part thereof is formed in the present invention. This configuration ensures a potential parasitic capacitor Cgs between the drain electrode 134 and the gate compensation electrode 126 in addition to the parasitic capacitor Cgs formed between the drain electrode 134 and the gate electrode 125. Can be. This will be described later.

At the same time, an island-shaped repair wiring 165 is further formed on one side of the pixel region (P in FIG. 4) for repair compensation.

As illustrated in FIGS. 5D and 6D, silicon nitride (SiNx) or silicon oxide (130) may be formed on the entire upper surface of the substrate 100 on which the data line (130 of FIG. 4) and the source and drain electrodes 132 and 134 are formed. The passivation layer 155 is formed of one selected from the group of inorganic insulating materials such as SiO ₂ ), or one selected from the group of organic insulating materials including benzocyclobutene (BCB) and acrylic resin.

Next, the passivation layer 155 corresponding to a part of the drain electrode 134 is patterned to form a drain contact hole CH2 exposing a part of the drain electrode 134.

5E and 6E, a transparent conductive metal including indium tin oxide (ITO) and indium zinc oxide (IZO) on the passivation layer 155 including the drain contact hole CH2. A selected one of the group is deposited and patterned to form a pixel electrode (160 in FIG. 4) in contact with the drain electrode 134.

At the same time, an island-shaped gate connection pattern 175 configured to overlap a portion of each of the gate line 120 and the gate compensation electrode 126 is formed.

In this case, the pixel electrode 160 of FIG. 4 is branched into an extension portion 160a contacting the drain electrode 134, and is extended from the extension portion 160a to a pixel region (P of FIG. 4), and the common electrode is vertical. A vertical portion 160b, which is staggered in parallel to the spaced portion 170a, and a horizontal portion (160c in FIG. 4) connecting the vertical portions as one.

In this case, the pixel electrode (160c of FIG. 4) is extended to a neighboring pixel so that both pixel electrodes (160 of FIG. 4) overlap the repair wiring 165 and a part of the pixel electrode (160 of FIG. 4).

As described above, when the defective pixel is generated, the parasitic capacitor Cgs is doubled by welding the gate wiring 120 and the gate compensation electrode 126 through the additionally configured gate connection pattern 175. As a result, ΔVp similar to that of a normal pixel can be obtained, thereby preventing the weak point problem occurring in the normally black mode.

As described above, the array substrate for the transverse electric field type liquid crystal display device according to the present invention can be manufactured through the above-described process.

Hereinafter, a repair method of an array substrate for a transverse electric field type liquid crystal display device manufactured by the above-described process will be described with reference to the accompanying drawings.

FIG. 7 is a diagram for describing a method of repairing defective pixels when a defective pixel occurs in the array substrate for a transverse electric field type liquid crystal display according to the present invention.

As illustrated, a plurality of gate wires 220 and data wires 230 cross each other in the form of a mattress on the substrate 200, and a plurality of thin film transistors T are formed at these intersections.

The plurality of pixel electrodes 260 connected to the plurality of thin film transistors T are configured, and the repair wiring 265 is configured to overlap the pixel electrodes 260 on both sides thereof.

The gate electrode 225 and the drain electrode 234 of the thin film transistor T serve as one parasitic capacitor Cgs, and the gate compensation electrode 226 and the drain electrode 234 spaced in parallel therewith are It acts as a potential parasitic capacitor (Cgs).

At this time, when a defect occurs in an arbitrary pixel, the thin film transistor part T and the pixel electrode 260 of the defective pixel P are cut (A) with a laser, and the cut pixel electrode 260a and the neighboring part thereof are cut. One side B and the other side C of the repair wiring 265 overlapping part of the pixel electrode 260c of one normal pixel region P1 are welded using a laser.

Next, when one side D and the other side E of the gate connection pattern 275 formed in the normal pixel region P1 are welded by using a laser, the gate compensation electrode 226 and the drain electrode 234 are welded. Further parasitic capacitors (Cgs) can be formed, thereby doubling the total parasitic capacitor (Cgs) capacity.

Accordingly, since the liquid crystal capacitor Clc and the storage capacitor Cst are doubled and the capacitance of the parasitic capacitor Cgs is doubled, the final pixel effective voltage is lowered to be similar to the normal pixel.

In detail, the charging characteristic of the normal pixel of the transverse electric field type liquid crystal display according to the present invention is as shown in Equation (3),

- - - (3)

---(3)

The filling characteristic after a repair process is the same as Formula (4).

- - - (4)

- - - (4)

That is, even if the capacity of the liquid crystal capacitor Clc and the storage capacitor Cst is doubled during the repair process, the parasitic capacitor Cst can be doubled, and the above equations (3) and (4) are used. Since the relationship may be in relation to Vp? ΔVp ', the effective voltage of the repair pixel may be similar to the low voltage of the normal voltage.

Accordingly, a high-definition liquid crystal display device may be realized by solving the weak point problem caused by the repaired region in the transverse electric field method of the normally black mode.

The present invention has the effect of realizing a high quality by compensating for weak point due to the decrease of ΔVp according to the repair process.

Claims (14)

A substrate; A gate wiring formed in one direction on the substrate, a gate electrode extending from the gate wiring, and an island-shaped gate compensation electrode spaced in parallel with the gate electrode; A data line defining a pixel region crossing the gate line perpendicularly to the gate line, a source electrode extending from the data line, a drain electrode spaced apart from the source electrode, and overlapping the gate electrode and the gate compensation electrode with a portion thereof; ; An island-like active layer and an ohmic contact layer overlapping the gate electrode and a portion thereof at an intersection point of the gate line and the data line; A pixel electrode in contact with the drain electrode through a drain contact hole exposing a portion of the drain electrode; A common electrode branched from the common wiring spaced in parallel with the gate wiring and staggered in parallel with the pixel electrode; Repair wirings configured to overlap the pixel electrodes on both sides and portions thereof, and island-shaped gate connection patterns configured to overlap the gate wirings and the gate compensation electrodes, respectively. Array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 1, And said repair wiring is made of the same material as the data wiring. The method of claim 1, And the gate connection pattern is formed of the same material as that of the pixel electrode. The method of claim 1, The pixel electrode includes an extension part in contact with the drain electrode, a plurality of vertical parts vertically branching from the extension part to the pixel area, and a horizontal part connecting the vertical parts into one. Board. The method of claim 1, And the common electrode branched from the common wiring, and having a vertical portion intersecting with the pixel electrode and a horizontal portion connecting the vertical portion to one. The method of claim 1, And the drain electrode is configured to have a T shape. The method of claim 1, And a storage capacitor configured to overlap the pixel electrode with the gate wiring at the front end, the gate wiring at the front end as the first electrode, and a storage capacitor having a part of the pixel electrode overlapping the second electrode as the second electrode. Array substrate for a liquid crystal display device. Preparing a substrate; A gate wiring on the substrate, a gate electrode extending from the gate wiring, an island-shaped gate compensation electrode spaced in parallel with the gate electrode, a common wiring spaced in parallel with the gate wiring, and connected to the common wiring Forming a common electrode; Forming a gate insulating film on the substrate on which the gate electrode and the wiring, the gate compensation electrode, the common wiring and the common electrode are formed; Forming a pure and an impurity amorphous silicon layer on the gate insulating layer in sequence and patterning the stacked layers to form an island-like active layer and an ohmic contact layer overlapping the gate electrode; A data line defining a pixel area on the substrate on which the active and ohmic contact layers are formed, and vertically intersecting with the gate line; a source electrode extending from the data line to overlap the gate electrode and a portion thereof; Forming a drain electrode configured to be spaced apart from and overlapping a portion of each of the gate electrode and the gate compensation electrode, and an island-shaped repair wiring on one side of the pixel area; Forming a protective film including the data line, the source and drain electrodes, and a drain contact hole exposing a part of the drain electrode on the substrate on which the repair line is formed; Forming an island-shaped gate connection pattern overlapping a portion of the pixel electrode in contact with the drain electrode and the gate electrode and the gate compensation electrode on the passivation layer; Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 8, And wherein the repair wirings are formed such that the pixel electrodes on both sides and a part of the repair wirings overlap each other. The method of claim 8, The pixel electrode is formed so as to overlap the gate wiring at the front end, and a storage capacitor having a storage capacitor having the gate wiring at the front end as the first electrode and a part of the pixel electrode overlapping the second electrode is formed. Method of manufacturing an array substrate for an apparatus. The method of claim 8, And said drain electrode is formed in a T-shape. When a defect occurs in any pixel of the transverse electric field type liquid crystal display device formed by claim 1, Cutting the thin film transistor and the pixel electrode positioned in the defective pixel using a laser; Welding the two electrodes through the repair wiring overlapping the cut pixel electrode and a part of the pixel electrode in the normal pixel region adjacent thereto; Further forming a parasitic capacitor by welding the gate line and the gate compensation electrode through the gate connection pattern formed in the normal pixel; Repair method comprising a. The method of claim 12, And the parasitic capacitor uses the gate compensation electrode as a first electrode, and the drain electrode overlapping the second electrode as a second electrode. The method of claim 12, The cutting or welding is a repair method, characterized in that using a laser.

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