KR20080057521A - Display apparaturs and method for driving the same - Google Patents

Abstract

A display apparatus and a method for driving the same are provided to discharge gray data signals in pixel electrodes through data lines by turning on simultaneously thin film transistors in an LCD(Liquid Crystal Display) device. A display apparatus includes a display panel(100), a controller(500), and a panel discharging unit(600). The display panel includes plural gate lines connected to plural pixels. The controller which is driven by control signals controls operation of the display panel. The panel discharging unit applies a gate turn on voltage to plural gate lines according to a discharging control signal. The panel discharging unit includes an operation signal generator and a gate turn on signal supply unit. The operation signal generator outputs a high leveled operation signal according to the discharging control signal. The gate turn on signal supply unit applies the gate turn on voltage to the gate lines according to the operation signal.

Description

DISPLAY APPARATURS AND METHOD FOR DRIVING THE SAME}

1 is a block diagram of a display device according to an exemplary embodiment of the present invention.

2 is a circuit diagram of a panel discharging unit, according to an exemplary embodiment.

3 is a signal waveform diagram illustrating a turn-off operation of a display device according to an exemplary embodiment.

<Explanation of symbols for the main parts of the drawings>

100: liquid crystal display panel 200: gate driver

300: data driver 400: driving voltage generator

500: signal control unit 600: panel discharging unit

700: backlight unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device and a driving method thereof, wherein a display capable of completely discharging a charge charged in a display panel during turn-off of the display device can improve a discharge failure. An apparatus and a driving method thereof are provided.

The liquid crystal display provides a data signal to the pixel electrode of the pixel capacitor in the liquid crystal display panel using control signals applied from the outside, thereby changing the electric field across the pixel capacitor. In this way, an image is displayed by controlling the alignment of the liquid crystals provided at both ends of the pixel capacitor to adjust the amount of light passing through the liquid crystal.

When the liquid crystal display is turned off, the data signal charged to the pixel capacitor in the liquid crystal display panel is not completely discharged, causing a problem of discharging such as an afterimage.

Accordingly, the present invention has been made to solve the above problem, and when the display device is turned off, the pixel capacitor in the display panel is discharged by using a control signal that is first turned off before the display panel is turned off, thereby improving the discharge failure. It is an object of the present invention to provide a display device and a driving method thereof.

According to the present invention, a display panel including a plurality of gate lines connected to a plurality of pixels, a control unit driving a control signal to control an operation of the display panel, and a gate turn-on voltage on the plurality of gate lines according to a discharging control signal It provides a display device including a panel discharging unit for applying a.

The panel discharging unit includes an operation signal generator for outputting a logic high operation signal according to the discharging control signal, and a gate turn on signal applying unit configured to apply the gate turn-on voltage to the plurality of gate lines according to the operation signal. It is desirable to.

Here, the operation signal generation unit may include a transistor having a base terminal connected to the discharging control signal input terminal, an emitter terminal connected to a ground power supply, and a collector terminal connected to a power supply voltage and an operation signal output terminal.

Preferably, the gate turn-on signal applying unit includes a plurality of thin film transistors driven according to an operation signal to supply gate turn-on voltages to the plurality of gate lines, respectively. It is effective that the plurality of thin film transistors are connected in series.

Preferably, the discharging control signal maintains the logic state constant in the normal operation period of the display device, and the logic state changes before the supply of the power supply voltage is cut off when the display device turns off.

The control signal includes an LVDS signal and a power supply voltage having an analog form of raw data and a transmission control signal for controlling the transmission thereof, wherein the transmission control signal always has a logic high state when the raw data is supplied. It is preferable to have a logic low state when not supplied, and to use the transmission control signal as the discharging control signal.

In addition, interrupting the supply of the external data according to the present invention to block the supply of the image signal provided to the display panel of the display device, the step of discharging the image signal charged in the display panel and supplied to the display device A method of driving a display device, the method including driving a power supply, is provided.

The discharging of the image signal charged in the display panel may include generating a discharging control signal of a logic low due to the cutoff of the external data supply, and using the discharging control signal to generate an operation signal of a logic high. And generating a gate turn-on voltage to all the gate lines in the display panel using the operation signal.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you.

1 is a block diagram of a display device according to an exemplary embodiment of the present invention. 2 is a circuit diagram of a panel discharging unit, according to an exemplary embodiment. 3 is a signal waveform diagram illustrating a turn-off operation of a display device according to an exemplary embodiment.

1 to 3, the display device according to the present exemplary embodiment includes the liquid crystal display panel 100, the gate driver 200, the data driver 300, the driving voltage generator 400, the signal controller 500, and the like. The panel discharging unit 600 and the backlight unit 700 are included.

The liquid crystal display panel 100 includes a plurality of gate lines G1 to Gn extending in a substantially column direction and a plurality of data lines D1 to Dm extending in a row direction perpendicular thereto, and the gate line G1. To Gn) and pixels provided in an intersection region of the data lines D1 to Dm. The pixel includes a thin film transistor T, a storage capacitor Cst, and a pixel capacitor Clc. The pixel may include red (R), green (G), and blue (B) pixels, and may display a total natural color through a combination thereof. The liquid crystal display panel 100 includes a thin film transistor substrate (not shown) including a thin film transistor T, a gate line G1 to Gn, a data line D1 to Dm, a pixel electrode, and a storage electrode, a black matrix, and a color. It includes a common electrode substrate (not shown) provided with a filter and a common electrode, and includes a liquid crystal (not shown) provided between the thin film transistor substrate and the common electrode substrate. The sustain capacitor Cst and the pixel capacitor Clc share the pixel electrode.

Here, the gate terminal of the thin film transistor T is connected to the gate lines G1 to Gn, the source terminal is connected to the data lines D1 to Dm, and the drain terminal is connected to the pixel electrode. As a result, the thin film transistor T operates according to the gate turn-on voltages applied to the gate lines G1 to Gn to convert the data signals (ie, the gray voltages) of the data lines D1 to Dm to the pixel capacitor Clc and the sustain capacitor. The electric field across the pixel capacitor Clc is changed by supplying to the pixel electrode used as the one electrode terminal of (Cst). As described above, the arrangement of the liquid crystals inside the liquid crystal display panel 100 may be changed to adjust the transmittance of light supplied from the backlight. The pixel electrode may be provided with a plurality of incision and / or protrusion patterns as domain restricting means for adjusting the alignment direction of the liquid crystal, and the protrusion and / or incision pattern may be provided with the common electrode. It is preferable that the liquid crystal of this embodiment is oriented in the vertical alignment system.

A control unit for providing signals for driving the liquid crystal display panel 100 is provided outside the liquid crystal display panel 100 having the above-described structure. The controller includes a gate driver 200, a data driver 300, a driving voltage generator 400, a signal controller 500, and a panel discharging unit 600.

The gate driver 200 and / or the data driver 300 may be mounted on a thin film transistor substrate of the liquid crystal display panel 100 or may be mounted on a separate printed circuit board (PCB). It may also be electrically connected through a flexible printed circuit board (FPC). The gate driver 200 and the data driver 300 of the present exemplary embodiment may be manufactured in the form of at least one driving chip and mounted on the thin film transistor substrate. In addition, the driving voltage generator 400 and the signal controller 500 may be mounted on the printed circuit board and electrically connected to the liquid crystal display panel 100 through the flexible printed circuit board. In addition, the panel discharging unit 600 is preferably manufactured simultaneously with the thin film transistor on the thin film transistor substrate. Of course, the present invention is not limited thereto and may be manufactured in a predetermined chip type and mounted on one side of the thin film transistor substrate or the printed circuit board. Alternatively, a part of the panel discharging unit 600 may be manufactured on the thin film transistor substrate and the other part may be mounted on the substrate in a chip type.

First, the signal controller 500 receives an input image signal from an external graphic controller (not shown), that is, a low voltage differential signal (LVDS) signal and an input control signal. The signal controller 500 receives an external power supply voltage VDD for driving the liquid crystal display panel 100. Of course, the present invention is not limited thereto, and the display device may further include a separate converter (not shown) that receives the external power voltage VDD.

In this case, the LVDS signal includes analog data, raw data (ie, red, green, and blue related data) and a transmission control signal for controlling the transmission thereof. The input control signal includes a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock CLK, and a data enable signal DE.

The signal controller 500 processes the raw data of the LVDS signal according to operating conditions of the liquid crystal display panel to generate pixel data R, G, and B, and generates a gate control signal and a data control signal. The signal controller transmits the generated gate control signal to the gate driver 200, and transmits the pixel data R, G, and B and the data control signal to the data driver 300. Here, the pixel data R, G, and B may be rearranged in the signal controller 500 according to the pixel arrangement of the liquid crystal display panel 100. Of course, the present invention is not limited thereto and may be rearranged according to the pixel arrangement of the liquid crystal display panel 100 in the data driver 300. The gate control signal includes a vertical synchronization start signal, a gate clock signal, an output enable signal, and the like that indicate the start of output of the gate turn-on voltage Von. The data control signal includes a synchronization start signal indicating the start of transmission of pixel data, a load signal for applying a data voltage to a corresponding data line, and an inverted signal and a data clock signal for inverting the polarity of a gray voltage with respect to a common voltage.

Subsequently, the driving voltage generator 400 generates various driving voltages for driving the display device using the external power voltage VDD input from the external power supply. The driving voltage generator 400 generates a reference voltage GVDD, a gate turn-on voltage Von, a gate turn-off voltage Voff, and a common voltage. In addition, the driving voltage generator 400 applies the gate turn-on voltage Von and the gate-off voltage Voff to the gate driver 200 according to a control signal from the signal controller 500, and the reference voltage GVDD. Is applied to the data driver 300. The reference voltage GVDD is used as a reference voltage for generating a gray voltage for driving the liquid crystal.

The gate driver 200 applies the gate turn-on / turn-off voltage Von / Voff of the driving voltage generator 400 to the gate lines G1 to Gn according to an external gate control signal. Accordingly, the thin film transistor T may be controlled to apply the gray voltage to each pixel. In this case, the gate driver 200 sequentially applies the gate turn-on voltage Von to the plurality of gate lines G1 to Gn within the image display period 1P.

The data driver 300 generates the gray scale data signal using the data control signal of the signal controller 500, the pixel data signals R, G, and B, and the reference voltage GVDD of the driving voltage generator 400. To each of the data lines D1 to Dm. That is, the data driver 300 converts the input digital pixel data signals R, G, and B into analog data grayscale data signals using the reference voltage GVDD. The data driver 300 supplies the converted grayscale data signal to the plurality of data lines D1 to Dm.

The panel discharging unit 600 operates according to the discharging control signal DCS to apply a turn-on voltage to all the gate lines G1 to Gn. It is preferable to use the transmission control signal of the LVDS signal as the discharging control signal DCS. That is, the transmission control signal always outputs a logic high signal until the display device is turned off, and outputs a logic low signal when the display device is turned off. In addition, before the supply of the external power supply voltage VDD is cut off, the logic state of the transmission control signal is changed from logic high to logic low. The transmission control signal maintains a constant voltage of about 1.3V at a logic high state until the display device is turned off. As a result, the panel discharging unit 600 does not operate when the display device is normally driven by the discharge control signal DCS of the logic high, that is, the transmission control signal of the LVDS signal, but the display device is turned off. In this case, the gate turn-on voltage Von is simultaneously supplied to all the gate lines G1 to Gn before the supply of the external power voltage VDD is cut off, thereby discharging all the pixel capacitors Clc in the display panel 100. . As a result, the defective discharge of the liquid crystal display panel 100 may be improved when the display device is turned off. Of course, the present invention is not limited thereto, and the discharging control signal DCS may use various signals for maintaining the logic state at the instant except when the display device is turned off. In this case, the discharging control signal DCS may be provided from an external graphic controller providing the LVDS signal to the signal controller 500, or may be provided by the signal controller 500.

As illustrated in FIG. 2, the panel discharging unit 600 includes an operation signal generator 610 that generates an operation signal MS according to the discharging control signal DCS, and a plurality of operation units based on the operation signal MS. And a gate turn-on signal supply unit 620 for simultaneously supplying the gate turn-on signal Von to the gate lines G1 to Gn.

The operation signal generator 610 includes a transistor TR connected between an external power supply voltage VDD and a ground power supply VSS to generate an operation signal MS according to the discharging control signal DCS. . It is preferable to use a Bipolar Junction Transistor (BJT) as the transistor TR. The base terminal of the transistor TR is connected to the discharging control signal input terminal, the emitter terminal is connected to the ground power supply VSS, and the collector terminal is connected to the external power supply voltage VDD and the operation signal output terminal. In this case, the collector terminal may be connected to a reference voltage GVDD. As shown in the figure, a resistor may be provided between the discharging control signal input terminal and the base terminal, and between the collector terminal and the external power supply voltage. In this case, when the discharging control signal DCS is logic high, the transistor TR is turned on so that the operation signal MS has the ground power level VSS. That is, the operation signal MS is in a logic low state. On the other hand, when the discharging control signal DCS is logic low, the transistor TR is turned off so that the operation signal MS has an external power supply voltage VDD. That is, the operation signal MS is in a logic high state. Of course, the above-described operation signal generator is not limited thereto, and may use various inverters for inverting driving.

The gate turn-on signal supply unit 620 includes a plurality of thin film transistors T1 to Tn that are driven according to the operation signal MS to supply the gate turn-on voltages Von to the gate lines G1 to Gn. The plurality of thin film transistors T1 to Tn are connected in series with the same number as that of the plurality of gate lines G1 to Gn. The drain terminals of the first to n-1 thin film transistors T1 to Tn-1 are respectively the first to n-1 gate lines G1 to Gn-1 and the second to nth thin film transistors T2 to Tn. Is connected to the source terminal. That is, the drain terminal of the front thin film transistor is connected to the source terminal of the rear thin film transistor, and the gate line is connected to the node which the drain terminal and the source terminal connect. The drain terminal of the n th thin film transistor Tn is connected to the n th gate line Gn, and the source terminal of the first thin film transistor T1 is connected to the gate turn-on voltage input terminal. Here, the gate terminals of the first to nth thin film transistors T1 to Tn are connected to the operation signal input terminal. As a result, when a logic high (that is, an external power supply voltage VDD) is applied to the gate turn-on signal supply unit as the operation signal MS, the first to n th thin film transistors T1 to Tn are turned on at the same time, and thus the first to n th times. The gate turn-on voltage Von is applied to the gate lines G1 to Gn.

The backlight unit 700 is provided under the liquid crystal display panel 100 to supply light to the liquid crystal display panel 100. The backlight unit 700 preferably uses an edge type type including a light source (not shown) and a light guide plate (not shown). Of course, the present invention is not limited thereto, and a direct type in which a plurality of light sources (not shown) are disposed on one plane may be used. In this case, a cold cathode fluorescent lamp (CCFL) may be used as the light source, or a light emitting diode (LED) may be used. The light source of the backlight unit 700 emits light by an externally applied power source.

Hereinafter, the turn-off operation of the display device of the present embodiment will be described with reference to the waveform diagram of FIG. 3.

Before the display device is turned off, the external power supply voltage VDD and the LVDS signal are continuously provided to the signal controller 500. At this time, the discharging control signal DCS is maintained at a logic high state. Of course, at this time, the backlight unit 700 provides light to the liquid crystal display panel 100 by an externally supplied power source for the backlight unit BLP. The gate driver 200 is operated by the signal controller 500 to sequentially turn on the gate lines G1 to Gn as shown in the waveform diagram of FIG. 3. In this case, the signal controller 500 processes the raw data of the LVDS signal and provides the raw data of the LVDS signal to the data driver 300, and the data driver 300 converts the raw data of the LVDS signal into grayscale data signals and supplies them to the plurality of data lines D1 to Dm. . As a result, when the gate turn-on voltage Von is applied to one gate line, the thin film transistor T in all the pixels connected thereto is turned on. In this case, the gray level data signal supplied to the data line is charged to the pixel electrode used as one electrode terminal of the liquid crystal capacitor Clc and the sustain capacitor Cst in the pixel through the turned-on thin film transistor T.

On the other hand, when the display device is turned off, first, as shown in the figure, the supply of the backlight unit power BLP supplied to the backlight unit 700 is cut off. As a result, the light supplied to the liquid crystal display panel 100 through the backlight unit 700 is blocked.

Since the supply of the LVDS signal and the input control signal is cut off, the logic state of the discharging control signal DCS changes to logic low. This is because the external signal that was supplied from the external graphic controller is blocked by the turn off command of the display device. Accordingly, the signal controller 500 is turned off, and the gate driver 200 and the data driver 300 which are driven according to the control signals of the signal controller 500 are turned off. The panel discharging unit 600 applies the gate turn-on voltage Von to all the gate lines G1 to Gn of the liquid crystal display panel 100 according to the discharging control signal DCS. The grayscale data signal charged to the pixel electrode of the pixel is discharged. At this time, when the logic state of the discharging control signal DCS is changed from logic high to logic low by the turn-off operation of the display device, the transistor TR of the operation signal generator 610 is turned off to operate the logic high. Generate signal MS. Subsequently, all of the thin film transistors T1 to Tn connected in series of the gate turn-on signal supply unit 620 receiving the logic high operation signal are turned on, and through this, the gate turn-on voltage Von is changed to all of the liquid crystal display panel 100. Supply to gate lines G1 to Gn. The thin film transistor T1 connected to each gate line G1 to Gn is turned on and the grayscale data signal charged to the pixel electrode is discharged through the data lines D1 to Dm.

Subsequently, the supply of the external power supply voltage that has been supplied to the display device is cut off to completely stop the driving of the display device.

In this case, conventionally, since the backlight unit 700 is turned off during the turn-off operation of the display device, each pixel in the liquid crystal display panel 100 is applied to each pixel during the period in which the supply of external power supplied to the display device is completely blocked. The gradation data signal, which was supplied immediately before being turned off, is not discharged and remains charged. This is because when the thin film transistor T in the pixel is turned off, the pixel electrode used as one electrode terminal of the liquid crystal capacitor Clc and the storage capacitor Cst remains in a floating state, and the grayscale data signal charged in the pixel electrode is maintained. This is because there is no separate path for discharging to the outside. However, in the present embodiment, the panel discharging unit 600 is provided so that the time between when the external power supply is completely cut off (preferably between the time when the backlight unit 700 is turned off and when the external power supply is cut off). The grayscale data signals in the pixel electrodes may be discharged through the data lines D1 through Dm by simultaneously turning on all the thin film transistors T in the liquid crystal display panel 100. This may prevent problems due to poor discharging, such as a screen disappearing or an afterimage phenomenon between the time when the backlight unit 700 is turned off and when the supply of external power is cut off.

As described above, the present invention can completely discharge the grayscale data signal charged in the liquid crystal display panel when the display device is turned off, thereby improving the discharge failure.

Although the invention has been described with reference to the accompanying drawings and the preferred embodiments described above, the invention is not limited thereto, but is defined by the claims that follow. Accordingly, one of ordinary skill in the art may variously modify and modify the present invention without departing from the spirit of the following claims.

Claims (9)

A display panel including a plurality of gate lines connected to the plurality of pixels; A controller controlling the operation of the display panel by driving according to a control signal; And And a panel discharging unit configured to apply a gate turn-on voltage to the plurality of gate lines according to the discharging control signal. The method according to claim 1, The panel discharging unit, An operation signal generator configured to output an operation signal having a logic high according to the discharging control signal; And And a gate turn-on signal applying unit configured to apply the gate turn-on voltage to the plurality of gate lines in response to the operation signal. The method according to claim 2, And the operation signal generator includes a transistor having a base terminal connected to the discharging control signal input terminal, an emitter terminal connected to a ground power supply, and a collector terminal connected to a power supply voltage and an operation signal output terminal. The method according to claim 2, And a plurality of thin film transistors driving the gate turn-on signal applying unit to supply gate turn-on voltages to the plurality of gate lines, respectively. The method according to claim 4, And the plurality of thin film transistors are connected in series. The method according to claim 1, The discharging control signal maintains a constant logic state in a normal operation period of the display device, and changes its logic state before the supply of the power supply voltage is cut off when the display device is turned off. The method according to claim 1, The control signal includes an LVDS signal and a power supply voltage having an analog form of raw data and a transmission control signal for controlling the transmission thereof, wherein the transmission control signal always has a logic high state in supplying the raw data, and the raw data Logic is low when is not supplied, And the transmission control signal as the discharging control signal. Blocking supply of an image signal provided to the display panel of the display device by blocking external data supply; Discharging an image signal charged in the display panel; And Cutting off the power supplied to the display device. The method of claim 8, wherein the discharging an image signal charged in the display panel comprises: Generating a discharging control signal of a logic row due to the interruption of the external data supply; Generating an operation signal having a logic high using the dismantling control signal; And And applying a gate turn-on voltage to all gate lines in the display panel using the operation signal.

Images