KR20080054565A - Method of simple evaluation for epi. defect on single crystal epitaxial wafer - Google Patents

Abstract

A method of evaluation for epi defects of a single crystal epitaxial wafer is provided to check up a beginning point of an epi defect or a defect source, and to trace a process in which the epi defects are generated. A method of evaluation for epi defects on a single crystal epitaxial wafer comprises following steps of: checking up a location of a defect of a single crystal epi wafer through a particle counter or naked eyes(S10); checking up the defects in a focused ion beam apparatus, and selecting an ion milling section location of the epi wafer(S20); performing the ion milling until the epi defects are revealed by irradiating the focused ion beam(S30); separating the boundary between the wafer and the epi layer; cleaning and drying the epi wafer; evaluating the epi defects by observing a processed section by using the FIB apparatus or an electronic microscope(S50).

Description

Epi defect evaluation method of single crystal epi wafer {Method of simple evaluation for Epi. Defect on single crystal epitaxial wafer}

The following drawings attached to this specification are illustrative of preferred embodiments of the present invention, and together with the detailed description of the invention to serve to further understand the technical spirit of the present invention, the present invention is a matter described in such drawings It should not be construed as limited to.

1 is a photograph of a specimen of a single crystal silicon epi wafer prepared according to the prior art and observed defects simultaneously appearing on the epi layer and the silicon wafer by transmission electron microscopy.

2 is a flowchart illustrating a procedure of an epitaxial defect evaluation method of a single crystal silicon wafer according to a preferred embodiment of the present invention in sequence with an actual photograph.

3 is a photograph of a cross-sectional processing point of the epi wafer observed in step S50 of FIG.

Figure 4 is a photograph of the cross-sectional processing point of the other specimen produced in accordance with a preferred embodiment of the present invention.

The present invention relates to a method for evaluating epitaxial defects of a single crystal epitaxial wafer. More specifically, the present invention relates to a method for evaluating epitaxial defect sources of single crystal epitaxial wafers by combining a cross sectional processing by an integrated ion beam (FIB) and a selective etching method. It relates to an epi defect evaluation method that can be easily distinguished and traced to the process of defect generation.

 Single crystal silicon epitaxial wafers used in semiconductor device manufacturing have been applied to various high-end electronic devices because the crystal defects on the surface of general silicon wafers and the defects generated during wafer processing are excluded. However, in the case of an epi wafer, defects may occur in the epi layer surface and the epi layer by the wafer surface state where the epi layer is grown and the contamination source of the epi growth chamber. Therefore, defects occurring in the epi layer surface and the epi layer are more important to control when the epi wafer is manufactured than the silicon wafer on which the epi layer is grown.

The major epitaxial defects generated during the production of single crystal epitaxial wafers include lamination defects and mounds. These defects may be caused by fine particles existing on the wafer surface on which the epi layer is deposited or particles mixed with the reaction gas during the growth of the epi layer, and may cause inadequate epi growth conditions, that is, thermal imbalance in the surface of the wafer and epi reaction. It is also caused by an improper composition ratio of the gas mixed into the chamber.

Conventionally, in order to accurately determine the cause of epi defects caused by various factors, the location of the defects is identified by a particle counter, and the ion milling method or the manual polishing method using the FIB equipment based on the identified position. The cross section of the defect was fabricated using a specimen, and the method of observing the cross section of the corresponding epi defect with high magnification by transmission electron microscope was mainly used. However, such a method has a burden of using an expensive transmission electron microscope, and there is a problem in that a large amount of time is required for observation of the transmission electron microscope and a pretreatment process for producing a specimen very precisely is accompanied. In addition, it is difficult to clearly distinguish the boundary between the wafer and the epi layer with the transmission electron microscope. This is because both the silicon wafer and the epi layer are made of the same silicon atom. Therefore, when using a transmission electron microscope, it is difficult to accurately determine whether epi defects are generated in an epitaxial growth process or microparticles or crystal defects that existed on a wafer before epitaxial growth.

FIG. 1 shows a photograph of a defect 10 simultaneously observed on an epitaxial layer and a silicon wafer by a transmission electron microscope. Referring to the drawings, there is considerable difficulty in analyzing what is causing the defect 10 because the boundary between the silicon wafer and the epi layer is not exactly represented.

Therefore, in the technical field to which the present invention belongs, the research on the epitaxial defect evaluation method that can easily determine the cause of the epitaxial defect is continuously made.

The present invention was devised to solve the above-described problems of the prior art, and it is possible to easily and quickly identify the starting point of the epi defect and the location of the defect source, and to distinguish the boundary between the epi layer and the wafer so as to generate the epi defect. An object of the present invention is to provide a method for evaluating epi defects of a single crystal epi wafer capable of accurately tracking a process and a source of occurrence.

According to an aspect of the present invention, there is provided a method for evaluating epi defects of a single crystal epi wafer, comprising: (a) identifying a defect position of a single crystal epi wafer through a particle counter or visual observation; (b) selecting a cross-sectional machining position of the epi wafer by identifying defects in the FIB apparatus based on the information obtained from step (a), and (c) irradiating an integrated ion beam around the cross-sectional machining position with the FIB apparatus. Cross-sectional processing (ion milling) until the epi defects are revealed, (d) dropping the selective etching solution at the cross-sectional processing point to separate the boundary between the wafer and the epi layer, and (e) cleaning and drying the epi wafer. And (f) evaluating the epitaxial defect by observing the cross-section of the epi wafer using FIB equipment or electron microscope equipment.

In the present invention, the selective etching solution depends on the type of material constituting the wafer and the epi layer. In the case where the epi wafer is a single crystal silicon epi wafer, it is preferable to use a light, Secco, or Sirtl etching solution as the selective etching solution. As for the addition amount of the selective etching solution, 0.5 to 10 ml, and etching holding time are about 5 to 30 second are preferable.

Preferably, deionized water is used to clean the epi wafer of step (e). At this time, the washing time is preferably 60 to 300 seconds.

Preferably, the electron microscope device is a scanning electron microscope or an integrated ion beam (FIB) or a transmission electron microscope.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms or words used in the present specification and claims should not be construed as being limited to the common or dictionary meanings, and the inventors should properly explain the concept of terms in order to best explain their own invention. Based on the principle that can be defined, it should be interpreted as meaning and concept corresponding to the technical idea of the present invention. Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiments of the present invention and do not represent all of the technical idea of the present invention, various equivalents that may be substituted for them at the time of the present application It should be understood that there may be water and variations.

On the other hand, a preferred embodiment of the present invention will be mainly described in the case where the single crystal epi wafer to be subjected to epi defect evaluation is a single crystal silicon epi wafer. However, the present invention is not limited to the specific kind of single crystal epi wafer. Therefore, it is known in advance that the kind and dropping time of the selective etching solution, the kind and cleaning time of the cleaning solution can be changed depending on the type of the single crystal epi wafer.

2 is a flowchart illustrating a procedure of an epitaxial defect evaluation method of a single crystal silicon wafer according to a preferred embodiment of the present invention in sequence with an actual photograph.

Referring to the drawings, the epitaxial defect evaluation method according to the present invention, first checks the position of the epitaxial defect 30 generated in the single crystal silicon epitaxial wafer 20 by using a particle counter or by visual observation (S10). Then check the epi-defect location is confirmed in the FIB equipment (S20). Up to now, it is the same as the conventional method. However, in the present invention, the epitaxial fabrication is performed using an integrated ion beam, and the epitaxial defect is observed using a transmission electron microscope. Section processing is performed until a defect is exposed (S30). This step S30 is a kind of dry etching process.

When the epi defect is exposed through the process of step S30, the end face processing using the integrated ion beam is stopped, the epi wafer is taken out from the FIB apparatus, and the selective etching solution is added dropwise to the end face machining point (S40). At this time, it is preferable that the selective etching solution is a light, Secco or a Sirtl etching solution, and the dropping amount of the etching solution is 0.5 to 10 ml, and the selective etching holding time after the dropping of the etching solution is set to 10 to 20 seconds. . When the selective etching solution is added dropwise to the epi wafer in step S40, since the etching rates of the silicon epitaxial layer, the silicon wafer, and the defect site are different, the interface and the epitaxial defect between the epitaxial layer and the wafer are clearly revealed.

Next, the epitaxial wafer on which the selective etching is completed is cleaned so that the selective etching no longer proceeds. Preferably, deionized water is used as the cleaning liquid, and the cleaning holding time is maintained at 60 to 300 seconds. Once the cleaning is complete, the epi wafer is dried for a sufficient time to completely remove the moisture present at the cross-section point. This completes the fabrication of the specimen for observation of epi defects.

When the specimen is completed through the above-described process, the epi wafer is introduced again into the FIB equipment and the cross-section processing point is observed to evaluate the location and cause of occurrence of the epi defect (S50).

FIG. 3 is an enlarged view of an actual photograph of a cross-sectional processing point observed using the FIB device at step S50 of FIG. 2. Referring to the drawing, the cross-section process was performed to clarify the boundary and epi-defect between the silicon epi layer and the silicon wafer by performing a selective etching process after cross-sectioning the point where the epi defect occurred using the integrated ion beam. can confirm. In the photograph shown in the figure, considering that the starting point 40 of the epi defect is located on the upper surface of the silicon wafer, the cause of the epi defect can be evaluated as the fine particles present on the silicon wafer.

Figure 4 shows an actual picture of the cross-sectional processing point of another specimen produced in accordance with a preferred embodiment of the present invention. Referring to the figure, since the starting point 50 of the epi defects is spaced apart from the surface of the silicon wafer, the cause of the epi defects can be evaluated as the fine particles incorporated with the reaction gas during epi growth.

In the above-described embodiment, the point where the defect occurrence point was cross-sectional processed by the integrated ion beam was observed using FIB equipment, but in some cases, the cross-section processing point was performed by using an electron microscope device such as a scanning electron microscope or a transmission electron microscope. It may be apparent to those skilled in the art to which the present invention pertains.

As described above, although the present invention has been described by way of limited embodiments and drawings, the present invention is not limited thereto and is intended by those skilled in the art to which the present invention pertains. Of course, various modifications and variations are possible within the scope of equivalents of the claims to be described.

 According to the present invention, it is possible to easily and quickly identify the start point of the epi defect and the position of the defect source, and to distinguish the boundary between the epi layer and the wafer so that the process and source of the epi defect can be accurately tracked.

Claims (6)

(a) identifying the defect location of the single crystal epi wafer through particle counter or visual observation; (b) selecting a cross-sectional processing position of the epi wafer by identifying defects in an integrated ion beam (FIB) device based on the information obtained from step (a); (c) irradiating an integrated ion beam around the cross-section location with a FIB device to perform cross-section processing (ion milling) until an epi defect is revealed; (d) adding a selective etching solution to the cross-sectional processing point to separate the boundary between the wafer and the epi layer; (e) cleaning and drying the epi wafer; And (f) observing the cross-section of the epi wafer using FIB equipment or electron microscopy equipment to evaluate the epi defects; epi defect evaluation method for a single crystal epi wafer. The method of claim 1, The epi wafer is a single crystal silicon epi wafer, The selective etching solution is a light, Secco or Sirtl etching solution, characterized in that the epitaxial defect evaluation method of a single crystal epi wafer. The method according to claim 1 or 2, The dropwise addition amount of the selective etching solution is 0.5 to 10ml epitaxial defect evaluation method of a single crystal epitaxial wafer. The method according to claim 1 or 2, The etching time is maintained after the dropping of the selective etching solution is an epitaxial defect evaluation method of a single crystal epitaxial wafer, characterized in that 5 to 30 seconds. The method of claim 1, Deionized water is used to clean the epi wafer of step (e). The cleaning time is 60 to 300 seconds, the epitaxial defect evaluation method of a single crystal epi wafer. The method of claim 1, The electron microscopy equipment is a scanning electron microscope integrated ion beam or a transmission electron microscope characterized in that the epitaxial defect evaluation method of a single crystal epitaxial wafer.

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