KR20080051341A - Electron parts package - Google Patents

Abstract

A semiconductor package is provided to prevent production of a yellow strip by forming a phosphor layer of uniform thickness on the basis of all light emitting surfaces of a light emitting device. A substrate(40) has a cavity with a bottom surface which is used as a light emitting device mounting region. A stepped portion(54) is formed on the inner surface of the cavity, and contacts the light emitting device mounting region. A light emitting device(42) is mounted on the light emitting device mounting region, and is spaced apart from the stepped portion. A phosphor layer(46) is filled in a space between the stepped portion and the light emitting device to enclose the light emitting device. An interval between lateral light emitting surfaces of the light emitting device and a side of the stepped portion is equal to a distance between upper light emitting surfaces of the light emitting device and an upper surface of the phosphor layer.

Description

Electronic parts package

1 is a schematic structural diagram of a semiconductor package employed to explain a conventional yellow band phenomenon.

2 and 3 are views illustrating a conventional yellow band phenomenon on the basis of a sample.

4 is a schematic structural diagram of a conventional semiconductor package proposed to remove a yellow band phenomenon.

5 is a schematic structural diagram of another conventional semiconductor package proposed to remove the yellow band phenomenon.

6 to 8 are views employed to explain the problem when using a conventional stenciling technique.

9 is a configuration diagram of an electronic component package according to a first embodiment of the present invention.

10 is a configuration diagram of an electronic component package according to a second embodiment of the present invention.

11 is a configuration diagram of an electronic component package according to a third embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

40 substrate 42 light emitting element

44: wire 46: phosphor layer

48: light transmitting part 50: internal electrode

52 plating layer 54 step

56: auxiliary step portion 58: the dam

The present invention relates to an electronic component package, and more particularly, to an electronic component package capable of outputting white light.

Light emitting diodes (hereinafter, referred to as LEDs) are semiconductor devices capable of realizing various colors. The LED constitutes a light emitting source by changing compound semiconductor materials such as GaAs, AlGaAs, GaN, InGaN, and AlGaInP. At present, many such semiconductor devices have been adopted in the form of packages in electronic components.

Packaged semiconductor devices (ie, semiconductor packages) are now widely used as light sources in lighting fixtures such as flashlights and camera flashes.

However, when all kinds of reflectors and lenses, including flashlights for narrowing the angle of view and for collecting light in one place, illuminate the subject with a yellow stripe along the edge of the illuminated light ( yellow ring is generated. In the case of a normal camera flash, the yellow band generated when taking a picture is a major cause of deterioration of the picture quality.

Referring to Figures 1 and 2 will be described the cause of the yellow band generation. The semiconductor package of FIGS. 1 and 2 is a structure commonly used.

In the semiconductor package 1 of FIG. 1, an LED chip 14 is mounted in a cavity 12 of a ceramic substrate 10. Light from the LED chip 14 passes through the phosphor (not shown) in the cavity 12 and is emitted forward. The semiconductor package 1 of FIG. 1 is a schematic structure, in which pattern electrodes, wires, and the like are omitted. The phosphor, not shown, is formed inside the cavity 12.

In the case of the semiconductor package 1 of FIG. 1, light (eg, blue light) in the LED chip 14 is output as white light via a phosphor (eg, yellow) in the cavity 12.

Looking at the movement path until the light emitted from the LED chip 14 is converted to white, the movement path that is emitted after hitting the innermost wall of the cavity 12, such as (1) and the shortest distance (2) It is a considerably longer moving path than ①).

Until the light in the LED chip 14 passes completely through the phosphor in the cavity 12, there are movement paths of different lengths, such as? And?. Due to the difference in the length of the moving path, the yellow band phenomenon occurs, in particular, due to the longer moving path.

The semiconductor package of FIG. 2 has the same configuration as the semiconductor package of FIG. 1 except for the difference in the shape of the cavity. As shown in FIG. 2A, the thickness (width) of the phosphor layer 16 (that is, the inside of the cavity filled with the phosphor) that surrounds the LED chip 14 is equal to all the light of the LED chip 14. They are not uniform with respect to the emitting surface but are different. When a secondary reflector (that is, an external reflector installed on the front surface of the semiconductor package 20, not shown in the drawing) is mounted, a yellow band YR occurs as shown in FIG. 2B or 3. do. In FIGS. 2 and 3, reference numeral 20 denotes a semiconductor package used as a sample for experiments, and has a condition of 5050 size, 30 mils, and a directivity angle of 60 degrees. In Fig. 3, reference numeral 22 denotes a secondary reflector (external reflector).

Accordingly, as shown in FIG. 4, a flip chip type in which the phosphor layer 34 is coated with the same thickness on all surfaces of the flip chip 32 (LED chip) mounted on the base substrate 30. The semiconductor package of was presented. In the semiconductor package of FIG. 4, the thicknesses of the phosphor layers 34 coated on the top and left and right sides of the flip chip 32 are the same. The phosphor layer 34 is formed by a spray technique, a screen printing technique, a dipping technique, a stenciling technique, or the like. Here, the spray technique, the screen printing technique, and the dipping technique are easily understood by those skilled in the art, and thus, further description thereof will be omitted. Stenciling techniques can be found in US patent application Ser. No. 09/688053.

Since the lengths of the moving paths until the light emitted from the flip chip 32 passes through the phosphor layer 34 are the same, the yellow band phenomenon is eliminated. Of course, as shown in FIG. 5, there may be a semiconductor package in which the phosphor layer 34 having a predetermined thickness is coated only on the upper surface of the flip chip 32. This is because most of the light emitted from the flip chip 32 is emitted through the light emitting surface of the upper surface. The structure of FIG. 5 has a slightly lower yellow strip removal rate than that of FIG.

Therefore, when the semiconductor package is constructed by adopting the structure as illustrated in FIG. 4, the yellow band can be removed.

However, the semiconductor package of FIG. 4 is suitable for a structure in which the flip chip 32 is mounted on the base substrate 30 of the flat plate. As shown in FIGS. 1 and 2, the manufacturing process is fundamentally different from the structure in which the cavity is formed in the substrate 10 and the LED chip 14 is mounted in the cavity, and the flip chip is applied to the structure shown in FIGS. 1 and 2. Very difficult to make That is, the structure of FIG. 4 is suitable for a semiconductor package using a flip chip type LED chip, but is difficult to apply to a stacked semiconductor package having a cavity as shown in FIGS. 1 and 2.

4, when the phosphor layer 34 is formed around the flip chip 32 by a spray technique, a screen printing technique, a dipping technique, a stencil technique, or the like, substantially the phosphor layer 34 is uniformly applied. It is very difficult to do

However, stenciling techniques are employed a lot, but stenciling techniques also have the following problems. In order to use the stencil technique, a stencil 36 as shown in FIG. 6 is prepared. In the stencil 36, holes 36a to 36f are formed at the same positions as flip chips 32a to 32f disposed on the base substrate 30. The height and width of the holes 36a to 36f are larger than the height and width of the flip chips 32a to 32f. Stencil 36 is formed of, for example, a stainless steel sheet. When the stencil 36 is placed on the upper surface 31 of the base substrate 30, it becomes as shown in FIG. 7 shows the flip chip 32a, 32b, and 32c sections in cross section. In the state as shown in Fig. 7A, phosphor layers 34a, 34b, and 34c (phosphor layers are formed by mixing silicon and phosphor) are injected into holes 36a, 36b, and 36c, and then cured under predetermined conditions. (See FIG. 7B). At this time, the stencil 36 is removed before the curing is completed, and when the curing is completed, as shown in FIG.

However, in the conventional stenciling technique, a bulge 35a is formed at the upper left and right ends of the phosphor layer 34 as shown in FIG. 8 in the process of removing (ie, lifting) the stencil 36. The tail 35b is formed at lower left and right ends of the phosphor layer 34. Since the yellow band is generated by the bulge 35a and the desired optical properties are not obtained by the bulge 35a and the tail 35b, a process of subsequently removing the bulge 35a and the tail 35b must be performed. There is a hassle. In FIG. 8, only one flip chip 32 and one phosphor layer 34 are shown, and the flip chip 32 represents any one of the plurality of flip chips 32a, 32b, and 32c of FIG. 7. ) May represent any one of the plurality of phosphor layers 34a, 34b, 34c in FIG.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above-mentioned conventional problems, and an object thereof is to provide an electronic component package that can easily remove a yellow stripe from a package using a multilayer ceramic substrate.

In order to achieve the above object, in the electronic component package according to the preferred embodiment of the present invention, a cavity having a bottom surface as a light emitting device mounting region is formed, and is formed stepped at right angles to an inner surface of the cavity, and A substrate having a stepped portion in contact; A light emitting device mounted on the light emitting device mounting area and spaced apart from the stepped portion; And a phosphor layer filled in the space between the stepped portion and the light emitting element and surrounding the light emitting element, wherein the distance between all the light emitting surfaces on the side of the light emitting element and the side surfaces of the stepped portions opposite thereto and all the light emitting on the upper surface of the light emitting element The distance between the surface and the upper surface of the phosphor layer opposite thereto is the same.

Here, an internal electrode is formed on the horizontal surface of the stepped portion, and is plated to a predetermined height of the vertical surface of the stepped portion.

Alternatively, stepped auxiliary stepped portions may be formed at right angles along the edges of the stepped portions. In this case, an internal electrode is formed on the horizontal surface of the stepped portion except the auxiliary stepped portion, and the vertical surface of the stepped portion except the auxiliary stepped portion is plated.

Alternatively, a dam having a predetermined height may be formed at the corner portion of the stepped portion. In this case, an internal electrode is formed on the horizontal surface of the stepped portion except the dam, and the vertical surface of the stepped portion is plated, but is plated to the bottom of the dam.

The light emitting element is electrically connected to the internal electrode through a wire.

Incidentally, you may add the light transmission part formed in the upper part of a fluorescent substance layer, and the light transmitted from the light emitting element which passed the fluorescent substance layer to permeate | transmit. Here, the light transmitting portion is made of a diffuser layer containing a diffuser.

Hereinafter, an electronic component package according to an embodiment of the present invention will be described with reference to the accompanying drawings. Hereinafter, the electronic component package will be described using a semiconductor package (that is, an LED package) employing an LED chip as an optimal embodiment. In addition, the following electronic component packages may be applied to all SMD type packages such as ceramic packages, plastic packages, lead frame type packages, and plastic + lead frame type packages.

(First embodiment)

A first embodiment of the present invention will be described with reference to FIG.

In the first embodiment, the substrate 40 in which the cavity is formed, the stepped portion 54 formed at a right angle on the inner surface of the cavity, the light emitting element 42 mounted on the light emitting element mounting region in the cavity, and the light emitting element 42 The phosphor layer 46 enclosed therebetween, and the light transmitting portion 48 formed on the phosphor layer 46.

The substrate 40 can be any substrate as long as it can mount the light emitting element 42 at a high density. The substrate 40 may be made of alumina, quartz, calcium zirconate, forsterite, SiC, graphite, fused silica, mullite, cordierite ( cordierite, zirconia, beryllia, aluminum nitride, low temperature co-fired ceramic (LTCC), plastics, and the like.

The cavity (hole) means a space in which the light emitting element 42, the wire 44, the phosphor layer 46, the light transmitting part 48, and the like are installed. The step 54 may also be said to be part of the cavity. The meaning of the cavity is also applied to other embodiments below. The cavity forming method is easily understood by those skilled in the art and will not be described separately.

There may be various methods of manufacturing the substrate 40 in which the cavity is formed, and one of the methods will be described below. A process such as mounting the light emitting element 42 on the manufactured substrate 40, bonding the wire 44, or the like can be sufficiently performed by techniques well known to those skilled in the art, and thus description thereof is omitted.

When the substrate 40 of FIG. 9 is cut horizontally, the substrate 40 may be classified into three sub-substrates. The portion where the cavity (hole) is not formed is called the first sub substrate, and the portion of the substrate between the horizontal plane 54a and the vertical plane 54b of the stepped portion 54 is called the second sub substrate, and the horizontal plane 54a is referred to. Let's call the further part the third sub substrate. The first sub substrate has no holes, and the second and third sub substrates only differ in the diameter of the holes. The first to third sub substrates are basically the same in that they are manufactured by laminating ceramic sheets.

In order to manufacture the first to third sub-substrates, first, a ceramic sheet must be manufactured.

The manufacturing method of this ceramic sheet is as follows.

A glass ceramic powder of a predetermined weight is prepared. PVB-based binder (binder) is measured by weight parts compared to the glass ceramic powder. The measured PVB binder is dissolved in toluene / alcohol solvent and blended together in the glass ceramic powder.

The blended glass ceramic powder is placed in a container, rotated and mixed uniformly. For example, a glass ceramic powder having a desired particle size is obtained through a ball mill at 50 rpm for about 20 hours. The examples of 50 rpm and 20 hours are just examples and vary depending on the diameter and amount of balls in the ball mill, the amount of solvent and binder, and the like.

After milling in a ball mill, the first blended glass ceramic powder is discharged in the form of a slurry. Since some bubbles exist in the discharged slurry, defoaming is performed to remove bubbles in the discharged slurry. In order to prevent the slurry surface from drying rapidly during defoaming, the slurry is kept under vacuum for a predetermined time while stirring.

The mixed raw material (ie, in the form of a slurry) subjected to the defoaming process is formed into a sheet. That is, after installing the film and the blade (blade) on the tape caster, while slowly transferring the film, the degassed slurry is introduced, and the slurry passed through the blade is dried to produce a ceramic sheet having a desired thickness (for example, 20 to 150 μm on the film). Rolls in the form of green sheets).

Then, the ceramic sheet wound on the roll is cut to a certain size (dimension) so that it can be easily worked in a later process.

When a ceramic sheet having a predetermined size is manufactured in this way, a via hole is formed in the cut ceramic sheet, and the via hole is filled with a conductor paste. The via hole serves to connect the interlayer circuits. Then, conductive pastes such as Ag, Pt, and Pd are formed on the ceramic sheet by a thin film manufacturing method such as screen printing, or a thin film manufacturing method such as sputtering, evaporation, vapor chemical vapor deposition, and sol-gel coating to form an internal circuit suitable for each layer. A ceramic sheet is formed in which a pattern (eg, a resistance pattern, a capacitor pattern, an inductor pattern, a varistor pattern, etc.) is formed.

When manufacturing a ceramic sheet having an internal circuit pattern formed as described above, after drying each ceramic sheet, the ceramic sheets are collectively laminated so as to form a desired molded body (that is, a molded article for the first to third sub-substrates). Then, the laminated ceramic sheet is pressurized at a pressure of about 3000 psi and a temperature of about 80 to 100 ° C. to form a molded body. Exemplary pressures of about 3000 psi and temperatures of about 80 to 100 ° C. are merely examples and may vary according to circumstances.

 When the molded body is made, no holes are formed in the molded body for the first sub substrate, and holes of different diameters are formed in the molded bodies for the second and third sub substrates. The molded article for the first sub-substrate with no holes is called the first sub-substrate, and the molded article for the second and third sub-substrate with the holes having different diameters is called the second and third sub-substrate.

Then, Ag paste is applied to a portion where the internal electrode 50 (for example, an anode and a cathode) is to be formed, and Ag paste is applied to a portion where the plating layer 52 is to be formed, followed by sintering at a temperature of about 800 to 1000 ° C.

Subsequently, the substrate 40 is formed when the first sub substrate is placed at the bottom and the second sub substrate is laminated thereon, and the third sub substrate is laminated thereon and co-fired.

Then, Ni plating and Ag plating are sequentially performed to increase the reflection efficiency on the layer (that is, the conductive layer) formed by the Ag paste. Ni prevents the Ag plating layer from peeling off during the reflow process after SMT for mounting the LED package. The reason why Ag is used again is that wire bonding is possible and serves as a plating layer for reflecting light. At this time, the plating of white or transparent color is advantageous to increase the light reflection efficiency.

The internal electrode 50 may be regarded not only as a pattern electrode (anode and cathode) but also as a reflector.

The light emitting element 42 is made of a chip type LED. The light emitting element 42 is mounted in the light emitting element mounting region on the bottom of the cavity. The light emitting element 42 may be regarded as emitting blue light.

The step portion 54 is formed of a horizontal surface 54a and a vertical surface 54b, and the lowermost end of the vertical surface 54b is in contact with the light emitting element mounting region. The light emitting element 42 is mounted in the light emitting element mounting region spaced apart from the vertical surface 54b by a predetermined value.

The height of the vertical surface 54b is higher than the height of the light emitting element 42, and the length (width) between the mutually opposing vertical surfaces 54b is longer than the length (width) of the light emitting element 42.

Internal electrodes (eg, anodes and cathodes) 50 are formed on the horizontal surface 54a. The plating layer 52 is formed on the vertical surface 54b, but the plating layer is not formed on the upper predetermined portion. The portion where the plating layer is not formed is approximately 0.1 mm downward from the top of the vertical surface 54b. Even if a non-plated layer of about 0.1 mm is formed, it does not interfere at all in light reflection efficiency. The internal electrode 50 and the plating layer 52 are insulated by the non-plating layer. In addition, by forming an unplated layer (that is, a layer on which no Ag paste is applied and no plating is performed) on the vertical surface 54b, the phenomenon in which the phosphor rises to the horizontal surface 54a can be eliminated. In FIG. 9, only the stepped part on the left side is enlarged, but the stepped part on the right side may also be configured to be the same as the stepped part on the left side.

The plating layer 52 is preferably formed not only on the vertical surface 54b but also up to a predetermined portion of the light emitting element mounting region that the vertical surface 54b is in contact with. This is to direct light incident on the bottom of the cavity to the opening side of the cavity. The plating layer 52 is spaced apart from the light emitting element 42. Although not shown, an insulating material is provided at a spaced portion between the plating layer 52 and the light emitting element 42. Of course, the plating layer 52 may not be formed.

The light emitting element 42 is electrically connected to the internal electrode 50 through the wire 44.

The phosphor layer 46 is a layer formed after the granular phosphor particles and silicon (or epoxy) are blended in a predetermined compounding ratio. The phosphor fine particles used for the phosphor layer 46 are usually called yellow phosphors. The operator may form the phosphor layer 46 in a manner of directly dotting using a dispenser, but mechanical automatic processing may be superior in workability and reliability. In particular, compared to the stenciling technique, since the first embodiment uses a dotting method, the phosphor layer 46 can be formed very simply. In addition, since the bulge and the tail generated in the stenciling technique are not generated, no additional work for removing the bulge and the tail is necessary.

The phosphor layer 46 has a viscosity of about 200 to 1500 mPas in consideration of surface tension. If the viscosity is less than 200 mPas, since the precipitation of the phosphor occurs, it is preferable to maintain the viscosity of about 200 ~ 1500 mPas. In addition, if the viscosity is maintained at about 200 to 1500 mPas, the phosphor particles easily penetrate into the cavity (the part enclosed by the vertical surface 54b in FIG. 9). In Fig. 9, "a" is the thickness of the semiconductor package, which is about 1.8 mm. "b" is the height of the vertical surface 54b in which the phosphor layer 46 can be filled, which is approximately 0.4 mm. "c" is a distance (width) between mutually opposing vertical surfaces 54b, which is about 1.6 mm. "d1" is a distance from the upper surface of the light emitting element 42 to the uppermost surface of the phosphor layer 46 located vertically from the upper surface thereof, and is approximately 0.3 mm. " d2, d3 " is a distance from the side surface of the light emitting element 42 to the vertical surface 54b opposite thereto, and is about 0.3 mm. "e" is approximately 3.2 mm in diameter of the cavity opening. The numerical values for "a, b, c, d1, d2, d3, e" mentioned above also apply to other examples below.

The phosphor layer 46 may fill up to the highest height of the vertical surface 54b of the stepped portion 54, or may fill up to a lower height thereof, preferably having a distance equal to the distance (width) of "d2, d3". d1 "is good to fill. This is easily solved by mechanical automatic processing.

In the first embodiment, the uniform thickness of the phosphor layer 46 is simplified by adjusting the width of the cavity at the site where the light emitting element 42 is mounted so that the distances of "d1, d2, d3" are all the same. Can be implemented. The length of the movement path of all the light emitted from the light emitting element 42 and passing through the phosphor layer 46 can be substantially the same, so that white light without a yellow band is output.

The light transmitting part 48 may be formed of a transparent layer formed of a transparent silicon material or a diffuser layer containing a diffuser. In the case where the light transmitting part 48 is a diffuser layer, for example, a diffuser of Al ₂ O ₃ and silicon (or epoxy) may be blended at a predetermined compounding ratio. The diffuser has a cross section, for example a star or cogwheel shape. Since there may be a change in optical characteristics according to the blending ratio of the diffuser, the range for the blending ratio of the diffuser may be determined in consideration of the optical characteristics.

Even if the light transmitting part 48 is not provided, the yellow band is not generated. The reason for providing the light transmitting portion 48 is to protect the phosphor layer 46. If there is any yellow light incident on the light transmitting part 48 (that is, light passing through the phosphor layer 46), the diffuser absorbs, reflects, and scatters the yellow light to completely remove the yellow component. do.

Most of the light emitted from the light emitting element 42 is emitted from the light emitting surface located on the upper surface (front surface) of the light emitting element 42. The light emitted from the light emitting surface on the side of the light emitting element 42 is so small that it is negligible. When the amount of light on the light emitting surface of the upper surface of the light emitting device 42 is described in proportion, it is about 80% of the total, and when the amount of light on the light emitting surface of the side is described proportionally, it is about 20%.

According to the first embodiment configured as described above, it is very simple to uniformly apply the thickness of the phosphor layer 46 to the periphery of the light emitting element 42.

The thickness of the phosphor layer 46 is the same with respect to all the light emitting surfaces of the light emitting device 42, so that yellow bands are not generated.

White light output is possible without the use of a diffuser.

(Second embodiment)

A second embodiment of the present invention will be described with reference to FIG.

When comparing the second embodiment with the first embodiment, the difference between the stepped auxiliary stepped portion 56 is further formed at right angles along the edge of the stepped portion 54. The stepped portion 54 is formed in the shape of an air force (“a”) shape, whereas the auxiliary stepped portion 56 is formed in the shape of a needle (“b”) shape. The auxiliary step 56 is not plated. Since other parts are the same, the description is omitted. Anyone skilled in the art will appreciate that the auxiliary step portion 56 can be sufficiently formed by a known cavity forming process.

In Fig. 10, "g1, g2" means the length of the horizontal surface of the auxiliary step part 56, and is about 0.1 mm. The length of the vertical surface of the auxiliary step portion 56 is also about 0.1 mm. When the lengths of the horizontal and vertical surfaces of the auxiliary step part 56 are about 0.1 mm, respectively, the length of the movement path of the light emitted from the light emitting element 42 is hardly influenced. In Fig. 10, "f" is "g1 + g2 + c".

By eliminating the plating region, that is, by forming the non-plated auxiliary step 56 between the horizontal surface 54a and the vertical surface 54b, the phosphor is prevented from rising to the horizontal surface 54a side.

The auxiliary step portion 56 makes it possible to more reliably insulate the internal electrode 50 from the plating layer 52.

According to this second embodiment, the same effects as in the above-described first embodiment are obtained.

(Third Embodiment)

A third embodiment of the present invention will be described with reference to FIG.

As compared with the first embodiment, the third embodiment differs from the fact that a dam 58 having a predetermined height is further formed at a portion where the horizontal surface 54a and the vertical surface 54b of the step portion 54 contact each other.

The dam 58 may be regarded as performing the role of the auxiliary step 56 of the second embodiment. The dam 58 is not plated like the auxiliary step 56.

In the manufacturing process, it is difficult to form the protruding dam 58 compared with the formation of the auxiliary step 56 such as the groove. However, the formation of the dam 58 not only prevents the phosphor from rising to the horizontal surface 54a side, but also makes it possible to more reliably insulate the internal electrode 50 from the plating layer 52.

According to this third embodiment, the same effects as in the above-described first embodiment are obtained.

On the other hand, the present invention is not limited only to the above-described embodiment, but can be modified and modified within the scope not departing from the gist of the present invention, the technical idea to which such modifications and variations are also applied to the claims Must see

As described in detail above, according to the present invention, it is very simple to uniformly apply the thickness of the phosphor layer around the light emitting device.

Since the thickness of the phosphor layer is the same with respect to all light emitting surfaces of the light emitting device, yellow bands are not generated.

White light output is possible without the use of a diffuser.

The conventional semiconductor package attempts to remove the yellow stripe by the thickness of the phosphor layer, the reflecting member or the diffuser, etc. without considering the dimension at all, but the present invention can be easily performed by optimizing the dimension to remove the yellow stripe. There is an advantage that greatly contributes to the miniaturization of the package.

Claims (10)

A cavity having a bottom surface as a light emitting device mounting region, the substrate being formed at a right angle to the inner surface of the cavity and having a stepped portion in contact with the light emitting device mounting region; A light emitting device mounted on the light emitting device mounting area and spaced apart from the stepped portion; And A phosphor layer filled in a space between the stepped portion and the light emitting element and surrounding the light emitting element; Characterized in that the distance between all the light emitting surfaces on the side of the light emitting device and the side surfaces of the stepped portions opposite to each other and the distance between all the light emitting surfaces on the top surface of the light emitting device and the upper surface of the phosphor layer opposite to each other are the same; Parts package. The method according to claim 1, And an internal electrode formed on the horizontal surface of the stepped portion, and plated to a predetermined height of the vertical surface of the stepped portion. The method according to claim 1, The electronic component package, characterized in that the stepped secondary stepped portion formed at right angles along the edge of the stepped portion. The method according to claim 3, An internal electrode is formed on a horizontal surface of the stepped portion except the auxiliary stepped portion, and a vertical surface of the stepped portion except the auxiliary stepped portion is plated. The method according to claim 1, The electronic component package, characterized in that a dam of a predetermined height is formed in the corner portion of the stepped portion. The method according to claim 5, An internal electrode is formed on a horizontal surface of the stepped portion except for the dam, and the vertical surface of the stepped portion is plated, but the electronic component package is plated to the bottom of the dam. The method according to any one of claims 2 and 4 and 6, The light emitting device is an electronic component package, characterized in that electrically connected to the internal electrode through a wire. The method according to any one of claims 1 to 6, And a light transmitting portion formed on the phosphor layer and transmitting light from the light emitting element passing through the phosphor layer. The method according to claim 8, The light transmitting part is an electronic component package, characterized in that made of a diffuser layer containing a transparent layer or a diffuser formed of a transparent silicon material. The method according to any one of claims 1 to 6, The light emitting device is an electronic component package, characterized in that made of a chip-shaped light emitting diode.

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