KR20080030743A - Method of manufacturing a semiconductor device - Google Patents

Abstract

A method for manufacturing a semiconductor apparatus is provided to improve gate bridge trouble by performing a plasma nitride treatment process before forming a first spacer. A dielectric(102) and a poly silicon layer are formed on a semiconductor substrate(100). A preliminary gate structure(120) including a tungsten silicide pattern(114), a barrier metal pattern(116), a tungsten layer(118), and a mask pattern(112) is formed on the poly silicon layer. A plasma nitride treatment is performed on both sides of the preliminary gate structure and on the poly silicon layer to prevent the diffusion of an oxidizing agent in a subsequent oxidation process. First spacers(128) are formed on sidewalls of the nitride-treatment processed preliminary gate structure. An anisotropic etching process is performed on the poly silicon layer by using the first spacers as etching masks so that the gate oxide layer exposes to form a poly silicon layer pattern(126) and a gate structure(129). The gate structure includes the preliminary gate structure where the first spacers are formed. An oxidation treatment is performed on both sides of the gate structure.

Description

Method of manufacturing a semiconductor device

1 to 7 are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100 semiconductor substrate 102 gate insulating film

104 polysilicon film 106 tungsten silicide film

108: barrier metal film 110: tungsten film

112 mask pattern 114 tungsten silicide pattern

116: Barrier Metal Pattern 118: Tungsten Film Pattern

120: preliminary gate structure 122: barrier film

124: first spacer film 126 polysilicon film pattern

128: first spacer 129: gate structure

130: adhesive film 132: second spacer

134: source / drain area

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device having a gate structure including a tungsten film pattern.

In general, a memory semiconductor device such as a dynamic random access memory (DRAM) may be manufactured by repeatedly performing a series of unit processes. The unit cell of the memory semiconductor device may include one transistor and a capacitor. A transistor in a typical DRAM device may include a gate structure formed on a semiconductor substrate, such as a silicon wafer, and source / drain regions formed on both sides of the gate structure, and the capacitor may be electrically connected with one of the source / drain regions. The lower electrode and the upper electrode connected to each other may include a dielectric film formed therebetween.

In recent years, the area occupied by each cell is rapidly reduced in accordance with the demand for improving the integration density of semiconductor devices, and solutions for various problems caused by this have been actively proposed. For example, a reduction in cell area may include a short channel effect caused by a channel length reduction of a transistor, a narrow channel effect or a narrow width effect caused by a decrease in a channel width. Etc. are causing problems. Moreover, it has become a cause of operation performance deterioration, such as the fall of the carrier mobility of a transistor, and the fall of current drive capability.

Meanwhile, impurity doped polysilicon is most commonly used as a gate electrode material of the transistor, and a silicon oxide film formed by a thermal oxidation process is most commonly used as a gate insulating film. Recently, however, new gate electrode materials have been developed to meet the demands of increasing the integration density, improving operation speed, and increasing reliability of semiconductor devices, and to solve the above problems.

For example, in order to reduce the resistance of the gate electrode, a metal gate structure consisting of a film in which a doped polysilicon film, a barrier metal film, and a tungsten film as a high melting point metal film is laminated is proposed.

The metal gate structure includes a gate insulating film formed on a semiconductor substrate, a polysilicon pattern on the gate insulating film, and titanium nitride (TiN) or tungsten nitride to prevent diffusion of impurities introduced into the polysilicon film into the tungsten film. A barrier metal pattern and a tungsten film pattern made of (WN) are sequentially formed. A first spacer is formed on the sidewall of the metal gate electrode. In addition, an oxide film formed by a thermal oxidation process is formed on sidewalls of the first spacer and the polysilicon pattern, and a second spacer is formed on the sidewall of the oxide film.

In this case, in order to reduce damage to the gate insulating film and the silicon substrate generated by the plasma etching process, a high temperature heat treatment process is performed on the entire surface of the substrate including the gate electrode surface.

However, an oxidant diffuses along the interface between the first spacer and the polysilicon layer pattern during the high temperature heat treatment process of the metal gate electrode under an atmosphere of O ₂ or H ₂ O, and is formed of titanium nitride or tungsten nitride. There is a problem in that the barrier metal pattern is oxidized to grow into needle-shaped crystals. As a result, in the subsequent formation of the second spacer, the whisker may grow to cause a gate bridge, so that a process defect due to an oxidation reaction of the barrier metal pattern is a serious problem.

An object of the present invention for solving the above problems is to manufacture a new semiconductor device manufacturing method that can suppress the oxidation reaction of the barrier metal pattern made of titanium nitride or tungsten nitride by thermal oxidation of the metal gate electrode.

According to the method of manufacturing a semiconductor device according to the present invention for achieving the above object, an insulating film and a polysilicon film are formed on a semiconductor substrate. A preliminary gate structure including a tungsten silicide pattern, a barrier metal pattern, a tungsten film pattern, and a mask pattern is formed on the polysilicon film. Both sides of the preliminary gate structure and the polysilicon film are plasma nitrided to prevent diffusion of the oxidant during the subsequent oxidation process. First spacers are formed on sidewalls of the nitrided preliminary gate structure. The polysilicon layer is anisotropically etched to expose the gate oxide layer using the first spacers as a cutting mask to form a gate structure including a polysilicon layer pattern and a preliminary gate structure on which the first spacers are formed. Both sides of the gate structure are oxidized.

Preferably, second spacers may be further formed on sidewalls of the oxidized gate structure.

For example, forming a preliminary gate structure including a tungsten silicide pattern, a barrier metal pattern, a tungsten film pattern, and a mask pattern on the polysilicon film may include tungsten silicide for reducing resistance of the metal on the polysilicon film. Forming a film, forming a barrier metal film made of titanium nitride or tungsten nitride on the tungsten silicide film, forming a tungsten film on the barrier metal film, and forming a mask pattern on the tungsten film And etching the tungsten film, the barrier metal film, and the tungsten silicide film using the mask pattern to form a tungsten silicide pattern, a barrier metal pattern, and a tungsten film pattern on the polysilicon film.

According to the present invention, after forming the preliminary gate structure and before forming the first spacers on the sidewalls of the preliminary gate structure, a plasma nitridation process is performed, followed by the formation of the first spacers, the oxidation process, and the second spacers. By sequentially performing the formation process, the gate bridge problem due to oxidation of the barrier metal pattern may be improved by acting as a diffusion barrier of the oxidant in a subsequent oxidation treatment process.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments and may be implemented in other forms. The embodiments introduced herein are provided to make the disclosure more complete and to fully convey the spirit and features of the invention to those skilled in the art. In the drawings, the thicknesses of the devices or films and regions are exaggerated for clarity of the invention, and each device may include various additional devices not described herein, and the film or film may be different from each other. When referred to as being located on a substrate, it may be formed directly on another film or substrate or with an additional film interposed therebetween.

1 to 7 are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 1, a plurality of active regions (not shown) are defined by forming an isolation layer on a surface portion of a semiconductor substrate 100 such as a silicon wafer. For example, a shallow trench isolation (STI) process is performed to form an isolation layer for electrically isolating active regions from each other on a surface portion of the semiconductor substrate 100.

A gate insulating layer 102 formed of an oxide subsequently formed on the device isolation layer and the active regions is formed. The gate insulating layer 102 may be formed of silicon oxide, and may be formed by performing a thermal oxidation process. The gate insulating layer 102 may be formed using various methods such as chemical vapor deposition or atomic layer deposition, and the spirit and scope of the present invention are not limited by the method of forming the gate insulating layer 102. .

Low pressure chemical vapor deposition (LPCVD) is formed on the gate insulating layer 102 to form a polysilicon layer 104. In this case, the polysilicon film 104 may be formed by depositing a polysilicon or an amorphous silicon material, and may be doped with impurity ions in the polysilicon film.

A tungsten silicide film 106 is formed on the polysilicon film 104 to reduce the interface resistance between the polysilicon and the upper barrier metal. In this case, the tungsten silicide layer 106 may have a low resistance, and may function to reduce the resistance of the interface between the gate electrode and the polysilicon layer 104 in a gate structure that is subsequently formed.

Specifically, a tungsten film (not shown) is formed on the upper surface of the polysilicon film 104. After the tungsten film is formed, it is heated to a predetermined temperature to form tungsten silicide on the surface where the tungsten film and the polysilicon film 104 contact. Subsequently, the unreacted tungsten film is removed to form a tungsten silicide film 106 on the surface of the polysilicon film 104.

A barrier metal layer 108 is formed on the tungsten silicide layer 106 to prevent diffusion of impurities (for example, B, P, and As) introduced into the polysilicon layer. For example, the barrier metal layer 108 including titanium nitride (TiN) or tungsten nitride (WN) may be formed on the tungsten silicide layer 106. The barrier metal layer 108 may be formed using a method such as physical vapor deposition, chemical vapor deposition, atomic layer deposition, or the like.

A tungsten film 110 made of tungsten (W), which is a high melting point metal, is formed on the barrier metal film 108. The tungsten film 110 may be formed by chemical vapor deposition (CVD) at a temperature of about 500 to 650 ° C. The tungsten film 110 may function as a gate electrode in a subsequently formed gate structure.

A mask pattern 112 that functions as an etching mask for forming a gate electrode is formed on the tungsten film 110. As an example, the mask pattern 112 may be formed of silicon nitride (SiN).

Referring to FIG. 2, the tungsten film 110, the barrier metal film 108, and the tungsten silicide film 106 are etched using the mask pattern 112 to form a tungsten silicide pattern on the polysilicon film 104. A preliminary gate structure 120 including a 114, a barrier metal pattern 116, a tungsten film pattern 118, and a mask pattern 112 is formed. In this case, the polysilicon film 104 may also be partially etched.

Referring to FIG. 3, a plasma nitridation process is performed on both sides of the preliminary gate structure 120 and the upper surface of the polysilicon film 104 to prevent diffusion of an oxidant during a subsequent oxidation process. The plasma nitriding process may be performed at a temperature of 20 to 1000 ° C. and a pressure of 10 mTorr to 10 Torr, and may be performed while applying a power of 200 to 3400 W. Nitrogen (N ₂ ) gas may be provided as a reaction gas in a process chamber in which the plasma nitridation process is performed, and an inert gas such as Ar, He, Ne, Xe, or Kr may be provided as a carrier gas. In this case, the nitrogen gas may be injected into the process chamber at 20 to 2000 sccm.

The barrier layer 122 may be formed on both sides of the preliminary gate structure 120 and the surface portion of the polysilicon layer 104 by the plasma nitridation treatment. In this case, substantially, the barrier film 122 may include silicon nitride, tungsten nitride or titanium nitride.

Referring to FIG. 4, a first spacer layer 124 is formed on the nitrided preliminary gate structure 120 and the barrier layer 122 to form first spacers. The first spacer layer 124 may be formed of silicon nitride.

Referring to FIG. 5, first spacers 128 are formed on sidewalls of the preliminary gate structure 120 on the barrier layer 122 by performing an anisotropic etching process on the first spacer layer 124. To form. Subsequently, the polysilicon layer pattern 126 is formed under the preliminary gate structure 120 by continuously etching using the first spacers 128 as an etching mask until the gate insulating layer 102 is exposed. As a result, the gate structure 129 including the preliminary gate structure 120 having the polysilicon layer pattern 126 and the first spacers 128 formed thereon is formed.

In this case, the first spacers 128 are formed on the barrier layer 122 to cover the top surface of the polysilicon layer pattern 126 and the side surface of the preliminary gate structure 120. Accordingly, the first spacers 128 may function to block diffusion of an oxidant into the gate structure 129 during the subsequent oxidation process of the gate structure 129 together with the barrier layer 122. have.

Referring to FIG. 6, a selective oxidation process is performed to form exposed surface portions of the gate structure 129 as adhesive layers having enhanced adhesion. The selective oxidation treatment process may be performed by plasma oxidation treatment or thermal oxidation treatment using oxygen plasma or oxygen gas as an oxidant.

By the selective oxidation process, adhesive layers 130 including silicon oxide or silicon nitride oxide may be formed on both sides of the polysilicon layer pattern 126 and the first spacers 128. Specifically, silicon oxide may be formed by reacting polysilicon of the polysilicon layer pattern 126 with oxygen, and silicon nitride and oxygen of the first spacers 128 may react to form silicon nitrate. . In this case, since the oxidation reaction proceeds faster than silicon nitride, the thickness of the adhesive films 130 formed on the polysilicon film pattern 126 is formed on the sidewalls of the first spacers 128. It is formed thicker than the thickness of the adhesive films 130 to be.

By forming the barrier layer 122 as described above and performing a selective oxidation process, diffusion of the oxidant through the interface between the polysilicon layer pattern 126 and the first spacers 128 may be completely blocked. have. That is, it is possible to sufficiently prevent a phenomenon in which needle-shaped crystals grow by being oxidized with the barrier metal pattern 116 of the preliminary gate structure 120.

Referring to FIG. 7, second spacers 132 are formed on sidewalls of the oxidized 130 gate structure 129, and the surface of the semiconductor substrate 100 adjacent to the gate structure 129 is formed. Source / drain regions 134 may be formed in the regions to complete a semiconductor device such as a field effect transistor.

The second spacers 132 may function as gate spacers of a gate electrode having a polymetal structure, and may be formed of silicon nitride. Specifically, the second spacers 132 may be formed by forming a second spacer layer (not shown) made of silicon nitride, and then performing an entire anisotropic etching process on the second spacer layer.

The source / drain regions 134 may be formed through an ion implantation process before or after forming the second spacers 132. Alternatively, the ion implantation process may be performed before and after the second spacers 134, respectively, to include a low concentration impurity region and a high concentration impurity region.

According to the present invention as described above, after forming the preliminary gate structure and before forming the first spacers on the sidewalls of the preliminary gate structure, a plasma nitridation process is performed, thereby forming the first spacers and then performing an oxidation process. And preventing the diffusion of the oxidant in the oxidation process during the formation of the second spacers. Therefore, the gate bridge problem caused by oxidation of the barrier metal pattern made of titanium nitride or tungsten nitride by the oxidation treatment process can be improved.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (3)

Forming an insulating film and a polysilicon film on the semiconductor substrate; Forming a preliminary gate structure including a tungsten silicide pattern, a barrier metal pattern, a tungsten film pattern, and a mask pattern on the polysilicon film; Plasma nitridating both sides of the preliminary gate structure and the polysilicon film to prevent diffusion of the oxidant in a subsequent oxidation process; Forming first spacers on sidewalls of the nitrided preliminary gate structure; Anisotropically etching a polysilicon layer to expose the gate oxide layer using the first spacers as a cutting mask to form a gate structure including a polysilicon layer pattern and a preliminary gate structure on which the first spacers are formed; And And oxidizing both sides of the gate structure. The method of claim 1, further comprising forming second spacers on sidewalls of the oxidized gate structure. The method of claim 1, wherein the forming of the preliminary gate structure including a tungsten silicide pattern, a barrier metal pattern, a tungsten film pattern, and a mask pattern on the polysilicon film includes: Forming a tungsten silicide film on the polysilicon film to reduce resistance of the metal; Forming a barrier metal film made of titanium nitride or tungsten nitride on the tungsten silicide film; Forming a tungsten film on the barrier metal film; Forming a mask pattern on the tungsten film; And Etching the tungsten film, the barrier metal film, and the tungsten silicide film using the mask pattern to form a tungsten silicide pattern, a barrier metal pattern, and a tungsten film pattern on the polysilicon film. Manufacturing method.

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